1
2
3
4
5 package arm64
6
7
8 var insts = [][]instEncoder{
9
10 {
11
12 {
13 goOp: APAND,
14 fixedBits: 0x25004000,
15 args: Pm_B__Pn_B__PgZ__Pd_B,
16 },
17 },
18
19 {
20
21 {
22 goOp: APANDS,
23 fixedBits: 0x25404000,
24 args: Pm_B__Pn_B__PgZ__Pd_B,
25 },
26 },
27
28 {
29
30 {
31 goOp: APBIC,
32 fixedBits: 0x25004010,
33 args: Pm_B__Pn_B__PgZ__Pd_B,
34 },
35 },
36
37 {
38
39 {
40 goOp: APBICS,
41 fixedBits: 0x25404010,
42 args: Pm_B__Pn_B__PgZ__Pd_B,
43 },
44 },
45
46 {
47
48 {
49 goOp: APBRKA,
50 fixedBits: 0x25104000,
51 args: Pn_B__PgZM__Pd_B,
52 },
53 },
54
55 {
56
57 {
58 goOp: APBRKAS,
59 fixedBits: 0x25504000,
60 args: Pn_B__PgZ__Pd_B,
61 },
62 },
63
64 {
65
66 {
67 goOp: APBRKB,
68 fixedBits: 0x25904000,
69 args: Pn_B__PgZM__Pd_B,
70 },
71 },
72
73 {
74
75 {
76 goOp: APBRKBS,
77 fixedBits: 0x25d04000,
78 args: Pn_B__PgZ__Pd_B,
79 },
80 },
81
82 {
83
84 {
85 goOp: APBRKN,
86 fixedBits: 0x25184000,
87 args: Pdm_B__Pn_B__PgZ__Pdm_B,
88 },
89 },
90
91 {
92
93 {
94 goOp: APBRKNS,
95 fixedBits: 0x25584000,
96 args: Pdm_B__Pn_B__PgZ__Pdm_B,
97 },
98 },
99
100 {
101
102 {
103 goOp: APBRKPA,
104 fixedBits: 0x2500c000,
105 args: Pm_B__Pn_B__PgZ__Pd_B,
106 },
107 },
108
109 {
110
111 {
112 goOp: APBRKPAS,
113 fixedBits: 0x2540c000,
114 args: Pm_B__Pn_B__PgZ__Pd_B,
115 },
116 },
117
118 {
119
120 {
121 goOp: APBRKPB,
122 fixedBits: 0x2500c010,
123 args: Pm_B__Pn_B__PgZ__Pd_B,
124 },
125 },
126
127 {
128
129 {
130 goOp: APBRKPBS,
131 fixedBits: 0x2540c010,
132 args: Pm_B__Pn_B__PgZ__Pd_B,
133 },
134 },
135
136 {
137
138 {
139 goOp: APEOR,
140 fixedBits: 0x25004200,
141 args: Pm_B__Pn_B__PgZ__Pd_B,
142 },
143 },
144
145 {
146
147 {
148 goOp: APEORS,
149 fixedBits: 0x25404200,
150 args: Pm_B__Pn_B__PgZ__Pd_B,
151 },
152 },
153
154 {
155
156 {
157 goOp: APNAND,
158 fixedBits: 0x25804210,
159 args: Pm_B__Pn_B__PgZ__Pd_B,
160 },
161 },
162
163 {
164
165 {
166 goOp: APNANDS,
167 fixedBits: 0x25c04210,
168 args: Pm_B__Pn_B__PgZ__Pd_B,
169 },
170 },
171
172 {
173
174 {
175 goOp: APNOR,
176 fixedBits: 0x25804200,
177 args: Pm_B__Pn_B__PgZ__Pd_B,
178 },
179 },
180
181 {
182
183 {
184 goOp: APNORS,
185 fixedBits: 0x25c04200,
186 args: Pm_B__Pn_B__PgZ__Pd_B,
187 },
188 },
189
190 {
191
192 {
193 goOp: APORN,
194 fixedBits: 0x25804010,
195 args: Pm_B__Pn_B__PgZ__Pd_B,
196 },
197 },
198
199 {
200
201 {
202 goOp: APORNS,
203 fixedBits: 0x25c04010,
204 args: Pm_B__Pn_B__PgZ__Pd_B,
205 },
206 },
207
208 {
209
210 {
211 goOp: APORR,
212 fixedBits: 0x25804000,
213 args: Pm_B__Pn_B__PgZ__Pd_B,
214 },
215 },
216
217 {
218
219 {
220 goOp: APORRS,
221 fixedBits: 0x25c04000,
222 args: Pm_B__Pn_B__PgZ__Pd_B,
223 },
224 },
225
226 {
227
228 {
229 goOp: APPFALSE,
230 fixedBits: 0x2518e400,
231 args: Pd_B,
232 },
233 },
234
235 {
236
237 {
238 goOp: APPFIRST,
239 fixedBits: 0x2558c000,
240 args: Pdn_B__Pg__Pdn_B,
241 },
242 },
243
244 {
245
246 {
247 goOp: APPNEXT,
248 fixedBits: 0x2519c400,
249 args: Pdn_T__Pv__Pdn_T,
250 },
251 },
252
253 {
254
255 {
256 goOp: APPTEST,
257 fixedBits: 0x2550c000,
258 args: Pn_B__Pg,
259 },
260 },
261
262 {
263
264 {
265 goOp: APPTRUE,
266 fixedBits: 0x25207810,
267 args: PNd_T,
268 },
269 },
270
271 {
272
273 {
274 goOp: APPUNPKHI,
275 fixedBits: 0x5314000,
276 args: Pn_B__Pd_H,
277 },
278 },
279
280 {
281
282 {
283 goOp: APPUNPKLO,
284 fixedBits: 0x5304000,
285 args: Pn_B__Pd_H,
286 },
287 },
288
289 {
290
291 {
292 goOp: APRDFFR,
293 fixedBits: 0x2519f000,
294 args: Pd_B,
295 },
296
297 {
298 goOp: APRDFFR,
299 fixedBits: 0x2518f000,
300 args: PgZ__Pd_B,
301 },
302 },
303
304 {
305
306 {
307 goOp: APRDFFRS,
308 fixedBits: 0x2558f000,
309 args: PgZ__Pd_B,
310 },
311 },
312
313 {
314
315 {
316 goOp: APREV,
317 fixedBits: 0x5344000,
318 args: Pn_T__Pd_T,
319 },
320 },
321
322 {
323
324 {
325 goOp: APSEL,
326 fixedBits: 0x25004210,
327 args: Pm_B__Pn_B__Pg__Pd_B,
328 },
329 },
330
331 {
332
333 {
334 goOp: APTRN1,
335 fixedBits: 0x5205000,
336 args: Pm_T__Pn_T__Pd_T,
337 },
338 },
339
340 {
341
342 {
343 goOp: APTRN2,
344 fixedBits: 0x5205400,
345 args: Pm_T__Pn_T__Pd_T,
346 },
347 },
348
349 {
350
351 {
352 goOp: APUZP1,
353 fixedBits: 0x5204800,
354 args: Pm_T__Pn_T__Pd_T,
355 },
356 },
357
358 {
359
360 {
361 goOp: APUZP2,
362 fixedBits: 0x5204c00,
363 args: Pm_T__Pn_T__Pd_T,
364 },
365 },
366
367 {
368
369 {
370 goOp: APWRFFR,
371 fixedBits: 0x25289000,
372 args: Pn_B,
373 },
374 },
375
376 {
377
378 {
379 goOp: APZIP1,
380 fixedBits: 0x5204000,
381 args: Pm_T__Pn_T__Pd_T,
382 },
383 },
384
385 {
386
387 {
388 goOp: APZIP2,
389 fixedBits: 0x5204400,
390 args: Pm_T__Pn_T__Pd_T,
391 },
392 },
393
394 {
395
396 {
397 goOp: ASETFFR,
398 fixedBits: 0x252c9000,
399 args: oc,
400 },
401 },
402
403 {
404
405 {
406 goOp: AZABS,
407 fixedBits: 0x416a000,
408 args: Zn_T__PgM__Zd_T__2,
409 },
410
411 {
412 goOp: AZABS,
413 fixedBits: 0x406a000,
414 args: Zn_T__PgZ__Zd_T__2,
415 },
416 },
417
418 {
419
420 {
421 goOp: AZADCLB,
422 fixedBits: 0x4500d000,
423 args: Zm_T__Zn_T__Zda_T__1,
424 },
425 },
426
427 {
428
429 {
430 goOp: AZADCLT,
431 fixedBits: 0x4500d400,
432 args: Zm_T__Zn_T__Zda_T__1,
433 },
434 },
435
436 {
437
438 {
439 goOp: AZADD,
440 fixedBits: 0x4000000,
441 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
442 },
443
444 {
445 goOp: AZADD,
446 fixedBits: 0x4200000,
447 args: Zm_T__Zn_T__Zd_T__1,
448 },
449 },
450
451 {
452
453 {
454 goOp: AZADDHNB,
455 fixedBits: 0x45206000,
456 args: Zm_Tb__Zn_Tb__Zd_T__2,
457 },
458 },
459
460 {
461
462 {
463 goOp: AZADDHNT,
464 fixedBits: 0x45206400,
465 args: Zm_Tb__Zn_Tb__Zd_T__2,
466 },
467 },
468
469 {
470
471 {
472 goOp: AZADDP,
473 fixedBits: 0x4411a000,
474 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
475 },
476 },
477
478 {
479
480 {
481 goOp: AZADDPT,
482 fixedBits: 0x4c40000,
483 args: Zm_D__Zdn_D__PgM__Zdn_D,
484 },
485
486 {
487 goOp: AZADDPT,
488 fixedBits: 0x4e00800,
489 args: Zm_D__Zn_D__Zd_D,
490 },
491 },
492
493 {
494
495 {
496 goOp: AZADDQP,
497 fixedBits: 0x4207800,
498 args: Zm_T__Zn_T__Zd_T__1,
499 },
500 },
501
502 {
503
504 {
505 goOp: AZADDQV,
506 fixedBits: 0x4052000,
507 args: Zn_Tb__Pg__Vd_T__1,
508 },
509 },
510
511 {
512
513 {
514 goOp: AZADDSUBP,
515 fixedBits: 0x4207c00,
516 args: Zm_T__Zn_T__Zd_T__1,
517 },
518 },
519
520 {
521
522 {
523 goOp: AZAESD,
524 fixedBits: 0x4522e400,
525 args: Zm_B__Zdn_B__Zdn_B,
526 },
527 },
528
529 {
530
531 {
532 goOp: AZAESE,
533 fixedBits: 0x4522e000,
534 args: Zm_B__Zdn_B__Zdn_B,
535 },
536 },
537
538 {
539
540 {
541 goOp: AZAESIMC,
542 fixedBits: 0x4520e400,
543 args: Zdn_B__Zdn_B,
544 },
545 },
546
547 {
548
549 {
550 goOp: AZAESMC,
551 fixedBits: 0x4520e000,
552 args: Zdn_B__Zdn_B,
553 },
554 },
555
556 {
557
558 {
559 goOp: AZAND,
560 fixedBits: 0x41a0000,
561 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
562 },
563
564 {
565 goOp: AZAND,
566 fixedBits: 0x4203000,
567 args: Zm_D__Zn_D__Zd_D,
568 },
569 },
570
571 {
572
573 {
574 goOp: AZANDQV,
575 fixedBits: 0x41e2000,
576 args: Zn_Tb__Pg__Vd_T__1,
577 },
578 },
579
580 {
581
582 {
583 goOp: AZASR,
584 fixedBits: 0x4188000,
585 args: Zm_D__Zdn_T__PgM__Zdn_T,
586 },
587
588 {
589 goOp: AZASR,
590 fixedBits: 0x4108000,
591 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
592 },
593
594 {
595 goOp: AZASR,
596 fixedBits: 0x4208000,
597 args: Zm_D__Zn_T__Zd_T,
598 },
599 },
600
601 {
602
603 {
604 goOp: AZASRR,
605 fixedBits: 0x4148000,
606 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
607 },
608 },
609
610 {
611
612 {
613 goOp: AZBCAX,
614 fixedBits: 0x4603800,
615 args: Zk_D__Zm_D__Zdn_D__Zdn_D,
616 },
617 },
618
619 {
620
621 {
622 goOp: AZBDEP,
623 fixedBits: 0x4500b400,
624 args: Zm_T__Zn_T__Zd_T__1,
625 },
626 },
627
628 {
629
630 {
631 goOp: AZBEXT,
632 fixedBits: 0x4500b000,
633 args: Zm_T__Zn_T__Zd_T__1,
634 },
635 },
636
637 {
638
639 {
640 goOp: AZBF1CVT,
641 fixedBits: 0x65083800,
642 args: Zn_B__Zd_H,
643 },
644 },
645
646 {
647
648 {
649 goOp: AZBF1CVTLT,
650 fixedBits: 0x65093800,
651 args: Zn_B__Zd_H,
652 },
653 },
654
655 {
656
657 {
658 goOp: AZBF2CVT,
659 fixedBits: 0x65083c00,
660 args: Zn_B__Zd_H,
661 },
662 },
663
664 {
665
666 {
667 goOp: AZBF2CVTLT,
668 fixedBits: 0x65093c00,
669 args: Zn_B__Zd_H,
670 },
671 },
672
673 {
674
675 {
676 goOp: AZBFADD,
677 fixedBits: 0x65008000,
678 args: Zm_H__Zdn_H__PgM__Zdn_H,
679 },
680
681 {
682 goOp: AZBFADD,
683 fixedBits: 0x65000000,
684 args: Zm_H__Zn_H__Zd_H,
685 },
686 },
687
688 {
689
690 {
691 goOp: AZBFCLAMP,
692 fixedBits: 0x64202400,
693 args: Zm_H__Zn_H__Zd_H,
694 },
695 },
696
697 {
698
699 {
700 goOp: AZBFCVT,
701 fixedBits: 0x649ac000,
702 args: Zn_S__PgZ__Zd_H,
703 },
704
705 {
706 goOp: AZBFCVT,
707 fixedBits: 0x658aa000,
708 args: Zn_S__PgM__Zd_H,
709 },
710 },
711
712 {
713
714 {
715 goOp: AZBFCVTNT,
716 fixedBits: 0x648aa000,
717 args: Zn_S__PgM__Zd_H,
718 },
719
720 {
721 goOp: AZBFCVTNT,
722 fixedBits: 0x6482a000,
723 args: Zn_S__PgZ__Zd_H,
724 },
725 },
726
727 {
728
729 {
730 goOp: AZBFDOT,
731 fixedBits: 0x64608000,
732 args: Zm_H__Zn_H__Zda_S,
733 },
734 },
735
736 {
737
738 {
739 goOp: AZBFMAX,
740 fixedBits: 0x65068000,
741 args: Zm_H__Zdn_H__PgM__Zdn_H,
742 },
743 },
744
745 {
746
747 {
748 goOp: AZBFMAXNM,
749 fixedBits: 0x65048000,
750 args: Zm_H__Zdn_H__PgM__Zdn_H,
751 },
752 },
753
754 {
755
756 {
757 goOp: AZBFMIN,
758 fixedBits: 0x65078000,
759 args: Zm_H__Zdn_H__PgM__Zdn_H,
760 },
761 },
762
763 {
764
765 {
766 goOp: AZBFMINNM,
767 fixedBits: 0x65058000,
768 args: Zm_H__Zdn_H__PgM__Zdn_H,
769 },
770 },
771
772 {
773
774 {
775 goOp: AZBFMLA,
776 fixedBits: 0x65200000,
777 args: Zm_H__Zn_H__PgM__Zda_H,
778 },
779 },
780
781 {
782
783 {
784 goOp: AZBFMLALB,
785 fixedBits: 0x64e08000,
786 args: Zm_H__Zn_H__Zda_S,
787 },
788 },
789
790 {
791
792 {
793 goOp: AZBFMLALT,
794 fixedBits: 0x64e08400,
795 args: Zm_H__Zn_H__Zda_S,
796 },
797 },
798
799 {
800
801 {
802 goOp: AZBFMLS,
803 fixedBits: 0x65202000,
804 args: Zm_H__Zn_H__PgM__Zda_H,
805 },
806 },
807
808 {
809
810 {
811 goOp: AZBFMLSLB,
812 fixedBits: 0x64e0a000,
813 args: Zm_H__Zn_H__Zda_S,
814 },
815 },
816
817 {
818
819 {
820 goOp: AZBFMLSLT,
821 fixedBits: 0x64e0a400,
822 args: Zm_H__Zn_H__Zda_S,
823 },
824 },
825
826 {
827
828 {
829 goOp: AZBFMMLA,
830 fixedBits: 0x64e0e000,
831 args: Zm_H__Zn_H__Zda_H,
832 },
833
834 {
835 goOp: AZBFMMLA,
836 fixedBits: 0x6460e400,
837 args: Zm_H__Zn_H__Zda_S,
838 },
839 },
840
841 {
842
843 {
844 goOp: AZBFMUL,
845 fixedBits: 0x65028000,
846 args: Zm_H__Zdn_H__PgM__Zdn_H,
847 },
848
849 {
850 goOp: AZBFMUL,
851 fixedBits: 0x65000800,
852 args: Zm_H__Zn_H__Zd_H,
853 },
854 },
855
856 {
857
858 {
859 goOp: AZBFSCALE,
860 fixedBits: 0x65098000,
861 args: Zm_H__Zdn_H__PgM__Zdn_H,
862 },
863 },
864
865 {
866
867 {
868 goOp: AZBFSUB,
869 fixedBits: 0x65000400,
870 args: Zm_H__Zn_H__Zd_H,
871 },
872
873 {
874 goOp: AZBFSUB,
875 fixedBits: 0x65018000,
876 args: Zm_H__Zdn_H__PgM__Zdn_H,
877 },
878 },
879
880 {
881
882 {
883 goOp: AZBGRP,
884 fixedBits: 0x4500b800,
885 args: Zm_T__Zn_T__Zd_T__1,
886 },
887 },
888
889 {
890
891 {
892 goOp: AZBIC,
893 fixedBits: 0x41b0000,
894 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
895 },
896
897 {
898 goOp: AZBIC,
899 fixedBits: 0x4e03000,
900 args: Zm_D__Zn_D__Zd_D,
901 },
902 },
903
904 {
905
906 {
907 goOp: AZBSL,
908 fixedBits: 0x4203c00,
909 args: Zk_D__Zm_D__Zdn_D__Zdn_D,
910 },
911 },
912
913 {
914
915 {
916 goOp: AZBSL1N,
917 fixedBits: 0x4603c00,
918 args: Zk_D__Zm_D__Zdn_D__Zdn_D,
919 },
920 },
921
922 {
923
924 {
925 goOp: AZBSL2N,
926 fixedBits: 0x4a03c00,
927 args: Zk_D__Zm_D__Zdn_D__Zdn_D,
928 },
929 },
930
931 {
932
933 {
934 goOp: AZCLASTA,
935 fixedBits: 0x5288000,
936 args: Zm_T__Zdn_T__Pg__Zdn_T,
937 },
938 },
939
940 {
941
942 {
943 goOp: AZCLASTB,
944 fixedBits: 0x5298000,
945 args: Zm_T__Zdn_T__Pg__Zdn_T,
946 },
947 },
948
949 {
950
951 {
952 goOp: AZCLS,
953 fixedBits: 0x408a000,
954 args: Zn_T__PgZ__Zd_T__2,
955 },
956
957 {
958 goOp: AZCLS,
959 fixedBits: 0x418a000,
960 args: Zn_T__PgM__Zd_T__2,
961 },
962 },
963
964 {
965
966 {
967 goOp: AZCLZ,
968 fixedBits: 0x409a000,
969 args: Zn_T__PgZ__Zd_T__2,
970 },
971
972 {
973 goOp: AZCLZ,
974 fixedBits: 0x419a000,
975 args: Zn_T__PgM__Zd_T__2,
976 },
977 },
978
979 {
980
981 {
982 goOp: AZCMPEQ,
983 fixedBits: 0x2400a000,
984 args: Zm_T__Zn_T__PgZ__Pd_T__2,
985 },
986
987 {
988 goOp: AZCMPEQ,
989 fixedBits: 0x24002000,
990 args: Zm_D__Zn_T__PgZ__Pd_T,
991 },
992 },
993
994 {
995
996 {
997 goOp: AZCMPGE,
998 fixedBits: 0x24008000,
999 args: Zm_T__Zn_T__PgZ__Pd_T__2,
1000 },
1001
1002 {
1003 goOp: AZCMPGE,
1004 fixedBits: 0x24004000,
1005 args: Zm_D__Zn_T__PgZ__Pd_T,
1006 },
1007 },
1008
1009 {
1010
1011 {
1012 goOp: AZCMPGT,
1013 fixedBits: 0x24008010,
1014 args: Zm_T__Zn_T__PgZ__Pd_T__2,
1015 },
1016
1017 {
1018 goOp: AZCMPGT,
1019 fixedBits: 0x24004010,
1020 args: Zm_D__Zn_T__PgZ__Pd_T,
1021 },
1022 },
1023
1024 {
1025
1026 {
1027 goOp: AZCMPHI,
1028 fixedBits: 0x2400c010,
1029 args: Zm_D__Zn_T__PgZ__Pd_T,
1030 },
1031
1032 {
1033 goOp: AZCMPHI,
1034 fixedBits: 0x24000010,
1035 args: Zm_T__Zn_T__PgZ__Pd_T__2,
1036 },
1037 },
1038
1039 {
1040
1041 {
1042 goOp: AZCMPHS,
1043 fixedBits: 0x24000000,
1044 args: Zm_T__Zn_T__PgZ__Pd_T__2,
1045 },
1046
1047 {
1048 goOp: AZCMPHS,
1049 fixedBits: 0x2400c000,
1050 args: Zm_D__Zn_T__PgZ__Pd_T,
1051 },
1052 },
1053
1054 {
1055
1056 {
1057 goOp: AZCMPLE,
1058 fixedBits: 0x24006010,
1059 args: Zm_D__Zn_T__PgZ__Pd_T,
1060 },
1061 },
1062
1063 {
1064
1065 {
1066 goOp: AZCMPLO,
1067 fixedBits: 0x2400e000,
1068 args: Zm_D__Zn_T__PgZ__Pd_T,
1069 },
1070 },
1071
1072 {
1073
1074 {
1075 goOp: AZCMPLS,
1076 fixedBits: 0x2400e010,
1077 args: Zm_D__Zn_T__PgZ__Pd_T,
1078 },
1079 },
1080
1081 {
1082
1083 {
1084 goOp: AZCMPLT,
1085 fixedBits: 0x24006000,
1086 args: Zm_D__Zn_T__PgZ__Pd_T,
1087 },
1088 },
1089
1090 {
1091
1092 {
1093 goOp: AZCMPNE,
1094 fixedBits: 0x24002010,
1095 args: Zm_D__Zn_T__PgZ__Pd_T,
1096 },
1097
1098 {
1099 goOp: AZCMPNE,
1100 fixedBits: 0x2400a010,
1101 args: Zm_T__Zn_T__PgZ__Pd_T__2,
1102 },
1103 },
1104
1105 {
1106
1107 {
1108 goOp: AZCNOT,
1109 fixedBits: 0x41ba000,
1110 args: Zn_T__PgM__Zd_T__2,
1111 },
1112
1113 {
1114 goOp: AZCNOT,
1115 fixedBits: 0x40ba000,
1116 args: Zn_T__PgZ__Zd_T__2,
1117 },
1118 },
1119
1120 {
1121
1122 {
1123 goOp: AZCNT,
1124 fixedBits: 0x41aa000,
1125 args: Zn_T__PgM__Zd_T__2,
1126 },
1127
1128 {
1129 goOp: AZCNT,
1130 fixedBits: 0x40aa000,
1131 args: Zn_T__PgZ__Zd_T__2,
1132 },
1133 },
1134
1135 {
1136
1137 {
1138 goOp: AZCOMPACT,
1139 fixedBits: 0x5218000,
1140 args: Zn_T__Pg__Zd_T__1,
1141 },
1142
1143 {
1144 goOp: AZCOMPACT,
1145 fixedBits: 0x5a18000,
1146 args: Zn_T__Pg__Zd_T__2,
1147 },
1148 },
1149
1150 {
1151
1152 {
1153 goOp: AZDECP,
1154 fixedBits: 0x252d8000,
1155 args: Pm_T__Zdn_T,
1156 },
1157 },
1158
1159 {
1160
1161 {
1162 goOp: AZEOR,
1163 fixedBits: 0x4190000,
1164 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
1165 },
1166
1167 {
1168 goOp: AZEOR,
1169 fixedBits: 0x4a03000,
1170 args: Zm_D__Zn_D__Zd_D,
1171 },
1172 },
1173
1174 {
1175
1176 {
1177 goOp: AZEOR3,
1178 fixedBits: 0x4203800,
1179 args: Zk_D__Zm_D__Zdn_D__Zdn_D,
1180 },
1181 },
1182
1183 {
1184
1185 {
1186 goOp: AZEORBT,
1187 fixedBits: 0x45009000,
1188 args: Zm_T__Zn_T__Zd_T__1,
1189 },
1190 },
1191
1192 {
1193
1194 {
1195 goOp: AZEORQV,
1196 fixedBits: 0x41d2000,
1197 args: Zn_Tb__Pg__Vd_T__1,
1198 },
1199 },
1200
1201 {
1202
1203 {
1204 goOp: AZEORTB,
1205 fixedBits: 0x45009400,
1206 args: Zm_T__Zn_T__Zd_T__1,
1207 },
1208 },
1209
1210 {
1211
1212 {
1213 goOp: AZEXPAND,
1214 fixedBits: 0x5318000,
1215 args: Zn_T__Pg__Zd_T__3,
1216 },
1217 },
1218
1219 {
1220
1221 {
1222 goOp: AZF1CVT,
1223 fixedBits: 0x65083000,
1224 args: Zn_B__Zd_H,
1225 },
1226 },
1227
1228 {
1229
1230 {
1231 goOp: AZF1CVTLT,
1232 fixedBits: 0x65093000,
1233 args: Zn_B__Zd_H,
1234 },
1235 },
1236
1237 {
1238
1239 {
1240 goOp: AZF2CVT,
1241 fixedBits: 0x65083400,
1242 args: Zn_B__Zd_H,
1243 },
1244 },
1245
1246 {
1247
1248 {
1249 goOp: AZF2CVTLT,
1250 fixedBits: 0x65093400,
1251 args: Zn_B__Zd_H,
1252 },
1253 },
1254
1255 {
1256
1257 {
1258 goOp: AZFABD,
1259 fixedBits: 0x65088000,
1260 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
1261 },
1262 },
1263
1264 {
1265
1266 {
1267 goOp: AZFABS,
1268 fixedBits: 0x40ca000,
1269 args: Zn_T__PgZ__Zd_T__1,
1270 },
1271
1272 {
1273 goOp: AZFABS,
1274 fixedBits: 0x41ca000,
1275 args: Zn_T__PgM__Zd_T__1,
1276 },
1277 },
1278
1279 {
1280
1281 {
1282 goOp: AZFACGE,
1283 fixedBits: 0x6500c010,
1284 args: Zm_T__Zn_T__PgZ__Pd_T__1,
1285 },
1286 },
1287
1288 {
1289
1290 {
1291 goOp: AZFACGT,
1292 fixedBits: 0x6500e010,
1293 args: Zm_T__Zn_T__PgZ__Pd_T__1,
1294 },
1295 },
1296
1297 {
1298
1299 {
1300 goOp: AZFADD,
1301 fixedBits: 0x65008000,
1302 args: Zm_T__Zdn_T__PgM__Zdn_T__3,
1303 },
1304
1305 {
1306 goOp: AZFADD,
1307 fixedBits: 0x65000000,
1308 args: Zm_T__Zn_T__Zd_T__2,
1309 },
1310 },
1311
1312 {
1313
1314 {
1315 goOp: AZFADDP,
1316 fixedBits: 0x64108000,
1317 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
1318 },
1319 },
1320
1321 {
1322
1323 {
1324 goOp: AZFADDQV,
1325 fixedBits: 0x6410a000,
1326 args: Zn_Tb__Pg__Vd_T__2,
1327 },
1328 },
1329
1330 {
1331
1332 {
1333 goOp: AZFAMAX,
1334 fixedBits: 0x650e8000,
1335 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
1336 },
1337 },
1338
1339 {
1340
1341 {
1342 goOp: AZFAMIN,
1343 fixedBits: 0x650f8000,
1344 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
1345 },
1346 },
1347
1348 {
1349
1350 {
1351 goOp: AZFCLAMP,
1352 fixedBits: 0x64202400,
1353 args: Zm_T__Zn_T__Zd_T__2,
1354 },
1355 },
1356
1357 {
1358
1359 {
1360 goOp: AZFCMEQ,
1361 fixedBits: 0x65006000,
1362 args: Zm_T__Zn_T__PgZ__Pd_T__1,
1363 },
1364 },
1365
1366 {
1367
1368 {
1369 goOp: AZFCMGE,
1370 fixedBits: 0x65004000,
1371 args: Zm_T__Zn_T__PgZ__Pd_T__1,
1372 },
1373 },
1374
1375 {
1376
1377 {
1378 goOp: AZFCMGT,
1379 fixedBits: 0x65004010,
1380 args: Zm_T__Zn_T__PgZ__Pd_T__1,
1381 },
1382 },
1383
1384 {
1385
1386 {
1387 goOp: AZFCMNE,
1388 fixedBits: 0x65006010,
1389 args: Zm_T__Zn_T__PgZ__Pd_T__1,
1390 },
1391 },
1392
1393 {
1394
1395 {
1396 goOp: AZFCMUO,
1397 fixedBits: 0x6500c000,
1398 args: Zm_T__Zn_T__PgZ__Pd_T__1,
1399 },
1400 },
1401
1402 {
1403
1404 {
1405 goOp: AZFCVT,
1406 fixedBits: 0x6589a000,
1407 args: Zn_H__PgM__Zd_S,
1408 },
1409
1410 {
1411 goOp: AZFCVT,
1412 fixedBits: 0x65cba000,
1413 args: Zn_S__PgM__Zd_D,
1414 },
1415
1416 {
1417 goOp: AZFCVT,
1418 fixedBits: 0x649aa000,
1419 args: Zn_H__PgZ__Zd_S,
1420 },
1421
1422 {
1423 goOp: AZFCVT,
1424 fixedBits: 0x65c9a000,
1425 args: Zn_H__PgM__Zd_D,
1426 },
1427
1428 {
1429 goOp: AZFCVT,
1430 fixedBits: 0x64daa000,
1431 args: Zn_H__PgZ__Zd_D,
1432 },
1433
1434 {
1435 goOp: AZFCVT,
1436 fixedBits: 0x6588a000,
1437 args: Zn_S__PgM__Zd_H,
1438 },
1439
1440 {
1441 goOp: AZFCVT,
1442 fixedBits: 0x649a8000,
1443 args: Zn_S__PgZ__Zd_H,
1444 },
1445
1446 {
1447 goOp: AZFCVT,
1448 fixedBits: 0x64dae000,
1449 args: Zn_S__PgZ__Zd_D,
1450 },
1451
1452 {
1453 goOp: AZFCVT,
1454 fixedBits: 0x65c8a000,
1455 args: Zn_D__PgM__Zd_H,
1456 },
1457
1458 {
1459 goOp: AZFCVT,
1460 fixedBits: 0x64da8000,
1461 args: Zn_D__PgZ__Zd_H,
1462 },
1463
1464 {
1465 goOp: AZFCVT,
1466 fixedBits: 0x65caa000,
1467 args: Zn_D__PgM__Zd_S,
1468 },
1469
1470 {
1471 goOp: AZFCVT,
1472 fixedBits: 0x64dac000,
1473 args: Zn_D__PgZ__Zd_S,
1474 },
1475 },
1476
1477 {
1478
1479 {
1480 goOp: AZFCVTLT,
1481 fixedBits: 0x6489a000,
1482 args: Zn_H__PgM__Zd_S,
1483 },
1484
1485 {
1486 goOp: AZFCVTLT,
1487 fixedBits: 0x6481a000,
1488 args: Zn_H__PgZ__Zd_S,
1489 },
1490
1491 {
1492 goOp: AZFCVTLT,
1493 fixedBits: 0x64cba000,
1494 args: Zn_S__PgM__Zd_D,
1495 },
1496
1497 {
1498 goOp: AZFCVTLT,
1499 fixedBits: 0x64c3a000,
1500 args: Zn_S__PgZ__Zd_D,
1501 },
1502 },
1503
1504 {
1505
1506 {
1507 goOp: AZFCVTNT,
1508 fixedBits: 0x6488a000,
1509 args: Zn_S__PgM__Zd_H,
1510 },
1511
1512 {
1513 goOp: AZFCVTNT,
1514 fixedBits: 0x6480a000,
1515 args: Zn_S__PgZ__Zd_H,
1516 },
1517
1518 {
1519 goOp: AZFCVTNT,
1520 fixedBits: 0x64caa000,
1521 args: Zn_D__PgM__Zd_S,
1522 },
1523
1524 {
1525 goOp: AZFCVTNT,
1526 fixedBits: 0x64c2a000,
1527 args: Zn_D__PgZ__Zd_S,
1528 },
1529 },
1530
1531 {
1532
1533 {
1534 goOp: AZFCVTX,
1535 fixedBits: 0x641ac000,
1536 args: Zn_D__PgZ__Zd_S,
1537 },
1538
1539 {
1540 goOp: AZFCVTX,
1541 fixedBits: 0x650aa000,
1542 args: Zn_D__PgM__Zd_S,
1543 },
1544 },
1545
1546 {
1547
1548 {
1549 goOp: AZFCVTXNT,
1550 fixedBits: 0x640aa000,
1551 args: Zn_D__PgM__Zd_S,
1552 },
1553
1554 {
1555 goOp: AZFCVTXNT,
1556 fixedBits: 0x6402a000,
1557 args: Zn_D__PgZ__Zd_S,
1558 },
1559 },
1560
1561 {
1562
1563 {
1564 goOp: AZFCVTZS,
1565 fixedBits: 0x655aa000,
1566 args: Zn_H__PgM__Zd_H,
1567 },
1568
1569 {
1570 goOp: AZFCVTZS,
1571 fixedBits: 0x645ec000,
1572 args: Zn_H__PgZ__Zd_H,
1573 },
1574
1575 {
1576 goOp: AZFCVTZS,
1577 fixedBits: 0x655ca000,
1578 args: Zn_H__PgM__Zd_S,
1579 },
1580
1581 {
1582 goOp: AZFCVTZS,
1583 fixedBits: 0x645f8000,
1584 args: Zn_H__PgZ__Zd_S,
1585 },
1586
1587 {
1588 goOp: AZFCVTZS,
1589 fixedBits: 0x655ea000,
1590 args: Zn_H__PgM__Zd_D,
1591 },
1592
1593 {
1594 goOp: AZFCVTZS,
1595 fixedBits: 0x645fc000,
1596 args: Zn_H__PgZ__Zd_D,
1597 },
1598
1599 {
1600 goOp: AZFCVTZS,
1601 fixedBits: 0x659ca000,
1602 args: Zn_S__PgM__Zd_S,
1603 },
1604
1605 {
1606 goOp: AZFCVTZS,
1607 fixedBits: 0x649f8000,
1608 args: Zn_S__PgZ__Zd_S,
1609 },
1610
1611 {
1612 goOp: AZFCVTZS,
1613 fixedBits: 0x65dca000,
1614 args: Zn_S__PgM__Zd_D,
1615 },
1616
1617 {
1618 goOp: AZFCVTZS,
1619 fixedBits: 0x64df8000,
1620 args: Zn_S__PgZ__Zd_D,
1621 },
1622
1623 {
1624 goOp: AZFCVTZS,
1625 fixedBits: 0x65d8a000,
1626 args: Zn_D__PgM__Zd_S,
1627 },
1628
1629 {
1630 goOp: AZFCVTZS,
1631 fixedBits: 0x64de8000,
1632 args: Zn_D__PgZ__Zd_S,
1633 },
1634
1635 {
1636 goOp: AZFCVTZS,
1637 fixedBits: 0x65dea000,
1638 args: Zn_D__PgM__Zd_D,
1639 },
1640
1641 {
1642 goOp: AZFCVTZS,
1643 fixedBits: 0x64dfc000,
1644 args: Zn_D__PgZ__Zd_D,
1645 },
1646 },
1647
1648 {
1649
1650 {
1651 goOp: AZFCVTZU,
1652 fixedBits: 0x64dea000,
1653 args: Zn_D__PgZ__Zd_S,
1654 },
1655
1656 {
1657 goOp: AZFCVTZU,
1658 fixedBits: 0x655fa000,
1659 args: Zn_H__PgM__Zd_D,
1660 },
1661
1662 {
1663 goOp: AZFCVTZU,
1664 fixedBits: 0x655ba000,
1665 args: Zn_H__PgM__Zd_H,
1666 },
1667
1668 {
1669 goOp: AZFCVTZU,
1670 fixedBits: 0x645ee000,
1671 args: Zn_H__PgZ__Zd_H,
1672 },
1673
1674 {
1675 goOp: AZFCVTZU,
1676 fixedBits: 0x64dfe000,
1677 args: Zn_D__PgZ__Zd_D,
1678 },
1679
1680 {
1681 goOp: AZFCVTZU,
1682 fixedBits: 0x655da000,
1683 args: Zn_H__PgM__Zd_S,
1684 },
1685
1686 {
1687 goOp: AZFCVTZU,
1688 fixedBits: 0x645fa000,
1689 args: Zn_H__PgZ__Zd_S,
1690 },
1691
1692 {
1693 goOp: AZFCVTZU,
1694 fixedBits: 0x645fe000,
1695 args: Zn_H__PgZ__Zd_D,
1696 },
1697
1698 {
1699 goOp: AZFCVTZU,
1700 fixedBits: 0x65dfa000,
1701 args: Zn_D__PgM__Zd_D,
1702 },
1703
1704 {
1705 goOp: AZFCVTZU,
1706 fixedBits: 0x659da000,
1707 args: Zn_S__PgM__Zd_S,
1708 },
1709
1710 {
1711 goOp: AZFCVTZU,
1712 fixedBits: 0x65d9a000,
1713 args: Zn_D__PgM__Zd_S,
1714 },
1715
1716 {
1717 goOp: AZFCVTZU,
1718 fixedBits: 0x64dfa000,
1719 args: Zn_S__PgZ__Zd_D,
1720 },
1721
1722 {
1723 goOp: AZFCVTZU,
1724 fixedBits: 0x65dda000,
1725 args: Zn_S__PgM__Zd_D,
1726 },
1727
1728 {
1729 goOp: AZFCVTZU,
1730 fixedBits: 0x649fa000,
1731 args: Zn_S__PgZ__Zd_S,
1732 },
1733 },
1734
1735 {
1736
1737 {
1738 goOp: AZFDIV,
1739 fixedBits: 0x650d8000,
1740 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
1741 },
1742 },
1743
1744 {
1745
1746 {
1747 goOp: AZFDIVR,
1748 fixedBits: 0x650c8000,
1749 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
1750 },
1751 },
1752
1753 {
1754
1755 {
1756 goOp: AZFDOT,
1757 fixedBits: 0x64608400,
1758 args: Zm_B__Zn_B__Zda_S,
1759 },
1760
1761 {
1762 goOp: AZFDOT,
1763 fixedBits: 0x64208400,
1764 args: Zm_B__Zn_B__Zda_H,
1765 },
1766
1767 {
1768 goOp: AZFDOT,
1769 fixedBits: 0x64208000,
1770 args: Zm_H__Zn_H__Zda_S,
1771 },
1772 },
1773
1774 {
1775
1776 {
1777 goOp: AZFEXPA,
1778 fixedBits: 0x420b800,
1779 args: Zn_T__Zd_T__1,
1780 },
1781 },
1782
1783 {
1784
1785 {
1786 goOp: AZFLOGB,
1787 fixedBits: 0x6518a000,
1788 args: Zn_T__PgM__Zd_T__6,
1789 },
1790
1791 {
1792 goOp: AZFLOGB,
1793 fixedBits: 0x641e8000,
1794 args: Zn_T__PgZ__Zd_T__6,
1795 },
1796 },
1797
1798 {
1799
1800 {
1801 goOp: AZFMAD,
1802 fixedBits: 0x65208000,
1803 args: Za_T__Zm_T__PgM__Zdn_T__1,
1804 },
1805 },
1806
1807 {
1808
1809 {
1810 goOp: AZFMAX,
1811 fixedBits: 0x65068000,
1812 args: Zm_T__Zdn_T__PgM__Zdn_T__3,
1813 },
1814 },
1815
1816 {
1817
1818 {
1819 goOp: AZFMAXNM,
1820 fixedBits: 0x65048000,
1821 args: Zm_T__Zdn_T__PgM__Zdn_T__3,
1822 },
1823 },
1824
1825 {
1826
1827 {
1828 goOp: AZFMAXNMP,
1829 fixedBits: 0x64148000,
1830 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
1831 },
1832 },
1833
1834 {
1835
1836 {
1837 goOp: AZFMAXNMQV,
1838 fixedBits: 0x6414a000,
1839 args: Zn_Tb__Pg__Vd_T__2,
1840 },
1841 },
1842
1843 {
1844
1845 {
1846 goOp: AZFMAXP,
1847 fixedBits: 0x64168000,
1848 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
1849 },
1850 },
1851
1852 {
1853
1854 {
1855 goOp: AZFMAXQV,
1856 fixedBits: 0x6416a000,
1857 args: Zn_Tb__Pg__Vd_T__2,
1858 },
1859 },
1860
1861 {
1862
1863 {
1864 goOp: AZFMIN,
1865 fixedBits: 0x65078000,
1866 args: Zm_T__Zdn_T__PgM__Zdn_T__3,
1867 },
1868 },
1869
1870 {
1871
1872 {
1873 goOp: AZFMINNM,
1874 fixedBits: 0x65058000,
1875 args: Zm_T__Zdn_T__PgM__Zdn_T__3,
1876 },
1877 },
1878
1879 {
1880
1881 {
1882 goOp: AZFMINNMP,
1883 fixedBits: 0x64158000,
1884 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
1885 },
1886 },
1887
1888 {
1889
1890 {
1891 goOp: AZFMINNMQV,
1892 fixedBits: 0x6415a000,
1893 args: Zn_Tb__Pg__Vd_T__2,
1894 },
1895 },
1896
1897 {
1898
1899 {
1900 goOp: AZFMINP,
1901 fixedBits: 0x64178000,
1902 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
1903 },
1904 },
1905
1906 {
1907
1908 {
1909 goOp: AZFMINQV,
1910 fixedBits: 0x6417a000,
1911 args: Zn_Tb__Pg__Vd_T__2,
1912 },
1913 },
1914
1915 {
1916
1917 {
1918 goOp: AZFMLA,
1919 fixedBits: 0x65200000,
1920 args: Zm_T__Zn_T__PgM__Zda_T__1,
1921 },
1922 },
1923
1924 {
1925
1926 {
1927 goOp: AZFMLALB,
1928 fixedBits: 0x64a08000,
1929 args: Zm_H__Zn_H__Zda_S,
1930 },
1931
1932 {
1933 goOp: AZFMLALB,
1934 fixedBits: 0x64a08800,
1935 args: Zm_B__Zn_B__Zda_H,
1936 },
1937 },
1938
1939 {
1940
1941 {
1942 goOp: AZFMLALLBB,
1943 fixedBits: 0x64208800,
1944 args: Zm_B__Zn_B__Zda_S,
1945 },
1946 },
1947
1948 {
1949
1950 {
1951 goOp: AZFMLALLBT,
1952 fixedBits: 0x64209800,
1953 args: Zm_B__Zn_B__Zda_S,
1954 },
1955 },
1956
1957 {
1958
1959 {
1960 goOp: AZFMLALLTB,
1961 fixedBits: 0x6420a800,
1962 args: Zm_B__Zn_B__Zda_S,
1963 },
1964 },
1965
1966 {
1967
1968 {
1969 goOp: AZFMLALLTT,
1970 fixedBits: 0x6420b800,
1971 args: Zm_B__Zn_B__Zda_S,
1972 },
1973 },
1974
1975 {
1976
1977 {
1978 goOp: AZFMLALT,
1979 fixedBits: 0x64a09800,
1980 args: Zm_B__Zn_B__Zda_H,
1981 },
1982
1983 {
1984 goOp: AZFMLALT,
1985 fixedBits: 0x64a08400,
1986 args: Zm_H__Zn_H__Zda_S,
1987 },
1988 },
1989
1990 {
1991
1992 {
1993 goOp: AZFMLS,
1994 fixedBits: 0x65202000,
1995 args: Zm_T__Zn_T__PgM__Zda_T__1,
1996 },
1997 },
1998
1999 {
2000
2001 {
2002 goOp: AZFMLSLB,
2003 fixedBits: 0x64a0a000,
2004 args: Zm_H__Zn_H__Zda_S,
2005 },
2006 },
2007
2008 {
2009
2010 {
2011 goOp: AZFMLSLT,
2012 fixedBits: 0x64a0a400,
2013 args: Zm_H__Zn_H__Zda_S,
2014 },
2015 },
2016
2017 {
2018
2019 {
2020 goOp: AZFMMLA,
2021 fixedBits: 0x64a0e000,
2022 args: Zm_H__Zn_H__Zda_H,
2023 },
2024
2025 {
2026 goOp: AZFMMLA,
2027 fixedBits: 0x64a0e400,
2028 args: Zm_S__Zn_S__Zda_S,
2029 },
2030
2031 {
2032 goOp: AZFMMLA,
2033 fixedBits: 0x64e0e400,
2034 args: Zm_D__Zn_D__Zda_D,
2035 },
2036
2037 {
2038 goOp: AZFMMLA,
2039 fixedBits: 0x6420e400,
2040 args: Zm_H__Zn_H__Zda_S,
2041 },
2042
2043 {
2044 goOp: AZFMMLA,
2045 fixedBits: 0x6460e000,
2046 args: Zm_B__Zn_B__Zda_H,
2047 },
2048
2049 {
2050 goOp: AZFMMLA,
2051 fixedBits: 0x6420e000,
2052 args: Zm_B__Zn_B__Zda_S,
2053 },
2054 },
2055
2056 {
2057
2058 {
2059 goOp: AZFMSB,
2060 fixedBits: 0x6520a000,
2061 args: Za_T__Zm_T__PgM__Zdn_T__1,
2062 },
2063 },
2064
2065 {
2066
2067 {
2068 goOp: AZFMUL,
2069 fixedBits: 0x65000800,
2070 args: Zm_T__Zn_T__Zd_T__2,
2071 },
2072
2073 {
2074 goOp: AZFMUL,
2075 fixedBits: 0x65028000,
2076 args: Zm_T__Zdn_T__PgM__Zdn_T__3,
2077 },
2078 },
2079
2080 {
2081
2082 {
2083 goOp: AZFMULX,
2084 fixedBits: 0x650a8000,
2085 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
2086 },
2087 },
2088
2089 {
2090
2091 {
2092 goOp: AZFNEG,
2093 fixedBits: 0x41da000,
2094 args: Zn_T__PgM__Zd_T__1,
2095 },
2096
2097 {
2098 goOp: AZFNEG,
2099 fixedBits: 0x40da000,
2100 args: Zn_T__PgZ__Zd_T__1,
2101 },
2102 },
2103
2104 {
2105
2106 {
2107 goOp: AZFNMAD,
2108 fixedBits: 0x6520c000,
2109 args: Za_T__Zm_T__PgM__Zdn_T__1,
2110 },
2111 },
2112
2113 {
2114
2115 {
2116 goOp: AZFNMLA,
2117 fixedBits: 0x65204000,
2118 args: Zm_T__Zn_T__PgM__Zda_T__1,
2119 },
2120 },
2121
2122 {
2123
2124 {
2125 goOp: AZFNMLS,
2126 fixedBits: 0x65206000,
2127 args: Zm_T__Zn_T__PgM__Zda_T__1,
2128 },
2129 },
2130
2131 {
2132
2133 {
2134 goOp: AZFNMSB,
2135 fixedBits: 0x6520e000,
2136 args: Za_T__Zm_T__PgM__Zdn_T__1,
2137 },
2138 },
2139
2140 {
2141
2142 {
2143 goOp: AZFRECPE,
2144 fixedBits: 0x650e3000,
2145 args: Zn_T__Zd_T__1,
2146 },
2147 },
2148
2149 {
2150
2151 {
2152 goOp: AZFRECPS,
2153 fixedBits: 0x65001800,
2154 args: Zm_T__Zn_T__Zd_T__3,
2155 },
2156 },
2157
2158 {
2159
2160 {
2161 goOp: AZFRECPX,
2162 fixedBits: 0x650ca000,
2163 args: Zn_T__PgM__Zd_T__1,
2164 },
2165
2166 {
2167 goOp: AZFRECPX,
2168 fixedBits: 0x641b8000,
2169 args: Zn_T__PgZ__Zd_T__1,
2170 },
2171 },
2172
2173 {
2174
2175 {
2176 goOp: AZFRINT32X,
2177 fixedBits: 0x6511a000,
2178 args: Zn_T__PgM__Zd_T__3,
2179 },
2180
2181 {
2182 goOp: AZFRINT32X,
2183 fixedBits: 0x641ca000,
2184 args: Zn_T__PgZ__Zd_T__3,
2185 },
2186 },
2187
2188 {
2189
2190 {
2191 goOp: AZFRINT32Z,
2192 fixedBits: 0x641c8000,
2193 args: Zn_T__PgZ__Zd_T__3,
2194 },
2195
2196 {
2197 goOp: AZFRINT32Z,
2198 fixedBits: 0x6510a000,
2199 args: Zn_T__PgM__Zd_T__3,
2200 },
2201 },
2202
2203 {
2204
2205 {
2206 goOp: AZFRINT64X,
2207 fixedBits: 0x641da000,
2208 args: Zn_T__PgZ__Zd_T__3,
2209 },
2210
2211 {
2212 goOp: AZFRINT64X,
2213 fixedBits: 0x6515a000,
2214 args: Zn_T__PgM__Zd_T__3,
2215 },
2216 },
2217
2218 {
2219
2220 {
2221 goOp: AZFRINT64Z,
2222 fixedBits: 0x6514a000,
2223 args: Zn_T__PgM__Zd_T__3,
2224 },
2225
2226 {
2227 goOp: AZFRINT64Z,
2228 fixedBits: 0x641d8000,
2229 args: Zn_T__PgZ__Zd_T__3,
2230 },
2231 },
2232
2233 {
2234
2235 {
2236 goOp: AZFRINTA,
2237 fixedBits: 0x6504a000,
2238 args: Zn_T__PgM__Zd_T__1,
2239 },
2240
2241 {
2242 goOp: AZFRINTA,
2243 fixedBits: 0x64198000,
2244 args: Zn_T__PgZ__Zd_T__1,
2245 },
2246 },
2247
2248 {
2249
2250 {
2251 goOp: AZFRINTI,
2252 fixedBits: 0x6419e000,
2253 args: Zn_T__PgZ__Zd_T__1,
2254 },
2255
2256 {
2257 goOp: AZFRINTI,
2258 fixedBits: 0x6507a000,
2259 args: Zn_T__PgM__Zd_T__1,
2260 },
2261 },
2262
2263 {
2264
2265 {
2266 goOp: AZFRINTM,
2267 fixedBits: 0x6418c000,
2268 args: Zn_T__PgZ__Zd_T__1,
2269 },
2270
2271 {
2272 goOp: AZFRINTM,
2273 fixedBits: 0x6502a000,
2274 args: Zn_T__PgM__Zd_T__1,
2275 },
2276 },
2277
2278 {
2279
2280 {
2281 goOp: AZFRINTN,
2282 fixedBits: 0x6500a000,
2283 args: Zn_T__PgM__Zd_T__1,
2284 },
2285
2286 {
2287 goOp: AZFRINTN,
2288 fixedBits: 0x64188000,
2289 args: Zn_T__PgZ__Zd_T__1,
2290 },
2291 },
2292
2293 {
2294
2295 {
2296 goOp: AZFRINTP,
2297 fixedBits: 0x6501a000,
2298 args: Zn_T__PgM__Zd_T__1,
2299 },
2300
2301 {
2302 goOp: AZFRINTP,
2303 fixedBits: 0x6418a000,
2304 args: Zn_T__PgZ__Zd_T__1,
2305 },
2306 },
2307
2308 {
2309
2310 {
2311 goOp: AZFRINTX,
2312 fixedBits: 0x6419c000,
2313 args: Zn_T__PgZ__Zd_T__1,
2314 },
2315
2316 {
2317 goOp: AZFRINTX,
2318 fixedBits: 0x6506a000,
2319 args: Zn_T__PgM__Zd_T__1,
2320 },
2321 },
2322
2323 {
2324
2325 {
2326 goOp: AZFRINTZ,
2327 fixedBits: 0x6503a000,
2328 args: Zn_T__PgM__Zd_T__1,
2329 },
2330
2331 {
2332 goOp: AZFRINTZ,
2333 fixedBits: 0x6418e000,
2334 args: Zn_T__PgZ__Zd_T__1,
2335 },
2336 },
2337
2338 {
2339
2340 {
2341 goOp: AZFRSQRTE,
2342 fixedBits: 0x650f3000,
2343 args: Zn_T__Zd_T__1,
2344 },
2345 },
2346
2347 {
2348
2349 {
2350 goOp: AZFRSQRTS,
2351 fixedBits: 0x65001c00,
2352 args: Zm_T__Zn_T__Zd_T__3,
2353 },
2354 },
2355
2356 {
2357
2358 {
2359 goOp: AZFSCALE,
2360 fixedBits: 0x65098000,
2361 args: Zm_T__Zdn_T__PgM__Zdn_T__3,
2362 },
2363 },
2364
2365 {
2366
2367 {
2368 goOp: AZFSQRT,
2369 fixedBits: 0x641ba000,
2370 args: Zn_T__PgZ__Zd_T__1,
2371 },
2372
2373 {
2374 goOp: AZFSQRT,
2375 fixedBits: 0x650da000,
2376 args: Zn_T__PgM__Zd_T__1,
2377 },
2378 },
2379
2380 {
2381
2382 {
2383 goOp: AZFSUB,
2384 fixedBits: 0x65000400,
2385 args: Zm_T__Zn_T__Zd_T__2,
2386 },
2387
2388 {
2389 goOp: AZFSUB,
2390 fixedBits: 0x65018000,
2391 args: Zm_T__Zdn_T__PgM__Zdn_T__3,
2392 },
2393 },
2394
2395 {
2396
2397 {
2398 goOp: AZFSUBR,
2399 fixedBits: 0x65038000,
2400 args: Zm_T__Zdn_T__PgM__Zdn_T__2,
2401 },
2402 },
2403
2404 {
2405
2406 {
2407 goOp: AZFTSMUL,
2408 fixedBits: 0x65000c00,
2409 args: Zm_T__Zn_T__Zd_T__3,
2410 },
2411 },
2412
2413 {
2414
2415 {
2416 goOp: AZFTSSEL,
2417 fixedBits: 0x420b000,
2418 args: Zm_T__Zn_T__Zd_T__3,
2419 },
2420 },
2421
2422 {
2423
2424 {
2425 goOp: AZHISTCNT,
2426 fixedBits: 0x45a0c000,
2427 args: Zm_T__Zn_T__PgZ__Zd_T,
2428 },
2429 },
2430
2431 {
2432
2433 {
2434 goOp: AZHISTSEG,
2435 fixedBits: 0x4520a000,
2436 args: Zm_B__Zn_B__Zd_B,
2437 },
2438 },
2439
2440 {
2441
2442 {
2443 goOp: AZINCP,
2444 fixedBits: 0x252c8000,
2445 args: Pm_T__Zdn_T,
2446 },
2447 },
2448
2449 {
2450
2451 {
2452 goOp: AZLSL,
2453 fixedBits: 0x4138000,
2454 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
2455 },
2456
2457 {
2458 goOp: AZLSL,
2459 fixedBits: 0x41b8000,
2460 args: Zm_D__Zdn_T__PgM__Zdn_T,
2461 },
2462
2463 {
2464 goOp: AZLSL,
2465 fixedBits: 0x4208c00,
2466 args: Zm_D__Zn_T__Zd_T,
2467 },
2468 },
2469
2470 {
2471
2472 {
2473 goOp: AZLSLR,
2474 fixedBits: 0x4178000,
2475 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
2476 },
2477 },
2478
2479 {
2480
2481 {
2482 goOp: AZLSR,
2483 fixedBits: 0x4118000,
2484 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
2485 },
2486
2487 {
2488 goOp: AZLSR,
2489 fixedBits: 0x4208400,
2490 args: Zm_D__Zn_T__Zd_T,
2491 },
2492
2493 {
2494 goOp: AZLSR,
2495 fixedBits: 0x4198000,
2496 args: Zm_D__Zdn_T__PgM__Zdn_T,
2497 },
2498 },
2499
2500 {
2501
2502 {
2503 goOp: AZLSRR,
2504 fixedBits: 0x4158000,
2505 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
2506 },
2507 },
2508
2509 {
2510
2511 {
2512 goOp: AZMAD,
2513 fixedBits: 0x400c000,
2514 args: Za_T__Zm_T__PgM__Zdn_T__2,
2515 },
2516 },
2517
2518 {
2519
2520 {
2521 goOp: AZMADPT,
2522 fixedBits: 0x44c0d800,
2523 args: Za_D__Zm_D__Zdn_D,
2524 },
2525 },
2526
2527 {
2528
2529 {
2530 goOp: AZMATCH,
2531 fixedBits: 0x45208000,
2532 args: Zm_T__Zn_T__PgZ__Pd_T__3,
2533 },
2534 },
2535
2536 {
2537
2538 {
2539 goOp: AZMLA,
2540 fixedBits: 0x4004000,
2541 args: Zm_T__Zn_T__PgM__Zda_T__2,
2542 },
2543 },
2544
2545 {
2546
2547 {
2548 goOp: AZMLAPT,
2549 fixedBits: 0x44c0d000,
2550 args: Zm_D__Zn_D__Zda_D,
2551 },
2552 },
2553
2554 {
2555
2556 {
2557 goOp: AZMLS,
2558 fixedBits: 0x4006000,
2559 args: Zm_T__Zn_T__PgM__Zda_T__2,
2560 },
2561 },
2562
2563 {
2564
2565 {
2566 goOp: AZMOVPRFX,
2567 fixedBits: 0x4102000,
2568 args: Zn_T__PgZM__Zd_T,
2569 },
2570
2571 {
2572 goOp: AZMOVPRFX,
2573 fixedBits: 0x420bc00,
2574 args: Zn__Zd,
2575 },
2576 },
2577
2578 {
2579
2580 {
2581 goOp: AZMSB,
2582 fixedBits: 0x400e000,
2583 args: Za_T__Zm_T__PgM__Zdn_T__2,
2584 },
2585 },
2586
2587 {
2588
2589 {
2590 goOp: AZMUL,
2591 fixedBits: 0x4206000,
2592 args: Zm_T__Zn_T__Zd_T__1,
2593 },
2594
2595 {
2596 goOp: AZMUL,
2597 fixedBits: 0x4100000,
2598 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
2599 },
2600 },
2601
2602 {
2603
2604 {
2605 goOp: AZNBSL,
2606 fixedBits: 0x4e03c00,
2607 args: Zk_D__Zm_D__Zdn_D__Zdn_D,
2608 },
2609 },
2610
2611 {
2612
2613 {
2614 goOp: AZNEG,
2615 fixedBits: 0x417a000,
2616 args: Zn_T__PgM__Zd_T__2,
2617 },
2618
2619 {
2620 goOp: AZNEG,
2621 fixedBits: 0x407a000,
2622 args: Zn_T__PgZ__Zd_T__2,
2623 },
2624 },
2625
2626 {
2627
2628 {
2629 goOp: AZNMATCH,
2630 fixedBits: 0x45208010,
2631 args: Zm_T__Zn_T__PgZ__Pd_T__3,
2632 },
2633 },
2634
2635 {
2636
2637 {
2638 goOp: AZNOT,
2639 fixedBits: 0x41ea000,
2640 args: Zn_T__PgM__Zd_T__2,
2641 },
2642
2643 {
2644 goOp: AZNOT,
2645 fixedBits: 0x40ea000,
2646 args: Zn_T__PgZ__Zd_T__2,
2647 },
2648 },
2649
2650 {
2651
2652 {
2653 goOp: AZORQV,
2654 fixedBits: 0x41c2000,
2655 args: Zn_Tb__Pg__Vd_T__1,
2656 },
2657 },
2658
2659 {
2660
2661 {
2662 goOp: AZORR,
2663 fixedBits: 0x4180000,
2664 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
2665 },
2666
2667 {
2668 goOp: AZORR,
2669 fixedBits: 0x4603000,
2670 args: Zm_D__Zn_D__Zd_D,
2671 },
2672 },
2673
2674 {
2675
2676 {
2677 goOp: AZPMOV,
2678 fixedBits: 0x52b3800,
2679 args: Pn_B__Zd,
2680 },
2681
2682 {
2683 goOp: AZPMOV,
2684 fixedBits: 0x52a3800,
2685 args: Zn__Pd_B,
2686 },
2687 },
2688
2689 {
2690
2691 {
2692 goOp: AZPMUL,
2693 fixedBits: 0x4206400,
2694 args: Zm_B__Zn_B__Zd_B,
2695 },
2696 },
2697
2698 {
2699
2700 {
2701 goOp: AZPMULLB,
2702 fixedBits: 0x45006800,
2703 args: Zm_Tb__Zn_Tb__Zd_T__3,
2704 },
2705
2706 {
2707 goOp: AZPMULLB,
2708 fixedBits: 0x45006800,
2709 args: Zm_D__Zn_D__Zd_Q,
2710 },
2711 },
2712
2713 {
2714
2715 {
2716 goOp: AZPMULLT,
2717 fixedBits: 0x45006c00,
2718 args: Zm_D__Zn_D__Zd_Q,
2719 },
2720
2721 {
2722 goOp: AZPMULLT,
2723 fixedBits: 0x45006c00,
2724 args: Zm_Tb__Zn_Tb__Zd_T__3,
2725 },
2726 },
2727
2728 {
2729
2730 {
2731 goOp: AZRADDHNB,
2732 fixedBits: 0x45206800,
2733 args: Zm_Tb__Zn_Tb__Zd_T__2,
2734 },
2735 },
2736
2737 {
2738
2739 {
2740 goOp: AZRADDHNT,
2741 fixedBits: 0x45206c00,
2742 args: Zm_Tb__Zn_Tb__Zd_T__2,
2743 },
2744 },
2745
2746 {
2747
2748 {
2749 goOp: AZRAX1,
2750 fixedBits: 0x4520f400,
2751 args: Zm_D__Zn_D__Zd_D,
2752 },
2753 },
2754
2755 {
2756
2757 {
2758 goOp: AZRBIT,
2759 fixedBits: 0x527a000,
2760 args: Zn_T__PgZ__Zd_T__2,
2761 },
2762
2763 {
2764 goOp: AZRBIT,
2765 fixedBits: 0x5278000,
2766 args: Zn_T__PgM__Zd_T__2,
2767 },
2768 },
2769
2770 {
2771
2772 {
2773 goOp: AZREV,
2774 fixedBits: 0x5383800,
2775 args: Zn_T__Zd_T__2,
2776 },
2777 },
2778
2779 {
2780
2781 {
2782 goOp: AZREVB,
2783 fixedBits: 0x524a000,
2784 args: Zn_T__PgZ__Zd_T__4,
2785 },
2786
2787 {
2788 goOp: AZREVB,
2789 fixedBits: 0x5248000,
2790 args: Zn_T__PgM__Zd_T__4,
2791 },
2792 },
2793
2794 {
2795
2796 {
2797 goOp: AZREVD,
2798 fixedBits: 0x52e8000,
2799 args: Zn_Q__PgM__Zd_Q,
2800 },
2801
2802 {
2803 goOp: AZREVD,
2804 fixedBits: 0x52ea000,
2805 args: Zn_Q__PgZ__Zd_Q,
2806 },
2807 },
2808
2809 {
2810
2811 {
2812 goOp: AZREVH,
2813 fixedBits: 0x5a5a000,
2814 args: Zn_T__PgZ__Zd_T__5,
2815 },
2816
2817 {
2818 goOp: AZREVH,
2819 fixedBits: 0x5a58000,
2820 args: Zn_T__PgM__Zd_T__5,
2821 },
2822 },
2823
2824 {
2825
2826 {
2827 goOp: AZREVW,
2828 fixedBits: 0x5e6a000,
2829 args: Zn_D__PgZ__Zd_D,
2830 },
2831
2832 {
2833 goOp: AZREVW,
2834 fixedBits: 0x5e68000,
2835 args: Zn_D__PgM__Zd_D,
2836 },
2837 },
2838
2839 {
2840
2841 {
2842 goOp: AZRSUBHNB,
2843 fixedBits: 0x45207800,
2844 args: Zm_Tb__Zn_Tb__Zd_T__2,
2845 },
2846 },
2847
2848 {
2849
2850 {
2851 goOp: AZRSUBHNT,
2852 fixedBits: 0x45207c00,
2853 args: Zm_Tb__Zn_Tb__Zd_T__2,
2854 },
2855 },
2856
2857 {
2858
2859 {
2860 goOp: AZSABA,
2861 fixedBits: 0x4500f800,
2862 args: Zm_T__Zn_T__Zda_T__2,
2863 },
2864 },
2865
2866 {
2867
2868 {
2869 goOp: AZSABAL,
2870 fixedBits: 0x4400d400,
2871 args: Zm_Tb__Zn_Tb__Zda_T__1,
2872 },
2873 },
2874
2875 {
2876
2877 {
2878 goOp: AZSABALB,
2879 fixedBits: 0x4500c000,
2880 args: Zm_Tb__Zn_Tb__Zda_T__1,
2881 },
2882 },
2883
2884 {
2885
2886 {
2887 goOp: AZSABALT,
2888 fixedBits: 0x4500c400,
2889 args: Zm_Tb__Zn_Tb__Zda_T__1,
2890 },
2891 },
2892
2893 {
2894
2895 {
2896 goOp: AZSABD,
2897 fixedBits: 0x40c0000,
2898 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
2899 },
2900 },
2901
2902 {
2903
2904 {
2905 goOp: AZSABDLB,
2906 fixedBits: 0x45003000,
2907 args: Zm_Tb__Zn_Tb__Zd_T__1,
2908 },
2909 },
2910
2911 {
2912
2913 {
2914 goOp: AZSABDLT,
2915 fixedBits: 0x45003400,
2916 args: Zm_Tb__Zn_Tb__Zd_T__1,
2917 },
2918 },
2919
2920 {
2921
2922 {
2923 goOp: AZSADALP,
2924 fixedBits: 0x4404a000,
2925 args: Zn_Tb__PgM__Zda_T,
2926 },
2927 },
2928
2929 {
2930
2931 {
2932 goOp: AZSADDLB,
2933 fixedBits: 0x45000000,
2934 args: Zm_Tb__Zn_Tb__Zd_T__1,
2935 },
2936 },
2937
2938 {
2939
2940 {
2941 goOp: AZSADDLBT,
2942 fixedBits: 0x45008000,
2943 args: Zm_Tb__Zn_Tb__Zd_T__1,
2944 },
2945 },
2946
2947 {
2948
2949 {
2950 goOp: AZSADDLT,
2951 fixedBits: 0x45000400,
2952 args: Zm_Tb__Zn_Tb__Zd_T__1,
2953 },
2954 },
2955
2956 {
2957
2958 {
2959 goOp: AZSADDWB,
2960 fixedBits: 0x45004000,
2961 args: Zm_Tb__Zn_T__Zd_T,
2962 },
2963 },
2964
2965 {
2966
2967 {
2968 goOp: AZSADDWT,
2969 fixedBits: 0x45004400,
2970 args: Zm_Tb__Zn_T__Zd_T,
2971 },
2972 },
2973
2974 {
2975
2976 {
2977 goOp: AZSBCLB,
2978 fixedBits: 0x4580d000,
2979 args: Zm_T__Zn_T__Zda_T__1,
2980 },
2981 },
2982
2983 {
2984
2985 {
2986 goOp: AZSBCLT,
2987 fixedBits: 0x4580d400,
2988 args: Zm_T__Zn_T__Zda_T__1,
2989 },
2990 },
2991
2992 {
2993
2994 {
2995 goOp: AZSCLAMP,
2996 fixedBits: 0x4400c000,
2997 args: Zm_T__Zn_T__Zd_T__1,
2998 },
2999 },
3000
3001 {
3002
3003 {
3004 goOp: AZSCVTF,
3005 fixedBits: 0x65d0a000,
3006 args: Zn_S__PgM__Zd_D,
3007 },
3008
3009 {
3010 goOp: AZSCVTF,
3011 fixedBits: 0x650c3000,
3012 args: Zn_Tb__Zd_T__1,
3013 },
3014
3015 {
3016 goOp: AZSCVTF,
3017 fixedBits: 0x65d4a000,
3018 args: Zn_D__PgM__Zd_S,
3019 },
3020
3021 {
3022 goOp: AZSCVTF,
3023 fixedBits: 0x64dd8000,
3024 args: Zn_D__PgZ__Zd_S,
3025 },
3026
3027 {
3028 goOp: AZSCVTF,
3029 fixedBits: 0x65d6a000,
3030 args: Zn_D__PgM__Zd_D,
3031 },
3032
3033 {
3034 goOp: AZSCVTF,
3035 fixedBits: 0x64ddc000,
3036 args: Zn_D__PgZ__Zd_D,
3037 },
3038
3039 {
3040 goOp: AZSCVTF,
3041 fixedBits: 0x645cc000,
3042 args: Zn_H__PgZ__Zd_H,
3043 },
3044
3045 {
3046 goOp: AZSCVTF,
3047 fixedBits: 0x6554a000,
3048 args: Zn_S__PgM__Zd_H,
3049 },
3050
3051 {
3052 goOp: AZSCVTF,
3053 fixedBits: 0x645d8000,
3054 args: Zn_S__PgZ__Zd_H,
3055 },
3056
3057 {
3058 goOp: AZSCVTF,
3059 fixedBits: 0x645dc000,
3060 args: Zn_D__PgZ__Zd_H,
3061 },
3062
3063 {
3064 goOp: AZSCVTF,
3065 fixedBits: 0x6556a000,
3066 args: Zn_D__PgM__Zd_H,
3067 },
3068
3069 {
3070 goOp: AZSCVTF,
3071 fixedBits: 0x64dc8000,
3072 args: Zn_S__PgZ__Zd_D,
3073 },
3074
3075 {
3076 goOp: AZSCVTF,
3077 fixedBits: 0x6552a000,
3078 args: Zn_H__PgM__Zd_H,
3079 },
3080
3081 {
3082 goOp: AZSCVTF,
3083 fixedBits: 0x649d8000,
3084 args: Zn_S__PgZ__Zd_S,
3085 },
3086
3087 {
3088 goOp: AZSCVTF,
3089 fixedBits: 0x6594a000,
3090 args: Zn_S__PgM__Zd_S,
3091 },
3092 },
3093
3094 {
3095
3096 {
3097 goOp: AZSCVTFLT,
3098 fixedBits: 0x650c3800,
3099 args: Zn_Tb__Zd_T__1,
3100 },
3101 },
3102
3103 {
3104
3105 {
3106 goOp: AZSDIV,
3107 fixedBits: 0x4940000,
3108 args: Zm_T__Zdn_T__PgM__Zdn_T__4,
3109 },
3110 },
3111
3112 {
3113
3114 {
3115 goOp: AZSDIVR,
3116 fixedBits: 0x4960000,
3117 args: Zm_T__Zdn_T__PgM__Zdn_T__4,
3118 },
3119 },
3120
3121 {
3122
3123 {
3124 goOp: AZSDOT,
3125 fixedBits: 0x44800000,
3126 args: Zm_Tb__Zn_Tb__Zda_T__2,
3127 },
3128
3129 {
3130 goOp: AZSDOT,
3131 fixedBits: 0x4400c800,
3132 args: Zm_H__Zn_H__Zda_S,
3133 },
3134
3135 {
3136 goOp: AZSDOT,
3137 fixedBits: 0x44400000,
3138 args: Zm_B__Zn_B__Zda_H,
3139 },
3140 },
3141
3142 {
3143
3144 {
3145 goOp: AZSEL,
3146 fixedBits: 0x520c000,
3147 args: Zm_T__Zn_T__Pv__Zd_T,
3148 },
3149 },
3150
3151 {
3152
3153 {
3154 goOp: AZSHADD,
3155 fixedBits: 0x44108000,
3156 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3157 },
3158 },
3159
3160 {
3161
3162 {
3163 goOp: AZSHSUB,
3164 fixedBits: 0x44128000,
3165 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3166 },
3167 },
3168
3169 {
3170
3171 {
3172 goOp: AZSHSUBR,
3173 fixedBits: 0x44168000,
3174 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3175 },
3176 },
3177
3178 {
3179
3180 {
3181 goOp: AZSM4E,
3182 fixedBits: 0x4523e000,
3183 args: Zm_S__Zdn_S__Zdn_S,
3184 },
3185 },
3186
3187 {
3188
3189 {
3190 goOp: AZSM4EKEY,
3191 fixedBits: 0x4520f000,
3192 args: Zm_S__Zn_S__Zd_S,
3193 },
3194 },
3195
3196 {
3197
3198 {
3199 goOp: AZSMAX,
3200 fixedBits: 0x4080000,
3201 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3202 },
3203 },
3204
3205 {
3206
3207 {
3208 goOp: AZSMAXP,
3209 fixedBits: 0x4414a000,
3210 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3211 },
3212 },
3213
3214 {
3215
3216 {
3217 goOp: AZSMAXQV,
3218 fixedBits: 0x40c2000,
3219 args: Zn_Tb__Pg__Vd_T__1,
3220 },
3221 },
3222
3223 {
3224
3225 {
3226 goOp: AZSMIN,
3227 fixedBits: 0x40a0000,
3228 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3229 },
3230 },
3231
3232 {
3233
3234 {
3235 goOp: AZSMINP,
3236 fixedBits: 0x4416a000,
3237 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3238 },
3239 },
3240
3241 {
3242
3243 {
3244 goOp: AZSMINQV,
3245 fixedBits: 0x40e2000,
3246 args: Zn_Tb__Pg__Vd_T__1,
3247 },
3248 },
3249
3250 {
3251
3252 {
3253 goOp: AZSMLALB,
3254 fixedBits: 0x44004000,
3255 args: Zm_Tb__Zn_Tb__Zda_T__1,
3256 },
3257 },
3258
3259 {
3260
3261 {
3262 goOp: AZSMLALT,
3263 fixedBits: 0x44004400,
3264 args: Zm_Tb__Zn_Tb__Zda_T__1,
3265 },
3266 },
3267
3268 {
3269
3270 {
3271 goOp: AZSMLSLB,
3272 fixedBits: 0x44005000,
3273 args: Zm_Tb__Zn_Tb__Zda_T__1,
3274 },
3275 },
3276
3277 {
3278
3279 {
3280 goOp: AZSMLSLT,
3281 fixedBits: 0x44005400,
3282 args: Zm_Tb__Zn_Tb__Zda_T__1,
3283 },
3284 },
3285
3286 {
3287
3288 {
3289 goOp: AZSMMLA,
3290 fixedBits: 0x45009800,
3291 args: Zm_B__Zn_B__Zda_S,
3292 },
3293 },
3294
3295 {
3296
3297 {
3298 goOp: AZSMULH,
3299 fixedBits: 0x4206800,
3300 args: Zm_T__Zn_T__Zd_T__1,
3301 },
3302
3303 {
3304 goOp: AZSMULH,
3305 fixedBits: 0x4120000,
3306 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3307 },
3308 },
3309
3310 {
3311
3312 {
3313 goOp: AZSMULLB,
3314 fixedBits: 0x45007000,
3315 args: Zm_Tb__Zn_Tb__Zd_T__1,
3316 },
3317 },
3318
3319 {
3320
3321 {
3322 goOp: AZSMULLT,
3323 fixedBits: 0x45007400,
3324 args: Zm_Tb__Zn_Tb__Zd_T__1,
3325 },
3326 },
3327
3328 {
3329
3330 {
3331 goOp: AZSPLICE,
3332 fixedBits: 0x52c8000,
3333 args: Zm_T__Zdn_T__Pv__Zdn_T,
3334 },
3335 },
3336
3337 {
3338
3339 {
3340 goOp: AZSQABS,
3341 fixedBits: 0x4408a000,
3342 args: Zn_T__PgM__Zd_T__2,
3343 },
3344
3345 {
3346 goOp: AZSQABS,
3347 fixedBits: 0x440aa000,
3348 args: Zn_T__PgZ__Zd_T__2,
3349 },
3350 },
3351
3352 {
3353
3354 {
3355 goOp: AZSQADD,
3356 fixedBits: 0x4201000,
3357 args: Zm_T__Zn_T__Zd_T__1,
3358 },
3359
3360 {
3361 goOp: AZSQADD,
3362 fixedBits: 0x44188000,
3363 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3364 },
3365 },
3366
3367 {
3368
3369 {
3370 goOp: AZSQDECP,
3371 fixedBits: 0x252a8000,
3372 args: Pm_T__Zdn_T,
3373 },
3374 },
3375
3376 {
3377
3378 {
3379 goOp: AZSQDMLALB,
3380 fixedBits: 0x44006000,
3381 args: Zm_Tb__Zn_Tb__Zda_T__1,
3382 },
3383 },
3384
3385 {
3386
3387 {
3388 goOp: AZSQDMLALBT,
3389 fixedBits: 0x44000800,
3390 args: Zm_Tb__Zn_Tb__Zda_T__1,
3391 },
3392 },
3393
3394 {
3395
3396 {
3397 goOp: AZSQDMLALT,
3398 fixedBits: 0x44006400,
3399 args: Zm_Tb__Zn_Tb__Zda_T__1,
3400 },
3401 },
3402
3403 {
3404
3405 {
3406 goOp: AZSQDMLSLB,
3407 fixedBits: 0x44006800,
3408 args: Zm_Tb__Zn_Tb__Zda_T__1,
3409 },
3410 },
3411
3412 {
3413
3414 {
3415 goOp: AZSQDMLSLBT,
3416 fixedBits: 0x44000c00,
3417 args: Zm_Tb__Zn_Tb__Zda_T__1,
3418 },
3419 },
3420
3421 {
3422
3423 {
3424 goOp: AZSQDMLSLT,
3425 fixedBits: 0x44006c00,
3426 args: Zm_Tb__Zn_Tb__Zda_T__1,
3427 },
3428 },
3429
3430 {
3431
3432 {
3433 goOp: AZSQDMULH,
3434 fixedBits: 0x4207000,
3435 args: Zm_T__Zn_T__Zd_T__1,
3436 },
3437 },
3438
3439 {
3440
3441 {
3442 goOp: AZSQDMULLB,
3443 fixedBits: 0x45006000,
3444 args: Zm_Tb__Zn_Tb__Zd_T__1,
3445 },
3446 },
3447
3448 {
3449
3450 {
3451 goOp: AZSQDMULLT,
3452 fixedBits: 0x45006400,
3453 args: Zm_Tb__Zn_Tb__Zd_T__1,
3454 },
3455 },
3456
3457 {
3458
3459 {
3460 goOp: AZSQINCP,
3461 fixedBits: 0x25288000,
3462 args: Pm_T__Zdn_T,
3463 },
3464 },
3465
3466 {
3467
3468 {
3469 goOp: AZSQNEG,
3470 fixedBits: 0x4409a000,
3471 args: Zn_T__PgM__Zd_T__2,
3472 },
3473
3474 {
3475 goOp: AZSQNEG,
3476 fixedBits: 0x440ba000,
3477 args: Zn_T__PgZ__Zd_T__2,
3478 },
3479 },
3480
3481 {
3482
3483 {
3484 goOp: AZSQRDMLAH,
3485 fixedBits: 0x44007000,
3486 args: Zm_T__Zn_T__Zda_T__2,
3487 },
3488 },
3489
3490 {
3491
3492 {
3493 goOp: AZSQRDMLSH,
3494 fixedBits: 0x44007400,
3495 args: Zm_T__Zn_T__Zda_T__2,
3496 },
3497 },
3498
3499 {
3500
3501 {
3502 goOp: AZSQRDMULH,
3503 fixedBits: 0x4207400,
3504 args: Zm_T__Zn_T__Zd_T__1,
3505 },
3506 },
3507
3508 {
3509
3510 {
3511 goOp: AZSQRSHL,
3512 fixedBits: 0x440a8000,
3513 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3514 },
3515 },
3516
3517 {
3518
3519 {
3520 goOp: AZSQRSHLR,
3521 fixedBits: 0x440e8000,
3522 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3523 },
3524 },
3525
3526 {
3527
3528 {
3529 goOp: AZSQSHL,
3530 fixedBits: 0x44088000,
3531 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3532 },
3533 },
3534
3535 {
3536
3537 {
3538 goOp: AZSQSHLR,
3539 fixedBits: 0x440c8000,
3540 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3541 },
3542 },
3543
3544 {
3545
3546 {
3547 goOp: AZSQSUB,
3548 fixedBits: 0x4201800,
3549 args: Zm_T__Zn_T__Zd_T__1,
3550 },
3551
3552 {
3553 goOp: AZSQSUB,
3554 fixedBits: 0x441a8000,
3555 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3556 },
3557 },
3558
3559 {
3560
3561 {
3562 goOp: AZSQSUBR,
3563 fixedBits: 0x441e8000,
3564 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3565 },
3566 },
3567
3568 {
3569
3570 {
3571 goOp: AZSQXTNB,
3572 fixedBits: 0x45204000,
3573 args: Zn_Tb__Zd_T__2,
3574 },
3575 },
3576
3577 {
3578
3579 {
3580 goOp: AZSQXTNT,
3581 fixedBits: 0x45204400,
3582 args: Zn_Tb__Zd_T__2,
3583 },
3584 },
3585
3586 {
3587
3588 {
3589 goOp: AZSQXTUNB,
3590 fixedBits: 0x45205000,
3591 args: Zn_Tb__Zd_T__2,
3592 },
3593 },
3594
3595 {
3596
3597 {
3598 goOp: AZSQXTUNT,
3599 fixedBits: 0x45205400,
3600 args: Zn_Tb__Zd_T__2,
3601 },
3602 },
3603
3604 {
3605
3606 {
3607 goOp: AZSRHADD,
3608 fixedBits: 0x44148000,
3609 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3610 },
3611 },
3612
3613 {
3614
3615 {
3616 goOp: AZSRSHL,
3617 fixedBits: 0x44028000,
3618 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3619 },
3620 },
3621
3622 {
3623
3624 {
3625 goOp: AZSRSHLR,
3626 fixedBits: 0x44068000,
3627 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3628 },
3629 },
3630
3631 {
3632
3633 {
3634 goOp: AZSSUBLB,
3635 fixedBits: 0x45001000,
3636 args: Zm_Tb__Zn_Tb__Zd_T__1,
3637 },
3638 },
3639
3640 {
3641
3642 {
3643 goOp: AZSSUBLBT,
3644 fixedBits: 0x45008800,
3645 args: Zm_Tb__Zn_Tb__Zd_T__1,
3646 },
3647 },
3648
3649 {
3650
3651 {
3652 goOp: AZSSUBLT,
3653 fixedBits: 0x45001400,
3654 args: Zm_Tb__Zn_Tb__Zd_T__1,
3655 },
3656 },
3657
3658 {
3659
3660 {
3661 goOp: AZSSUBLTB,
3662 fixedBits: 0x45008c00,
3663 args: Zm_Tb__Zn_Tb__Zd_T__1,
3664 },
3665 },
3666
3667 {
3668
3669 {
3670 goOp: AZSSUBWB,
3671 fixedBits: 0x45005000,
3672 args: Zm_Tb__Zn_T__Zd_T,
3673 },
3674 },
3675
3676 {
3677
3678 {
3679 goOp: AZSSUBWT,
3680 fixedBits: 0x45005400,
3681 args: Zm_Tb__Zn_T__Zd_T,
3682 },
3683 },
3684
3685 {
3686
3687 {
3688 goOp: AZSUB,
3689 fixedBits: 0x4200400,
3690 args: Zm_T__Zn_T__Zd_T__1,
3691 },
3692
3693 {
3694 goOp: AZSUB,
3695 fixedBits: 0x4010000,
3696 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3697 },
3698 },
3699
3700 {
3701
3702 {
3703 goOp: AZSUBHNB,
3704 fixedBits: 0x45207000,
3705 args: Zm_Tb__Zn_Tb__Zd_T__2,
3706 },
3707 },
3708
3709 {
3710
3711 {
3712 goOp: AZSUBHNT,
3713 fixedBits: 0x45207400,
3714 args: Zm_Tb__Zn_Tb__Zd_T__2,
3715 },
3716 },
3717
3718 {
3719
3720 {
3721 goOp: AZSUBP,
3722 fixedBits: 0x4410a000,
3723 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3724 },
3725 },
3726
3727 {
3728
3729 {
3730 goOp: AZSUBPT,
3731 fixedBits: 0x4e00c00,
3732 args: Zm_D__Zn_D__Zd_D,
3733 },
3734
3735 {
3736 goOp: AZSUBPT,
3737 fixedBits: 0x4c50000,
3738 args: Zm_D__Zdn_D__PgM__Zdn_D,
3739 },
3740 },
3741
3742 {
3743
3744 {
3745 goOp: AZSUBR,
3746 fixedBits: 0x4030000,
3747 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3748 },
3749 },
3750
3751 {
3752
3753 {
3754 goOp: AZSUNPKHI,
3755 fixedBits: 0x5313800,
3756 args: Zn_Tb__Zd_T__1,
3757 },
3758 },
3759
3760 {
3761
3762 {
3763 goOp: AZSUNPKLO,
3764 fixedBits: 0x5303800,
3765 args: Zn_Tb__Zd_T__1,
3766 },
3767 },
3768
3769 {
3770
3771 {
3772 goOp: AZSUQADD,
3773 fixedBits: 0x441c8000,
3774 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3775 },
3776 },
3777
3778 {
3779
3780 {
3781 goOp: AZSXTB,
3782 fixedBits: 0x400a000,
3783 args: Zn_T__PgZ__Zd_T__4,
3784 },
3785
3786 {
3787 goOp: AZSXTB,
3788 fixedBits: 0x410a000,
3789 args: Zn_T__PgM__Zd_T__4,
3790 },
3791 },
3792
3793 {
3794
3795 {
3796 goOp: AZSXTH,
3797 fixedBits: 0x492a000,
3798 args: Zn_T__PgM__Zd_T__5,
3799 },
3800
3801 {
3802 goOp: AZSXTH,
3803 fixedBits: 0x482a000,
3804 args: Zn_T__PgZ__Zd_T__5,
3805 },
3806 },
3807
3808 {
3809
3810 {
3811 goOp: AZSXTW,
3812 fixedBits: 0x4d4a000,
3813 args: Zn_D__PgM__Zd_D,
3814 },
3815
3816 {
3817 goOp: AZSXTW,
3818 fixedBits: 0x4c4a000,
3819 args: Zn_D__PgZ__Zd_D,
3820 },
3821 },
3822
3823 {
3824
3825 {
3826 goOp: AZTBX,
3827 fixedBits: 0x5202c00,
3828 args: Zm_T__Zn_T__Zd_T__1,
3829 },
3830 },
3831
3832 {
3833
3834 {
3835 goOp: AZTBXQ,
3836 fixedBits: 0x5203400,
3837 args: Zm_T__Zn_T__Zd_T__1,
3838 },
3839 },
3840
3841 {
3842
3843 {
3844 goOp: AZTRN1,
3845 fixedBits: 0x5207000,
3846 args: Zm_T__Zn_T__Zd_T__1,
3847 },
3848
3849 {
3850 goOp: AZTRN1,
3851 fixedBits: 0x5a01800,
3852 args: Zm_Q__Zn_Q__Zd_Q,
3853 },
3854 },
3855
3856 {
3857
3858 {
3859 goOp: AZTRN2,
3860 fixedBits: 0x5207400,
3861 args: Zm_T__Zn_T__Zd_T__1,
3862 },
3863
3864 {
3865 goOp: AZTRN2,
3866 fixedBits: 0x5a01c00,
3867 args: Zm_Q__Zn_Q__Zd_Q,
3868 },
3869 },
3870
3871 {
3872
3873 {
3874 goOp: AZUABA,
3875 fixedBits: 0x4500fc00,
3876 args: Zm_T__Zn_T__Zda_T__2,
3877 },
3878 },
3879
3880 {
3881
3882 {
3883 goOp: AZUABAL,
3884 fixedBits: 0x4400dc00,
3885 args: Zm_Tb__Zn_Tb__Zda_T__1,
3886 },
3887 },
3888
3889 {
3890
3891 {
3892 goOp: AZUABALB,
3893 fixedBits: 0x4500c800,
3894 args: Zm_Tb__Zn_Tb__Zda_T__1,
3895 },
3896 },
3897
3898 {
3899
3900 {
3901 goOp: AZUABALT,
3902 fixedBits: 0x4500cc00,
3903 args: Zm_Tb__Zn_Tb__Zda_T__1,
3904 },
3905 },
3906
3907 {
3908
3909 {
3910 goOp: AZUABD,
3911 fixedBits: 0x40d0000,
3912 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
3913 },
3914 },
3915
3916 {
3917
3918 {
3919 goOp: AZUABDLB,
3920 fixedBits: 0x45003800,
3921 args: Zm_Tb__Zn_Tb__Zd_T__1,
3922 },
3923 },
3924
3925 {
3926
3927 {
3928 goOp: AZUABDLT,
3929 fixedBits: 0x45003c00,
3930 args: Zm_Tb__Zn_Tb__Zd_T__1,
3931 },
3932 },
3933
3934 {
3935
3936 {
3937 goOp: AZUADALP,
3938 fixedBits: 0x4405a000,
3939 args: Zn_Tb__PgM__Zda_T,
3940 },
3941 },
3942
3943 {
3944
3945 {
3946 goOp: AZUADDLB,
3947 fixedBits: 0x45000800,
3948 args: Zm_Tb__Zn_Tb__Zd_T__1,
3949 },
3950 },
3951
3952 {
3953
3954 {
3955 goOp: AZUADDLT,
3956 fixedBits: 0x45000c00,
3957 args: Zm_Tb__Zn_Tb__Zd_T__1,
3958 },
3959 },
3960
3961 {
3962
3963 {
3964 goOp: AZUADDWB,
3965 fixedBits: 0x45004800,
3966 args: Zm_Tb__Zn_T__Zd_T,
3967 },
3968 },
3969
3970 {
3971
3972 {
3973 goOp: AZUADDWT,
3974 fixedBits: 0x45004c00,
3975 args: Zm_Tb__Zn_T__Zd_T,
3976 },
3977 },
3978
3979 {
3980
3981 {
3982 goOp: AZUCLAMP,
3983 fixedBits: 0x4400c400,
3984 args: Zm_T__Zn_T__Zd_T__1,
3985 },
3986 },
3987
3988 {
3989
3990 {
3991 goOp: AZUCVTF,
3992 fixedBits: 0x64dda000,
3993 args: Zn_D__PgZ__Zd_S,
3994 },
3995
3996 {
3997 goOp: AZUCVTF,
3998 fixedBits: 0x6557a000,
3999 args: Zn_D__PgM__Zd_H,
4000 },
4001
4002 {
4003 goOp: AZUCVTF,
4004 fixedBits: 0x645da000,
4005 args: Zn_S__PgZ__Zd_H,
4006 },
4007
4008 {
4009 goOp: AZUCVTF,
4010 fixedBits: 0x6595a000,
4011 args: Zn_S__PgM__Zd_S,
4012 },
4013
4014 {
4015 goOp: AZUCVTF,
4016 fixedBits: 0x649da000,
4017 args: Zn_S__PgZ__Zd_S,
4018 },
4019
4020 {
4021 goOp: AZUCVTF,
4022 fixedBits: 0x65d1a000,
4023 args: Zn_S__PgM__Zd_D,
4024 },
4025
4026 {
4027 goOp: AZUCVTF,
4028 fixedBits: 0x64dca000,
4029 args: Zn_S__PgZ__Zd_D,
4030 },
4031
4032 {
4033 goOp: AZUCVTF,
4034 fixedBits: 0x6553a000,
4035 args: Zn_H__PgM__Zd_H,
4036 },
4037
4038 {
4039 goOp: AZUCVTF,
4040 fixedBits: 0x645de000,
4041 args: Zn_D__PgZ__Zd_H,
4042 },
4043
4044 {
4045 goOp: AZUCVTF,
4046 fixedBits: 0x65d5a000,
4047 args: Zn_D__PgM__Zd_S,
4048 },
4049
4050 {
4051 goOp: AZUCVTF,
4052 fixedBits: 0x645ce000,
4053 args: Zn_H__PgZ__Zd_H,
4054 },
4055
4056 {
4057 goOp: AZUCVTF,
4058 fixedBits: 0x65d7a000,
4059 args: Zn_D__PgM__Zd_D,
4060 },
4061
4062 {
4063 goOp: AZUCVTF,
4064 fixedBits: 0x64dde000,
4065 args: Zn_D__PgZ__Zd_D,
4066 },
4067
4068 {
4069 goOp: AZUCVTF,
4070 fixedBits: 0x6555a000,
4071 args: Zn_S__PgM__Zd_H,
4072 },
4073
4074 {
4075 goOp: AZUCVTF,
4076 fixedBits: 0x650c3400,
4077 args: Zn_Tb__Zd_T__1,
4078 },
4079 },
4080
4081 {
4082
4083 {
4084 goOp: AZUCVTFLT,
4085 fixedBits: 0x650c3c00,
4086 args: Zn_Tb__Zd_T__1,
4087 },
4088 },
4089
4090 {
4091
4092 {
4093 goOp: AZUDIV,
4094 fixedBits: 0x4950000,
4095 args: Zm_T__Zdn_T__PgM__Zdn_T__4,
4096 },
4097 },
4098
4099 {
4100
4101 {
4102 goOp: AZUDIVR,
4103 fixedBits: 0x4970000,
4104 args: Zm_T__Zdn_T__PgM__Zdn_T__4,
4105 },
4106 },
4107
4108 {
4109
4110 {
4111 goOp: AZUDOT,
4112 fixedBits: 0x44400400,
4113 args: Zm_B__Zn_B__Zda_H,
4114 },
4115
4116 {
4117 goOp: AZUDOT,
4118 fixedBits: 0x4400cc00,
4119 args: Zm_H__Zn_H__Zda_S,
4120 },
4121
4122 {
4123 goOp: AZUDOT,
4124 fixedBits: 0x44800400,
4125 args: Zm_Tb__Zn_Tb__Zda_T__2,
4126 },
4127 },
4128
4129 {
4130
4131 {
4132 goOp: AZUHADD,
4133 fixedBits: 0x44118000,
4134 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4135 },
4136 },
4137
4138 {
4139
4140 {
4141 goOp: AZUHSUB,
4142 fixedBits: 0x44138000,
4143 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4144 },
4145 },
4146
4147 {
4148
4149 {
4150 goOp: AZUHSUBR,
4151 fixedBits: 0x44178000,
4152 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4153 },
4154 },
4155
4156 {
4157
4158 {
4159 goOp: AZUMAX,
4160 fixedBits: 0x4090000,
4161 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4162 },
4163 },
4164
4165 {
4166
4167 {
4168 goOp: AZUMAXP,
4169 fixedBits: 0x4415a000,
4170 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4171 },
4172 },
4173
4174 {
4175
4176 {
4177 goOp: AZUMAXQV,
4178 fixedBits: 0x40d2000,
4179 args: Zn_Tb__Pg__Vd_T__1,
4180 },
4181 },
4182
4183 {
4184
4185 {
4186 goOp: AZUMIN,
4187 fixedBits: 0x40b0000,
4188 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4189 },
4190 },
4191
4192 {
4193
4194 {
4195 goOp: AZUMINP,
4196 fixedBits: 0x4417a000,
4197 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4198 },
4199 },
4200
4201 {
4202
4203 {
4204 goOp: AZUMINQV,
4205 fixedBits: 0x40f2000,
4206 args: Zn_Tb__Pg__Vd_T__1,
4207 },
4208 },
4209
4210 {
4211
4212 {
4213 goOp: AZUMLALB,
4214 fixedBits: 0x44004800,
4215 args: Zm_Tb__Zn_Tb__Zda_T__1,
4216 },
4217 },
4218
4219 {
4220
4221 {
4222 goOp: AZUMLALT,
4223 fixedBits: 0x44004c00,
4224 args: Zm_Tb__Zn_Tb__Zda_T__1,
4225 },
4226 },
4227
4228 {
4229
4230 {
4231 goOp: AZUMLSLB,
4232 fixedBits: 0x44005800,
4233 args: Zm_Tb__Zn_Tb__Zda_T__1,
4234 },
4235 },
4236
4237 {
4238
4239 {
4240 goOp: AZUMLSLT,
4241 fixedBits: 0x44005c00,
4242 args: Zm_Tb__Zn_Tb__Zda_T__1,
4243 },
4244 },
4245
4246 {
4247
4248 {
4249 goOp: AZUMMLA,
4250 fixedBits: 0x45c09800,
4251 args: Zm_B__Zn_B__Zda_S,
4252 },
4253 },
4254
4255 {
4256
4257 {
4258 goOp: AZUMULH,
4259 fixedBits: 0x4130000,
4260 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4261 },
4262
4263 {
4264 goOp: AZUMULH,
4265 fixedBits: 0x4206c00,
4266 args: Zm_T__Zn_T__Zd_T__1,
4267 },
4268 },
4269
4270 {
4271
4272 {
4273 goOp: AZUMULLB,
4274 fixedBits: 0x45007800,
4275 args: Zm_Tb__Zn_Tb__Zd_T__1,
4276 },
4277 },
4278
4279 {
4280
4281 {
4282 goOp: AZUMULLT,
4283 fixedBits: 0x45007c00,
4284 args: Zm_Tb__Zn_Tb__Zd_T__1,
4285 },
4286 },
4287
4288 {
4289
4290 {
4291 goOp: AZUQADD,
4292 fixedBits: 0x44198000,
4293 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4294 },
4295
4296 {
4297 goOp: AZUQADD,
4298 fixedBits: 0x4201400,
4299 args: Zm_T__Zn_T__Zd_T__1,
4300 },
4301 },
4302
4303 {
4304
4305 {
4306 goOp: AZUQDECP,
4307 fixedBits: 0x252b8000,
4308 args: Pm_T__Zdn_T,
4309 },
4310 },
4311
4312 {
4313
4314 {
4315 goOp: AZUQINCP,
4316 fixedBits: 0x25298000,
4317 args: Pm_T__Zdn_T,
4318 },
4319 },
4320
4321 {
4322
4323 {
4324 goOp: AZUQRSHL,
4325 fixedBits: 0x440b8000,
4326 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4327 },
4328 },
4329
4330 {
4331
4332 {
4333 goOp: AZUQRSHLR,
4334 fixedBits: 0x440f8000,
4335 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4336 },
4337 },
4338
4339 {
4340
4341 {
4342 goOp: AZUQSHL,
4343 fixedBits: 0x44098000,
4344 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4345 },
4346 },
4347
4348 {
4349
4350 {
4351 goOp: AZUQSHLR,
4352 fixedBits: 0x440d8000,
4353 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4354 },
4355 },
4356
4357 {
4358
4359 {
4360 goOp: AZUQSUB,
4361 fixedBits: 0x441b8000,
4362 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4363 },
4364
4365 {
4366 goOp: AZUQSUB,
4367 fixedBits: 0x4201c00,
4368 args: Zm_T__Zn_T__Zd_T__1,
4369 },
4370 },
4371
4372 {
4373
4374 {
4375 goOp: AZUQSUBR,
4376 fixedBits: 0x441f8000,
4377 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4378 },
4379 },
4380
4381 {
4382
4383 {
4384 goOp: AZUQXTNB,
4385 fixedBits: 0x45204800,
4386 args: Zn_Tb__Zd_T__2,
4387 },
4388 },
4389
4390 {
4391
4392 {
4393 goOp: AZUQXTNT,
4394 fixedBits: 0x45204c00,
4395 args: Zn_Tb__Zd_T__2,
4396 },
4397 },
4398
4399 {
4400
4401 {
4402 goOp: AZURECPE,
4403 fixedBits: 0x4480a000,
4404 args: Zn_S__PgM__Zd_S,
4405 },
4406
4407 {
4408 goOp: AZURECPE,
4409 fixedBits: 0x4482a000,
4410 args: Zn_S__PgZ__Zd_S,
4411 },
4412 },
4413
4414 {
4415
4416 {
4417 goOp: AZURHADD,
4418 fixedBits: 0x44158000,
4419 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4420 },
4421 },
4422
4423 {
4424
4425 {
4426 goOp: AZURSHL,
4427 fixedBits: 0x44038000,
4428 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4429 },
4430 },
4431
4432 {
4433
4434 {
4435 goOp: AZURSHLR,
4436 fixedBits: 0x44078000,
4437 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4438 },
4439 },
4440
4441 {
4442
4443 {
4444 goOp: AZURSQRTE,
4445 fixedBits: 0x4481a000,
4446 args: Zn_S__PgM__Zd_S,
4447 },
4448
4449 {
4450 goOp: AZURSQRTE,
4451 fixedBits: 0x4483a000,
4452 args: Zn_S__PgZ__Zd_S,
4453 },
4454 },
4455
4456 {
4457
4458 {
4459 goOp: AZUSDOT,
4460 fixedBits: 0x44807800,
4461 args: Zm_B__Zn_B__Zda_S,
4462 },
4463 },
4464
4465 {
4466
4467 {
4468 goOp: AZUSMMLA,
4469 fixedBits: 0x45809800,
4470 args: Zm_B__Zn_B__Zda_S,
4471 },
4472 },
4473
4474 {
4475
4476 {
4477 goOp: AZUSQADD,
4478 fixedBits: 0x441d8000,
4479 args: Zm_T__Zdn_T__PgM__Zdn_T__1,
4480 },
4481 },
4482
4483 {
4484
4485 {
4486 goOp: AZUSUBLB,
4487 fixedBits: 0x45001800,
4488 args: Zm_Tb__Zn_Tb__Zd_T__1,
4489 },
4490 },
4491
4492 {
4493
4494 {
4495 goOp: AZUSUBLT,
4496 fixedBits: 0x45001c00,
4497 args: Zm_Tb__Zn_Tb__Zd_T__1,
4498 },
4499 },
4500
4501 {
4502
4503 {
4504 goOp: AZUSUBWB,
4505 fixedBits: 0x45005800,
4506 args: Zm_Tb__Zn_T__Zd_T,
4507 },
4508 },
4509
4510 {
4511
4512 {
4513 goOp: AZUSUBWT,
4514 fixedBits: 0x45005c00,
4515 args: Zm_Tb__Zn_T__Zd_T,
4516 },
4517 },
4518
4519 {
4520
4521 {
4522 goOp: AZUUNPKHI,
4523 fixedBits: 0x5333800,
4524 args: Zn_Tb__Zd_T__1,
4525 },
4526 },
4527
4528 {
4529
4530 {
4531 goOp: AZUUNPKLO,
4532 fixedBits: 0x5323800,
4533 args: Zn_Tb__Zd_T__1,
4534 },
4535 },
4536
4537 {
4538
4539 {
4540 goOp: AZUXTB,
4541 fixedBits: 0x411a000,
4542 args: Zn_T__PgM__Zd_T__4,
4543 },
4544
4545 {
4546 goOp: AZUXTB,
4547 fixedBits: 0x401a000,
4548 args: Zn_T__PgZ__Zd_T__4,
4549 },
4550 },
4551
4552 {
4553
4554 {
4555 goOp: AZUXTH,
4556 fixedBits: 0x493a000,
4557 args: Zn_T__PgM__Zd_T__5,
4558 },
4559
4560 {
4561 goOp: AZUXTH,
4562 fixedBits: 0x483a000,
4563 args: Zn_T__PgZ__Zd_T__5,
4564 },
4565 },
4566
4567 {
4568
4569 {
4570 goOp: AZUXTW,
4571 fixedBits: 0x4d5a000,
4572 args: Zn_D__PgM__Zd_D,
4573 },
4574
4575 {
4576 goOp: AZUXTW,
4577 fixedBits: 0x4c5a000,
4578 args: Zn_D__PgZ__Zd_D,
4579 },
4580 },
4581
4582 {
4583
4584 {
4585 goOp: AZUZP1,
4586 fixedBits: 0x5206800,
4587 args: Zm_T__Zn_T__Zd_T__1,
4588 },
4589
4590 {
4591 goOp: AZUZP1,
4592 fixedBits: 0x5a00800,
4593 args: Zm_Q__Zn_Q__Zd_Q,
4594 },
4595 },
4596
4597 {
4598
4599 {
4600 goOp: AZUZP2,
4601 fixedBits: 0x5206c00,
4602 args: Zm_T__Zn_T__Zd_T__1,
4603 },
4604
4605 {
4606 goOp: AZUZP2,
4607 fixedBits: 0x5a00c00,
4608 args: Zm_Q__Zn_Q__Zd_Q,
4609 },
4610 },
4611
4612 {
4613
4614 {
4615 goOp: AZUZPQ1,
4616 fixedBits: 0x4400e800,
4617 args: Zm_T__Zn_T__Zd_T__1,
4618 },
4619 },
4620
4621 {
4622
4623 {
4624 goOp: AZUZPQ2,
4625 fixedBits: 0x4400ec00,
4626 args: Zm_T__Zn_T__Zd_T__1,
4627 },
4628 },
4629
4630 {
4631
4632 {
4633 goOp: AZZIP1,
4634 fixedBits: 0x5206000,
4635 args: Zm_T__Zn_T__Zd_T__1,
4636 },
4637
4638 {
4639 goOp: AZZIP1,
4640 fixedBits: 0x5a00000,
4641 args: Zm_Q__Zn_Q__Zd_Q,
4642 },
4643 },
4644
4645 {
4646
4647 {
4648 goOp: AZZIP2,
4649 fixedBits: 0x5206400,
4650 args: Zm_T__Zn_T__Zd_T__1,
4651 },
4652
4653 {
4654 goOp: AZZIP2,
4655 fixedBits: 0x5a00400,
4656 args: Zm_Q__Zn_Q__Zd_Q,
4657 },
4658 },
4659
4660 {
4661
4662 {
4663 goOp: AZZIPQ1,
4664 fixedBits: 0x4400e000,
4665 args: Zm_T__Zn_T__Zd_T__1,
4666 },
4667 },
4668
4669 {
4670
4671 {
4672 goOp: AZZIPQ2,
4673 fixedBits: 0x4400e400,
4674 args: Zm_T__Zn_T__Zd_T__1,
4675 },
4676 },
4677 }
4678
4679 var a_ARNG_PNd_SizeBHSD2224 = operand{
4680 class: AC_ARNG, elemEncoders: []elemEncoder{
4681 {encodePNd, enc_PNd},
4682 {encodeSizeBHSD2224, enc_size},
4683 },
4684 }
4685
4686 var a_ARNG_Pd_ArngBCheck = operand{
4687 class: AC_ARNG, elemEncoders: []elemEncoder{
4688 {encodePd, enc_Pd},
4689 {encodeArngBCheck, enc_NIL},
4690 },
4691 }
4692
4693 var a_ARNG_Pd_ArngHCheck = operand{
4694 class: AC_ARNG, elemEncoders: []elemEncoder{
4695 {encodePd, enc_Pd},
4696 {encodeArngHCheck, enc_NIL},
4697 },
4698 }
4699
4700 var a_ARNG_Pd_Size0BH2223 = operand{
4701 class: AC_ARNG, elemEncoders: []elemEncoder{
4702 {encodePd, enc_Pd},
4703 {encodeSize0BH2223, enc_size0},
4704 },
4705 }
4706
4707 var a_ARNG_Pd_SizeBHS2224 = operand{
4708 class: AC_ARNG, elemEncoders: []elemEncoder{
4709 {encodePd, enc_Pd},
4710 {encodeSizeBHS2224, enc_size},
4711 },
4712 }
4713
4714 var a_ARNG_Pd_SizeBHSD2224 = operand{
4715 class: AC_ARNG, elemEncoders: []elemEncoder{
4716 {encodePd, enc_Pd},
4717 {encodeSizeBHSD2224, enc_size},
4718 },
4719 }
4720
4721 var a_ARNG_Pd_SizeHSD2224 = operand{
4722 class: AC_ARNG, elemEncoders: []elemEncoder{
4723 {encodePd, enc_Pd},
4724 {encodeSizeHSD2224, enc_size},
4725 },
4726 }
4727
4728 var a_ARNG_PdmDest_ArngBCheck = operand{
4729 class: AC_ARNG, elemEncoders: []elemEncoder{
4730 {encodePdmDest, enc_Pdm},
4731 {encodeArngBCheck, enc_NIL},
4732 },
4733 }
4734
4735 var a_ARNG_PdnDest_SizeBHSD2224 = operand{
4736 class: AC_ARNG, elemEncoders: []elemEncoder{
4737 {encodePdnDest, enc_Pdn},
4738 {encodeSizeBHSD2224, enc_size},
4739 },
4740 }
4741
4742 var a_ARNG_PdnSrcDst_ArngBCheck = operand{
4743 class: AC_ARNG, elemEncoders: []elemEncoder{
4744 {encodePdnSrcDst, enc_Pdn},
4745 {encodeArngBCheck, enc_NIL},
4746 },
4747 }
4748
4749 var a_ARNG_Pm1620_ArngBCheck = operand{
4750 class: AC_ARNG, elemEncoders: []elemEncoder{
4751 {encodePm1620, enc_Pm},
4752 {encodeArngBCheck, enc_NIL},
4753 },
4754 }
4755
4756 var a_ARNG_Pm1620_SizeBHSD2224 = operand{
4757 class: AC_ARNG, elemEncoders: []elemEncoder{
4758 {encodePm1620, enc_Pm},
4759 {encodeSizeBHSD2224, enc_size},
4760 },
4761 }
4762
4763 var a_ARNG_Pm59v1_SizeHSD2224 = operand{
4764 class: AC_ARNG, elemEncoders: []elemEncoder{
4765 {encodePm59v1, enc_Pm},
4766 {encodeSizeHSD2224, enc_size},
4767 },
4768 }
4769
4770 var a_ARNG_Pn59_ArngBCheck = operand{
4771 class: AC_ARNG, elemEncoders: []elemEncoder{
4772 {encodePn59, enc_Pn},
4773 {encodeArngBCheck, enc_NIL},
4774 },
4775 }
4776
4777 var a_ARNG_Pn59_SizeBHSD2224 = operand{
4778 class: AC_ARNG, elemEncoders: []elemEncoder{
4779 {encodePn59, enc_Pn},
4780 {encodeSizeBHSD2224, enc_size},
4781 },
4782 }
4783
4784 var a_ARNG_Pn59v2_ArngBCheck = operand{
4785 class: AC_ARNG, elemEncoders: []elemEncoder{
4786 {encodePn59v2, enc_Pn},
4787 {encodeArngBCheck, enc_NIL},
4788 },
4789 }
4790
4791 var a_ARNG_Pn59v2_SizeBHSD2224 = operand{
4792 class: AC_ARNG, elemEncoders: []elemEncoder{
4793 {encodePn59v2, enc_Pn},
4794 {encodeSizeBHSD2224, enc_size},
4795 },
4796 }
4797
4798 var a_ARNG_Vd_Size16B8H4S2D = operand{
4799 class: AC_ARNG, elemEncoders: []elemEncoder{
4800 {encodeVd, enc_Vd},
4801 {encodeSize16B8H4S2D, enc_size},
4802 },
4803 }
4804
4805 var a_ARNG_Vd_Size8H4S2D = operand{
4806 class: AC_ARNG, elemEncoders: []elemEncoder{
4807 {encodeVd, enc_Vd},
4808 {encodeSize8H4S2D, enc_size},
4809 },
4810 }
4811
4812 var a_ARNG_Za16213Rd_SizeHSD2224 = operand{
4813 class: AC_ARNG, elemEncoders: []elemEncoder{
4814 {encodeZa16213Rd, enc_Za},
4815 {encodeSizeHSD2224, enc_size},
4816 },
4817 }
4818
4819 var a_ARNG_Za5103Rd_ArngDCheck = operand{
4820 class: AC_ARNG, elemEncoders: []elemEncoder{
4821 {encodeZa5103Rd, enc_Za},
4822 {encodeArngDCheck, enc_NIL},
4823 },
4824 }
4825
4826 var a_ARNG_Za5103Rd_SizeBHSD2224 = operand{
4827 class: AC_ARNG, elemEncoders: []elemEncoder{
4828 {encodeZa5103Rd, enc_Za},
4829 {encodeSizeBHSD2224, enc_size},
4830 },
4831 }
4832
4833 var a_ARNG_Zd_ArngBCheck = operand{
4834 class: AC_ARNG, elemEncoders: []elemEncoder{
4835 {encodeZd, enc_Zd},
4836 {encodeArngBCheck, enc_NIL},
4837 },
4838 }
4839
4840 var a_ARNG_Zd_ArngDCheck = operand{
4841 class: AC_ARNG, elemEncoders: []elemEncoder{
4842 {encodeZd, enc_Zd},
4843 {encodeArngDCheck, enc_NIL},
4844 },
4845 }
4846
4847 var a_ARNG_Zd_ArngHCheck = operand{
4848 class: AC_ARNG, elemEncoders: []elemEncoder{
4849 {encodeZd, enc_Zd},
4850 {encodeArngHCheck, enc_NIL},
4851 },
4852 }
4853
4854 var a_ARNG_Zd_ArngQCheck = operand{
4855 class: AC_ARNG, elemEncoders: []elemEncoder{
4856 {encodeZd, enc_Zd},
4857 {encodeArngQCheck, enc_NIL},
4858 },
4859 }
4860
4861 var a_ARNG_Zd_ArngSCheck = operand{
4862 class: AC_ARNG, elemEncoders: []elemEncoder{
4863 {encodeZd, enc_Zd},
4864 {encodeArngSCheck, enc_NIL},
4865 },
4866 }
4867
4868 var a_ARNG_Zd_Size0HalfwordMergeZero = operand{
4869 class: AC_ARNG, elemEncoders: []elemEncoder{
4870 {encodeZd, enc_Zd},
4871 {encodeSize0HalfwordMergeZero, enc_size0},
4872 },
4873 }
4874
4875 var a_ARNG_Zd_Size0SD2223 = operand{
4876 class: AC_ARNG, elemEncoders: []elemEncoder{
4877 {encodeZd, enc_Zd},
4878 {encodeSize0SD2223, enc_size0},
4879 },
4880 }
4881
4882 var a_ARNG_Zd_SizeBHS2224 = operand{
4883 class: AC_ARNG, elemEncoders: []elemEncoder{
4884 {encodeZd, enc_Zd},
4885 {encodeSizeBHS2224, enc_size},
4886 },
4887 }
4888
4889 var a_ARNG_Zd_SizeBHS2224Offset1 = operand{
4890 class: AC_ARNG, elemEncoders: []elemEncoder{
4891 {encodeZd, enc_Zd},
4892 {encodeSizeBHS2224Offset1, enc_size},
4893 },
4894 }
4895
4896 var a_ARNG_Zd_SizeBHSD2224 = operand{
4897 class: AC_ARNG, elemEncoders: []elemEncoder{
4898 {encodeZd, enc_Zd},
4899 {encodeSizeBHSD2224, enc_size},
4900 },
4901 }
4902
4903 var a_ARNG_Zd_SizeByteMergeZero = operand{
4904 class: AC_ARNG, elemEncoders: []elemEncoder{
4905 {encodeZd, enc_Zd},
4906 {encodeSizeByteMergeZero, enc_size},
4907 },
4908 }
4909
4910 var a_ARNG_Zd_SizeHD2224 = operand{
4911 class: AC_ARNG, elemEncoders: []elemEncoder{
4912 {encodeZd, enc_Zd},
4913 {encodeSizeHD2224, enc_size},
4914 },
4915 }
4916
4917 var a_ARNG_Zd_SizeHSD1315 = operand{
4918 class: AC_ARNG, elemEncoders: []elemEncoder{
4919 {encodeZd, enc_Zd},
4920 {encodeSizeHSD1315, enc_size},
4921 },
4922 }
4923
4924 var a_ARNG_Zd_SizeHSD1719 = operand{
4925 class: AC_ARNG, elemEncoders: []elemEncoder{
4926 {encodeZd, enc_Zd},
4927 {encodeSizeHSD1719, enc_size},
4928 },
4929 }
4930
4931 var a_ARNG_Zd_SizeHSD2224 = operand{
4932 class: AC_ARNG, elemEncoders: []elemEncoder{
4933 {encodeZd, enc_Zd},
4934 {encodeSizeHSD2224, enc_size},
4935 },
4936 }
4937
4938 var a_ARNG_Zd_SizeHSD2224No00 = operand{
4939 class: AC_ARNG, elemEncoders: []elemEncoder{
4940 {encodeZd, enc_Zd},
4941 {encodeSizeHSD2224No00, enc_size},
4942 },
4943 }
4944
4945 var a_ARNG_Zd_SzByteHalfword = operand{
4946 class: AC_ARNG, elemEncoders: []elemEncoder{
4947 {encodeZd, enc_Zd},
4948 {encodeSzByteHalfword, enc_sz},
4949 },
4950 }
4951
4952 var a_ARNG_Zd_SzSD1415 = operand{
4953 class: AC_ARNG, elemEncoders: []elemEncoder{
4954 {encodeZd, enc_Zd},
4955 {encodeSzSD1415, enc_sz},
4956 },
4957 }
4958
4959 var a_ARNG_Zd_SzSD1718 = operand{
4960 class: AC_ARNG, elemEncoders: []elemEncoder{
4961 {encodeZd, enc_Zd},
4962 {encodeSzSD1718, enc_sz},
4963 },
4964 }
4965
4966 var a_ARNG_Zd_SzWordDoubleword = operand{
4967 class: AC_ARNG, elemEncoders: []elemEncoder{
4968 {encodeZd, enc_Zd},
4969 {encodeSzWordDoubleword, enc_sz},
4970 },
4971 }
4972
4973 var a_ARNG_Zd_TszhTszlBHS = operand{
4974 class: AC_ARNG, elemEncoders: []elemEncoder{
4975 {encodeZd, enc_Zd},
4976 {encodeTszhTszlBHS, enc_tszh_tszl},
4977 },
4978 }
4979
4980 var a_ARNG_Zda3RdSrcDst_ArngDCheck = operand{
4981 class: AC_ARNG, elemEncoders: []elemEncoder{
4982 {encodeZda3RdSrcDst, enc_Zda},
4983 {encodeArngDCheck, enc_NIL},
4984 },
4985 }
4986
4987 var a_ARNG_Zda3RdSrcDst_ArngHCheck = operand{
4988 class: AC_ARNG, elemEncoders: []elemEncoder{
4989 {encodeZda3RdSrcDst, enc_Zda},
4990 {encodeArngHCheck, enc_NIL},
4991 },
4992 }
4993
4994 var a_ARNG_Zda3RdSrcDst_ArngSCheck = operand{
4995 class: AC_ARNG, elemEncoders: []elemEncoder{
4996 {encodeZda3RdSrcDst, enc_Zda},
4997 {encodeArngSCheck, enc_NIL},
4998 },
4999 }
5000
5001 var a_ARNG_Zda3RdSrcDst_Size0SD2223 = operand{
5002 class: AC_ARNG, elemEncoders: []elemEncoder{
5003 {encodeZda3RdSrcDst, enc_Zda},
5004 {encodeSize0SD2223, enc_size0},
5005 },
5006 }
5007
5008 var a_ARNG_Zda3RdSrcDst_SizeBHSD2224 = operand{
5009 class: AC_ARNG, elemEncoders: []elemEncoder{
5010 {encodeZda3RdSrcDst, enc_Zda},
5011 {encodeSizeBHSD2224, enc_size},
5012 },
5013 }
5014
5015 var a_ARNG_Zda3RdSrcDst_SizeHSD2224 = operand{
5016 class: AC_ARNG, elemEncoders: []elemEncoder{
5017 {encodeZda3RdSrcDst, enc_Zda},
5018 {encodeSizeHSD2224, enc_size},
5019 },
5020 }
5021
5022 var a_ARNG_Zda3RdSrcDst_SizeHSD2224No00 = operand{
5023 class: AC_ARNG, elemEncoders: []elemEncoder{
5024 {encodeZda3RdSrcDst, enc_Zda},
5025 {encodeSizeHSD2224No00, enc_size},
5026 },
5027 }
5028
5029 var a_ARNG_Zda3RdSrcDst_SzSD2223 = operand{
5030 class: AC_ARNG, elemEncoders: []elemEncoder{
5031 {encodeZda3RdSrcDst, enc_Zda},
5032 {encodeSzSD2223, enc_sz},
5033 },
5034 }
5035
5036 var a_ARNG_ZdaDest_SizeHSD2224 = operand{
5037 class: AC_ARNG, elemEncoders: []elemEncoder{
5038 {encodeZdaDest, enc_Zda},
5039 {encodeSizeHSD2224, enc_size},
5040 },
5041 }
5042
5043 var a_ARNG_ZdnDest_ArngBCheck = operand{
5044 class: AC_ARNG, elemEncoders: []elemEncoder{
5045 {encodeZdnDest, enc_Zdn},
5046 {encodeArngBCheck, enc_NIL},
5047 },
5048 }
5049
5050 var a_ARNG_ZdnDest_ArngDCheck = operand{
5051 class: AC_ARNG, elemEncoders: []elemEncoder{
5052 {encodeZdnDest, enc_Zdn},
5053 {encodeArngDCheck, enc_NIL},
5054 },
5055 }
5056
5057 var a_ARNG_ZdnDest_ArngHCheck = operand{
5058 class: AC_ARNG, elemEncoders: []elemEncoder{
5059 {encodeZdnDest, enc_Zdn},
5060 {encodeArngHCheck, enc_NIL},
5061 },
5062 }
5063
5064 var a_ARNG_ZdnDest_ArngSCheck = operand{
5065 class: AC_ARNG, elemEncoders: []elemEncoder{
5066 {encodeZdnDest, enc_Zdn},
5067 {encodeArngSCheck, enc_NIL},
5068 },
5069 }
5070
5071 var a_ARNG_ZdnDest_Size0SD2223 = operand{
5072 class: AC_ARNG, elemEncoders: []elemEncoder{
5073 {encodeZdnDest, enc_Zdn},
5074 {encodeSize0SD2223, enc_size0},
5075 },
5076 }
5077
5078 var a_ARNG_ZdnDest_SizeBHS2224 = operand{
5079 class: AC_ARNG, elemEncoders: []elemEncoder{
5080 {encodeZdnDest, enc_Zdn},
5081 {encodeSizeBHS2224, enc_size},
5082 },
5083 }
5084
5085 var a_ARNG_ZdnDest_SizeBHSD2224 = operand{
5086 class: AC_ARNG, elemEncoders: []elemEncoder{
5087 {encodeZdnDest, enc_Zdn},
5088 {encodeSizeBHSD2224, enc_size},
5089 },
5090 }
5091
5092 var a_ARNG_ZdnDest_SizeHSD2224 = operand{
5093 class: AC_ARNG, elemEncoders: []elemEncoder{
5094 {encodeZdnDest, enc_Zdn},
5095 {encodeSizeHSD2224, enc_size},
5096 },
5097 }
5098
5099 var a_ARNG_ZdnDest_SizeHSD2224No00 = operand{
5100 class: AC_ARNG, elemEncoders: []elemEncoder{
5101 {encodeZdnDest, enc_Zdn},
5102 {encodeSizeHSD2224No00, enc_size},
5103 },
5104 }
5105
5106 var a_ARNG_ZdnSrcDst_ArngBCheck = operand{
5107 class: AC_ARNG, elemEncoders: []elemEncoder{
5108 {encodeZdnSrcDst, enc_Zdn},
5109 {encodeArngBCheck, enc_NIL},
5110 },
5111 }
5112
5113 var a_ARNG_ZdnSrcDst_SizeHSD2224 = operand{
5114 class: AC_ARNG, elemEncoders: []elemEncoder{
5115 {encodeZdnSrcDst, enc_Zdn},
5116 {encodeSizeHSD2224, enc_size},
5117 },
5118 }
5119
5120 var a_ARNG_Zk5103Rd_ArngDCheck = operand{
5121 class: AC_ARNG, elemEncoders: []elemEncoder{
5122 {encodeZk5103Rd, enc_Zk},
5123 {encodeArngDCheck, enc_NIL},
5124 },
5125 }
5126
5127 var a_ARNG_Zm1621_ArngBCheck = operand{
5128 class: AC_ARNG, elemEncoders: []elemEncoder{
5129 {encodeZm1621, enc_Zm},
5130 {encodeArngBCheck, enc_NIL},
5131 },
5132 }
5133
5134 var a_ARNG_Zm1621_ArngDCheck = operand{
5135 class: AC_ARNG, elemEncoders: []elemEncoder{
5136 {encodeZm1621, enc_Zm},
5137 {encodeArngDCheck, enc_NIL},
5138 },
5139 }
5140
5141 var a_ARNG_Zm1621_ArngHCheck = operand{
5142 class: AC_ARNG, elemEncoders: []elemEncoder{
5143 {encodeZm1621, enc_Zm},
5144 {encodeArngHCheck, enc_NIL},
5145 },
5146 }
5147
5148 var a_ARNG_Zm1621_ArngQCheck = operand{
5149 class: AC_ARNG, elemEncoders: []elemEncoder{
5150 {encodeZm1621, enc_Zm},
5151 {encodeArngQCheck, enc_NIL},
5152 },
5153 }
5154
5155 var a_ARNG_Zm1621_ArngSCheck = operand{
5156 class: AC_ARNG, elemEncoders: []elemEncoder{
5157 {encodeZm1621, enc_Zm},
5158 {encodeArngSCheck, enc_NIL},
5159 },
5160 }
5161
5162 var a_ARNG_Zm1621_Size0BH2223 = operand{
5163 class: AC_ARNG, elemEncoders: []elemEncoder{
5164 {encodeZm1621, enc_Zm},
5165 {encodeSize0BH2223, enc_size0},
5166 },
5167 }
5168
5169 var a_ARNG_Zm1621_Size0SD2223 = operand{
5170 class: AC_ARNG, elemEncoders: []elemEncoder{
5171 {encodeZm1621, enc_Zm},
5172 {encodeSize0SD2223, enc_size0},
5173 },
5174 }
5175
5176 var a_ARNG_Zm1621_Size0TbBH2223 = operand{
5177 class: AC_ARNG, elemEncoders: []elemEncoder{
5178 {encodeZm1621, enc_Zm},
5179 {encodeSize0TbBH2223, enc_size0},
5180 },
5181 }
5182
5183 var a_ARNG_Zm1621_SizeBHSD2224 = operand{
5184 class: AC_ARNG, elemEncoders: []elemEncoder{
5185 {encodeZm1621, enc_Zm},
5186 {encodeSizeBHSD2224, enc_size},
5187 },
5188 }
5189
5190 var a_ARNG_Zm1621_SizeHSD2224 = operand{
5191 class: AC_ARNG, elemEncoders: []elemEncoder{
5192 {encodeZm1621, enc_Zm},
5193 {encodeSizeHSD2224, enc_size},
5194 },
5195 }
5196
5197 var a_ARNG_Zm1621_SizeHSD2224No00 = operand{
5198 class: AC_ARNG, elemEncoders: []elemEncoder{
5199 {encodeZm1621, enc_Zm},
5200 {encodeSizeHSD2224No00, enc_size},
5201 },
5202 }
5203
5204 var a_ARNG_Zm1621_SizeTbBHS2224 = operand{
5205 class: AC_ARNG, elemEncoders: []elemEncoder{
5206 {encodeZm1621, enc_Zm},
5207 {encodeSizeTbBHS2224, enc_size},
5208 },
5209 }
5210
5211 var a_ARNG_Zm1621_SizeTbBS2224 = operand{
5212 class: AC_ARNG, elemEncoders: []elemEncoder{
5213 {encodeZm1621, enc_Zm},
5214 {encodeSizeTbBS2224, enc_size},
5215 },
5216 }
5217
5218 var a_ARNG_Zm1621_SizeTbHSD2224Offset1 = operand{
5219 class: AC_ARNG, elemEncoders: []elemEncoder{
5220 {encodeZm1621, enc_Zm},
5221 {encodeSizeTbHSD2224Offset1, enc_size},
5222 },
5223 }
5224
5225 var a_ARNG_Zm1621_SzSD2223 = operand{
5226 class: AC_ARNG, elemEncoders: []elemEncoder{
5227 {encodeZm1621, enc_Zm},
5228 {encodeSzSD2223, enc_sz},
5229 },
5230 }
5231
5232 var a_ARNG_Zm510_ArngBCheck = operand{
5233 class: AC_ARNG, elemEncoders: []elemEncoder{
5234 {encodeZm510, enc_Zm},
5235 {encodeArngBCheck, enc_NIL},
5236 },
5237 }
5238
5239 var a_ARNG_Zm510_ArngDCheck = operand{
5240 class: AC_ARNG, elemEncoders: []elemEncoder{
5241 {encodeZm510, enc_Zm},
5242 {encodeArngDCheck, enc_NIL},
5243 },
5244 }
5245
5246 var a_ARNG_Zm510_ArngHCheck = operand{
5247 class: AC_ARNG, elemEncoders: []elemEncoder{
5248 {encodeZm510, enc_Zm},
5249 {encodeArngHCheck, enc_NIL},
5250 },
5251 }
5252
5253 var a_ARNG_Zm510_ArngSCheck = operand{
5254 class: AC_ARNG, elemEncoders: []elemEncoder{
5255 {encodeZm510, enc_Zm},
5256 {encodeArngSCheck, enc_NIL},
5257 },
5258 }
5259
5260 var a_ARNG_Zm510_Size0SD2223 = operand{
5261 class: AC_ARNG, elemEncoders: []elemEncoder{
5262 {encodeZm510, enc_Zm},
5263 {encodeSize0SD2223, enc_size0},
5264 },
5265 }
5266
5267 var a_ARNG_Zm510_SizeBHSD2224 = operand{
5268 class: AC_ARNG, elemEncoders: []elemEncoder{
5269 {encodeZm510, enc_Zm},
5270 {encodeSizeBHSD2224, enc_size},
5271 },
5272 }
5273
5274 var a_ARNG_Zm510_SizeHSD2224 = operand{
5275 class: AC_ARNG, elemEncoders: []elemEncoder{
5276 {encodeZm510, enc_Zm},
5277 {encodeSizeHSD2224, enc_size},
5278 },
5279 }
5280
5281 var a_ARNG_Zm510_SizeHSD2224No00 = operand{
5282 class: AC_ARNG, elemEncoders: []elemEncoder{
5283 {encodeZm510, enc_Zm},
5284 {encodeSizeHSD2224No00, enc_size},
5285 },
5286 }
5287
5288 var a_ARNG_Zn510Src_ArngBCheck = operand{
5289 class: AC_ARNG, elemEncoders: []elemEncoder{
5290 {encodeZn510Src, enc_Zn},
5291 {encodeArngBCheck, enc_NIL},
5292 },
5293 }
5294
5295 var a_ARNG_Zn510Src_ArngDCheck = operand{
5296 class: AC_ARNG, elemEncoders: []elemEncoder{
5297 {encodeZn510Src, enc_Zn},
5298 {encodeArngDCheck, enc_NIL},
5299 },
5300 }
5301
5302 var a_ARNG_Zn510Src_ArngHCheck = operand{
5303 class: AC_ARNG, elemEncoders: []elemEncoder{
5304 {encodeZn510Src, enc_Zn},
5305 {encodeArngHCheck, enc_NIL},
5306 },
5307 }
5308
5309 var a_ARNG_Zn510Src_ArngQCheck = operand{
5310 class: AC_ARNG, elemEncoders: []elemEncoder{
5311 {encodeZn510Src, enc_Zn},
5312 {encodeArngQCheck, enc_NIL},
5313 },
5314 }
5315
5316 var a_ARNG_Zn510Src_ArngSCheck = operand{
5317 class: AC_ARNG, elemEncoders: []elemEncoder{
5318 {encodeZn510Src, enc_Zn},
5319 {encodeArngSCheck, enc_NIL},
5320 },
5321 }
5322
5323 var a_ARNG_Zn510Src_Size0HalfwordMergeZero = operand{
5324 class: AC_ARNG, elemEncoders: []elemEncoder{
5325 {encodeZn510Src, enc_Zn},
5326 {encodeSize0HalfwordMergeZero, enc_size0},
5327 },
5328 }
5329
5330 var a_ARNG_Zn510Src_SizeBHSD2224 = operand{
5331 class: AC_ARNG, elemEncoders: []elemEncoder{
5332 {encodeZn510Src, enc_Zn},
5333 {encodeSizeBHSD2224, enc_size},
5334 },
5335 }
5336
5337 var a_ARNG_Zn510Src_SizeByteMergeZero = operand{
5338 class: AC_ARNG, elemEncoders: []elemEncoder{
5339 {encodeZn510Src, enc_Zn},
5340 {encodeSizeByteMergeZero, enc_size},
5341 },
5342 }
5343
5344 var a_ARNG_Zn510Src_SizeHSD1315 = operand{
5345 class: AC_ARNG, elemEncoders: []elemEncoder{
5346 {encodeZn510Src, enc_Zn},
5347 {encodeSizeHSD1315, enc_size},
5348 },
5349 }
5350
5351 var a_ARNG_Zn510Src_SizeHSD1719 = operand{
5352 class: AC_ARNG, elemEncoders: []elemEncoder{
5353 {encodeZn510Src, enc_Zn},
5354 {encodeSizeHSD1719, enc_size},
5355 },
5356 }
5357
5358 var a_ARNG_Zn510Src_SizeHSD2224 = operand{
5359 class: AC_ARNG, elemEncoders: []elemEncoder{
5360 {encodeZn510Src, enc_Zn},
5361 {encodeSizeHSD2224, enc_size},
5362 },
5363 }
5364
5365 var a_ARNG_Zn510Src_SizeTbBHS2224 = operand{
5366 class: AC_ARNG, elemEncoders: []elemEncoder{
5367 {encodeZn510Src, enc_Zn},
5368 {encodeSizeTbBHS2224, enc_size},
5369 },
5370 }
5371
5372 var a_ARNG_Zn510Src_SizeTbBHSD2224 = operand{
5373 class: AC_ARNG, elemEncoders: []elemEncoder{
5374 {encodeZn510Src, enc_Zn},
5375 {encodeSizeTbBHSD2224, enc_size},
5376 },
5377 }
5378
5379 var a_ARNG_Zn510Src_SizeTbHSD2224Offset1 = operand{
5380 class: AC_ARNG, elemEncoders: []elemEncoder{
5381 {encodeZn510Src, enc_Zn},
5382 {encodeSizeTbHSD2224Offset1, enc_size},
5383 },
5384 }
5385
5386 var a_ARNG_Zn510Src_SzByteHalfword = operand{
5387 class: AC_ARNG, elemEncoders: []elemEncoder{
5388 {encodeZn510Src, enc_Zn},
5389 {encodeSzByteHalfword, enc_sz},
5390 },
5391 }
5392
5393 var a_ARNG_Zn510Src_SzSD1415 = operand{
5394 class: AC_ARNG, elemEncoders: []elemEncoder{
5395 {encodeZn510Src, enc_Zn},
5396 {encodeSzSD1415, enc_sz},
5397 },
5398 }
5399
5400 var a_ARNG_Zn510Src_SzSD1718 = operand{
5401 class: AC_ARNG, elemEncoders: []elemEncoder{
5402 {encodeZn510Src, enc_Zn},
5403 {encodeSzSD1718, enc_sz},
5404 },
5405 }
5406
5407 var a_ARNG_Zn510Src_SzWordDoubleword = operand{
5408 class: AC_ARNG, elemEncoders: []elemEncoder{
5409 {encodeZn510Src, enc_Zn},
5410 {encodeSzWordDoubleword, enc_sz},
5411 },
5412 }
5413
5414 var a_ARNG_Zn510Src_TszhTszlTbHSD = operand{
5415 class: AC_ARNG, elemEncoders: []elemEncoder{
5416 {encodeZn510Src, enc_Zn},
5417 {encodeTszhTszlTbHSD, enc_tszh_tszl},
5418 },
5419 }
5420
5421 var a_ARNG_Zn510_ArngBCheck = operand{
5422 class: AC_ARNG, elemEncoders: []elemEncoder{
5423 {encodeZn510, enc_Zn},
5424 {encodeArngBCheck, enc_NIL},
5425 },
5426 }
5427
5428 var a_ARNG_Zn510_ArngDCheck = operand{
5429 class: AC_ARNG, elemEncoders: []elemEncoder{
5430 {encodeZn510, enc_Zn},
5431 {encodeArngDCheck, enc_NIL},
5432 },
5433 }
5434
5435 var a_ARNG_Zn510_ArngHCheck = operand{
5436 class: AC_ARNG, elemEncoders: []elemEncoder{
5437 {encodeZn510, enc_Zn},
5438 {encodeArngHCheck, enc_NIL},
5439 },
5440 }
5441
5442 var a_ARNG_Zn510_ArngQCheck = operand{
5443 class: AC_ARNG, elemEncoders: []elemEncoder{
5444 {encodeZn510, enc_Zn},
5445 {encodeArngQCheck, enc_NIL},
5446 },
5447 }
5448
5449 var a_ARNG_Zn510_ArngSCheck = operand{
5450 class: AC_ARNG, elemEncoders: []elemEncoder{
5451 {encodeZn510, enc_Zn},
5452 {encodeArngSCheck, enc_NIL},
5453 },
5454 }
5455
5456 var a_ARNG_Zn510_Size0BH2223 = operand{
5457 class: AC_ARNG, elemEncoders: []elemEncoder{
5458 {encodeZn510, enc_Zn},
5459 {encodeSize0BH2223, enc_size0},
5460 },
5461 }
5462
5463 var a_ARNG_Zn510_Size0SD2223 = operand{
5464 class: AC_ARNG, elemEncoders: []elemEncoder{
5465 {encodeZn510, enc_Zn},
5466 {encodeSize0SD2223, enc_size0},
5467 },
5468 }
5469
5470 var a_ARNG_Zn510_Size0TbBH2223 = operand{
5471 class: AC_ARNG, elemEncoders: []elemEncoder{
5472 {encodeZn510, enc_Zn},
5473 {encodeSize0TbBH2223, enc_size0},
5474 },
5475 }
5476
5477 var a_ARNG_Zn510_SizeBHS2224 = operand{
5478 class: AC_ARNG, elemEncoders: []elemEncoder{
5479 {encodeZn510, enc_Zn},
5480 {encodeSizeBHS2224, enc_size},
5481 },
5482 }
5483
5484 var a_ARNG_Zn510_SizeBHSD2224 = operand{
5485 class: AC_ARNG, elemEncoders: []elemEncoder{
5486 {encodeZn510, enc_Zn},
5487 {encodeSizeBHSD2224, enc_size},
5488 },
5489 }
5490
5491 var a_ARNG_Zn510_SizeHSD2224 = operand{
5492 class: AC_ARNG, elemEncoders: []elemEncoder{
5493 {encodeZn510, enc_Zn},
5494 {encodeSizeHSD2224, enc_size},
5495 },
5496 }
5497
5498 var a_ARNG_Zn510_SizeHSD2224No00 = operand{
5499 class: AC_ARNG, elemEncoders: []elemEncoder{
5500 {encodeZn510, enc_Zn},
5501 {encodeSizeHSD2224No00, enc_size},
5502 },
5503 }
5504
5505 var a_ARNG_Zn510_SizeTbBHS2224 = operand{
5506 class: AC_ARNG, elemEncoders: []elemEncoder{
5507 {encodeZn510, enc_Zn},
5508 {encodeSizeTbBHS2224, enc_size},
5509 },
5510 }
5511
5512 var a_ARNG_Zn510_SizeTbBS2224 = operand{
5513 class: AC_ARNG, elemEncoders: []elemEncoder{
5514 {encodeZn510, enc_Zn},
5515 {encodeSizeTbBS2224, enc_size},
5516 },
5517 }
5518
5519 var a_ARNG_Zn510_SizeTbHSD2224Offset1 = operand{
5520 class: AC_ARNG, elemEncoders: []elemEncoder{
5521 {encodeZn510, enc_Zn},
5522 {encodeSizeTbHSD2224Offset1, enc_size},
5523 },
5524 }
5525
5526 var a_ARNG_Zn510_SzSD2223 = operand{
5527 class: AC_ARNG, elemEncoders: []elemEncoder{
5528 {encodeZn510, enc_Zn},
5529 {encodeSzSD2223, enc_sz},
5530 },
5531 }
5532
5533 var a_PREGZM_Pg1013_MergePredCheck = operand{
5534 class: AC_PREGZM, elemEncoders: []elemEncoder{
5535 {encodePg1013, enc_Pg},
5536 {encodeMergePredCheck, enc_NIL},
5537 },
5538 }
5539
5540 var a_PREGZM_Pg1013_PredQualM1617 = operand{
5541 class: AC_PREGZM, elemEncoders: []elemEncoder{
5542 {encodePg1013, enc_Pg},
5543 {encodePredQualM1617, enc_M},
5544 },
5545 }
5546
5547 var a_PREGZM_Pg1013_ZeroPredCheck = operand{
5548 class: AC_PREGZM, elemEncoders: []elemEncoder{
5549 {encodePg1013, enc_Pg},
5550 {encodeZeroPredCheck, enc_NIL},
5551 },
5552 }
5553
5554 var a_PREGZM_Pg1014_PredQualM45 = operand{
5555 class: AC_PREGZM, elemEncoders: []elemEncoder{
5556 {encodePg1014, enc_Pg},
5557 {encodePredQualM45, enc_M},
5558 },
5559 }
5560
5561 var a_PREGZM_Pg1014_ZeroPredCheck = operand{
5562 class: AC_PREGZM, elemEncoders: []elemEncoder{
5563 {encodePg1014, enc_Pg},
5564 {encodeZeroPredCheck, enc_NIL},
5565 },
5566 }
5567
5568 var a_PREGZM_Pg59_ZeroPredCheck = operand{
5569 class: AC_PREGZM, elemEncoders: []elemEncoder{
5570 {encodePg59, enc_Pg},
5571 {encodeZeroPredCheck, enc_NIL},
5572 },
5573 }
5574
5575 var a_PREG_Pg1013_Noop = operand{
5576 class: AC_PREG, elemEncoders: []elemEncoder{
5577 {encodePg1013, enc_Pg},
5578 {encodeNoop, enc_NIL},
5579 },
5580 }
5581
5582 var a_PREG_Pg1014_Noop = operand{
5583 class: AC_PREG, elemEncoders: []elemEncoder{
5584 {encodePg1014, enc_Pg},
5585 {encodeNoop, enc_NIL},
5586 },
5587 }
5588
5589 var a_PREG_Pg59_Noop = operand{
5590 class: AC_PREG, elemEncoders: []elemEncoder{
5591 {encodePg59, enc_Pg},
5592 {encodeNoop, enc_NIL},
5593 },
5594 }
5595
5596 var a_PREG_Pv1013_Noop = operand{
5597 class: AC_PREG, elemEncoders: []elemEncoder{
5598 {encodePv1013, enc_Pv},
5599 {encodeNoop, enc_NIL},
5600 },
5601 }
5602
5603 var a_PREG_Pv1014_Noop = operand{
5604 class: AC_PREG, elemEncoders: []elemEncoder{
5605 {encodePv1014, enc_Pv},
5606 {encodeNoop, enc_NIL},
5607 },
5608 }
5609
5610 var a_PREG_Pv59_Noop = operand{
5611 class: AC_PREG, elemEncoders: []elemEncoder{
5612 {encodePv59, enc_Pv},
5613 {encodeNoop, enc_NIL},
5614 },
5615 }
5616
5617 var a_ZREG_Zd_Noop = operand{
5618 class: AC_ZREG, elemEncoders: []elemEncoder{
5619 {encodeZd, enc_Zd},
5620 {encodeNoop, enc_NIL},
5621 },
5622 }
5623
5624 var a_ZREG_Zn510Src_Noop = operand{
5625 class: AC_ZREG, elemEncoders: []elemEncoder{
5626 {encodeZn510Src, enc_Zn},
5627 {encodeNoop, enc_NIL},
5628 },
5629 }
5630
5631 var PNd_T = []operand{
5632 a_ARNG_PNd_SizeBHSD2224,
5633 }
5634
5635 var Pd_B = []operand{
5636 a_ARNG_Pd_ArngBCheck,
5637 }
5638
5639 var Pdm_B__Pn_B__PgZ__Pdm_B = []operand{
5640 a_ARNG_PdmDest_ArngBCheck,
5641 a_ARNG_Pn59_ArngBCheck,
5642 a_PREGZM_Pg1014_ZeroPredCheck,
5643 a_ARNG_PdmDest_ArngBCheck,
5644 }
5645
5646 var Pdn_B__Pg__Pdn_B = []operand{
5647 a_ARNG_PdnSrcDst_ArngBCheck,
5648 a_PREG_Pg59_Noop,
5649 a_ARNG_PdnSrcDst_ArngBCheck,
5650 }
5651
5652 var Pdn_T__Pv__Pdn_T = []operand{
5653 a_ARNG_PdnDest_SizeBHSD2224,
5654 a_PREG_Pv59_Noop,
5655 a_ARNG_PdnDest_SizeBHSD2224,
5656 }
5657
5658 var PgZ__Pd_B = []operand{
5659 a_PREGZM_Pg59_ZeroPredCheck,
5660 a_ARNG_Pd_ArngBCheck,
5661 }
5662
5663 var Pm_B__Pn_B__PgZ__Pd_B = []operand{
5664 a_ARNG_Pm1620_ArngBCheck,
5665 a_ARNG_Pn59_ArngBCheck,
5666 a_PREGZM_Pg1014_ZeroPredCheck,
5667 a_ARNG_Pd_ArngBCheck,
5668 }
5669
5670 var Pm_B__Pn_B__Pg__Pd_B = []operand{
5671 a_ARNG_Pm1620_ArngBCheck,
5672 a_ARNG_Pn59_ArngBCheck,
5673 a_PREG_Pg1014_Noop,
5674 a_ARNG_Pd_ArngBCheck,
5675 }
5676
5677 var Pm_T__Pn_T__Pd_T = []operand{
5678 a_ARNG_Pm1620_SizeBHSD2224,
5679 a_ARNG_Pn59_SizeBHSD2224,
5680 a_ARNG_Pd_SizeBHSD2224,
5681 }
5682
5683 var Pm_T__Zdn_T = []operand{
5684 a_ARNG_Pm59v1_SizeHSD2224,
5685 a_ARNG_ZdnSrcDst_SizeHSD2224,
5686 }
5687
5688 var Pn_B = []operand{
5689 a_ARNG_Pn59v2_ArngBCheck,
5690 }
5691
5692 var Pn_B__Pd_H = []operand{
5693 a_ARNG_Pn59v2_ArngBCheck,
5694 a_ARNG_Pd_ArngHCheck,
5695 }
5696
5697 var Pn_B__Pg = []operand{
5698 a_ARNG_Pn59v2_ArngBCheck,
5699 a_PREG_Pg1014_Noop,
5700 }
5701
5702 var Pn_B__PgZM__Pd_B = []operand{
5703 a_ARNG_Pn59v2_ArngBCheck,
5704 a_PREGZM_Pg1014_PredQualM45,
5705 a_ARNG_Pd_ArngBCheck,
5706 }
5707
5708 var Pn_B__PgZ__Pd_B = []operand{
5709 a_ARNG_Pn59v2_ArngBCheck,
5710 a_PREGZM_Pg1014_ZeroPredCheck,
5711 a_ARNG_Pd_ArngBCheck,
5712 }
5713
5714 var Pn_B__Zd = []operand{
5715 a_ARNG_Pn59v2_ArngBCheck,
5716 a_ZREG_Zd_Noop,
5717 }
5718
5719 var Pn_T__Pd_T = []operand{
5720 a_ARNG_Pn59v2_SizeBHSD2224,
5721 a_ARNG_Pd_SizeBHSD2224,
5722 }
5723
5724 var Za_D__Zm_D__Zdn_D = []operand{
5725 a_ARNG_Za5103Rd_ArngDCheck,
5726 a_ARNG_Zm1621_ArngDCheck,
5727 a_ARNG_ZdnDest_ArngDCheck,
5728 }
5729
5730 var Za_T__Zm_T__PgM__Zdn_T__1 = []operand{
5731 a_ARNG_Za16213Rd_SizeHSD2224,
5732 a_ARNG_Zm510_SizeHSD2224,
5733 a_PREGZM_Pg1013_MergePredCheck,
5734 a_ARNG_ZdnDest_SizeHSD2224,
5735 }
5736
5737 var Za_T__Zm_T__PgM__Zdn_T__2 = []operand{
5738 a_ARNG_Za5103Rd_SizeBHSD2224,
5739 a_ARNG_Zm1621_SizeBHSD2224,
5740 a_PREGZM_Pg1013_MergePredCheck,
5741 a_ARNG_ZdnDest_SizeBHSD2224,
5742 }
5743
5744 var Zdn_B__Zdn_B = []operand{
5745 a_ARNG_ZdnSrcDst_ArngBCheck,
5746 a_ARNG_ZdnSrcDst_ArngBCheck,
5747 }
5748
5749 var Zk_D__Zm_D__Zdn_D__Zdn_D = []operand{
5750 a_ARNG_Zk5103Rd_ArngDCheck,
5751 a_ARNG_Zm1621_ArngDCheck,
5752 a_ARNG_ZdnDest_ArngDCheck,
5753 a_ARNG_ZdnDest_ArngDCheck,
5754 }
5755
5756 var Zm_B__Zdn_B__Zdn_B = []operand{
5757 a_ARNG_Zm510_ArngBCheck,
5758 a_ARNG_ZdnDest_ArngBCheck,
5759 a_ARNG_ZdnDest_ArngBCheck,
5760 }
5761
5762 var Zm_B__Zn_B__Zd_B = []operand{
5763 a_ARNG_Zm1621_ArngBCheck,
5764 a_ARNG_Zn510_ArngBCheck,
5765 a_ARNG_Zd_ArngBCheck,
5766 }
5767
5768 var Zm_B__Zn_B__Zda_H = []operand{
5769 a_ARNG_Zm1621_ArngBCheck,
5770 a_ARNG_Zn510_ArngBCheck,
5771 a_ARNG_Zda3RdSrcDst_ArngHCheck,
5772 }
5773
5774 var Zm_B__Zn_B__Zda_S = []operand{
5775 a_ARNG_Zm1621_ArngBCheck,
5776 a_ARNG_Zn510_ArngBCheck,
5777 a_ARNG_Zda3RdSrcDst_ArngSCheck,
5778 }
5779
5780 var Zm_D__Zdn_D__PgM__Zdn_D = []operand{
5781 a_ARNG_Zm510_ArngDCheck,
5782 a_ARNG_ZdnDest_ArngDCheck,
5783 a_PREGZM_Pg1013_MergePredCheck,
5784 a_ARNG_ZdnDest_ArngDCheck,
5785 }
5786
5787 var Zm_D__Zdn_T__PgM__Zdn_T = []operand{
5788 a_ARNG_Zm510_ArngDCheck,
5789 a_ARNG_ZdnDest_SizeBHS2224,
5790 a_PREGZM_Pg1013_MergePredCheck,
5791 a_ARNG_ZdnDest_SizeBHS2224,
5792 }
5793
5794 var Zm_D__Zn_D__Zd_D = []operand{
5795 a_ARNG_Zm1621_ArngDCheck,
5796 a_ARNG_Zn510_ArngDCheck,
5797 a_ARNG_Zd_ArngDCheck,
5798 }
5799
5800 var Zm_D__Zn_D__Zd_Q = []operand{
5801 a_ARNG_Zm1621_ArngDCheck,
5802 a_ARNG_Zn510_ArngDCheck,
5803 a_ARNG_Zd_ArngQCheck,
5804 }
5805
5806 var Zm_D__Zn_D__Zda_D = []operand{
5807 a_ARNG_Zm1621_ArngDCheck,
5808 a_ARNG_Zn510_ArngDCheck,
5809 a_ARNG_Zda3RdSrcDst_ArngDCheck,
5810 }
5811
5812 var Zm_D__Zn_T__PgZ__Pd_T = []operand{
5813 a_ARNG_Zm1621_ArngDCheck,
5814 a_ARNG_Zn510_SizeBHS2224,
5815 a_PREGZM_Pg1013_ZeroPredCheck,
5816 a_ARNG_Pd_SizeBHS2224,
5817 }
5818
5819 var Zm_D__Zn_T__Zd_T = []operand{
5820 a_ARNG_Zm1621_ArngDCheck,
5821 a_ARNG_Zn510_SizeBHS2224,
5822 a_ARNG_Zd_SizeBHS2224,
5823 }
5824
5825 var Zm_H__Zdn_H__PgM__Zdn_H = []operand{
5826 a_ARNG_Zm510_ArngHCheck,
5827 a_ARNG_ZdnDest_ArngHCheck,
5828 a_PREGZM_Pg1013_MergePredCheck,
5829 a_ARNG_ZdnDest_ArngHCheck,
5830 }
5831
5832 var Zm_H__Zn_H__PgM__Zda_H = []operand{
5833 a_ARNG_Zm1621_ArngHCheck,
5834 a_ARNG_Zn510_ArngHCheck,
5835 a_PREGZM_Pg1013_MergePredCheck,
5836 a_ARNG_Zda3RdSrcDst_ArngHCheck,
5837 }
5838
5839 var Zm_H__Zn_H__Zd_H = []operand{
5840 a_ARNG_Zm1621_ArngHCheck,
5841 a_ARNG_Zn510_ArngHCheck,
5842 a_ARNG_Zd_ArngHCheck,
5843 }
5844
5845 var Zm_H__Zn_H__Zda_H = []operand{
5846 a_ARNG_Zm1621_ArngHCheck,
5847 a_ARNG_Zn510_ArngHCheck,
5848 a_ARNG_Zda3RdSrcDst_ArngHCheck,
5849 }
5850
5851 var Zm_H__Zn_H__Zda_S = []operand{
5852 a_ARNG_Zm1621_ArngHCheck,
5853 a_ARNG_Zn510_ArngHCheck,
5854 a_ARNG_Zda3RdSrcDst_ArngSCheck,
5855 }
5856
5857 var Zm_Q__Zn_Q__Zd_Q = []operand{
5858 a_ARNG_Zm1621_ArngQCheck,
5859 a_ARNG_Zn510_ArngQCheck,
5860 a_ARNG_Zd_ArngQCheck,
5861 }
5862
5863 var Zm_S__Zdn_S__Zdn_S = []operand{
5864 a_ARNG_Zm510_ArngSCheck,
5865 a_ARNG_ZdnDest_ArngSCheck,
5866 a_ARNG_ZdnDest_ArngSCheck,
5867 }
5868
5869 var Zm_S__Zn_S__Zd_S = []operand{
5870 a_ARNG_Zm1621_ArngSCheck,
5871 a_ARNG_Zn510_ArngSCheck,
5872 a_ARNG_Zd_ArngSCheck,
5873 }
5874
5875 var Zm_S__Zn_S__Zda_S = []operand{
5876 a_ARNG_Zm1621_ArngSCheck,
5877 a_ARNG_Zn510_ArngSCheck,
5878 a_ARNG_Zda3RdSrcDst_ArngSCheck,
5879 }
5880
5881 var Zm_T__Zdn_T__PgM__Zdn_T__1 = []operand{
5882 a_ARNG_Zm510_SizeBHSD2224,
5883 a_ARNG_ZdnDest_SizeBHSD2224,
5884 a_PREGZM_Pg1013_MergePredCheck,
5885 a_ARNG_ZdnDest_SizeBHSD2224,
5886 }
5887
5888 var Zm_T__Zdn_T__PgM__Zdn_T__2 = []operand{
5889 a_ARNG_Zm510_SizeHSD2224,
5890 a_ARNG_ZdnDest_SizeHSD2224,
5891 a_PREGZM_Pg1013_MergePredCheck,
5892 a_ARNG_ZdnDest_SizeHSD2224,
5893 }
5894
5895 var Zm_T__Zdn_T__PgM__Zdn_T__3 = []operand{
5896 a_ARNG_Zm510_SizeHSD2224No00,
5897 a_ARNG_ZdnDest_SizeHSD2224No00,
5898 a_PREGZM_Pg1013_MergePredCheck,
5899 a_ARNG_ZdnDest_SizeHSD2224No00,
5900 }
5901
5902 var Zm_T__Zdn_T__PgM__Zdn_T__4 = []operand{
5903 a_ARNG_Zm510_Size0SD2223,
5904 a_ARNG_ZdnDest_Size0SD2223,
5905 a_PREGZM_Pg1013_MergePredCheck,
5906 a_ARNG_ZdnDest_Size0SD2223,
5907 }
5908
5909 var Zm_T__Zdn_T__Pg__Zdn_T = []operand{
5910 a_ARNG_Zm510_SizeBHSD2224,
5911 a_ARNG_ZdnDest_SizeBHSD2224,
5912 a_PREG_Pg1013_Noop,
5913 a_ARNG_ZdnDest_SizeBHSD2224,
5914 }
5915
5916 var Zm_T__Zdn_T__Pv__Zdn_T = []operand{
5917 a_ARNG_Zm510_SizeBHSD2224,
5918 a_ARNG_ZdnDest_SizeBHSD2224,
5919 a_PREG_Pv1013_Noop,
5920 a_ARNG_ZdnDest_SizeBHSD2224,
5921 }
5922
5923 var Zm_T__Zn_T__PgM__Zda_T__1 = []operand{
5924 a_ARNG_Zm1621_SizeHSD2224No00,
5925 a_ARNG_Zn510_SizeHSD2224No00,
5926 a_PREGZM_Pg1013_MergePredCheck,
5927 a_ARNG_Zda3RdSrcDst_SizeHSD2224No00,
5928 }
5929
5930 var Zm_T__Zn_T__PgM__Zda_T__2 = []operand{
5931 a_ARNG_Zm1621_SizeBHSD2224,
5932 a_ARNG_Zn510_SizeBHSD2224,
5933 a_PREGZM_Pg1013_MergePredCheck,
5934 a_ARNG_Zda3RdSrcDst_SizeBHSD2224,
5935 }
5936
5937 var Zm_T__Zn_T__PgZ__Pd_T__1 = []operand{
5938 a_ARNG_Zm1621_SizeHSD2224,
5939 a_ARNG_Zn510_SizeHSD2224,
5940 a_PREGZM_Pg1013_ZeroPredCheck,
5941 a_ARNG_Pd_SizeHSD2224,
5942 }
5943
5944 var Zm_T__Zn_T__PgZ__Pd_T__2 = []operand{
5945 a_ARNG_Zm1621_SizeBHSD2224,
5946 a_ARNG_Zn510_SizeBHSD2224,
5947 a_PREGZM_Pg1013_ZeroPredCheck,
5948 a_ARNG_Pd_SizeBHSD2224,
5949 }
5950
5951 var Zm_T__Zn_T__PgZ__Pd_T__3 = []operand{
5952 a_ARNG_Zm1621_Size0BH2223,
5953 a_ARNG_Zn510_Size0BH2223,
5954 a_PREGZM_Pg1013_ZeroPredCheck,
5955 a_ARNG_Pd_Size0BH2223,
5956 }
5957
5958 var Zm_T__Zn_T__PgZ__Zd_T = []operand{
5959 a_ARNG_Zm1621_Size0SD2223,
5960 a_ARNG_Zn510_Size0SD2223,
5961 a_PREGZM_Pg1013_ZeroPredCheck,
5962 a_ARNG_Zd_Size0SD2223,
5963 }
5964
5965 var Zm_T__Zn_T__Pv__Zd_T = []operand{
5966 a_ARNG_Zm1621_SizeBHSD2224,
5967 a_ARNG_Zn510_SizeBHSD2224,
5968 a_PREG_Pv1014_Noop,
5969 a_ARNG_Zd_SizeBHSD2224,
5970 }
5971
5972 var Zm_T__Zn_T__Zd_T__1 = []operand{
5973 a_ARNG_Zm1621_SizeBHSD2224,
5974 a_ARNG_Zn510_SizeBHSD2224,
5975 a_ARNG_Zd_SizeBHSD2224,
5976 }
5977
5978 var Zm_T__Zn_T__Zd_T__2 = []operand{
5979 a_ARNG_Zm1621_SizeHSD2224No00,
5980 a_ARNG_Zn510_SizeHSD2224No00,
5981 a_ARNG_Zd_SizeHSD2224No00,
5982 }
5983
5984 var Zm_T__Zn_T__Zd_T__3 = []operand{
5985 a_ARNG_Zm1621_SizeHSD2224,
5986 a_ARNG_Zn510_SizeHSD2224,
5987 a_ARNG_Zd_SizeHSD2224,
5988 }
5989
5990 var Zm_T__Zn_T__Zda_T__1 = []operand{
5991 a_ARNG_Zm1621_SzSD2223,
5992 a_ARNG_Zn510_SzSD2223,
5993 a_ARNG_Zda3RdSrcDst_SzSD2223,
5994 }
5995
5996 var Zm_T__Zn_T__Zda_T__2 = []operand{
5997 a_ARNG_Zm1621_SizeBHSD2224,
5998 a_ARNG_Zn510_SizeBHSD2224,
5999 a_ARNG_Zda3RdSrcDst_SizeBHSD2224,
6000 }
6001
6002 var Zm_Tb__Zn_T__Zd_T = []operand{
6003 a_ARNG_Zm1621_SizeTbBHS2224,
6004 a_ARNG_Zn510_SizeHSD2224,
6005 a_ARNG_Zd_SizeHSD2224,
6006 }
6007
6008 var Zm_Tb__Zn_Tb__Zd_T__1 = []operand{
6009 a_ARNG_Zm1621_SizeTbBHS2224,
6010 a_ARNG_Zn510_SizeTbBHS2224,
6011 a_ARNG_Zd_SizeHSD2224,
6012 }
6013
6014 var Zm_Tb__Zn_Tb__Zd_T__2 = []operand{
6015 a_ARNG_Zm1621_SizeTbHSD2224Offset1,
6016 a_ARNG_Zn510_SizeTbHSD2224Offset1,
6017 a_ARNG_Zd_SizeBHS2224Offset1,
6018 }
6019
6020 var Zm_Tb__Zn_Tb__Zd_T__3 = []operand{
6021 a_ARNG_Zm1621_SizeTbBS2224,
6022 a_ARNG_Zn510_SizeTbBS2224,
6023 a_ARNG_Zd_SizeHD2224,
6024 }
6025
6026 var Zm_Tb__Zn_Tb__Zda_T__1 = []operand{
6027 a_ARNG_Zm1621_SizeTbBHS2224,
6028 a_ARNG_Zn510_SizeTbBHS2224,
6029 a_ARNG_Zda3RdSrcDst_SizeHSD2224,
6030 }
6031
6032 var Zm_Tb__Zn_Tb__Zda_T__2 = []operand{
6033 a_ARNG_Zm1621_Size0TbBH2223,
6034 a_ARNG_Zn510_Size0TbBH2223,
6035 a_ARNG_Zda3RdSrcDst_Size0SD2223,
6036 }
6037
6038 var Zn_B__Zd_H = []operand{
6039 a_ARNG_Zn510Src_ArngBCheck,
6040 a_ARNG_Zd_ArngHCheck,
6041 }
6042
6043 var Zn_D__PgM__Zd_D = []operand{
6044 a_ARNG_Zn510Src_ArngDCheck,
6045 a_PREGZM_Pg1013_MergePredCheck,
6046 a_ARNG_Zd_ArngDCheck,
6047 }
6048
6049 var Zn_D__PgM__Zd_H = []operand{
6050 a_ARNG_Zn510Src_ArngDCheck,
6051 a_PREGZM_Pg1013_MergePredCheck,
6052 a_ARNG_Zd_ArngHCheck,
6053 }
6054
6055 var Zn_D__PgM__Zd_S = []operand{
6056 a_ARNG_Zn510Src_ArngDCheck,
6057 a_PREGZM_Pg1013_MergePredCheck,
6058 a_ARNG_Zd_ArngSCheck,
6059 }
6060
6061 var Zn_D__PgZ__Zd_D = []operand{
6062 a_ARNG_Zn510Src_ArngDCheck,
6063 a_PREGZM_Pg1013_ZeroPredCheck,
6064 a_ARNG_Zd_ArngDCheck,
6065 }
6066
6067 var Zn_D__PgZ__Zd_H = []operand{
6068 a_ARNG_Zn510Src_ArngDCheck,
6069 a_PREGZM_Pg1013_ZeroPredCheck,
6070 a_ARNG_Zd_ArngHCheck,
6071 }
6072
6073 var Zn_D__PgZ__Zd_S = []operand{
6074 a_ARNG_Zn510Src_ArngDCheck,
6075 a_PREGZM_Pg1013_ZeroPredCheck,
6076 a_ARNG_Zd_ArngSCheck,
6077 }
6078
6079 var Zn_H__PgM__Zd_D = []operand{
6080 a_ARNG_Zn510Src_ArngHCheck,
6081 a_PREGZM_Pg1013_MergePredCheck,
6082 a_ARNG_Zd_ArngDCheck,
6083 }
6084
6085 var Zn_H__PgM__Zd_H = []operand{
6086 a_ARNG_Zn510Src_ArngHCheck,
6087 a_PREGZM_Pg1013_MergePredCheck,
6088 a_ARNG_Zd_ArngHCheck,
6089 }
6090
6091 var Zn_H__PgM__Zd_S = []operand{
6092 a_ARNG_Zn510Src_ArngHCheck,
6093 a_PREGZM_Pg1013_MergePredCheck,
6094 a_ARNG_Zd_ArngSCheck,
6095 }
6096
6097 var Zn_H__PgZ__Zd_D = []operand{
6098 a_ARNG_Zn510Src_ArngHCheck,
6099 a_PREGZM_Pg1013_ZeroPredCheck,
6100 a_ARNG_Zd_ArngDCheck,
6101 }
6102
6103 var Zn_H__PgZ__Zd_H = []operand{
6104 a_ARNG_Zn510Src_ArngHCheck,
6105 a_PREGZM_Pg1013_ZeroPredCheck,
6106 a_ARNG_Zd_ArngHCheck,
6107 }
6108
6109 var Zn_H__PgZ__Zd_S = []operand{
6110 a_ARNG_Zn510Src_ArngHCheck,
6111 a_PREGZM_Pg1013_ZeroPredCheck,
6112 a_ARNG_Zd_ArngSCheck,
6113 }
6114
6115 var Zn_Q__PgM__Zd_Q = []operand{
6116 a_ARNG_Zn510Src_ArngQCheck,
6117 a_PREGZM_Pg1013_MergePredCheck,
6118 a_ARNG_Zd_ArngQCheck,
6119 }
6120
6121 var Zn_Q__PgZ__Zd_Q = []operand{
6122 a_ARNG_Zn510Src_ArngQCheck,
6123 a_PREGZM_Pg1013_ZeroPredCheck,
6124 a_ARNG_Zd_ArngQCheck,
6125 }
6126
6127 var Zn_S__PgM__Zd_D = []operand{
6128 a_ARNG_Zn510Src_ArngSCheck,
6129 a_PREGZM_Pg1013_MergePredCheck,
6130 a_ARNG_Zd_ArngDCheck,
6131 }
6132
6133 var Zn_S__PgM__Zd_H = []operand{
6134 a_ARNG_Zn510Src_ArngSCheck,
6135 a_PREGZM_Pg1013_MergePredCheck,
6136 a_ARNG_Zd_ArngHCheck,
6137 }
6138
6139 var Zn_S__PgM__Zd_S = []operand{
6140 a_ARNG_Zn510Src_ArngSCheck,
6141 a_PREGZM_Pg1013_MergePredCheck,
6142 a_ARNG_Zd_ArngSCheck,
6143 }
6144
6145 var Zn_S__PgZ__Zd_D = []operand{
6146 a_ARNG_Zn510Src_ArngSCheck,
6147 a_PREGZM_Pg1013_ZeroPredCheck,
6148 a_ARNG_Zd_ArngDCheck,
6149 }
6150
6151 var Zn_S__PgZ__Zd_H = []operand{
6152 a_ARNG_Zn510Src_ArngSCheck,
6153 a_PREGZM_Pg1013_ZeroPredCheck,
6154 a_ARNG_Zd_ArngHCheck,
6155 }
6156
6157 var Zn_S__PgZ__Zd_S = []operand{
6158 a_ARNG_Zn510Src_ArngSCheck,
6159 a_PREGZM_Pg1013_ZeroPredCheck,
6160 a_ARNG_Zd_ArngSCheck,
6161 }
6162
6163 var Zn_T__PgM__Zd_T__1 = []operand{
6164 a_ARNG_Zn510Src_SizeHSD2224,
6165 a_PREGZM_Pg1013_MergePredCheck,
6166 a_ARNG_Zd_SizeHSD2224,
6167 }
6168
6169 var Zn_T__PgM__Zd_T__2 = []operand{
6170 a_ARNG_Zn510Src_SizeBHSD2224,
6171 a_PREGZM_Pg1013_MergePredCheck,
6172 a_ARNG_Zd_SizeBHSD2224,
6173 }
6174
6175 var Zn_T__PgM__Zd_T__3 = []operand{
6176 a_ARNG_Zn510Src_SzSD1718,
6177 a_PREGZM_Pg1013_MergePredCheck,
6178 a_ARNG_Zd_SzSD1718,
6179 }
6180
6181 var Zn_T__PgM__Zd_T__4 = []operand{
6182 a_ARNG_Zn510Src_SizeByteMergeZero,
6183 a_PREGZM_Pg1013_MergePredCheck,
6184 a_ARNG_Zd_SizeByteMergeZero,
6185 }
6186
6187 var Zn_T__PgM__Zd_T__5 = []operand{
6188 a_ARNG_Zn510Src_Size0HalfwordMergeZero,
6189 a_PREGZM_Pg1013_MergePredCheck,
6190 a_ARNG_Zd_Size0HalfwordMergeZero,
6191 }
6192
6193 var Zn_T__PgM__Zd_T__6 = []operand{
6194 a_ARNG_Zn510Src_SizeHSD1719,
6195 a_PREGZM_Pg1013_MergePredCheck,
6196 a_ARNG_Zd_SizeHSD1719,
6197 }
6198
6199 var Zn_T__PgZM__Zd_T = []operand{
6200 a_ARNG_Zn510Src_SizeBHSD2224,
6201 a_PREGZM_Pg1013_PredQualM1617,
6202 a_ARNG_Zd_SizeBHSD2224,
6203 }
6204
6205 var Zn_T__PgZ__Zd_T__1 = []operand{
6206 a_ARNG_Zn510Src_SizeHSD2224,
6207 a_PREGZM_Pg1013_ZeroPredCheck,
6208 a_ARNG_Zd_SizeHSD2224,
6209 }
6210
6211 var Zn_T__PgZ__Zd_T__2 = []operand{
6212 a_ARNG_Zn510Src_SizeBHSD2224,
6213 a_PREGZM_Pg1013_ZeroPredCheck,
6214 a_ARNG_Zd_SizeBHSD2224,
6215 }
6216
6217 var Zn_T__PgZ__Zd_T__3 = []operand{
6218 a_ARNG_Zn510Src_SzSD1415,
6219 a_PREGZM_Pg1013_ZeroPredCheck,
6220 a_ARNG_Zd_SzSD1415,
6221 }
6222
6223 var Zn_T__PgZ__Zd_T__4 = []operand{
6224 a_ARNG_Zn510Src_SizeByteMergeZero,
6225 a_PREGZM_Pg1013_ZeroPredCheck,
6226 a_ARNG_Zd_SizeByteMergeZero,
6227 }
6228
6229 var Zn_T__PgZ__Zd_T__5 = []operand{
6230 a_ARNG_Zn510Src_Size0HalfwordMergeZero,
6231 a_PREGZM_Pg1013_ZeroPredCheck,
6232 a_ARNG_Zd_Size0HalfwordMergeZero,
6233 }
6234
6235 var Zn_T__PgZ__Zd_T__6 = []operand{
6236 a_ARNG_Zn510Src_SizeHSD1315,
6237 a_PREGZM_Pg1013_ZeroPredCheck,
6238 a_ARNG_Zd_SizeHSD1315,
6239 }
6240
6241 var Zn_T__Pg__Zd_T__1 = []operand{
6242 a_ARNG_Zn510Src_SzByteHalfword,
6243 a_PREG_Pg1013_Noop,
6244 a_ARNG_Zd_SzByteHalfword,
6245 }
6246
6247 var Zn_T__Pg__Zd_T__2 = []operand{
6248 a_ARNG_Zn510Src_SzWordDoubleword,
6249 a_PREG_Pg1013_Noop,
6250 a_ARNG_Zd_SzWordDoubleword,
6251 }
6252
6253 var Zn_T__Pg__Zd_T__3 = []operand{
6254 a_ARNG_Zn510Src_SizeBHSD2224,
6255 a_PREG_Pg1013_Noop,
6256 a_ARNG_Zd_SizeBHSD2224,
6257 }
6258
6259 var Zn_T__Zd_T__1 = []operand{
6260 a_ARNG_Zn510Src_SizeHSD2224,
6261 a_ARNG_Zd_SizeHSD2224,
6262 }
6263
6264 var Zn_T__Zd_T__2 = []operand{
6265 a_ARNG_Zn510Src_SizeBHSD2224,
6266 a_ARNG_Zd_SizeBHSD2224,
6267 }
6268
6269 var Zn_Tb__PgM__Zda_T = []operand{
6270 a_ARNG_Zn510_SizeTbBHS2224,
6271 a_PREGZM_Pg1013_MergePredCheck,
6272 a_ARNG_ZdaDest_SizeHSD2224,
6273 }
6274
6275 var Zn_Tb__Pg__Vd_T__1 = []operand{
6276 a_ARNG_Zn510Src_SizeTbBHSD2224,
6277 a_PREG_Pg1013_Noop,
6278 a_ARNG_Vd_Size16B8H4S2D,
6279 }
6280
6281 var Zn_Tb__Pg__Vd_T__2 = []operand{
6282 a_ARNG_Zn510Src_SizeTbHSD2224Offset1,
6283 a_PREG_Pg1013_Noop,
6284 a_ARNG_Vd_Size8H4S2D,
6285 }
6286
6287 var Zn_Tb__Zd_T__1 = []operand{
6288 a_ARNG_Zn510Src_SizeTbBHS2224,
6289 a_ARNG_Zd_SizeHSD2224,
6290 }
6291
6292 var Zn_Tb__Zd_T__2 = []operand{
6293 a_ARNG_Zn510Src_TszhTszlTbHSD,
6294 a_ARNG_Zd_TszhTszlBHS,
6295 }
6296
6297 var Zn__Pd_B = []operand{
6298 a_ZREG_Zn510Src_Noop,
6299 a_ARNG_Pd_ArngBCheck,
6300 }
6301
6302 var Zn__Zd = []operand{
6303 a_ZREG_Zn510Src_Noop,
6304 a_ZREG_Zd_Noop,
6305 }
6306
6307 var oc = []operand{}
6308
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