Source file src/cmd/compile/internal/ssa/rewriteMIPS.go

     1  // Code generated from _gen/MIPS.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package ssa
     4  
     5  import "cmd/compile/internal/types"
     6  
     7  func rewriteValueMIPS(v *Value) bool {
     8  	switch v.Op {
     9  	case OpAbs:
    10  		v.Op = OpMIPSABSD
    11  		return true
    12  	case OpAdd16:
    13  		v.Op = OpMIPSADD
    14  		return true
    15  	case OpAdd32:
    16  		v.Op = OpMIPSADD
    17  		return true
    18  	case OpAdd32F:
    19  		v.Op = OpMIPSADDF
    20  		return true
    21  	case OpAdd32withcarry:
    22  		return rewriteValueMIPS_OpAdd32withcarry(v)
    23  	case OpAdd64F:
    24  		v.Op = OpMIPSADDD
    25  		return true
    26  	case OpAdd8:
    27  		v.Op = OpMIPSADD
    28  		return true
    29  	case OpAddPtr:
    30  		v.Op = OpMIPSADD
    31  		return true
    32  	case OpAddr:
    33  		return rewriteValueMIPS_OpAddr(v)
    34  	case OpAnd16:
    35  		v.Op = OpMIPSAND
    36  		return true
    37  	case OpAnd32:
    38  		v.Op = OpMIPSAND
    39  		return true
    40  	case OpAnd8:
    41  		v.Op = OpMIPSAND
    42  		return true
    43  	case OpAndB:
    44  		v.Op = OpMIPSAND
    45  		return true
    46  	case OpAtomicAdd32:
    47  		v.Op = OpMIPSLoweredAtomicAdd
    48  		return true
    49  	case OpAtomicAnd32:
    50  		v.Op = OpMIPSLoweredAtomicAnd
    51  		return true
    52  	case OpAtomicAnd8:
    53  		return rewriteValueMIPS_OpAtomicAnd8(v)
    54  	case OpAtomicCompareAndSwap32:
    55  		v.Op = OpMIPSLoweredAtomicCas
    56  		return true
    57  	case OpAtomicExchange32:
    58  		v.Op = OpMIPSLoweredAtomicExchange
    59  		return true
    60  	case OpAtomicLoad32:
    61  		v.Op = OpMIPSLoweredAtomicLoad32
    62  		return true
    63  	case OpAtomicLoad8:
    64  		v.Op = OpMIPSLoweredAtomicLoad8
    65  		return true
    66  	case OpAtomicLoadPtr:
    67  		v.Op = OpMIPSLoweredAtomicLoad32
    68  		return true
    69  	case OpAtomicOr32:
    70  		v.Op = OpMIPSLoweredAtomicOr
    71  		return true
    72  	case OpAtomicOr8:
    73  		return rewriteValueMIPS_OpAtomicOr8(v)
    74  	case OpAtomicStore32:
    75  		v.Op = OpMIPSLoweredAtomicStore32
    76  		return true
    77  	case OpAtomicStore8:
    78  		v.Op = OpMIPSLoweredAtomicStore8
    79  		return true
    80  	case OpAtomicStorePtrNoWB:
    81  		v.Op = OpMIPSLoweredAtomicStore32
    82  		return true
    83  	case OpAvg32u:
    84  		return rewriteValueMIPS_OpAvg32u(v)
    85  	case OpBitLen16:
    86  		return rewriteValueMIPS_OpBitLen16(v)
    87  	case OpBitLen32:
    88  		return rewriteValueMIPS_OpBitLen32(v)
    89  	case OpBitLen8:
    90  		return rewriteValueMIPS_OpBitLen8(v)
    91  	case OpClosureCall:
    92  		v.Op = OpMIPSCALLclosure
    93  		return true
    94  	case OpCom16:
    95  		return rewriteValueMIPS_OpCom16(v)
    96  	case OpCom32:
    97  		return rewriteValueMIPS_OpCom32(v)
    98  	case OpCom8:
    99  		return rewriteValueMIPS_OpCom8(v)
   100  	case OpConst16:
   101  		return rewriteValueMIPS_OpConst16(v)
   102  	case OpConst32:
   103  		return rewriteValueMIPS_OpConst32(v)
   104  	case OpConst32F:
   105  		v.Op = OpMIPSMOVFconst
   106  		return true
   107  	case OpConst64F:
   108  		v.Op = OpMIPSMOVDconst
   109  		return true
   110  	case OpConst8:
   111  		return rewriteValueMIPS_OpConst8(v)
   112  	case OpConstBool:
   113  		return rewriteValueMIPS_OpConstBool(v)
   114  	case OpConstNil:
   115  		return rewriteValueMIPS_OpConstNil(v)
   116  	case OpCtz16:
   117  		return rewriteValueMIPS_OpCtz16(v)
   118  	case OpCtz16NonZero:
   119  		v.Op = OpCtz32
   120  		return true
   121  	case OpCtz32:
   122  		return rewriteValueMIPS_OpCtz32(v)
   123  	case OpCtz32NonZero:
   124  		v.Op = OpCtz32
   125  		return true
   126  	case OpCtz8:
   127  		return rewriteValueMIPS_OpCtz8(v)
   128  	case OpCtz8NonZero:
   129  		v.Op = OpCtz32
   130  		return true
   131  	case OpCvt32Fto32:
   132  		v.Op = OpMIPSTRUNCFW
   133  		return true
   134  	case OpCvt32Fto64F:
   135  		v.Op = OpMIPSMOVFD
   136  		return true
   137  	case OpCvt32to32F:
   138  		v.Op = OpMIPSMOVWF
   139  		return true
   140  	case OpCvt32to64F:
   141  		v.Op = OpMIPSMOVWD
   142  		return true
   143  	case OpCvt64Fto32:
   144  		v.Op = OpMIPSTRUNCDW
   145  		return true
   146  	case OpCvt64Fto32F:
   147  		v.Op = OpMIPSMOVDF
   148  		return true
   149  	case OpCvtBoolToUint8:
   150  		v.Op = OpCopy
   151  		return true
   152  	case OpDiv16:
   153  		return rewriteValueMIPS_OpDiv16(v)
   154  	case OpDiv16u:
   155  		return rewriteValueMIPS_OpDiv16u(v)
   156  	case OpDiv32:
   157  		return rewriteValueMIPS_OpDiv32(v)
   158  	case OpDiv32F:
   159  		v.Op = OpMIPSDIVF
   160  		return true
   161  	case OpDiv32u:
   162  		return rewriteValueMIPS_OpDiv32u(v)
   163  	case OpDiv64F:
   164  		v.Op = OpMIPSDIVD
   165  		return true
   166  	case OpDiv8:
   167  		return rewriteValueMIPS_OpDiv8(v)
   168  	case OpDiv8u:
   169  		return rewriteValueMIPS_OpDiv8u(v)
   170  	case OpEq16:
   171  		return rewriteValueMIPS_OpEq16(v)
   172  	case OpEq32:
   173  		return rewriteValueMIPS_OpEq32(v)
   174  	case OpEq32F:
   175  		return rewriteValueMIPS_OpEq32F(v)
   176  	case OpEq64F:
   177  		return rewriteValueMIPS_OpEq64F(v)
   178  	case OpEq8:
   179  		return rewriteValueMIPS_OpEq8(v)
   180  	case OpEqB:
   181  		return rewriteValueMIPS_OpEqB(v)
   182  	case OpEqPtr:
   183  		return rewriteValueMIPS_OpEqPtr(v)
   184  	case OpGetCallerPC:
   185  		v.Op = OpMIPSLoweredGetCallerPC
   186  		return true
   187  	case OpGetCallerSP:
   188  		v.Op = OpMIPSLoweredGetCallerSP
   189  		return true
   190  	case OpGetClosurePtr:
   191  		v.Op = OpMIPSLoweredGetClosurePtr
   192  		return true
   193  	case OpHmul32:
   194  		return rewriteValueMIPS_OpHmul32(v)
   195  	case OpHmul32u:
   196  		return rewriteValueMIPS_OpHmul32u(v)
   197  	case OpInterCall:
   198  		v.Op = OpMIPSCALLinter
   199  		return true
   200  	case OpIsInBounds:
   201  		return rewriteValueMIPS_OpIsInBounds(v)
   202  	case OpIsNonNil:
   203  		return rewriteValueMIPS_OpIsNonNil(v)
   204  	case OpIsSliceInBounds:
   205  		return rewriteValueMIPS_OpIsSliceInBounds(v)
   206  	case OpLeq16:
   207  		return rewriteValueMIPS_OpLeq16(v)
   208  	case OpLeq16U:
   209  		return rewriteValueMIPS_OpLeq16U(v)
   210  	case OpLeq32:
   211  		return rewriteValueMIPS_OpLeq32(v)
   212  	case OpLeq32F:
   213  		return rewriteValueMIPS_OpLeq32F(v)
   214  	case OpLeq32U:
   215  		return rewriteValueMIPS_OpLeq32U(v)
   216  	case OpLeq64F:
   217  		return rewriteValueMIPS_OpLeq64F(v)
   218  	case OpLeq8:
   219  		return rewriteValueMIPS_OpLeq8(v)
   220  	case OpLeq8U:
   221  		return rewriteValueMIPS_OpLeq8U(v)
   222  	case OpLess16:
   223  		return rewriteValueMIPS_OpLess16(v)
   224  	case OpLess16U:
   225  		return rewriteValueMIPS_OpLess16U(v)
   226  	case OpLess32:
   227  		return rewriteValueMIPS_OpLess32(v)
   228  	case OpLess32F:
   229  		return rewriteValueMIPS_OpLess32F(v)
   230  	case OpLess32U:
   231  		return rewriteValueMIPS_OpLess32U(v)
   232  	case OpLess64F:
   233  		return rewriteValueMIPS_OpLess64F(v)
   234  	case OpLess8:
   235  		return rewriteValueMIPS_OpLess8(v)
   236  	case OpLess8U:
   237  		return rewriteValueMIPS_OpLess8U(v)
   238  	case OpLoad:
   239  		return rewriteValueMIPS_OpLoad(v)
   240  	case OpLocalAddr:
   241  		return rewriteValueMIPS_OpLocalAddr(v)
   242  	case OpLsh16x16:
   243  		return rewriteValueMIPS_OpLsh16x16(v)
   244  	case OpLsh16x32:
   245  		return rewriteValueMIPS_OpLsh16x32(v)
   246  	case OpLsh16x64:
   247  		return rewriteValueMIPS_OpLsh16x64(v)
   248  	case OpLsh16x8:
   249  		return rewriteValueMIPS_OpLsh16x8(v)
   250  	case OpLsh32x16:
   251  		return rewriteValueMIPS_OpLsh32x16(v)
   252  	case OpLsh32x32:
   253  		return rewriteValueMIPS_OpLsh32x32(v)
   254  	case OpLsh32x64:
   255  		return rewriteValueMIPS_OpLsh32x64(v)
   256  	case OpLsh32x8:
   257  		return rewriteValueMIPS_OpLsh32x8(v)
   258  	case OpLsh8x16:
   259  		return rewriteValueMIPS_OpLsh8x16(v)
   260  	case OpLsh8x32:
   261  		return rewriteValueMIPS_OpLsh8x32(v)
   262  	case OpLsh8x64:
   263  		return rewriteValueMIPS_OpLsh8x64(v)
   264  	case OpLsh8x8:
   265  		return rewriteValueMIPS_OpLsh8x8(v)
   266  	case OpMIPSADD:
   267  		return rewriteValueMIPS_OpMIPSADD(v)
   268  	case OpMIPSADDconst:
   269  		return rewriteValueMIPS_OpMIPSADDconst(v)
   270  	case OpMIPSAND:
   271  		return rewriteValueMIPS_OpMIPSAND(v)
   272  	case OpMIPSANDconst:
   273  		return rewriteValueMIPS_OpMIPSANDconst(v)
   274  	case OpMIPSCMOVZ:
   275  		return rewriteValueMIPS_OpMIPSCMOVZ(v)
   276  	case OpMIPSCMOVZzero:
   277  		return rewriteValueMIPS_OpMIPSCMOVZzero(v)
   278  	case OpMIPSLoweredAtomicAdd:
   279  		return rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v)
   280  	case OpMIPSLoweredAtomicStore32:
   281  		return rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v)
   282  	case OpMIPSLoweredPanicBoundsRC:
   283  		return rewriteValueMIPS_OpMIPSLoweredPanicBoundsRC(v)
   284  	case OpMIPSLoweredPanicBoundsRR:
   285  		return rewriteValueMIPS_OpMIPSLoweredPanicBoundsRR(v)
   286  	case OpMIPSLoweredPanicExtendRC:
   287  		return rewriteValueMIPS_OpMIPSLoweredPanicExtendRC(v)
   288  	case OpMIPSLoweredPanicExtendRR:
   289  		return rewriteValueMIPS_OpMIPSLoweredPanicExtendRR(v)
   290  	case OpMIPSMOVBUload:
   291  		return rewriteValueMIPS_OpMIPSMOVBUload(v)
   292  	case OpMIPSMOVBUreg:
   293  		return rewriteValueMIPS_OpMIPSMOVBUreg(v)
   294  	case OpMIPSMOVBload:
   295  		return rewriteValueMIPS_OpMIPSMOVBload(v)
   296  	case OpMIPSMOVBreg:
   297  		return rewriteValueMIPS_OpMIPSMOVBreg(v)
   298  	case OpMIPSMOVBstore:
   299  		return rewriteValueMIPS_OpMIPSMOVBstore(v)
   300  	case OpMIPSMOVBstorezero:
   301  		return rewriteValueMIPS_OpMIPSMOVBstorezero(v)
   302  	case OpMIPSMOVDload:
   303  		return rewriteValueMIPS_OpMIPSMOVDload(v)
   304  	case OpMIPSMOVDstore:
   305  		return rewriteValueMIPS_OpMIPSMOVDstore(v)
   306  	case OpMIPSMOVFload:
   307  		return rewriteValueMIPS_OpMIPSMOVFload(v)
   308  	case OpMIPSMOVFstore:
   309  		return rewriteValueMIPS_OpMIPSMOVFstore(v)
   310  	case OpMIPSMOVHUload:
   311  		return rewriteValueMIPS_OpMIPSMOVHUload(v)
   312  	case OpMIPSMOVHUreg:
   313  		return rewriteValueMIPS_OpMIPSMOVHUreg(v)
   314  	case OpMIPSMOVHload:
   315  		return rewriteValueMIPS_OpMIPSMOVHload(v)
   316  	case OpMIPSMOVHreg:
   317  		return rewriteValueMIPS_OpMIPSMOVHreg(v)
   318  	case OpMIPSMOVHstore:
   319  		return rewriteValueMIPS_OpMIPSMOVHstore(v)
   320  	case OpMIPSMOVHstorezero:
   321  		return rewriteValueMIPS_OpMIPSMOVHstorezero(v)
   322  	case OpMIPSMOVWload:
   323  		return rewriteValueMIPS_OpMIPSMOVWload(v)
   324  	case OpMIPSMOVWnop:
   325  		return rewriteValueMIPS_OpMIPSMOVWnop(v)
   326  	case OpMIPSMOVWreg:
   327  		return rewriteValueMIPS_OpMIPSMOVWreg(v)
   328  	case OpMIPSMOVWstore:
   329  		return rewriteValueMIPS_OpMIPSMOVWstore(v)
   330  	case OpMIPSMOVWstorezero:
   331  		return rewriteValueMIPS_OpMIPSMOVWstorezero(v)
   332  	case OpMIPSMUL:
   333  		return rewriteValueMIPS_OpMIPSMUL(v)
   334  	case OpMIPSNEG:
   335  		return rewriteValueMIPS_OpMIPSNEG(v)
   336  	case OpMIPSNOR:
   337  		return rewriteValueMIPS_OpMIPSNOR(v)
   338  	case OpMIPSNORconst:
   339  		return rewriteValueMIPS_OpMIPSNORconst(v)
   340  	case OpMIPSOR:
   341  		return rewriteValueMIPS_OpMIPSOR(v)
   342  	case OpMIPSORconst:
   343  		return rewriteValueMIPS_OpMIPSORconst(v)
   344  	case OpMIPSSGT:
   345  		return rewriteValueMIPS_OpMIPSSGT(v)
   346  	case OpMIPSSGTU:
   347  		return rewriteValueMIPS_OpMIPSSGTU(v)
   348  	case OpMIPSSGTUconst:
   349  		return rewriteValueMIPS_OpMIPSSGTUconst(v)
   350  	case OpMIPSSGTUzero:
   351  		return rewriteValueMIPS_OpMIPSSGTUzero(v)
   352  	case OpMIPSSGTconst:
   353  		return rewriteValueMIPS_OpMIPSSGTconst(v)
   354  	case OpMIPSSGTzero:
   355  		return rewriteValueMIPS_OpMIPSSGTzero(v)
   356  	case OpMIPSSLL:
   357  		return rewriteValueMIPS_OpMIPSSLL(v)
   358  	case OpMIPSSLLconst:
   359  		return rewriteValueMIPS_OpMIPSSLLconst(v)
   360  	case OpMIPSSRA:
   361  		return rewriteValueMIPS_OpMIPSSRA(v)
   362  	case OpMIPSSRAconst:
   363  		return rewriteValueMIPS_OpMIPSSRAconst(v)
   364  	case OpMIPSSRL:
   365  		return rewriteValueMIPS_OpMIPSSRL(v)
   366  	case OpMIPSSRLconst:
   367  		return rewriteValueMIPS_OpMIPSSRLconst(v)
   368  	case OpMIPSSUB:
   369  		return rewriteValueMIPS_OpMIPSSUB(v)
   370  	case OpMIPSSUBconst:
   371  		return rewriteValueMIPS_OpMIPSSUBconst(v)
   372  	case OpMIPSXOR:
   373  		return rewriteValueMIPS_OpMIPSXOR(v)
   374  	case OpMIPSXORconst:
   375  		return rewriteValueMIPS_OpMIPSXORconst(v)
   376  	case OpMod16:
   377  		return rewriteValueMIPS_OpMod16(v)
   378  	case OpMod16u:
   379  		return rewriteValueMIPS_OpMod16u(v)
   380  	case OpMod32:
   381  		return rewriteValueMIPS_OpMod32(v)
   382  	case OpMod32u:
   383  		return rewriteValueMIPS_OpMod32u(v)
   384  	case OpMod8:
   385  		return rewriteValueMIPS_OpMod8(v)
   386  	case OpMod8u:
   387  		return rewriteValueMIPS_OpMod8u(v)
   388  	case OpMove:
   389  		return rewriteValueMIPS_OpMove(v)
   390  	case OpMul16:
   391  		v.Op = OpMIPSMUL
   392  		return true
   393  	case OpMul32:
   394  		v.Op = OpMIPSMUL
   395  		return true
   396  	case OpMul32F:
   397  		v.Op = OpMIPSMULF
   398  		return true
   399  	case OpMul32uhilo:
   400  		v.Op = OpMIPSMULTU
   401  		return true
   402  	case OpMul64F:
   403  		v.Op = OpMIPSMULD
   404  		return true
   405  	case OpMul8:
   406  		v.Op = OpMIPSMUL
   407  		return true
   408  	case OpNeg16:
   409  		v.Op = OpMIPSNEG
   410  		return true
   411  	case OpNeg32:
   412  		v.Op = OpMIPSNEG
   413  		return true
   414  	case OpNeg32F:
   415  		v.Op = OpMIPSNEGF
   416  		return true
   417  	case OpNeg64F:
   418  		v.Op = OpMIPSNEGD
   419  		return true
   420  	case OpNeg8:
   421  		v.Op = OpMIPSNEG
   422  		return true
   423  	case OpNeq16:
   424  		return rewriteValueMIPS_OpNeq16(v)
   425  	case OpNeq32:
   426  		return rewriteValueMIPS_OpNeq32(v)
   427  	case OpNeq32F:
   428  		return rewriteValueMIPS_OpNeq32F(v)
   429  	case OpNeq64F:
   430  		return rewriteValueMIPS_OpNeq64F(v)
   431  	case OpNeq8:
   432  		return rewriteValueMIPS_OpNeq8(v)
   433  	case OpNeqB:
   434  		v.Op = OpMIPSXOR
   435  		return true
   436  	case OpNeqPtr:
   437  		return rewriteValueMIPS_OpNeqPtr(v)
   438  	case OpNilCheck:
   439  		v.Op = OpMIPSLoweredNilCheck
   440  		return true
   441  	case OpNot:
   442  		return rewriteValueMIPS_OpNot(v)
   443  	case OpOffPtr:
   444  		return rewriteValueMIPS_OpOffPtr(v)
   445  	case OpOr16:
   446  		v.Op = OpMIPSOR
   447  		return true
   448  	case OpOr32:
   449  		v.Op = OpMIPSOR
   450  		return true
   451  	case OpOr8:
   452  		v.Op = OpMIPSOR
   453  		return true
   454  	case OpOrB:
   455  		v.Op = OpMIPSOR
   456  		return true
   457  	case OpPanicBounds:
   458  		v.Op = OpMIPSLoweredPanicBoundsRR
   459  		return true
   460  	case OpPanicExtend:
   461  		v.Op = OpMIPSLoweredPanicExtendRR
   462  		return true
   463  	case OpPubBarrier:
   464  		v.Op = OpMIPSLoweredPubBarrier
   465  		return true
   466  	case OpRotateLeft16:
   467  		return rewriteValueMIPS_OpRotateLeft16(v)
   468  	case OpRotateLeft32:
   469  		return rewriteValueMIPS_OpRotateLeft32(v)
   470  	case OpRotateLeft64:
   471  		return rewriteValueMIPS_OpRotateLeft64(v)
   472  	case OpRotateLeft8:
   473  		return rewriteValueMIPS_OpRotateLeft8(v)
   474  	case OpRound32F:
   475  		v.Op = OpCopy
   476  		return true
   477  	case OpRound64F:
   478  		v.Op = OpCopy
   479  		return true
   480  	case OpRsh16Ux16:
   481  		return rewriteValueMIPS_OpRsh16Ux16(v)
   482  	case OpRsh16Ux32:
   483  		return rewriteValueMIPS_OpRsh16Ux32(v)
   484  	case OpRsh16Ux64:
   485  		return rewriteValueMIPS_OpRsh16Ux64(v)
   486  	case OpRsh16Ux8:
   487  		return rewriteValueMIPS_OpRsh16Ux8(v)
   488  	case OpRsh16x16:
   489  		return rewriteValueMIPS_OpRsh16x16(v)
   490  	case OpRsh16x32:
   491  		return rewriteValueMIPS_OpRsh16x32(v)
   492  	case OpRsh16x64:
   493  		return rewriteValueMIPS_OpRsh16x64(v)
   494  	case OpRsh16x8:
   495  		return rewriteValueMIPS_OpRsh16x8(v)
   496  	case OpRsh32Ux16:
   497  		return rewriteValueMIPS_OpRsh32Ux16(v)
   498  	case OpRsh32Ux32:
   499  		return rewriteValueMIPS_OpRsh32Ux32(v)
   500  	case OpRsh32Ux64:
   501  		return rewriteValueMIPS_OpRsh32Ux64(v)
   502  	case OpRsh32Ux8:
   503  		return rewriteValueMIPS_OpRsh32Ux8(v)
   504  	case OpRsh32x16:
   505  		return rewriteValueMIPS_OpRsh32x16(v)
   506  	case OpRsh32x32:
   507  		return rewriteValueMIPS_OpRsh32x32(v)
   508  	case OpRsh32x64:
   509  		return rewriteValueMIPS_OpRsh32x64(v)
   510  	case OpRsh32x8:
   511  		return rewriteValueMIPS_OpRsh32x8(v)
   512  	case OpRsh8Ux16:
   513  		return rewriteValueMIPS_OpRsh8Ux16(v)
   514  	case OpRsh8Ux32:
   515  		return rewriteValueMIPS_OpRsh8Ux32(v)
   516  	case OpRsh8Ux64:
   517  		return rewriteValueMIPS_OpRsh8Ux64(v)
   518  	case OpRsh8Ux8:
   519  		return rewriteValueMIPS_OpRsh8Ux8(v)
   520  	case OpRsh8x16:
   521  		return rewriteValueMIPS_OpRsh8x16(v)
   522  	case OpRsh8x32:
   523  		return rewriteValueMIPS_OpRsh8x32(v)
   524  	case OpRsh8x64:
   525  		return rewriteValueMIPS_OpRsh8x64(v)
   526  	case OpRsh8x8:
   527  		return rewriteValueMIPS_OpRsh8x8(v)
   528  	case OpSelect0:
   529  		return rewriteValueMIPS_OpSelect0(v)
   530  	case OpSelect1:
   531  		return rewriteValueMIPS_OpSelect1(v)
   532  	case OpSignExt16to32:
   533  		v.Op = OpMIPSMOVHreg
   534  		return true
   535  	case OpSignExt8to16:
   536  		v.Op = OpMIPSMOVBreg
   537  		return true
   538  	case OpSignExt8to32:
   539  		v.Op = OpMIPSMOVBreg
   540  		return true
   541  	case OpSignmask:
   542  		return rewriteValueMIPS_OpSignmask(v)
   543  	case OpSlicemask:
   544  		return rewriteValueMIPS_OpSlicemask(v)
   545  	case OpSqrt:
   546  		v.Op = OpMIPSSQRTD
   547  		return true
   548  	case OpSqrt32:
   549  		v.Op = OpMIPSSQRTF
   550  		return true
   551  	case OpStaticCall:
   552  		v.Op = OpMIPSCALLstatic
   553  		return true
   554  	case OpStore:
   555  		return rewriteValueMIPS_OpStore(v)
   556  	case OpSub16:
   557  		v.Op = OpMIPSSUB
   558  		return true
   559  	case OpSub32:
   560  		v.Op = OpMIPSSUB
   561  		return true
   562  	case OpSub32F:
   563  		v.Op = OpMIPSSUBF
   564  		return true
   565  	case OpSub32withcarry:
   566  		return rewriteValueMIPS_OpSub32withcarry(v)
   567  	case OpSub64F:
   568  		v.Op = OpMIPSSUBD
   569  		return true
   570  	case OpSub8:
   571  		v.Op = OpMIPSSUB
   572  		return true
   573  	case OpSubPtr:
   574  		v.Op = OpMIPSSUB
   575  		return true
   576  	case OpTailCall:
   577  		v.Op = OpMIPSCALLtail
   578  		return true
   579  	case OpTrunc16to8:
   580  		v.Op = OpCopy
   581  		return true
   582  	case OpTrunc32to16:
   583  		v.Op = OpCopy
   584  		return true
   585  	case OpTrunc32to8:
   586  		v.Op = OpCopy
   587  		return true
   588  	case OpWB:
   589  		v.Op = OpMIPSLoweredWB
   590  		return true
   591  	case OpXor16:
   592  		v.Op = OpMIPSXOR
   593  		return true
   594  	case OpXor32:
   595  		v.Op = OpMIPSXOR
   596  		return true
   597  	case OpXor8:
   598  		v.Op = OpMIPSXOR
   599  		return true
   600  	case OpZero:
   601  		return rewriteValueMIPS_OpZero(v)
   602  	case OpZeroExt16to32:
   603  		v.Op = OpMIPSMOVHUreg
   604  		return true
   605  	case OpZeroExt8to16:
   606  		v.Op = OpMIPSMOVBUreg
   607  		return true
   608  	case OpZeroExt8to32:
   609  		v.Op = OpMIPSMOVBUreg
   610  		return true
   611  	case OpZeromask:
   612  		return rewriteValueMIPS_OpZeromask(v)
   613  	}
   614  	return false
   615  }
   616  func rewriteValueMIPS_OpAdd32withcarry(v *Value) bool {
   617  	v_2 := v.Args[2]
   618  	v_1 := v.Args[1]
   619  	v_0 := v.Args[0]
   620  	b := v.Block
   621  	// match: (Add32withcarry <t> x y c)
   622  	// result: (ADD c (ADD <t> x y))
   623  	for {
   624  		t := v.Type
   625  		x := v_0
   626  		y := v_1
   627  		c := v_2
   628  		v.reset(OpMIPSADD)
   629  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t)
   630  		v0.AddArg2(x, y)
   631  		v.AddArg2(c, v0)
   632  		return true
   633  	}
   634  }
   635  func rewriteValueMIPS_OpAddr(v *Value) bool {
   636  	v_0 := v.Args[0]
   637  	// match: (Addr {sym} base)
   638  	// result: (MOVWaddr {sym} base)
   639  	for {
   640  		sym := auxToSym(v.Aux)
   641  		base := v_0
   642  		v.reset(OpMIPSMOVWaddr)
   643  		v.Aux = symToAux(sym)
   644  		v.AddArg(base)
   645  		return true
   646  	}
   647  }
   648  func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
   649  	v_2 := v.Args[2]
   650  	v_1 := v.Args[1]
   651  	v_0 := v.Args[0]
   652  	b := v.Block
   653  	config := b.Func.Config
   654  	typ := &b.Func.Config.Types
   655  	// match: (AtomicAnd8 ptr val mem)
   656  	// cond: !config.BigEndian
   657  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))))) mem)
   658  	for {
   659  		ptr := v_0
   660  		val := v_1
   661  		mem := v_2
   662  		if !(!config.BigEndian) {
   663  			break
   664  		}
   665  		v.reset(OpMIPSLoweredAtomicAnd)
   666  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   667  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   668  		v1.AuxInt = int32ToAuxInt(^3)
   669  		v0.AddArg2(v1, ptr)
   670  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   671  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   672  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   673  		v4.AddArg(val)
   674  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   675  		v5.AuxInt = int32ToAuxInt(3)
   676  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   677  		v6.AuxInt = int32ToAuxInt(3)
   678  		v6.AddArg(ptr)
   679  		v5.AddArg(v6)
   680  		v3.AddArg2(v4, v5)
   681  		v7 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
   682  		v7.AuxInt = int32ToAuxInt(0)
   683  		v8 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   684  		v9 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   685  		v9.AuxInt = int32ToAuxInt(0xff)
   686  		v8.AddArg2(v9, v5)
   687  		v7.AddArg(v8)
   688  		v2.AddArg2(v3, v7)
   689  		v.AddArg3(v0, v2, mem)
   690  		return true
   691  	}
   692  	// match: (AtomicAnd8 ptr val mem)
   693  	// cond: config.BigEndian
   694  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))))) mem)
   695  	for {
   696  		ptr := v_0
   697  		val := v_1
   698  		mem := v_2
   699  		if !(config.BigEndian) {
   700  			break
   701  		}
   702  		v.reset(OpMIPSLoweredAtomicAnd)
   703  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   704  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   705  		v1.AuxInt = int32ToAuxInt(^3)
   706  		v0.AddArg2(v1, ptr)
   707  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   708  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   709  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   710  		v4.AddArg(val)
   711  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   712  		v5.AuxInt = int32ToAuxInt(3)
   713  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   714  		v6.AuxInt = int32ToAuxInt(3)
   715  		v7 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   716  		v7.AuxInt = int32ToAuxInt(3)
   717  		v7.AddArg(ptr)
   718  		v6.AddArg(v7)
   719  		v5.AddArg(v6)
   720  		v3.AddArg2(v4, v5)
   721  		v8 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
   722  		v8.AuxInt = int32ToAuxInt(0)
   723  		v9 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   724  		v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   725  		v10.AuxInt = int32ToAuxInt(0xff)
   726  		v9.AddArg2(v10, v5)
   727  		v8.AddArg(v9)
   728  		v2.AddArg2(v3, v8)
   729  		v.AddArg3(v0, v2, mem)
   730  		return true
   731  	}
   732  	return false
   733  }
   734  func rewriteValueMIPS_OpAtomicOr8(v *Value) bool {
   735  	v_2 := v.Args[2]
   736  	v_1 := v.Args[1]
   737  	v_0 := v.Args[0]
   738  	b := v.Block
   739  	config := b.Func.Config
   740  	typ := &b.Func.Config.Types
   741  	// match: (AtomicOr8 ptr val mem)
   742  	// cond: !config.BigEndian
   743  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) mem)
   744  	for {
   745  		ptr := v_0
   746  		val := v_1
   747  		mem := v_2
   748  		if !(!config.BigEndian) {
   749  			break
   750  		}
   751  		v.reset(OpMIPSLoweredAtomicOr)
   752  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   753  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   754  		v1.AuxInt = int32ToAuxInt(^3)
   755  		v0.AddArg2(v1, ptr)
   756  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   757  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   758  		v3.AddArg(val)
   759  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   760  		v4.AuxInt = int32ToAuxInt(3)
   761  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   762  		v5.AuxInt = int32ToAuxInt(3)
   763  		v5.AddArg(ptr)
   764  		v4.AddArg(v5)
   765  		v2.AddArg2(v3, v4)
   766  		v.AddArg3(v0, v2, mem)
   767  		return true
   768  	}
   769  	// match: (AtomicOr8 ptr val mem)
   770  	// cond: config.BigEndian
   771  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) mem)
   772  	for {
   773  		ptr := v_0
   774  		val := v_1
   775  		mem := v_2
   776  		if !(config.BigEndian) {
   777  			break
   778  		}
   779  		v.reset(OpMIPSLoweredAtomicOr)
   780  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   781  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   782  		v1.AuxInt = int32ToAuxInt(^3)
   783  		v0.AddArg2(v1, ptr)
   784  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   785  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   786  		v3.AddArg(val)
   787  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   788  		v4.AuxInt = int32ToAuxInt(3)
   789  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   790  		v5.AuxInt = int32ToAuxInt(3)
   791  		v6 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   792  		v6.AuxInt = int32ToAuxInt(3)
   793  		v6.AddArg(ptr)
   794  		v5.AddArg(v6)
   795  		v4.AddArg(v5)
   796  		v2.AddArg2(v3, v4)
   797  		v.AddArg3(v0, v2, mem)
   798  		return true
   799  	}
   800  	return false
   801  }
   802  func rewriteValueMIPS_OpAvg32u(v *Value) bool {
   803  	v_1 := v.Args[1]
   804  	v_0 := v.Args[0]
   805  	b := v.Block
   806  	// match: (Avg32u <t> x y)
   807  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
   808  	for {
   809  		t := v.Type
   810  		x := v_0
   811  		y := v_1
   812  		v.reset(OpMIPSADD)
   813  		v0 := b.NewValue0(v.Pos, OpMIPSSRLconst, t)
   814  		v0.AuxInt = int32ToAuxInt(1)
   815  		v1 := b.NewValue0(v.Pos, OpMIPSSUB, t)
   816  		v1.AddArg2(x, y)
   817  		v0.AddArg(v1)
   818  		v.AddArg2(v0, y)
   819  		return true
   820  	}
   821  }
   822  func rewriteValueMIPS_OpBitLen16(v *Value) bool {
   823  	v_0 := v.Args[0]
   824  	b := v.Block
   825  	typ := &b.Func.Config.Types
   826  	// match: (BitLen16 x)
   827  	// result: (BitLen32 (ZeroExt16to32 x))
   828  	for {
   829  		x := v_0
   830  		v.reset(OpBitLen32)
   831  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
   832  		v0.AddArg(x)
   833  		v.AddArg(v0)
   834  		return true
   835  	}
   836  }
   837  func rewriteValueMIPS_OpBitLen32(v *Value) bool {
   838  	v_0 := v.Args[0]
   839  	b := v.Block
   840  	typ := &b.Func.Config.Types
   841  	// match: (BitLen32 <t> x)
   842  	// result: (SUB (MOVWconst [32]) (CLZ <t> x))
   843  	for {
   844  		t := v.Type
   845  		x := v_0
   846  		v.reset(OpMIPSSUB)
   847  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   848  		v0.AuxInt = int32ToAuxInt(32)
   849  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   850  		v1.AddArg(x)
   851  		v.AddArg2(v0, v1)
   852  		return true
   853  	}
   854  }
   855  func rewriteValueMIPS_OpBitLen8(v *Value) bool {
   856  	v_0 := v.Args[0]
   857  	b := v.Block
   858  	typ := &b.Func.Config.Types
   859  	// match: (BitLen8 x)
   860  	// result: (BitLen32 (ZeroExt8to32 x))
   861  	for {
   862  		x := v_0
   863  		v.reset(OpBitLen32)
   864  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   865  		v0.AddArg(x)
   866  		v.AddArg(v0)
   867  		return true
   868  	}
   869  }
   870  func rewriteValueMIPS_OpCom16(v *Value) bool {
   871  	v_0 := v.Args[0]
   872  	// match: (Com16 x)
   873  	// result: (NORconst [0] x)
   874  	for {
   875  		x := v_0
   876  		v.reset(OpMIPSNORconst)
   877  		v.AuxInt = int32ToAuxInt(0)
   878  		v.AddArg(x)
   879  		return true
   880  	}
   881  }
   882  func rewriteValueMIPS_OpCom32(v *Value) bool {
   883  	v_0 := v.Args[0]
   884  	// match: (Com32 x)
   885  	// result: (NORconst [0] x)
   886  	for {
   887  		x := v_0
   888  		v.reset(OpMIPSNORconst)
   889  		v.AuxInt = int32ToAuxInt(0)
   890  		v.AddArg(x)
   891  		return true
   892  	}
   893  }
   894  func rewriteValueMIPS_OpCom8(v *Value) bool {
   895  	v_0 := v.Args[0]
   896  	// match: (Com8 x)
   897  	// result: (NORconst [0] x)
   898  	for {
   899  		x := v_0
   900  		v.reset(OpMIPSNORconst)
   901  		v.AuxInt = int32ToAuxInt(0)
   902  		v.AddArg(x)
   903  		return true
   904  	}
   905  }
   906  func rewriteValueMIPS_OpConst16(v *Value) bool {
   907  	// match: (Const16 [val])
   908  	// result: (MOVWconst [int32(val)])
   909  	for {
   910  		val := auxIntToInt16(v.AuxInt)
   911  		v.reset(OpMIPSMOVWconst)
   912  		v.AuxInt = int32ToAuxInt(int32(val))
   913  		return true
   914  	}
   915  }
   916  func rewriteValueMIPS_OpConst32(v *Value) bool {
   917  	// match: (Const32 [val])
   918  	// result: (MOVWconst [int32(val)])
   919  	for {
   920  		val := auxIntToInt32(v.AuxInt)
   921  		v.reset(OpMIPSMOVWconst)
   922  		v.AuxInt = int32ToAuxInt(int32(val))
   923  		return true
   924  	}
   925  }
   926  func rewriteValueMIPS_OpConst8(v *Value) bool {
   927  	// match: (Const8 [val])
   928  	// result: (MOVWconst [int32(val)])
   929  	for {
   930  		val := auxIntToInt8(v.AuxInt)
   931  		v.reset(OpMIPSMOVWconst)
   932  		v.AuxInt = int32ToAuxInt(int32(val))
   933  		return true
   934  	}
   935  }
   936  func rewriteValueMIPS_OpConstBool(v *Value) bool {
   937  	// match: (ConstBool [t])
   938  	// result: (MOVWconst [b2i32(t)])
   939  	for {
   940  		t := auxIntToBool(v.AuxInt)
   941  		v.reset(OpMIPSMOVWconst)
   942  		v.AuxInt = int32ToAuxInt(b2i32(t))
   943  		return true
   944  	}
   945  }
   946  func rewriteValueMIPS_OpConstNil(v *Value) bool {
   947  	// match: (ConstNil)
   948  	// result: (MOVWconst [0])
   949  	for {
   950  		v.reset(OpMIPSMOVWconst)
   951  		v.AuxInt = int32ToAuxInt(0)
   952  		return true
   953  	}
   954  }
   955  func rewriteValueMIPS_OpCtz16(v *Value) bool {
   956  	v_0 := v.Args[0]
   957  	b := v.Block
   958  	typ := &b.Func.Config.Types
   959  	// match: (Ctz16 x)
   960  	// result: (Ctz32 (Or32 <typ.UInt32> x (MOVWconst [1<<16])))
   961  	for {
   962  		x := v_0
   963  		v.reset(OpCtz32)
   964  		v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
   965  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   966  		v1.AuxInt = int32ToAuxInt(1 << 16)
   967  		v0.AddArg2(x, v1)
   968  		v.AddArg(v0)
   969  		return true
   970  	}
   971  }
   972  func rewriteValueMIPS_OpCtz32(v *Value) bool {
   973  	v_0 := v.Args[0]
   974  	b := v.Block
   975  	typ := &b.Func.Config.Types
   976  	// match: (Ctz32 <t> x)
   977  	// result: (SUB (MOVWconst [32]) (CLZ <t> (SUBconst <t> [1] (AND <t> x (NEG <t> x)))))
   978  	for {
   979  		t := v.Type
   980  		x := v_0
   981  		v.reset(OpMIPSSUB)
   982  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   983  		v0.AuxInt = int32ToAuxInt(32)
   984  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   985  		v2 := b.NewValue0(v.Pos, OpMIPSSUBconst, t)
   986  		v2.AuxInt = int32ToAuxInt(1)
   987  		v3 := b.NewValue0(v.Pos, OpMIPSAND, t)
   988  		v4 := b.NewValue0(v.Pos, OpMIPSNEG, t)
   989  		v4.AddArg(x)
   990  		v3.AddArg2(x, v4)
   991  		v2.AddArg(v3)
   992  		v1.AddArg(v2)
   993  		v.AddArg2(v0, v1)
   994  		return true
   995  	}
   996  }
   997  func rewriteValueMIPS_OpCtz8(v *Value) bool {
   998  	v_0 := v.Args[0]
   999  	b := v.Block
  1000  	typ := &b.Func.Config.Types
  1001  	// match: (Ctz8 x)
  1002  	// result: (Ctz32 (Or32 <typ.UInt32> x (MOVWconst [1<<8])))
  1003  	for {
  1004  		x := v_0
  1005  		v.reset(OpCtz32)
  1006  		v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
  1007  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1008  		v1.AuxInt = int32ToAuxInt(1 << 8)
  1009  		v0.AddArg2(x, v1)
  1010  		v.AddArg(v0)
  1011  		return true
  1012  	}
  1013  }
  1014  func rewriteValueMIPS_OpDiv16(v *Value) bool {
  1015  	v_1 := v.Args[1]
  1016  	v_0 := v.Args[0]
  1017  	b := v.Block
  1018  	typ := &b.Func.Config.Types
  1019  	// match: (Div16 x y)
  1020  	// result: (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  1021  	for {
  1022  		x := v_0
  1023  		y := v_1
  1024  		v.reset(OpSelect1)
  1025  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1026  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1027  		v1.AddArg(x)
  1028  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1029  		v2.AddArg(y)
  1030  		v0.AddArg2(v1, v2)
  1031  		v.AddArg(v0)
  1032  		return true
  1033  	}
  1034  }
  1035  func rewriteValueMIPS_OpDiv16u(v *Value) bool {
  1036  	v_1 := v.Args[1]
  1037  	v_0 := v.Args[0]
  1038  	b := v.Block
  1039  	typ := &b.Func.Config.Types
  1040  	// match: (Div16u x y)
  1041  	// result: (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1042  	for {
  1043  		x := v_0
  1044  		y := v_1
  1045  		v.reset(OpSelect1)
  1046  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1047  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1048  		v1.AddArg(x)
  1049  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1050  		v2.AddArg(y)
  1051  		v0.AddArg2(v1, v2)
  1052  		v.AddArg(v0)
  1053  		return true
  1054  	}
  1055  }
  1056  func rewriteValueMIPS_OpDiv32(v *Value) bool {
  1057  	v_1 := v.Args[1]
  1058  	v_0 := v.Args[0]
  1059  	b := v.Block
  1060  	typ := &b.Func.Config.Types
  1061  	// match: (Div32 x y)
  1062  	// result: (Select1 (DIV x y))
  1063  	for {
  1064  		x := v_0
  1065  		y := v_1
  1066  		v.reset(OpSelect1)
  1067  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1068  		v0.AddArg2(x, y)
  1069  		v.AddArg(v0)
  1070  		return true
  1071  	}
  1072  }
  1073  func rewriteValueMIPS_OpDiv32u(v *Value) bool {
  1074  	v_1 := v.Args[1]
  1075  	v_0 := v.Args[0]
  1076  	b := v.Block
  1077  	typ := &b.Func.Config.Types
  1078  	// match: (Div32u x y)
  1079  	// result: (Select1 (DIVU x y))
  1080  	for {
  1081  		x := v_0
  1082  		y := v_1
  1083  		v.reset(OpSelect1)
  1084  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1085  		v0.AddArg2(x, y)
  1086  		v.AddArg(v0)
  1087  		return true
  1088  	}
  1089  }
  1090  func rewriteValueMIPS_OpDiv8(v *Value) bool {
  1091  	v_1 := v.Args[1]
  1092  	v_0 := v.Args[0]
  1093  	b := v.Block
  1094  	typ := &b.Func.Config.Types
  1095  	// match: (Div8 x y)
  1096  	// result: (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  1097  	for {
  1098  		x := v_0
  1099  		y := v_1
  1100  		v.reset(OpSelect1)
  1101  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1102  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1103  		v1.AddArg(x)
  1104  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1105  		v2.AddArg(y)
  1106  		v0.AddArg2(v1, v2)
  1107  		v.AddArg(v0)
  1108  		return true
  1109  	}
  1110  }
  1111  func rewriteValueMIPS_OpDiv8u(v *Value) bool {
  1112  	v_1 := v.Args[1]
  1113  	v_0 := v.Args[0]
  1114  	b := v.Block
  1115  	typ := &b.Func.Config.Types
  1116  	// match: (Div8u x y)
  1117  	// result: (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1118  	for {
  1119  		x := v_0
  1120  		y := v_1
  1121  		v.reset(OpSelect1)
  1122  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1123  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1124  		v1.AddArg(x)
  1125  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1126  		v2.AddArg(y)
  1127  		v0.AddArg2(v1, v2)
  1128  		v.AddArg(v0)
  1129  		return true
  1130  	}
  1131  }
  1132  func rewriteValueMIPS_OpEq16(v *Value) bool {
  1133  	v_1 := v.Args[1]
  1134  	v_0 := v.Args[0]
  1135  	b := v.Block
  1136  	typ := &b.Func.Config.Types
  1137  	// match: (Eq16 x y)
  1138  	// result: (SGTUconst [1] (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1139  	for {
  1140  		x := v_0
  1141  		y := v_1
  1142  		v.reset(OpMIPSSGTUconst)
  1143  		v.AuxInt = int32ToAuxInt(1)
  1144  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1145  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1146  		v1.AddArg(x)
  1147  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1148  		v2.AddArg(y)
  1149  		v0.AddArg2(v1, v2)
  1150  		v.AddArg(v0)
  1151  		return true
  1152  	}
  1153  }
  1154  func rewriteValueMIPS_OpEq32(v *Value) bool {
  1155  	v_1 := v.Args[1]
  1156  	v_0 := v.Args[0]
  1157  	b := v.Block
  1158  	typ := &b.Func.Config.Types
  1159  	// match: (Eq32 x y)
  1160  	// result: (SGTUconst [1] (XOR x y))
  1161  	for {
  1162  		x := v_0
  1163  		y := v_1
  1164  		v.reset(OpMIPSSGTUconst)
  1165  		v.AuxInt = int32ToAuxInt(1)
  1166  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1167  		v0.AddArg2(x, y)
  1168  		v.AddArg(v0)
  1169  		return true
  1170  	}
  1171  }
  1172  func rewriteValueMIPS_OpEq32F(v *Value) bool {
  1173  	v_1 := v.Args[1]
  1174  	v_0 := v.Args[0]
  1175  	b := v.Block
  1176  	// match: (Eq32F x y)
  1177  	// result: (FPFlagTrue (CMPEQF x y))
  1178  	for {
  1179  		x := v_0
  1180  		y := v_1
  1181  		v.reset(OpMIPSFPFlagTrue)
  1182  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  1183  		v0.AddArg2(x, y)
  1184  		v.AddArg(v0)
  1185  		return true
  1186  	}
  1187  }
  1188  func rewriteValueMIPS_OpEq64F(v *Value) bool {
  1189  	v_1 := v.Args[1]
  1190  	v_0 := v.Args[0]
  1191  	b := v.Block
  1192  	// match: (Eq64F x y)
  1193  	// result: (FPFlagTrue (CMPEQD x y))
  1194  	for {
  1195  		x := v_0
  1196  		y := v_1
  1197  		v.reset(OpMIPSFPFlagTrue)
  1198  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  1199  		v0.AddArg2(x, y)
  1200  		v.AddArg(v0)
  1201  		return true
  1202  	}
  1203  }
  1204  func rewriteValueMIPS_OpEq8(v *Value) bool {
  1205  	v_1 := v.Args[1]
  1206  	v_0 := v.Args[0]
  1207  	b := v.Block
  1208  	typ := &b.Func.Config.Types
  1209  	// match: (Eq8 x y)
  1210  	// result: (SGTUconst [1] (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1211  	for {
  1212  		x := v_0
  1213  		y := v_1
  1214  		v.reset(OpMIPSSGTUconst)
  1215  		v.AuxInt = int32ToAuxInt(1)
  1216  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1217  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1218  		v1.AddArg(x)
  1219  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1220  		v2.AddArg(y)
  1221  		v0.AddArg2(v1, v2)
  1222  		v.AddArg(v0)
  1223  		return true
  1224  	}
  1225  }
  1226  func rewriteValueMIPS_OpEqB(v *Value) bool {
  1227  	v_1 := v.Args[1]
  1228  	v_0 := v.Args[0]
  1229  	b := v.Block
  1230  	typ := &b.Func.Config.Types
  1231  	// match: (EqB x y)
  1232  	// result: (XORconst [1] (XOR <typ.Bool> x y))
  1233  	for {
  1234  		x := v_0
  1235  		y := v_1
  1236  		v.reset(OpMIPSXORconst)
  1237  		v.AuxInt = int32ToAuxInt(1)
  1238  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.Bool)
  1239  		v0.AddArg2(x, y)
  1240  		v.AddArg(v0)
  1241  		return true
  1242  	}
  1243  }
  1244  func rewriteValueMIPS_OpEqPtr(v *Value) bool {
  1245  	v_1 := v.Args[1]
  1246  	v_0 := v.Args[0]
  1247  	b := v.Block
  1248  	typ := &b.Func.Config.Types
  1249  	// match: (EqPtr x y)
  1250  	// result: (SGTUconst [1] (XOR x y))
  1251  	for {
  1252  		x := v_0
  1253  		y := v_1
  1254  		v.reset(OpMIPSSGTUconst)
  1255  		v.AuxInt = int32ToAuxInt(1)
  1256  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1257  		v0.AddArg2(x, y)
  1258  		v.AddArg(v0)
  1259  		return true
  1260  	}
  1261  }
  1262  func rewriteValueMIPS_OpHmul32(v *Value) bool {
  1263  	v_1 := v.Args[1]
  1264  	v_0 := v.Args[0]
  1265  	b := v.Block
  1266  	typ := &b.Func.Config.Types
  1267  	// match: (Hmul32 x y)
  1268  	// result: (Select0 (MULT x y))
  1269  	for {
  1270  		x := v_0
  1271  		y := v_1
  1272  		v.reset(OpSelect0)
  1273  		v0 := b.NewValue0(v.Pos, OpMIPSMULT, types.NewTuple(typ.Int32, typ.Int32))
  1274  		v0.AddArg2(x, y)
  1275  		v.AddArg(v0)
  1276  		return true
  1277  	}
  1278  }
  1279  func rewriteValueMIPS_OpHmul32u(v *Value) bool {
  1280  	v_1 := v.Args[1]
  1281  	v_0 := v.Args[0]
  1282  	b := v.Block
  1283  	typ := &b.Func.Config.Types
  1284  	// match: (Hmul32u x y)
  1285  	// result: (Select0 (MULTU x y))
  1286  	for {
  1287  		x := v_0
  1288  		y := v_1
  1289  		v.reset(OpSelect0)
  1290  		v0 := b.NewValue0(v.Pos, OpMIPSMULTU, types.NewTuple(typ.UInt32, typ.UInt32))
  1291  		v0.AddArg2(x, y)
  1292  		v.AddArg(v0)
  1293  		return true
  1294  	}
  1295  }
  1296  func rewriteValueMIPS_OpIsInBounds(v *Value) bool {
  1297  	v_1 := v.Args[1]
  1298  	v_0 := v.Args[0]
  1299  	// match: (IsInBounds idx len)
  1300  	// result: (SGTU len idx)
  1301  	for {
  1302  		idx := v_0
  1303  		len := v_1
  1304  		v.reset(OpMIPSSGTU)
  1305  		v.AddArg2(len, idx)
  1306  		return true
  1307  	}
  1308  }
  1309  func rewriteValueMIPS_OpIsNonNil(v *Value) bool {
  1310  	v_0 := v.Args[0]
  1311  	b := v.Block
  1312  	typ := &b.Func.Config.Types
  1313  	// match: (IsNonNil ptr)
  1314  	// result: (SGTU ptr (MOVWconst [0]))
  1315  	for {
  1316  		ptr := v_0
  1317  		v.reset(OpMIPSSGTU)
  1318  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1319  		v0.AuxInt = int32ToAuxInt(0)
  1320  		v.AddArg2(ptr, v0)
  1321  		return true
  1322  	}
  1323  }
  1324  func rewriteValueMIPS_OpIsSliceInBounds(v *Value) bool {
  1325  	v_1 := v.Args[1]
  1326  	v_0 := v.Args[0]
  1327  	b := v.Block
  1328  	typ := &b.Func.Config.Types
  1329  	// match: (IsSliceInBounds idx len)
  1330  	// result: (XORconst [1] (SGTU idx len))
  1331  	for {
  1332  		idx := v_0
  1333  		len := v_1
  1334  		v.reset(OpMIPSXORconst)
  1335  		v.AuxInt = int32ToAuxInt(1)
  1336  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1337  		v0.AddArg2(idx, len)
  1338  		v.AddArg(v0)
  1339  		return true
  1340  	}
  1341  }
  1342  func rewriteValueMIPS_OpLeq16(v *Value) bool {
  1343  	v_1 := v.Args[1]
  1344  	v_0 := v.Args[0]
  1345  	b := v.Block
  1346  	typ := &b.Func.Config.Types
  1347  	// match: (Leq16 x y)
  1348  	// result: (XORconst [1] (SGT (SignExt16to32 x) (SignExt16to32 y)))
  1349  	for {
  1350  		x := v_0
  1351  		y := v_1
  1352  		v.reset(OpMIPSXORconst)
  1353  		v.AuxInt = int32ToAuxInt(1)
  1354  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1355  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1356  		v1.AddArg(x)
  1357  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1358  		v2.AddArg(y)
  1359  		v0.AddArg2(v1, v2)
  1360  		v.AddArg(v0)
  1361  		return true
  1362  	}
  1363  }
  1364  func rewriteValueMIPS_OpLeq16U(v *Value) bool {
  1365  	v_1 := v.Args[1]
  1366  	v_0 := v.Args[0]
  1367  	b := v.Block
  1368  	typ := &b.Func.Config.Types
  1369  	// match: (Leq16U x y)
  1370  	// result: (XORconst [1] (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1371  	for {
  1372  		x := v_0
  1373  		y := v_1
  1374  		v.reset(OpMIPSXORconst)
  1375  		v.AuxInt = int32ToAuxInt(1)
  1376  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1377  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1378  		v1.AddArg(x)
  1379  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1380  		v2.AddArg(y)
  1381  		v0.AddArg2(v1, v2)
  1382  		v.AddArg(v0)
  1383  		return true
  1384  	}
  1385  }
  1386  func rewriteValueMIPS_OpLeq32(v *Value) bool {
  1387  	v_1 := v.Args[1]
  1388  	v_0 := v.Args[0]
  1389  	b := v.Block
  1390  	typ := &b.Func.Config.Types
  1391  	// match: (Leq32 x y)
  1392  	// result: (XORconst [1] (SGT x y))
  1393  	for {
  1394  		x := v_0
  1395  		y := v_1
  1396  		v.reset(OpMIPSXORconst)
  1397  		v.AuxInt = int32ToAuxInt(1)
  1398  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1399  		v0.AddArg2(x, y)
  1400  		v.AddArg(v0)
  1401  		return true
  1402  	}
  1403  }
  1404  func rewriteValueMIPS_OpLeq32F(v *Value) bool {
  1405  	v_1 := v.Args[1]
  1406  	v_0 := v.Args[0]
  1407  	b := v.Block
  1408  	// match: (Leq32F x y)
  1409  	// result: (FPFlagTrue (CMPGEF y x))
  1410  	for {
  1411  		x := v_0
  1412  		y := v_1
  1413  		v.reset(OpMIPSFPFlagTrue)
  1414  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGEF, types.TypeFlags)
  1415  		v0.AddArg2(y, x)
  1416  		v.AddArg(v0)
  1417  		return true
  1418  	}
  1419  }
  1420  func rewriteValueMIPS_OpLeq32U(v *Value) bool {
  1421  	v_1 := v.Args[1]
  1422  	v_0 := v.Args[0]
  1423  	b := v.Block
  1424  	typ := &b.Func.Config.Types
  1425  	// match: (Leq32U x y)
  1426  	// result: (XORconst [1] (SGTU x y))
  1427  	for {
  1428  		x := v_0
  1429  		y := v_1
  1430  		v.reset(OpMIPSXORconst)
  1431  		v.AuxInt = int32ToAuxInt(1)
  1432  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1433  		v0.AddArg2(x, y)
  1434  		v.AddArg(v0)
  1435  		return true
  1436  	}
  1437  }
  1438  func rewriteValueMIPS_OpLeq64F(v *Value) bool {
  1439  	v_1 := v.Args[1]
  1440  	v_0 := v.Args[0]
  1441  	b := v.Block
  1442  	// match: (Leq64F x y)
  1443  	// result: (FPFlagTrue (CMPGED y x))
  1444  	for {
  1445  		x := v_0
  1446  		y := v_1
  1447  		v.reset(OpMIPSFPFlagTrue)
  1448  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGED, types.TypeFlags)
  1449  		v0.AddArg2(y, x)
  1450  		v.AddArg(v0)
  1451  		return true
  1452  	}
  1453  }
  1454  func rewriteValueMIPS_OpLeq8(v *Value) bool {
  1455  	v_1 := v.Args[1]
  1456  	v_0 := v.Args[0]
  1457  	b := v.Block
  1458  	typ := &b.Func.Config.Types
  1459  	// match: (Leq8 x y)
  1460  	// result: (XORconst [1] (SGT (SignExt8to32 x) (SignExt8to32 y)))
  1461  	for {
  1462  		x := v_0
  1463  		y := v_1
  1464  		v.reset(OpMIPSXORconst)
  1465  		v.AuxInt = int32ToAuxInt(1)
  1466  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1467  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1468  		v1.AddArg(x)
  1469  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1470  		v2.AddArg(y)
  1471  		v0.AddArg2(v1, v2)
  1472  		v.AddArg(v0)
  1473  		return true
  1474  	}
  1475  }
  1476  func rewriteValueMIPS_OpLeq8U(v *Value) bool {
  1477  	v_1 := v.Args[1]
  1478  	v_0 := v.Args[0]
  1479  	b := v.Block
  1480  	typ := &b.Func.Config.Types
  1481  	// match: (Leq8U x y)
  1482  	// result: (XORconst [1] (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1483  	for {
  1484  		x := v_0
  1485  		y := v_1
  1486  		v.reset(OpMIPSXORconst)
  1487  		v.AuxInt = int32ToAuxInt(1)
  1488  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1489  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1490  		v1.AddArg(x)
  1491  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1492  		v2.AddArg(y)
  1493  		v0.AddArg2(v1, v2)
  1494  		v.AddArg(v0)
  1495  		return true
  1496  	}
  1497  }
  1498  func rewriteValueMIPS_OpLess16(v *Value) bool {
  1499  	v_1 := v.Args[1]
  1500  	v_0 := v.Args[0]
  1501  	b := v.Block
  1502  	typ := &b.Func.Config.Types
  1503  	// match: (Less16 x y)
  1504  	// result: (SGT (SignExt16to32 y) (SignExt16to32 x))
  1505  	for {
  1506  		x := v_0
  1507  		y := v_1
  1508  		v.reset(OpMIPSSGT)
  1509  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1510  		v0.AddArg(y)
  1511  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1512  		v1.AddArg(x)
  1513  		v.AddArg2(v0, v1)
  1514  		return true
  1515  	}
  1516  }
  1517  func rewriteValueMIPS_OpLess16U(v *Value) bool {
  1518  	v_1 := v.Args[1]
  1519  	v_0 := v.Args[0]
  1520  	b := v.Block
  1521  	typ := &b.Func.Config.Types
  1522  	// match: (Less16U x y)
  1523  	// result: (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x))
  1524  	for {
  1525  		x := v_0
  1526  		y := v_1
  1527  		v.reset(OpMIPSSGTU)
  1528  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1529  		v0.AddArg(y)
  1530  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1531  		v1.AddArg(x)
  1532  		v.AddArg2(v0, v1)
  1533  		return true
  1534  	}
  1535  }
  1536  func rewriteValueMIPS_OpLess32(v *Value) bool {
  1537  	v_1 := v.Args[1]
  1538  	v_0 := v.Args[0]
  1539  	// match: (Less32 x y)
  1540  	// result: (SGT y x)
  1541  	for {
  1542  		x := v_0
  1543  		y := v_1
  1544  		v.reset(OpMIPSSGT)
  1545  		v.AddArg2(y, x)
  1546  		return true
  1547  	}
  1548  }
  1549  func rewriteValueMIPS_OpLess32F(v *Value) bool {
  1550  	v_1 := v.Args[1]
  1551  	v_0 := v.Args[0]
  1552  	b := v.Block
  1553  	// match: (Less32F x y)
  1554  	// result: (FPFlagTrue (CMPGTF y x))
  1555  	for {
  1556  		x := v_0
  1557  		y := v_1
  1558  		v.reset(OpMIPSFPFlagTrue)
  1559  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTF, types.TypeFlags)
  1560  		v0.AddArg2(y, x)
  1561  		v.AddArg(v0)
  1562  		return true
  1563  	}
  1564  }
  1565  func rewriteValueMIPS_OpLess32U(v *Value) bool {
  1566  	v_1 := v.Args[1]
  1567  	v_0 := v.Args[0]
  1568  	// match: (Less32U x y)
  1569  	// result: (SGTU y x)
  1570  	for {
  1571  		x := v_0
  1572  		y := v_1
  1573  		v.reset(OpMIPSSGTU)
  1574  		v.AddArg2(y, x)
  1575  		return true
  1576  	}
  1577  }
  1578  func rewriteValueMIPS_OpLess64F(v *Value) bool {
  1579  	v_1 := v.Args[1]
  1580  	v_0 := v.Args[0]
  1581  	b := v.Block
  1582  	// match: (Less64F x y)
  1583  	// result: (FPFlagTrue (CMPGTD y x))
  1584  	for {
  1585  		x := v_0
  1586  		y := v_1
  1587  		v.reset(OpMIPSFPFlagTrue)
  1588  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTD, types.TypeFlags)
  1589  		v0.AddArg2(y, x)
  1590  		v.AddArg(v0)
  1591  		return true
  1592  	}
  1593  }
  1594  func rewriteValueMIPS_OpLess8(v *Value) bool {
  1595  	v_1 := v.Args[1]
  1596  	v_0 := v.Args[0]
  1597  	b := v.Block
  1598  	typ := &b.Func.Config.Types
  1599  	// match: (Less8 x y)
  1600  	// result: (SGT (SignExt8to32 y) (SignExt8to32 x))
  1601  	for {
  1602  		x := v_0
  1603  		y := v_1
  1604  		v.reset(OpMIPSSGT)
  1605  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1606  		v0.AddArg(y)
  1607  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1608  		v1.AddArg(x)
  1609  		v.AddArg2(v0, v1)
  1610  		return true
  1611  	}
  1612  }
  1613  func rewriteValueMIPS_OpLess8U(v *Value) bool {
  1614  	v_1 := v.Args[1]
  1615  	v_0 := v.Args[0]
  1616  	b := v.Block
  1617  	typ := &b.Func.Config.Types
  1618  	// match: (Less8U x y)
  1619  	// result: (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x))
  1620  	for {
  1621  		x := v_0
  1622  		y := v_1
  1623  		v.reset(OpMIPSSGTU)
  1624  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1625  		v0.AddArg(y)
  1626  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1627  		v1.AddArg(x)
  1628  		v.AddArg2(v0, v1)
  1629  		return true
  1630  	}
  1631  }
  1632  func rewriteValueMIPS_OpLoad(v *Value) bool {
  1633  	v_1 := v.Args[1]
  1634  	v_0 := v.Args[0]
  1635  	// match: (Load <t> ptr mem)
  1636  	// cond: t.IsBoolean()
  1637  	// result: (MOVBUload ptr mem)
  1638  	for {
  1639  		t := v.Type
  1640  		ptr := v_0
  1641  		mem := v_1
  1642  		if !(t.IsBoolean()) {
  1643  			break
  1644  		}
  1645  		v.reset(OpMIPSMOVBUload)
  1646  		v.AddArg2(ptr, mem)
  1647  		return true
  1648  	}
  1649  	// match: (Load <t> ptr mem)
  1650  	// cond: (is8BitInt(t) && t.IsSigned())
  1651  	// result: (MOVBload ptr mem)
  1652  	for {
  1653  		t := v.Type
  1654  		ptr := v_0
  1655  		mem := v_1
  1656  		if !(is8BitInt(t) && t.IsSigned()) {
  1657  			break
  1658  		}
  1659  		v.reset(OpMIPSMOVBload)
  1660  		v.AddArg2(ptr, mem)
  1661  		return true
  1662  	}
  1663  	// match: (Load <t> ptr mem)
  1664  	// cond: (is8BitInt(t) && !t.IsSigned())
  1665  	// result: (MOVBUload ptr mem)
  1666  	for {
  1667  		t := v.Type
  1668  		ptr := v_0
  1669  		mem := v_1
  1670  		if !(is8BitInt(t) && !t.IsSigned()) {
  1671  			break
  1672  		}
  1673  		v.reset(OpMIPSMOVBUload)
  1674  		v.AddArg2(ptr, mem)
  1675  		return true
  1676  	}
  1677  	// match: (Load <t> ptr mem)
  1678  	// cond: (is16BitInt(t) && t.IsSigned())
  1679  	// result: (MOVHload ptr mem)
  1680  	for {
  1681  		t := v.Type
  1682  		ptr := v_0
  1683  		mem := v_1
  1684  		if !(is16BitInt(t) && t.IsSigned()) {
  1685  			break
  1686  		}
  1687  		v.reset(OpMIPSMOVHload)
  1688  		v.AddArg2(ptr, mem)
  1689  		return true
  1690  	}
  1691  	// match: (Load <t> ptr mem)
  1692  	// cond: (is16BitInt(t) && !t.IsSigned())
  1693  	// result: (MOVHUload ptr mem)
  1694  	for {
  1695  		t := v.Type
  1696  		ptr := v_0
  1697  		mem := v_1
  1698  		if !(is16BitInt(t) && !t.IsSigned()) {
  1699  			break
  1700  		}
  1701  		v.reset(OpMIPSMOVHUload)
  1702  		v.AddArg2(ptr, mem)
  1703  		return true
  1704  	}
  1705  	// match: (Load <t> ptr mem)
  1706  	// cond: (is32BitInt(t) || isPtr(t))
  1707  	// result: (MOVWload ptr mem)
  1708  	for {
  1709  		t := v.Type
  1710  		ptr := v_0
  1711  		mem := v_1
  1712  		if !(is32BitInt(t) || isPtr(t)) {
  1713  			break
  1714  		}
  1715  		v.reset(OpMIPSMOVWload)
  1716  		v.AddArg2(ptr, mem)
  1717  		return true
  1718  	}
  1719  	// match: (Load <t> ptr mem)
  1720  	// cond: is32BitFloat(t)
  1721  	// result: (MOVFload ptr mem)
  1722  	for {
  1723  		t := v.Type
  1724  		ptr := v_0
  1725  		mem := v_1
  1726  		if !(is32BitFloat(t)) {
  1727  			break
  1728  		}
  1729  		v.reset(OpMIPSMOVFload)
  1730  		v.AddArg2(ptr, mem)
  1731  		return true
  1732  	}
  1733  	// match: (Load <t> ptr mem)
  1734  	// cond: is64BitFloat(t)
  1735  	// result: (MOVDload ptr mem)
  1736  	for {
  1737  		t := v.Type
  1738  		ptr := v_0
  1739  		mem := v_1
  1740  		if !(is64BitFloat(t)) {
  1741  			break
  1742  		}
  1743  		v.reset(OpMIPSMOVDload)
  1744  		v.AddArg2(ptr, mem)
  1745  		return true
  1746  	}
  1747  	return false
  1748  }
  1749  func rewriteValueMIPS_OpLocalAddr(v *Value) bool {
  1750  	v_1 := v.Args[1]
  1751  	v_0 := v.Args[0]
  1752  	b := v.Block
  1753  	typ := &b.Func.Config.Types
  1754  	// match: (LocalAddr <t> {sym} base mem)
  1755  	// cond: t.Elem().HasPointers()
  1756  	// result: (MOVWaddr {sym} (SPanchored base mem))
  1757  	for {
  1758  		t := v.Type
  1759  		sym := auxToSym(v.Aux)
  1760  		base := v_0
  1761  		mem := v_1
  1762  		if !(t.Elem().HasPointers()) {
  1763  			break
  1764  		}
  1765  		v.reset(OpMIPSMOVWaddr)
  1766  		v.Aux = symToAux(sym)
  1767  		v0 := b.NewValue0(v.Pos, OpSPanchored, typ.Uintptr)
  1768  		v0.AddArg2(base, mem)
  1769  		v.AddArg(v0)
  1770  		return true
  1771  	}
  1772  	// match: (LocalAddr <t> {sym} base _)
  1773  	// cond: !t.Elem().HasPointers()
  1774  	// result: (MOVWaddr {sym} base)
  1775  	for {
  1776  		t := v.Type
  1777  		sym := auxToSym(v.Aux)
  1778  		base := v_0
  1779  		if !(!t.Elem().HasPointers()) {
  1780  			break
  1781  		}
  1782  		v.reset(OpMIPSMOVWaddr)
  1783  		v.Aux = symToAux(sym)
  1784  		v.AddArg(base)
  1785  		return true
  1786  	}
  1787  	return false
  1788  }
  1789  func rewriteValueMIPS_OpLsh16x16(v *Value) bool {
  1790  	v_1 := v.Args[1]
  1791  	v_0 := v.Args[0]
  1792  	b := v.Block
  1793  	typ := &b.Func.Config.Types
  1794  	// match: (Lsh16x16 <t> x y)
  1795  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1796  	for {
  1797  		t := v.Type
  1798  		x := v_0
  1799  		y := v_1
  1800  		v.reset(OpMIPSCMOVZ)
  1801  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1802  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1803  		v1.AddArg(y)
  1804  		v0.AddArg2(x, v1)
  1805  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1806  		v2.AuxInt = int32ToAuxInt(0)
  1807  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1808  		v3.AuxInt = int32ToAuxInt(32)
  1809  		v3.AddArg(v1)
  1810  		v.AddArg3(v0, v2, v3)
  1811  		return true
  1812  	}
  1813  }
  1814  func rewriteValueMIPS_OpLsh16x32(v *Value) bool {
  1815  	v_1 := v.Args[1]
  1816  	v_0 := v.Args[0]
  1817  	b := v.Block
  1818  	typ := &b.Func.Config.Types
  1819  	// match: (Lsh16x32 <t> x y)
  1820  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1821  	for {
  1822  		t := v.Type
  1823  		x := v_0
  1824  		y := v_1
  1825  		v.reset(OpMIPSCMOVZ)
  1826  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1827  		v0.AddArg2(x, y)
  1828  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1829  		v1.AuxInt = int32ToAuxInt(0)
  1830  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1831  		v2.AuxInt = int32ToAuxInt(32)
  1832  		v2.AddArg(y)
  1833  		v.AddArg3(v0, v1, v2)
  1834  		return true
  1835  	}
  1836  }
  1837  func rewriteValueMIPS_OpLsh16x64(v *Value) bool {
  1838  	v_1 := v.Args[1]
  1839  	v_0 := v.Args[0]
  1840  	// match: (Lsh16x64 x (Const64 [c]))
  1841  	// cond: uint32(c) < 16
  1842  	// result: (SLLconst x [int32(c)])
  1843  	for {
  1844  		x := v_0
  1845  		if v_1.Op != OpConst64 {
  1846  			break
  1847  		}
  1848  		c := auxIntToInt64(v_1.AuxInt)
  1849  		if !(uint32(c) < 16) {
  1850  			break
  1851  		}
  1852  		v.reset(OpMIPSSLLconst)
  1853  		v.AuxInt = int32ToAuxInt(int32(c))
  1854  		v.AddArg(x)
  1855  		return true
  1856  	}
  1857  	// match: (Lsh16x64 _ (Const64 [c]))
  1858  	// cond: uint32(c) >= 16
  1859  	// result: (MOVWconst [0])
  1860  	for {
  1861  		if v_1.Op != OpConst64 {
  1862  			break
  1863  		}
  1864  		c := auxIntToInt64(v_1.AuxInt)
  1865  		if !(uint32(c) >= 16) {
  1866  			break
  1867  		}
  1868  		v.reset(OpMIPSMOVWconst)
  1869  		v.AuxInt = int32ToAuxInt(0)
  1870  		return true
  1871  	}
  1872  	return false
  1873  }
  1874  func rewriteValueMIPS_OpLsh16x8(v *Value) bool {
  1875  	v_1 := v.Args[1]
  1876  	v_0 := v.Args[0]
  1877  	b := v.Block
  1878  	typ := &b.Func.Config.Types
  1879  	// match: (Lsh16x8 <t> x y)
  1880  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1881  	for {
  1882  		t := v.Type
  1883  		x := v_0
  1884  		y := v_1
  1885  		v.reset(OpMIPSCMOVZ)
  1886  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1887  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1888  		v1.AddArg(y)
  1889  		v0.AddArg2(x, v1)
  1890  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1891  		v2.AuxInt = int32ToAuxInt(0)
  1892  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1893  		v3.AuxInt = int32ToAuxInt(32)
  1894  		v3.AddArg(v1)
  1895  		v.AddArg3(v0, v2, v3)
  1896  		return true
  1897  	}
  1898  }
  1899  func rewriteValueMIPS_OpLsh32x16(v *Value) bool {
  1900  	v_1 := v.Args[1]
  1901  	v_0 := v.Args[0]
  1902  	b := v.Block
  1903  	typ := &b.Func.Config.Types
  1904  	// match: (Lsh32x16 <t> x y)
  1905  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1906  	for {
  1907  		t := v.Type
  1908  		x := v_0
  1909  		y := v_1
  1910  		v.reset(OpMIPSCMOVZ)
  1911  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1912  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1913  		v1.AddArg(y)
  1914  		v0.AddArg2(x, v1)
  1915  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1916  		v2.AuxInt = int32ToAuxInt(0)
  1917  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1918  		v3.AuxInt = int32ToAuxInt(32)
  1919  		v3.AddArg(v1)
  1920  		v.AddArg3(v0, v2, v3)
  1921  		return true
  1922  	}
  1923  }
  1924  func rewriteValueMIPS_OpLsh32x32(v *Value) bool {
  1925  	v_1 := v.Args[1]
  1926  	v_0 := v.Args[0]
  1927  	b := v.Block
  1928  	typ := &b.Func.Config.Types
  1929  	// match: (Lsh32x32 <t> x y)
  1930  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1931  	for {
  1932  		t := v.Type
  1933  		x := v_0
  1934  		y := v_1
  1935  		v.reset(OpMIPSCMOVZ)
  1936  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1937  		v0.AddArg2(x, y)
  1938  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1939  		v1.AuxInt = int32ToAuxInt(0)
  1940  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1941  		v2.AuxInt = int32ToAuxInt(32)
  1942  		v2.AddArg(y)
  1943  		v.AddArg3(v0, v1, v2)
  1944  		return true
  1945  	}
  1946  }
  1947  func rewriteValueMIPS_OpLsh32x64(v *Value) bool {
  1948  	v_1 := v.Args[1]
  1949  	v_0 := v.Args[0]
  1950  	// match: (Lsh32x64 x (Const64 [c]))
  1951  	// cond: uint32(c) < 32
  1952  	// result: (SLLconst x [int32(c)])
  1953  	for {
  1954  		x := v_0
  1955  		if v_1.Op != OpConst64 {
  1956  			break
  1957  		}
  1958  		c := auxIntToInt64(v_1.AuxInt)
  1959  		if !(uint32(c) < 32) {
  1960  			break
  1961  		}
  1962  		v.reset(OpMIPSSLLconst)
  1963  		v.AuxInt = int32ToAuxInt(int32(c))
  1964  		v.AddArg(x)
  1965  		return true
  1966  	}
  1967  	// match: (Lsh32x64 _ (Const64 [c]))
  1968  	// cond: uint32(c) >= 32
  1969  	// result: (MOVWconst [0])
  1970  	for {
  1971  		if v_1.Op != OpConst64 {
  1972  			break
  1973  		}
  1974  		c := auxIntToInt64(v_1.AuxInt)
  1975  		if !(uint32(c) >= 32) {
  1976  			break
  1977  		}
  1978  		v.reset(OpMIPSMOVWconst)
  1979  		v.AuxInt = int32ToAuxInt(0)
  1980  		return true
  1981  	}
  1982  	return false
  1983  }
  1984  func rewriteValueMIPS_OpLsh32x8(v *Value) bool {
  1985  	v_1 := v.Args[1]
  1986  	v_0 := v.Args[0]
  1987  	b := v.Block
  1988  	typ := &b.Func.Config.Types
  1989  	// match: (Lsh32x8 <t> x y)
  1990  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1991  	for {
  1992  		t := v.Type
  1993  		x := v_0
  1994  		y := v_1
  1995  		v.reset(OpMIPSCMOVZ)
  1996  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1997  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1998  		v1.AddArg(y)
  1999  		v0.AddArg2(x, v1)
  2000  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2001  		v2.AuxInt = int32ToAuxInt(0)
  2002  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2003  		v3.AuxInt = int32ToAuxInt(32)
  2004  		v3.AddArg(v1)
  2005  		v.AddArg3(v0, v2, v3)
  2006  		return true
  2007  	}
  2008  }
  2009  func rewriteValueMIPS_OpLsh8x16(v *Value) bool {
  2010  	v_1 := v.Args[1]
  2011  	v_0 := v.Args[0]
  2012  	b := v.Block
  2013  	typ := &b.Func.Config.Types
  2014  	// match: (Lsh8x16 <t> x y)
  2015  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  2016  	for {
  2017  		t := v.Type
  2018  		x := v_0
  2019  		y := v_1
  2020  		v.reset(OpMIPSCMOVZ)
  2021  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2022  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2023  		v1.AddArg(y)
  2024  		v0.AddArg2(x, v1)
  2025  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2026  		v2.AuxInt = int32ToAuxInt(0)
  2027  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2028  		v3.AuxInt = int32ToAuxInt(32)
  2029  		v3.AddArg(v1)
  2030  		v.AddArg3(v0, v2, v3)
  2031  		return true
  2032  	}
  2033  }
  2034  func rewriteValueMIPS_OpLsh8x32(v *Value) bool {
  2035  	v_1 := v.Args[1]
  2036  	v_0 := v.Args[0]
  2037  	b := v.Block
  2038  	typ := &b.Func.Config.Types
  2039  	// match: (Lsh8x32 <t> x y)
  2040  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  2041  	for {
  2042  		t := v.Type
  2043  		x := v_0
  2044  		y := v_1
  2045  		v.reset(OpMIPSCMOVZ)
  2046  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2047  		v0.AddArg2(x, y)
  2048  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2049  		v1.AuxInt = int32ToAuxInt(0)
  2050  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2051  		v2.AuxInt = int32ToAuxInt(32)
  2052  		v2.AddArg(y)
  2053  		v.AddArg3(v0, v1, v2)
  2054  		return true
  2055  	}
  2056  }
  2057  func rewriteValueMIPS_OpLsh8x64(v *Value) bool {
  2058  	v_1 := v.Args[1]
  2059  	v_0 := v.Args[0]
  2060  	// match: (Lsh8x64 x (Const64 [c]))
  2061  	// cond: uint32(c) < 8
  2062  	// result: (SLLconst x [int32(c)])
  2063  	for {
  2064  		x := v_0
  2065  		if v_1.Op != OpConst64 {
  2066  			break
  2067  		}
  2068  		c := auxIntToInt64(v_1.AuxInt)
  2069  		if !(uint32(c) < 8) {
  2070  			break
  2071  		}
  2072  		v.reset(OpMIPSSLLconst)
  2073  		v.AuxInt = int32ToAuxInt(int32(c))
  2074  		v.AddArg(x)
  2075  		return true
  2076  	}
  2077  	// match: (Lsh8x64 _ (Const64 [c]))
  2078  	// cond: uint32(c) >= 8
  2079  	// result: (MOVWconst [0])
  2080  	for {
  2081  		if v_1.Op != OpConst64 {
  2082  			break
  2083  		}
  2084  		c := auxIntToInt64(v_1.AuxInt)
  2085  		if !(uint32(c) >= 8) {
  2086  			break
  2087  		}
  2088  		v.reset(OpMIPSMOVWconst)
  2089  		v.AuxInt = int32ToAuxInt(0)
  2090  		return true
  2091  	}
  2092  	return false
  2093  }
  2094  func rewriteValueMIPS_OpLsh8x8(v *Value) bool {
  2095  	v_1 := v.Args[1]
  2096  	v_0 := v.Args[0]
  2097  	b := v.Block
  2098  	typ := &b.Func.Config.Types
  2099  	// match: (Lsh8x8 <t> x y)
  2100  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  2101  	for {
  2102  		t := v.Type
  2103  		x := v_0
  2104  		y := v_1
  2105  		v.reset(OpMIPSCMOVZ)
  2106  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2107  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2108  		v1.AddArg(y)
  2109  		v0.AddArg2(x, v1)
  2110  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2111  		v2.AuxInt = int32ToAuxInt(0)
  2112  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2113  		v3.AuxInt = int32ToAuxInt(32)
  2114  		v3.AddArg(v1)
  2115  		v.AddArg3(v0, v2, v3)
  2116  		return true
  2117  	}
  2118  }
  2119  func rewriteValueMIPS_OpMIPSADD(v *Value) bool {
  2120  	v_1 := v.Args[1]
  2121  	v_0 := v.Args[0]
  2122  	// match: (ADD x (MOVWconst <t> [c]))
  2123  	// cond: !t.IsPtr()
  2124  	// result: (ADDconst [c] x)
  2125  	for {
  2126  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2127  			x := v_0
  2128  			if v_1.Op != OpMIPSMOVWconst {
  2129  				continue
  2130  			}
  2131  			t := v_1.Type
  2132  			c := auxIntToInt32(v_1.AuxInt)
  2133  			if !(!t.IsPtr()) {
  2134  				continue
  2135  			}
  2136  			v.reset(OpMIPSADDconst)
  2137  			v.AuxInt = int32ToAuxInt(c)
  2138  			v.AddArg(x)
  2139  			return true
  2140  		}
  2141  		break
  2142  	}
  2143  	// match: (ADD x (NEG y))
  2144  	// result: (SUB x y)
  2145  	for {
  2146  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2147  			x := v_0
  2148  			if v_1.Op != OpMIPSNEG {
  2149  				continue
  2150  			}
  2151  			y := v_1.Args[0]
  2152  			v.reset(OpMIPSSUB)
  2153  			v.AddArg2(x, y)
  2154  			return true
  2155  		}
  2156  		break
  2157  	}
  2158  	return false
  2159  }
  2160  func rewriteValueMIPS_OpMIPSADDconst(v *Value) bool {
  2161  	v_0 := v.Args[0]
  2162  	// match: (ADDconst [off1] (MOVWaddr [off2] {sym} ptr))
  2163  	// result: (MOVWaddr [off1+off2] {sym} ptr)
  2164  	for {
  2165  		off1 := auxIntToInt32(v.AuxInt)
  2166  		if v_0.Op != OpMIPSMOVWaddr {
  2167  			break
  2168  		}
  2169  		off2 := auxIntToInt32(v_0.AuxInt)
  2170  		sym := auxToSym(v_0.Aux)
  2171  		ptr := v_0.Args[0]
  2172  		v.reset(OpMIPSMOVWaddr)
  2173  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2174  		v.Aux = symToAux(sym)
  2175  		v.AddArg(ptr)
  2176  		return true
  2177  	}
  2178  	// match: (ADDconst [0] x)
  2179  	// result: x
  2180  	for {
  2181  		if auxIntToInt32(v.AuxInt) != 0 {
  2182  			break
  2183  		}
  2184  		x := v_0
  2185  		v.copyOf(x)
  2186  		return true
  2187  	}
  2188  	// match: (ADDconst [c] (MOVWconst [d]))
  2189  	// result: (MOVWconst [int32(c+d)])
  2190  	for {
  2191  		c := auxIntToInt32(v.AuxInt)
  2192  		if v_0.Op != OpMIPSMOVWconst {
  2193  			break
  2194  		}
  2195  		d := auxIntToInt32(v_0.AuxInt)
  2196  		v.reset(OpMIPSMOVWconst)
  2197  		v.AuxInt = int32ToAuxInt(int32(c + d))
  2198  		return true
  2199  	}
  2200  	// match: (ADDconst [c] (ADDconst [d] x))
  2201  	// result: (ADDconst [c+d] x)
  2202  	for {
  2203  		c := auxIntToInt32(v.AuxInt)
  2204  		if v_0.Op != OpMIPSADDconst {
  2205  			break
  2206  		}
  2207  		d := auxIntToInt32(v_0.AuxInt)
  2208  		x := v_0.Args[0]
  2209  		v.reset(OpMIPSADDconst)
  2210  		v.AuxInt = int32ToAuxInt(c + d)
  2211  		v.AddArg(x)
  2212  		return true
  2213  	}
  2214  	// match: (ADDconst [c] (SUBconst [d] x))
  2215  	// result: (ADDconst [c-d] x)
  2216  	for {
  2217  		c := auxIntToInt32(v.AuxInt)
  2218  		if v_0.Op != OpMIPSSUBconst {
  2219  			break
  2220  		}
  2221  		d := auxIntToInt32(v_0.AuxInt)
  2222  		x := v_0.Args[0]
  2223  		v.reset(OpMIPSADDconst)
  2224  		v.AuxInt = int32ToAuxInt(c - d)
  2225  		v.AddArg(x)
  2226  		return true
  2227  	}
  2228  	return false
  2229  }
  2230  func rewriteValueMIPS_OpMIPSAND(v *Value) bool {
  2231  	v_1 := v.Args[1]
  2232  	v_0 := v.Args[0]
  2233  	b := v.Block
  2234  	// match: (AND x (MOVWconst [c]))
  2235  	// result: (ANDconst [c] x)
  2236  	for {
  2237  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2238  			x := v_0
  2239  			if v_1.Op != OpMIPSMOVWconst {
  2240  				continue
  2241  			}
  2242  			c := auxIntToInt32(v_1.AuxInt)
  2243  			v.reset(OpMIPSANDconst)
  2244  			v.AuxInt = int32ToAuxInt(c)
  2245  			v.AddArg(x)
  2246  			return true
  2247  		}
  2248  		break
  2249  	}
  2250  	// match: (AND x x)
  2251  	// result: x
  2252  	for {
  2253  		x := v_0
  2254  		if x != v_1 {
  2255  			break
  2256  		}
  2257  		v.copyOf(x)
  2258  		return true
  2259  	}
  2260  	// match: (AND (SGTUconst [1] x) (SGTUconst [1] y))
  2261  	// result: (SGTUconst [1] (OR <x.Type> x y))
  2262  	for {
  2263  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2264  			if v_0.Op != OpMIPSSGTUconst || auxIntToInt32(v_0.AuxInt) != 1 {
  2265  				continue
  2266  			}
  2267  			x := v_0.Args[0]
  2268  			if v_1.Op != OpMIPSSGTUconst || auxIntToInt32(v_1.AuxInt) != 1 {
  2269  				continue
  2270  			}
  2271  			y := v_1.Args[0]
  2272  			v.reset(OpMIPSSGTUconst)
  2273  			v.AuxInt = int32ToAuxInt(1)
  2274  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  2275  			v0.AddArg2(x, y)
  2276  			v.AddArg(v0)
  2277  			return true
  2278  		}
  2279  		break
  2280  	}
  2281  	return false
  2282  }
  2283  func rewriteValueMIPS_OpMIPSANDconst(v *Value) bool {
  2284  	v_0 := v.Args[0]
  2285  	// match: (ANDconst [0] _)
  2286  	// result: (MOVWconst [0])
  2287  	for {
  2288  		if auxIntToInt32(v.AuxInt) != 0 {
  2289  			break
  2290  		}
  2291  		v.reset(OpMIPSMOVWconst)
  2292  		v.AuxInt = int32ToAuxInt(0)
  2293  		return true
  2294  	}
  2295  	// match: (ANDconst [-1] x)
  2296  	// result: x
  2297  	for {
  2298  		if auxIntToInt32(v.AuxInt) != -1 {
  2299  			break
  2300  		}
  2301  		x := v_0
  2302  		v.copyOf(x)
  2303  		return true
  2304  	}
  2305  	// match: (ANDconst [c] (MOVWconst [d]))
  2306  	// result: (MOVWconst [c&d])
  2307  	for {
  2308  		c := auxIntToInt32(v.AuxInt)
  2309  		if v_0.Op != OpMIPSMOVWconst {
  2310  			break
  2311  		}
  2312  		d := auxIntToInt32(v_0.AuxInt)
  2313  		v.reset(OpMIPSMOVWconst)
  2314  		v.AuxInt = int32ToAuxInt(c & d)
  2315  		return true
  2316  	}
  2317  	// match: (ANDconst [c] (ANDconst [d] x))
  2318  	// result: (ANDconst [c&d] x)
  2319  	for {
  2320  		c := auxIntToInt32(v.AuxInt)
  2321  		if v_0.Op != OpMIPSANDconst {
  2322  			break
  2323  		}
  2324  		d := auxIntToInt32(v_0.AuxInt)
  2325  		x := v_0.Args[0]
  2326  		v.reset(OpMIPSANDconst)
  2327  		v.AuxInt = int32ToAuxInt(c & d)
  2328  		v.AddArg(x)
  2329  		return true
  2330  	}
  2331  	return false
  2332  }
  2333  func rewriteValueMIPS_OpMIPSCMOVZ(v *Value) bool {
  2334  	v_2 := v.Args[2]
  2335  	v_1 := v.Args[1]
  2336  	v_0 := v.Args[0]
  2337  	// match: (CMOVZ _ f (MOVWconst [0]))
  2338  	// result: f
  2339  	for {
  2340  		f := v_1
  2341  		if v_2.Op != OpMIPSMOVWconst || auxIntToInt32(v_2.AuxInt) != 0 {
  2342  			break
  2343  		}
  2344  		v.copyOf(f)
  2345  		return true
  2346  	}
  2347  	// match: (CMOVZ a _ (MOVWconst [c]))
  2348  	// cond: c!=0
  2349  	// result: a
  2350  	for {
  2351  		a := v_0
  2352  		if v_2.Op != OpMIPSMOVWconst {
  2353  			break
  2354  		}
  2355  		c := auxIntToInt32(v_2.AuxInt)
  2356  		if !(c != 0) {
  2357  			break
  2358  		}
  2359  		v.copyOf(a)
  2360  		return true
  2361  	}
  2362  	// match: (CMOVZ a (MOVWconst [0]) c)
  2363  	// result: (CMOVZzero a c)
  2364  	for {
  2365  		a := v_0
  2366  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2367  			break
  2368  		}
  2369  		c := v_2
  2370  		v.reset(OpMIPSCMOVZzero)
  2371  		v.AddArg2(a, c)
  2372  		return true
  2373  	}
  2374  	return false
  2375  }
  2376  func rewriteValueMIPS_OpMIPSCMOVZzero(v *Value) bool {
  2377  	v_1 := v.Args[1]
  2378  	v_0 := v.Args[0]
  2379  	// match: (CMOVZzero _ (MOVWconst [0]))
  2380  	// result: (MOVWconst [0])
  2381  	for {
  2382  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2383  			break
  2384  		}
  2385  		v.reset(OpMIPSMOVWconst)
  2386  		v.AuxInt = int32ToAuxInt(0)
  2387  		return true
  2388  	}
  2389  	// match: (CMOVZzero a (MOVWconst [c]))
  2390  	// cond: c!=0
  2391  	// result: a
  2392  	for {
  2393  		a := v_0
  2394  		if v_1.Op != OpMIPSMOVWconst {
  2395  			break
  2396  		}
  2397  		c := auxIntToInt32(v_1.AuxInt)
  2398  		if !(c != 0) {
  2399  			break
  2400  		}
  2401  		v.copyOf(a)
  2402  		return true
  2403  	}
  2404  	return false
  2405  }
  2406  func rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v *Value) bool {
  2407  	v_2 := v.Args[2]
  2408  	v_1 := v.Args[1]
  2409  	v_0 := v.Args[0]
  2410  	// match: (LoweredAtomicAdd ptr (MOVWconst [c]) mem)
  2411  	// cond: is16Bit(int64(c))
  2412  	// result: (LoweredAtomicAddconst [c] ptr mem)
  2413  	for {
  2414  		ptr := v_0
  2415  		if v_1.Op != OpMIPSMOVWconst {
  2416  			break
  2417  		}
  2418  		c := auxIntToInt32(v_1.AuxInt)
  2419  		mem := v_2
  2420  		if !(is16Bit(int64(c))) {
  2421  			break
  2422  		}
  2423  		v.reset(OpMIPSLoweredAtomicAddconst)
  2424  		v.AuxInt = int32ToAuxInt(c)
  2425  		v.AddArg2(ptr, mem)
  2426  		return true
  2427  	}
  2428  	return false
  2429  }
  2430  func rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v *Value) bool {
  2431  	v_2 := v.Args[2]
  2432  	v_1 := v.Args[1]
  2433  	v_0 := v.Args[0]
  2434  	// match: (LoweredAtomicStore32 ptr (MOVWconst [0]) mem)
  2435  	// result: (LoweredAtomicStorezero ptr mem)
  2436  	for {
  2437  		ptr := v_0
  2438  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2439  			break
  2440  		}
  2441  		mem := v_2
  2442  		v.reset(OpMIPSLoweredAtomicStorezero)
  2443  		v.AddArg2(ptr, mem)
  2444  		return true
  2445  	}
  2446  	return false
  2447  }
  2448  func rewriteValueMIPS_OpMIPSLoweredPanicBoundsRC(v *Value) bool {
  2449  	v_1 := v.Args[1]
  2450  	v_0 := v.Args[0]
  2451  	// match: (LoweredPanicBoundsRC [kind] {p} (MOVWconst [c]) mem)
  2452  	// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:int64(c), Cy:p.C}} mem)
  2453  	for {
  2454  		kind := auxIntToInt64(v.AuxInt)
  2455  		p := auxToPanicBoundsC(v.Aux)
  2456  		if v_0.Op != OpMIPSMOVWconst {
  2457  			break
  2458  		}
  2459  		c := auxIntToInt32(v_0.AuxInt)
  2460  		mem := v_1
  2461  		v.reset(OpMIPSLoweredPanicBoundsCC)
  2462  		v.AuxInt = int64ToAuxInt(kind)
  2463  		v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: int64(c), Cy: p.C})
  2464  		v.AddArg(mem)
  2465  		return true
  2466  	}
  2467  	return false
  2468  }
  2469  func rewriteValueMIPS_OpMIPSLoweredPanicBoundsRR(v *Value) bool {
  2470  	v_2 := v.Args[2]
  2471  	v_1 := v.Args[1]
  2472  	v_0 := v.Args[0]
  2473  	// match: (LoweredPanicBoundsRR [kind] x (MOVWconst [c]) mem)
  2474  	// result: (LoweredPanicBoundsRC [kind] x {PanicBoundsC{C:int64(c)}} mem)
  2475  	for {
  2476  		kind := auxIntToInt64(v.AuxInt)
  2477  		x := v_0
  2478  		if v_1.Op != OpMIPSMOVWconst {
  2479  			break
  2480  		}
  2481  		c := auxIntToInt32(v_1.AuxInt)
  2482  		mem := v_2
  2483  		v.reset(OpMIPSLoweredPanicBoundsRC)
  2484  		v.AuxInt = int64ToAuxInt(kind)
  2485  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(c)})
  2486  		v.AddArg2(x, mem)
  2487  		return true
  2488  	}
  2489  	// match: (LoweredPanicBoundsRR [kind] (MOVWconst [c]) y mem)
  2490  	// result: (LoweredPanicBoundsCR [kind] {PanicBoundsC{C:int64(c)}} y mem)
  2491  	for {
  2492  		kind := auxIntToInt64(v.AuxInt)
  2493  		if v_0.Op != OpMIPSMOVWconst {
  2494  			break
  2495  		}
  2496  		c := auxIntToInt32(v_0.AuxInt)
  2497  		y := v_1
  2498  		mem := v_2
  2499  		v.reset(OpMIPSLoweredPanicBoundsCR)
  2500  		v.AuxInt = int64ToAuxInt(kind)
  2501  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(c)})
  2502  		v.AddArg2(y, mem)
  2503  		return true
  2504  	}
  2505  	return false
  2506  }
  2507  func rewriteValueMIPS_OpMIPSLoweredPanicExtendRC(v *Value) bool {
  2508  	v_2 := v.Args[2]
  2509  	v_1 := v.Args[1]
  2510  	v_0 := v.Args[0]
  2511  	// match: (LoweredPanicExtendRC [kind] {p} (MOVWconst [hi]) (MOVWconst [lo]) mem)
  2512  	// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:int64(hi)<<32+int64(uint32(lo)), Cy:p.C}} mem)
  2513  	for {
  2514  		kind := auxIntToInt64(v.AuxInt)
  2515  		p := auxToPanicBoundsC(v.Aux)
  2516  		if v_0.Op != OpMIPSMOVWconst {
  2517  			break
  2518  		}
  2519  		hi := auxIntToInt32(v_0.AuxInt)
  2520  		if v_1.Op != OpMIPSMOVWconst {
  2521  			break
  2522  		}
  2523  		lo := auxIntToInt32(v_1.AuxInt)
  2524  		mem := v_2
  2525  		v.reset(OpMIPSLoweredPanicBoundsCC)
  2526  		v.AuxInt = int64ToAuxInt(kind)
  2527  		v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: int64(hi)<<32 + int64(uint32(lo)), Cy: p.C})
  2528  		v.AddArg(mem)
  2529  		return true
  2530  	}
  2531  	return false
  2532  }
  2533  func rewriteValueMIPS_OpMIPSLoweredPanicExtendRR(v *Value) bool {
  2534  	v_3 := v.Args[3]
  2535  	v_2 := v.Args[2]
  2536  	v_1 := v.Args[1]
  2537  	v_0 := v.Args[0]
  2538  	// match: (LoweredPanicExtendRR [kind] hi lo (MOVWconst [c]) mem)
  2539  	// result: (LoweredPanicExtendRC [kind] hi lo {PanicBoundsC{C:int64(c)}} mem)
  2540  	for {
  2541  		kind := auxIntToInt64(v.AuxInt)
  2542  		hi := v_0
  2543  		lo := v_1
  2544  		if v_2.Op != OpMIPSMOVWconst {
  2545  			break
  2546  		}
  2547  		c := auxIntToInt32(v_2.AuxInt)
  2548  		mem := v_3
  2549  		v.reset(OpMIPSLoweredPanicExtendRC)
  2550  		v.AuxInt = int64ToAuxInt(kind)
  2551  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(c)})
  2552  		v.AddArg3(hi, lo, mem)
  2553  		return true
  2554  	}
  2555  	// match: (LoweredPanicExtendRR [kind] (MOVWconst [hi]) (MOVWconst [lo]) y mem)
  2556  	// result: (LoweredPanicBoundsCR [kind] {PanicBoundsC{C:int64(hi)<<32 + int64(uint32(lo))}} y mem)
  2557  	for {
  2558  		kind := auxIntToInt64(v.AuxInt)
  2559  		if v_0.Op != OpMIPSMOVWconst {
  2560  			break
  2561  		}
  2562  		hi := auxIntToInt32(v_0.AuxInt)
  2563  		if v_1.Op != OpMIPSMOVWconst {
  2564  			break
  2565  		}
  2566  		lo := auxIntToInt32(v_1.AuxInt)
  2567  		y := v_2
  2568  		mem := v_3
  2569  		v.reset(OpMIPSLoweredPanicBoundsCR)
  2570  		v.AuxInt = int64ToAuxInt(kind)
  2571  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(hi)<<32 + int64(uint32(lo))})
  2572  		v.AddArg2(y, mem)
  2573  		return true
  2574  	}
  2575  	return false
  2576  }
  2577  func rewriteValueMIPS_OpMIPSMOVBUload(v *Value) bool {
  2578  	v_1 := v.Args[1]
  2579  	v_0 := v.Args[0]
  2580  	// match: (MOVBUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2581  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2582  	// result: (MOVBUload [off1+off2] {sym} ptr mem)
  2583  	for {
  2584  		off1 := auxIntToInt32(v.AuxInt)
  2585  		sym := auxToSym(v.Aux)
  2586  		x := v_0
  2587  		if x.Op != OpMIPSADDconst {
  2588  			break
  2589  		}
  2590  		off2 := auxIntToInt32(x.AuxInt)
  2591  		ptr := x.Args[0]
  2592  		mem := v_1
  2593  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2594  			break
  2595  		}
  2596  		v.reset(OpMIPSMOVBUload)
  2597  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2598  		v.Aux = symToAux(sym)
  2599  		v.AddArg2(ptr, mem)
  2600  		return true
  2601  	}
  2602  	// match: (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2603  	// cond: canMergeSym(sym1,sym2)
  2604  	// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2605  	for {
  2606  		off1 := auxIntToInt32(v.AuxInt)
  2607  		sym1 := auxToSym(v.Aux)
  2608  		if v_0.Op != OpMIPSMOVWaddr {
  2609  			break
  2610  		}
  2611  		off2 := auxIntToInt32(v_0.AuxInt)
  2612  		sym2 := auxToSym(v_0.Aux)
  2613  		ptr := v_0.Args[0]
  2614  		mem := v_1
  2615  		if !(canMergeSym(sym1, sym2)) {
  2616  			break
  2617  		}
  2618  		v.reset(OpMIPSMOVBUload)
  2619  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2620  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2621  		v.AddArg2(ptr, mem)
  2622  		return true
  2623  	}
  2624  	// match: (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2625  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2626  	// result: (MOVBUreg x)
  2627  	for {
  2628  		off := auxIntToInt32(v.AuxInt)
  2629  		sym := auxToSym(v.Aux)
  2630  		ptr := v_0
  2631  		if v_1.Op != OpMIPSMOVBstore {
  2632  			break
  2633  		}
  2634  		off2 := auxIntToInt32(v_1.AuxInt)
  2635  		sym2 := auxToSym(v_1.Aux)
  2636  		x := v_1.Args[1]
  2637  		ptr2 := v_1.Args[0]
  2638  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2639  			break
  2640  		}
  2641  		v.reset(OpMIPSMOVBUreg)
  2642  		v.AddArg(x)
  2643  		return true
  2644  	}
  2645  	return false
  2646  }
  2647  func rewriteValueMIPS_OpMIPSMOVBUreg(v *Value) bool {
  2648  	v_0 := v.Args[0]
  2649  	b := v.Block
  2650  	// match: (MOVBUreg x:(MOVBUload _ _))
  2651  	// result: (MOVWreg x)
  2652  	for {
  2653  		x := v_0
  2654  		if x.Op != OpMIPSMOVBUload {
  2655  			break
  2656  		}
  2657  		v.reset(OpMIPSMOVWreg)
  2658  		v.AddArg(x)
  2659  		return true
  2660  	}
  2661  	// match: (MOVBUreg x:(MOVBUreg _))
  2662  	// result: (MOVWreg x)
  2663  	for {
  2664  		x := v_0
  2665  		if x.Op != OpMIPSMOVBUreg {
  2666  			break
  2667  		}
  2668  		v.reset(OpMIPSMOVWreg)
  2669  		v.AddArg(x)
  2670  		return true
  2671  	}
  2672  	// match: (MOVBUreg <t> x:(MOVBload [off] {sym} ptr mem))
  2673  	// cond: x.Uses == 1 && clobber(x)
  2674  	// result: @x.Block (MOVBUload <t> [off] {sym} ptr mem)
  2675  	for {
  2676  		t := v.Type
  2677  		x := v_0
  2678  		if x.Op != OpMIPSMOVBload {
  2679  			break
  2680  		}
  2681  		off := auxIntToInt32(x.AuxInt)
  2682  		sym := auxToSym(x.Aux)
  2683  		mem := x.Args[1]
  2684  		ptr := x.Args[0]
  2685  		if !(x.Uses == 1 && clobber(x)) {
  2686  			break
  2687  		}
  2688  		b = x.Block
  2689  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBUload, t)
  2690  		v.copyOf(v0)
  2691  		v0.AuxInt = int32ToAuxInt(off)
  2692  		v0.Aux = symToAux(sym)
  2693  		v0.AddArg2(ptr, mem)
  2694  		return true
  2695  	}
  2696  	// match: (MOVBUreg (ANDconst [c] x))
  2697  	// result: (ANDconst [c&0xff] x)
  2698  	for {
  2699  		if v_0.Op != OpMIPSANDconst {
  2700  			break
  2701  		}
  2702  		c := auxIntToInt32(v_0.AuxInt)
  2703  		x := v_0.Args[0]
  2704  		v.reset(OpMIPSANDconst)
  2705  		v.AuxInt = int32ToAuxInt(c & 0xff)
  2706  		v.AddArg(x)
  2707  		return true
  2708  	}
  2709  	// match: (MOVBUreg (MOVWconst [c]))
  2710  	// result: (MOVWconst [int32(uint8(c))])
  2711  	for {
  2712  		if v_0.Op != OpMIPSMOVWconst {
  2713  			break
  2714  		}
  2715  		c := auxIntToInt32(v_0.AuxInt)
  2716  		v.reset(OpMIPSMOVWconst)
  2717  		v.AuxInt = int32ToAuxInt(int32(uint8(c)))
  2718  		return true
  2719  	}
  2720  	return false
  2721  }
  2722  func rewriteValueMIPS_OpMIPSMOVBload(v *Value) bool {
  2723  	v_1 := v.Args[1]
  2724  	v_0 := v.Args[0]
  2725  	// match: (MOVBload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2726  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2727  	// result: (MOVBload [off1+off2] {sym} ptr mem)
  2728  	for {
  2729  		off1 := auxIntToInt32(v.AuxInt)
  2730  		sym := auxToSym(v.Aux)
  2731  		x := v_0
  2732  		if x.Op != OpMIPSADDconst {
  2733  			break
  2734  		}
  2735  		off2 := auxIntToInt32(x.AuxInt)
  2736  		ptr := x.Args[0]
  2737  		mem := v_1
  2738  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2739  			break
  2740  		}
  2741  		v.reset(OpMIPSMOVBload)
  2742  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2743  		v.Aux = symToAux(sym)
  2744  		v.AddArg2(ptr, mem)
  2745  		return true
  2746  	}
  2747  	// match: (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2748  	// cond: canMergeSym(sym1,sym2)
  2749  	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2750  	for {
  2751  		off1 := auxIntToInt32(v.AuxInt)
  2752  		sym1 := auxToSym(v.Aux)
  2753  		if v_0.Op != OpMIPSMOVWaddr {
  2754  			break
  2755  		}
  2756  		off2 := auxIntToInt32(v_0.AuxInt)
  2757  		sym2 := auxToSym(v_0.Aux)
  2758  		ptr := v_0.Args[0]
  2759  		mem := v_1
  2760  		if !(canMergeSym(sym1, sym2)) {
  2761  			break
  2762  		}
  2763  		v.reset(OpMIPSMOVBload)
  2764  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2765  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2766  		v.AddArg2(ptr, mem)
  2767  		return true
  2768  	}
  2769  	// match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2770  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2771  	// result: (MOVBreg x)
  2772  	for {
  2773  		off := auxIntToInt32(v.AuxInt)
  2774  		sym := auxToSym(v.Aux)
  2775  		ptr := v_0
  2776  		if v_1.Op != OpMIPSMOVBstore {
  2777  			break
  2778  		}
  2779  		off2 := auxIntToInt32(v_1.AuxInt)
  2780  		sym2 := auxToSym(v_1.Aux)
  2781  		x := v_1.Args[1]
  2782  		ptr2 := v_1.Args[0]
  2783  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2784  			break
  2785  		}
  2786  		v.reset(OpMIPSMOVBreg)
  2787  		v.AddArg(x)
  2788  		return true
  2789  	}
  2790  	return false
  2791  }
  2792  func rewriteValueMIPS_OpMIPSMOVBreg(v *Value) bool {
  2793  	v_0 := v.Args[0]
  2794  	b := v.Block
  2795  	// match: (MOVBreg x:(MOVBload _ _))
  2796  	// result: (MOVWreg x)
  2797  	for {
  2798  		x := v_0
  2799  		if x.Op != OpMIPSMOVBload {
  2800  			break
  2801  		}
  2802  		v.reset(OpMIPSMOVWreg)
  2803  		v.AddArg(x)
  2804  		return true
  2805  	}
  2806  	// match: (MOVBreg x:(MOVBreg _))
  2807  	// result: (MOVWreg x)
  2808  	for {
  2809  		x := v_0
  2810  		if x.Op != OpMIPSMOVBreg {
  2811  			break
  2812  		}
  2813  		v.reset(OpMIPSMOVWreg)
  2814  		v.AddArg(x)
  2815  		return true
  2816  	}
  2817  	// match: (MOVBreg <t> x:(MOVBUload [off] {sym} ptr mem))
  2818  	// cond: x.Uses == 1 && clobber(x)
  2819  	// result: @x.Block (MOVBload <t> [off] {sym} ptr mem)
  2820  	for {
  2821  		t := v.Type
  2822  		x := v_0
  2823  		if x.Op != OpMIPSMOVBUload {
  2824  			break
  2825  		}
  2826  		off := auxIntToInt32(x.AuxInt)
  2827  		sym := auxToSym(x.Aux)
  2828  		mem := x.Args[1]
  2829  		ptr := x.Args[0]
  2830  		if !(x.Uses == 1 && clobber(x)) {
  2831  			break
  2832  		}
  2833  		b = x.Block
  2834  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBload, t)
  2835  		v.copyOf(v0)
  2836  		v0.AuxInt = int32ToAuxInt(off)
  2837  		v0.Aux = symToAux(sym)
  2838  		v0.AddArg2(ptr, mem)
  2839  		return true
  2840  	}
  2841  	// match: (MOVBreg (ANDconst [c] x))
  2842  	// cond: c & 0x80 == 0
  2843  	// result: (ANDconst [c&0x7f] x)
  2844  	for {
  2845  		if v_0.Op != OpMIPSANDconst {
  2846  			break
  2847  		}
  2848  		c := auxIntToInt32(v_0.AuxInt)
  2849  		x := v_0.Args[0]
  2850  		if !(c&0x80 == 0) {
  2851  			break
  2852  		}
  2853  		v.reset(OpMIPSANDconst)
  2854  		v.AuxInt = int32ToAuxInt(c & 0x7f)
  2855  		v.AddArg(x)
  2856  		return true
  2857  	}
  2858  	// match: (MOVBreg (MOVWconst [c]))
  2859  	// result: (MOVWconst [int32(int8(c))])
  2860  	for {
  2861  		if v_0.Op != OpMIPSMOVWconst {
  2862  			break
  2863  		}
  2864  		c := auxIntToInt32(v_0.AuxInt)
  2865  		v.reset(OpMIPSMOVWconst)
  2866  		v.AuxInt = int32ToAuxInt(int32(int8(c)))
  2867  		return true
  2868  	}
  2869  	return false
  2870  }
  2871  func rewriteValueMIPS_OpMIPSMOVBstore(v *Value) bool {
  2872  	v_2 := v.Args[2]
  2873  	v_1 := v.Args[1]
  2874  	v_0 := v.Args[0]
  2875  	// match: (MOVBstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  2876  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2877  	// result: (MOVBstore [off1+off2] {sym} ptr val mem)
  2878  	for {
  2879  		off1 := auxIntToInt32(v.AuxInt)
  2880  		sym := auxToSym(v.Aux)
  2881  		x := v_0
  2882  		if x.Op != OpMIPSADDconst {
  2883  			break
  2884  		}
  2885  		off2 := auxIntToInt32(x.AuxInt)
  2886  		ptr := x.Args[0]
  2887  		val := v_1
  2888  		mem := v_2
  2889  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2890  			break
  2891  		}
  2892  		v.reset(OpMIPSMOVBstore)
  2893  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2894  		v.Aux = symToAux(sym)
  2895  		v.AddArg3(ptr, val, mem)
  2896  		return true
  2897  	}
  2898  	// match: (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  2899  	// cond: canMergeSym(sym1,sym2)
  2900  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  2901  	for {
  2902  		off1 := auxIntToInt32(v.AuxInt)
  2903  		sym1 := auxToSym(v.Aux)
  2904  		if v_0.Op != OpMIPSMOVWaddr {
  2905  			break
  2906  		}
  2907  		off2 := auxIntToInt32(v_0.AuxInt)
  2908  		sym2 := auxToSym(v_0.Aux)
  2909  		ptr := v_0.Args[0]
  2910  		val := v_1
  2911  		mem := v_2
  2912  		if !(canMergeSym(sym1, sym2)) {
  2913  			break
  2914  		}
  2915  		v.reset(OpMIPSMOVBstore)
  2916  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2917  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2918  		v.AddArg3(ptr, val, mem)
  2919  		return true
  2920  	}
  2921  	// match: (MOVBstore [off] {sym} ptr (MOVWconst [0]) mem)
  2922  	// result: (MOVBstorezero [off] {sym} ptr mem)
  2923  	for {
  2924  		off := auxIntToInt32(v.AuxInt)
  2925  		sym := auxToSym(v.Aux)
  2926  		ptr := v_0
  2927  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2928  			break
  2929  		}
  2930  		mem := v_2
  2931  		v.reset(OpMIPSMOVBstorezero)
  2932  		v.AuxInt = int32ToAuxInt(off)
  2933  		v.Aux = symToAux(sym)
  2934  		v.AddArg2(ptr, mem)
  2935  		return true
  2936  	}
  2937  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  2938  	// result: (MOVBstore [off] {sym} ptr x mem)
  2939  	for {
  2940  		off := auxIntToInt32(v.AuxInt)
  2941  		sym := auxToSym(v.Aux)
  2942  		ptr := v_0
  2943  		if v_1.Op != OpMIPSMOVBreg {
  2944  			break
  2945  		}
  2946  		x := v_1.Args[0]
  2947  		mem := v_2
  2948  		v.reset(OpMIPSMOVBstore)
  2949  		v.AuxInt = int32ToAuxInt(off)
  2950  		v.Aux = symToAux(sym)
  2951  		v.AddArg3(ptr, x, mem)
  2952  		return true
  2953  	}
  2954  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  2955  	// result: (MOVBstore [off] {sym} ptr x mem)
  2956  	for {
  2957  		off := auxIntToInt32(v.AuxInt)
  2958  		sym := auxToSym(v.Aux)
  2959  		ptr := v_0
  2960  		if v_1.Op != OpMIPSMOVBUreg {
  2961  			break
  2962  		}
  2963  		x := v_1.Args[0]
  2964  		mem := v_2
  2965  		v.reset(OpMIPSMOVBstore)
  2966  		v.AuxInt = int32ToAuxInt(off)
  2967  		v.Aux = symToAux(sym)
  2968  		v.AddArg3(ptr, x, mem)
  2969  		return true
  2970  	}
  2971  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  2972  	// result: (MOVBstore [off] {sym} ptr x mem)
  2973  	for {
  2974  		off := auxIntToInt32(v.AuxInt)
  2975  		sym := auxToSym(v.Aux)
  2976  		ptr := v_0
  2977  		if v_1.Op != OpMIPSMOVHreg {
  2978  			break
  2979  		}
  2980  		x := v_1.Args[0]
  2981  		mem := v_2
  2982  		v.reset(OpMIPSMOVBstore)
  2983  		v.AuxInt = int32ToAuxInt(off)
  2984  		v.Aux = symToAux(sym)
  2985  		v.AddArg3(ptr, x, mem)
  2986  		return true
  2987  	}
  2988  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  2989  	// result: (MOVBstore [off] {sym} ptr x mem)
  2990  	for {
  2991  		off := auxIntToInt32(v.AuxInt)
  2992  		sym := auxToSym(v.Aux)
  2993  		ptr := v_0
  2994  		if v_1.Op != OpMIPSMOVHUreg {
  2995  			break
  2996  		}
  2997  		x := v_1.Args[0]
  2998  		mem := v_2
  2999  		v.reset(OpMIPSMOVBstore)
  3000  		v.AuxInt = int32ToAuxInt(off)
  3001  		v.Aux = symToAux(sym)
  3002  		v.AddArg3(ptr, x, mem)
  3003  		return true
  3004  	}
  3005  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  3006  	// result: (MOVBstore [off] {sym} ptr x mem)
  3007  	for {
  3008  		off := auxIntToInt32(v.AuxInt)
  3009  		sym := auxToSym(v.Aux)
  3010  		ptr := v_0
  3011  		if v_1.Op != OpMIPSMOVWreg {
  3012  			break
  3013  		}
  3014  		x := v_1.Args[0]
  3015  		mem := v_2
  3016  		v.reset(OpMIPSMOVBstore)
  3017  		v.AuxInt = int32ToAuxInt(off)
  3018  		v.Aux = symToAux(sym)
  3019  		v.AddArg3(ptr, x, mem)
  3020  		return true
  3021  	}
  3022  	return false
  3023  }
  3024  func rewriteValueMIPS_OpMIPSMOVBstorezero(v *Value) bool {
  3025  	v_1 := v.Args[1]
  3026  	v_0 := v.Args[0]
  3027  	// match: (MOVBstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3028  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3029  	// result: (MOVBstorezero [off1+off2] {sym} ptr mem)
  3030  	for {
  3031  		off1 := auxIntToInt32(v.AuxInt)
  3032  		sym := auxToSym(v.Aux)
  3033  		x := v_0
  3034  		if x.Op != OpMIPSADDconst {
  3035  			break
  3036  		}
  3037  		off2 := auxIntToInt32(x.AuxInt)
  3038  		ptr := x.Args[0]
  3039  		mem := v_1
  3040  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3041  			break
  3042  		}
  3043  		v.reset(OpMIPSMOVBstorezero)
  3044  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3045  		v.Aux = symToAux(sym)
  3046  		v.AddArg2(ptr, mem)
  3047  		return true
  3048  	}
  3049  	// match: (MOVBstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3050  	// cond: canMergeSym(sym1,sym2)
  3051  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3052  	for {
  3053  		off1 := auxIntToInt32(v.AuxInt)
  3054  		sym1 := auxToSym(v.Aux)
  3055  		if v_0.Op != OpMIPSMOVWaddr {
  3056  			break
  3057  		}
  3058  		off2 := auxIntToInt32(v_0.AuxInt)
  3059  		sym2 := auxToSym(v_0.Aux)
  3060  		ptr := v_0.Args[0]
  3061  		mem := v_1
  3062  		if !(canMergeSym(sym1, sym2)) {
  3063  			break
  3064  		}
  3065  		v.reset(OpMIPSMOVBstorezero)
  3066  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3067  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3068  		v.AddArg2(ptr, mem)
  3069  		return true
  3070  	}
  3071  	return false
  3072  }
  3073  func rewriteValueMIPS_OpMIPSMOVDload(v *Value) bool {
  3074  	v_1 := v.Args[1]
  3075  	v_0 := v.Args[0]
  3076  	// match: (MOVDload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3077  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3078  	// result: (MOVDload [off1+off2] {sym} ptr mem)
  3079  	for {
  3080  		off1 := auxIntToInt32(v.AuxInt)
  3081  		sym := auxToSym(v.Aux)
  3082  		x := v_0
  3083  		if x.Op != OpMIPSADDconst {
  3084  			break
  3085  		}
  3086  		off2 := auxIntToInt32(x.AuxInt)
  3087  		ptr := x.Args[0]
  3088  		mem := v_1
  3089  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3090  			break
  3091  		}
  3092  		v.reset(OpMIPSMOVDload)
  3093  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3094  		v.Aux = symToAux(sym)
  3095  		v.AddArg2(ptr, mem)
  3096  		return true
  3097  	}
  3098  	// match: (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3099  	// cond: canMergeSym(sym1,sym2)
  3100  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3101  	for {
  3102  		off1 := auxIntToInt32(v.AuxInt)
  3103  		sym1 := auxToSym(v.Aux)
  3104  		if v_0.Op != OpMIPSMOVWaddr {
  3105  			break
  3106  		}
  3107  		off2 := auxIntToInt32(v_0.AuxInt)
  3108  		sym2 := auxToSym(v_0.Aux)
  3109  		ptr := v_0.Args[0]
  3110  		mem := v_1
  3111  		if !(canMergeSym(sym1, sym2)) {
  3112  			break
  3113  		}
  3114  		v.reset(OpMIPSMOVDload)
  3115  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3116  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3117  		v.AddArg2(ptr, mem)
  3118  		return true
  3119  	}
  3120  	// match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _))
  3121  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3122  	// result: x
  3123  	for {
  3124  		off := auxIntToInt32(v.AuxInt)
  3125  		sym := auxToSym(v.Aux)
  3126  		ptr := v_0
  3127  		if v_1.Op != OpMIPSMOVDstore {
  3128  			break
  3129  		}
  3130  		off2 := auxIntToInt32(v_1.AuxInt)
  3131  		sym2 := auxToSym(v_1.Aux)
  3132  		x := v_1.Args[1]
  3133  		ptr2 := v_1.Args[0]
  3134  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3135  			break
  3136  		}
  3137  		v.copyOf(x)
  3138  		return true
  3139  	}
  3140  	return false
  3141  }
  3142  func rewriteValueMIPS_OpMIPSMOVDstore(v *Value) bool {
  3143  	v_2 := v.Args[2]
  3144  	v_1 := v.Args[1]
  3145  	v_0 := v.Args[0]
  3146  	// match: (MOVDstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3147  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3148  	// result: (MOVDstore [off1+off2] {sym} ptr val mem)
  3149  	for {
  3150  		off1 := auxIntToInt32(v.AuxInt)
  3151  		sym := auxToSym(v.Aux)
  3152  		x := v_0
  3153  		if x.Op != OpMIPSADDconst {
  3154  			break
  3155  		}
  3156  		off2 := auxIntToInt32(x.AuxInt)
  3157  		ptr := x.Args[0]
  3158  		val := v_1
  3159  		mem := v_2
  3160  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3161  			break
  3162  		}
  3163  		v.reset(OpMIPSMOVDstore)
  3164  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3165  		v.Aux = symToAux(sym)
  3166  		v.AddArg3(ptr, val, mem)
  3167  		return true
  3168  	}
  3169  	// match: (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3170  	// cond: canMergeSym(sym1,sym2)
  3171  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3172  	for {
  3173  		off1 := auxIntToInt32(v.AuxInt)
  3174  		sym1 := auxToSym(v.Aux)
  3175  		if v_0.Op != OpMIPSMOVWaddr {
  3176  			break
  3177  		}
  3178  		off2 := auxIntToInt32(v_0.AuxInt)
  3179  		sym2 := auxToSym(v_0.Aux)
  3180  		ptr := v_0.Args[0]
  3181  		val := v_1
  3182  		mem := v_2
  3183  		if !(canMergeSym(sym1, sym2)) {
  3184  			break
  3185  		}
  3186  		v.reset(OpMIPSMOVDstore)
  3187  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3188  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3189  		v.AddArg3(ptr, val, mem)
  3190  		return true
  3191  	}
  3192  	return false
  3193  }
  3194  func rewriteValueMIPS_OpMIPSMOVFload(v *Value) bool {
  3195  	v_1 := v.Args[1]
  3196  	v_0 := v.Args[0]
  3197  	// match: (MOVFload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  3198  	// result: (MOVWgpfp val)
  3199  	for {
  3200  		off := auxIntToInt32(v.AuxInt)
  3201  		sym := auxToSym(v.Aux)
  3202  		ptr := v_0
  3203  		if v_1.Op != OpMIPSMOVWstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3204  			break
  3205  		}
  3206  		val := v_1.Args[1]
  3207  		if ptr != v_1.Args[0] {
  3208  			break
  3209  		}
  3210  		v.reset(OpMIPSMOVWgpfp)
  3211  		v.AddArg(val)
  3212  		return true
  3213  	}
  3214  	// match: (MOVFload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3215  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3216  	// result: (MOVFload [off1+off2] {sym} ptr mem)
  3217  	for {
  3218  		off1 := auxIntToInt32(v.AuxInt)
  3219  		sym := auxToSym(v.Aux)
  3220  		x := v_0
  3221  		if x.Op != OpMIPSADDconst {
  3222  			break
  3223  		}
  3224  		off2 := auxIntToInt32(x.AuxInt)
  3225  		ptr := x.Args[0]
  3226  		mem := v_1
  3227  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3228  			break
  3229  		}
  3230  		v.reset(OpMIPSMOVFload)
  3231  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3232  		v.Aux = symToAux(sym)
  3233  		v.AddArg2(ptr, mem)
  3234  		return true
  3235  	}
  3236  	// match: (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3237  	// cond: canMergeSym(sym1,sym2)
  3238  	// result: (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3239  	for {
  3240  		off1 := auxIntToInt32(v.AuxInt)
  3241  		sym1 := auxToSym(v.Aux)
  3242  		if v_0.Op != OpMIPSMOVWaddr {
  3243  			break
  3244  		}
  3245  		off2 := auxIntToInt32(v_0.AuxInt)
  3246  		sym2 := auxToSym(v_0.Aux)
  3247  		ptr := v_0.Args[0]
  3248  		mem := v_1
  3249  		if !(canMergeSym(sym1, sym2)) {
  3250  			break
  3251  		}
  3252  		v.reset(OpMIPSMOVFload)
  3253  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3254  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3255  		v.AddArg2(ptr, mem)
  3256  		return true
  3257  	}
  3258  	// match: (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _))
  3259  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3260  	// result: x
  3261  	for {
  3262  		off := auxIntToInt32(v.AuxInt)
  3263  		sym := auxToSym(v.Aux)
  3264  		ptr := v_0
  3265  		if v_1.Op != OpMIPSMOVFstore {
  3266  			break
  3267  		}
  3268  		off2 := auxIntToInt32(v_1.AuxInt)
  3269  		sym2 := auxToSym(v_1.Aux)
  3270  		x := v_1.Args[1]
  3271  		ptr2 := v_1.Args[0]
  3272  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3273  			break
  3274  		}
  3275  		v.copyOf(x)
  3276  		return true
  3277  	}
  3278  	return false
  3279  }
  3280  func rewriteValueMIPS_OpMIPSMOVFstore(v *Value) bool {
  3281  	v_2 := v.Args[2]
  3282  	v_1 := v.Args[1]
  3283  	v_0 := v.Args[0]
  3284  	// match: (MOVFstore [off] {sym} ptr (MOVWgpfp val) mem)
  3285  	// result: (MOVWstore [off] {sym} ptr val mem)
  3286  	for {
  3287  		off := auxIntToInt32(v.AuxInt)
  3288  		sym := auxToSym(v.Aux)
  3289  		ptr := v_0
  3290  		if v_1.Op != OpMIPSMOVWgpfp {
  3291  			break
  3292  		}
  3293  		val := v_1.Args[0]
  3294  		mem := v_2
  3295  		v.reset(OpMIPSMOVWstore)
  3296  		v.AuxInt = int32ToAuxInt(off)
  3297  		v.Aux = symToAux(sym)
  3298  		v.AddArg3(ptr, val, mem)
  3299  		return true
  3300  	}
  3301  	// match: (MOVFstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3302  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3303  	// result: (MOVFstore [off1+off2] {sym} ptr val mem)
  3304  	for {
  3305  		off1 := auxIntToInt32(v.AuxInt)
  3306  		sym := auxToSym(v.Aux)
  3307  		x := v_0
  3308  		if x.Op != OpMIPSADDconst {
  3309  			break
  3310  		}
  3311  		off2 := auxIntToInt32(x.AuxInt)
  3312  		ptr := x.Args[0]
  3313  		val := v_1
  3314  		mem := v_2
  3315  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3316  			break
  3317  		}
  3318  		v.reset(OpMIPSMOVFstore)
  3319  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3320  		v.Aux = symToAux(sym)
  3321  		v.AddArg3(ptr, val, mem)
  3322  		return true
  3323  	}
  3324  	// match: (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3325  	// cond: canMergeSym(sym1,sym2)
  3326  	// result: (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3327  	for {
  3328  		off1 := auxIntToInt32(v.AuxInt)
  3329  		sym1 := auxToSym(v.Aux)
  3330  		if v_0.Op != OpMIPSMOVWaddr {
  3331  			break
  3332  		}
  3333  		off2 := auxIntToInt32(v_0.AuxInt)
  3334  		sym2 := auxToSym(v_0.Aux)
  3335  		ptr := v_0.Args[0]
  3336  		val := v_1
  3337  		mem := v_2
  3338  		if !(canMergeSym(sym1, sym2)) {
  3339  			break
  3340  		}
  3341  		v.reset(OpMIPSMOVFstore)
  3342  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3343  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3344  		v.AddArg3(ptr, val, mem)
  3345  		return true
  3346  	}
  3347  	return false
  3348  }
  3349  func rewriteValueMIPS_OpMIPSMOVHUload(v *Value) bool {
  3350  	v_1 := v.Args[1]
  3351  	v_0 := v.Args[0]
  3352  	// match: (MOVHUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3353  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3354  	// result: (MOVHUload [off1+off2] {sym} ptr mem)
  3355  	for {
  3356  		off1 := auxIntToInt32(v.AuxInt)
  3357  		sym := auxToSym(v.Aux)
  3358  		x := v_0
  3359  		if x.Op != OpMIPSADDconst {
  3360  			break
  3361  		}
  3362  		off2 := auxIntToInt32(x.AuxInt)
  3363  		ptr := x.Args[0]
  3364  		mem := v_1
  3365  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3366  			break
  3367  		}
  3368  		v.reset(OpMIPSMOVHUload)
  3369  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3370  		v.Aux = symToAux(sym)
  3371  		v.AddArg2(ptr, mem)
  3372  		return true
  3373  	}
  3374  	// match: (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3375  	// cond: canMergeSym(sym1,sym2)
  3376  	// result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3377  	for {
  3378  		off1 := auxIntToInt32(v.AuxInt)
  3379  		sym1 := auxToSym(v.Aux)
  3380  		if v_0.Op != OpMIPSMOVWaddr {
  3381  			break
  3382  		}
  3383  		off2 := auxIntToInt32(v_0.AuxInt)
  3384  		sym2 := auxToSym(v_0.Aux)
  3385  		ptr := v_0.Args[0]
  3386  		mem := v_1
  3387  		if !(canMergeSym(sym1, sym2)) {
  3388  			break
  3389  		}
  3390  		v.reset(OpMIPSMOVHUload)
  3391  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3392  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3393  		v.AddArg2(ptr, mem)
  3394  		return true
  3395  	}
  3396  	// match: (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3397  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3398  	// result: (MOVHUreg x)
  3399  	for {
  3400  		off := auxIntToInt32(v.AuxInt)
  3401  		sym := auxToSym(v.Aux)
  3402  		ptr := v_0
  3403  		if v_1.Op != OpMIPSMOVHstore {
  3404  			break
  3405  		}
  3406  		off2 := auxIntToInt32(v_1.AuxInt)
  3407  		sym2 := auxToSym(v_1.Aux)
  3408  		x := v_1.Args[1]
  3409  		ptr2 := v_1.Args[0]
  3410  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3411  			break
  3412  		}
  3413  		v.reset(OpMIPSMOVHUreg)
  3414  		v.AddArg(x)
  3415  		return true
  3416  	}
  3417  	return false
  3418  }
  3419  func rewriteValueMIPS_OpMIPSMOVHUreg(v *Value) bool {
  3420  	v_0 := v.Args[0]
  3421  	b := v.Block
  3422  	// match: (MOVHUreg x:(MOVBUload _ _))
  3423  	// result: (MOVWreg x)
  3424  	for {
  3425  		x := v_0
  3426  		if x.Op != OpMIPSMOVBUload {
  3427  			break
  3428  		}
  3429  		v.reset(OpMIPSMOVWreg)
  3430  		v.AddArg(x)
  3431  		return true
  3432  	}
  3433  	// match: (MOVHUreg x:(MOVHUload _ _))
  3434  	// result: (MOVWreg x)
  3435  	for {
  3436  		x := v_0
  3437  		if x.Op != OpMIPSMOVHUload {
  3438  			break
  3439  		}
  3440  		v.reset(OpMIPSMOVWreg)
  3441  		v.AddArg(x)
  3442  		return true
  3443  	}
  3444  	// match: (MOVHUreg x:(MOVBUreg _))
  3445  	// result: (MOVWreg x)
  3446  	for {
  3447  		x := v_0
  3448  		if x.Op != OpMIPSMOVBUreg {
  3449  			break
  3450  		}
  3451  		v.reset(OpMIPSMOVWreg)
  3452  		v.AddArg(x)
  3453  		return true
  3454  	}
  3455  	// match: (MOVHUreg x:(MOVHUreg _))
  3456  	// result: (MOVWreg x)
  3457  	for {
  3458  		x := v_0
  3459  		if x.Op != OpMIPSMOVHUreg {
  3460  			break
  3461  		}
  3462  		v.reset(OpMIPSMOVWreg)
  3463  		v.AddArg(x)
  3464  		return true
  3465  	}
  3466  	// match: (MOVHUreg <t> x:(MOVHload [off] {sym} ptr mem))
  3467  	// cond: x.Uses == 1 && clobber(x)
  3468  	// result: @x.Block (MOVHUload <t> [off] {sym} ptr mem)
  3469  	for {
  3470  		t := v.Type
  3471  		x := v_0
  3472  		if x.Op != OpMIPSMOVHload {
  3473  			break
  3474  		}
  3475  		off := auxIntToInt32(x.AuxInt)
  3476  		sym := auxToSym(x.Aux)
  3477  		mem := x.Args[1]
  3478  		ptr := x.Args[0]
  3479  		if !(x.Uses == 1 && clobber(x)) {
  3480  			break
  3481  		}
  3482  		b = x.Block
  3483  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHUload, t)
  3484  		v.copyOf(v0)
  3485  		v0.AuxInt = int32ToAuxInt(off)
  3486  		v0.Aux = symToAux(sym)
  3487  		v0.AddArg2(ptr, mem)
  3488  		return true
  3489  	}
  3490  	// match: (MOVHUreg (ANDconst [c] x))
  3491  	// result: (ANDconst [c&0xffff] x)
  3492  	for {
  3493  		if v_0.Op != OpMIPSANDconst {
  3494  			break
  3495  		}
  3496  		c := auxIntToInt32(v_0.AuxInt)
  3497  		x := v_0.Args[0]
  3498  		v.reset(OpMIPSANDconst)
  3499  		v.AuxInt = int32ToAuxInt(c & 0xffff)
  3500  		v.AddArg(x)
  3501  		return true
  3502  	}
  3503  	// match: (MOVHUreg (MOVWconst [c]))
  3504  	// result: (MOVWconst [int32(uint16(c))])
  3505  	for {
  3506  		if v_0.Op != OpMIPSMOVWconst {
  3507  			break
  3508  		}
  3509  		c := auxIntToInt32(v_0.AuxInt)
  3510  		v.reset(OpMIPSMOVWconst)
  3511  		v.AuxInt = int32ToAuxInt(int32(uint16(c)))
  3512  		return true
  3513  	}
  3514  	return false
  3515  }
  3516  func rewriteValueMIPS_OpMIPSMOVHload(v *Value) bool {
  3517  	v_1 := v.Args[1]
  3518  	v_0 := v.Args[0]
  3519  	// match: (MOVHload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3520  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3521  	// result: (MOVHload [off1+off2] {sym} ptr mem)
  3522  	for {
  3523  		off1 := auxIntToInt32(v.AuxInt)
  3524  		sym := auxToSym(v.Aux)
  3525  		x := v_0
  3526  		if x.Op != OpMIPSADDconst {
  3527  			break
  3528  		}
  3529  		off2 := auxIntToInt32(x.AuxInt)
  3530  		ptr := x.Args[0]
  3531  		mem := v_1
  3532  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3533  			break
  3534  		}
  3535  		v.reset(OpMIPSMOVHload)
  3536  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3537  		v.Aux = symToAux(sym)
  3538  		v.AddArg2(ptr, mem)
  3539  		return true
  3540  	}
  3541  	// match: (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3542  	// cond: canMergeSym(sym1,sym2)
  3543  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3544  	for {
  3545  		off1 := auxIntToInt32(v.AuxInt)
  3546  		sym1 := auxToSym(v.Aux)
  3547  		if v_0.Op != OpMIPSMOVWaddr {
  3548  			break
  3549  		}
  3550  		off2 := auxIntToInt32(v_0.AuxInt)
  3551  		sym2 := auxToSym(v_0.Aux)
  3552  		ptr := v_0.Args[0]
  3553  		mem := v_1
  3554  		if !(canMergeSym(sym1, sym2)) {
  3555  			break
  3556  		}
  3557  		v.reset(OpMIPSMOVHload)
  3558  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3559  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3560  		v.AddArg2(ptr, mem)
  3561  		return true
  3562  	}
  3563  	// match: (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3564  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3565  	// result: (MOVHreg x)
  3566  	for {
  3567  		off := auxIntToInt32(v.AuxInt)
  3568  		sym := auxToSym(v.Aux)
  3569  		ptr := v_0
  3570  		if v_1.Op != OpMIPSMOVHstore {
  3571  			break
  3572  		}
  3573  		off2 := auxIntToInt32(v_1.AuxInt)
  3574  		sym2 := auxToSym(v_1.Aux)
  3575  		x := v_1.Args[1]
  3576  		ptr2 := v_1.Args[0]
  3577  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3578  			break
  3579  		}
  3580  		v.reset(OpMIPSMOVHreg)
  3581  		v.AddArg(x)
  3582  		return true
  3583  	}
  3584  	return false
  3585  }
  3586  func rewriteValueMIPS_OpMIPSMOVHreg(v *Value) bool {
  3587  	v_0 := v.Args[0]
  3588  	b := v.Block
  3589  	// match: (MOVHreg x:(MOVBload _ _))
  3590  	// result: (MOVWreg x)
  3591  	for {
  3592  		x := v_0
  3593  		if x.Op != OpMIPSMOVBload {
  3594  			break
  3595  		}
  3596  		v.reset(OpMIPSMOVWreg)
  3597  		v.AddArg(x)
  3598  		return true
  3599  	}
  3600  	// match: (MOVHreg x:(MOVBUload _ _))
  3601  	// result: (MOVWreg x)
  3602  	for {
  3603  		x := v_0
  3604  		if x.Op != OpMIPSMOVBUload {
  3605  			break
  3606  		}
  3607  		v.reset(OpMIPSMOVWreg)
  3608  		v.AddArg(x)
  3609  		return true
  3610  	}
  3611  	// match: (MOVHreg x:(MOVHload _ _))
  3612  	// result: (MOVWreg x)
  3613  	for {
  3614  		x := v_0
  3615  		if x.Op != OpMIPSMOVHload {
  3616  			break
  3617  		}
  3618  		v.reset(OpMIPSMOVWreg)
  3619  		v.AddArg(x)
  3620  		return true
  3621  	}
  3622  	// match: (MOVHreg x:(MOVBreg _))
  3623  	// result: (MOVWreg x)
  3624  	for {
  3625  		x := v_0
  3626  		if x.Op != OpMIPSMOVBreg {
  3627  			break
  3628  		}
  3629  		v.reset(OpMIPSMOVWreg)
  3630  		v.AddArg(x)
  3631  		return true
  3632  	}
  3633  	// match: (MOVHreg x:(MOVBUreg _))
  3634  	// result: (MOVWreg x)
  3635  	for {
  3636  		x := v_0
  3637  		if x.Op != OpMIPSMOVBUreg {
  3638  			break
  3639  		}
  3640  		v.reset(OpMIPSMOVWreg)
  3641  		v.AddArg(x)
  3642  		return true
  3643  	}
  3644  	// match: (MOVHreg x:(MOVHreg _))
  3645  	// result: (MOVWreg x)
  3646  	for {
  3647  		x := v_0
  3648  		if x.Op != OpMIPSMOVHreg {
  3649  			break
  3650  		}
  3651  		v.reset(OpMIPSMOVWreg)
  3652  		v.AddArg(x)
  3653  		return true
  3654  	}
  3655  	// match: (MOVHreg <t> x:(MOVHUload [off] {sym} ptr mem))
  3656  	// cond: x.Uses == 1 && clobber(x)
  3657  	// result: @x.Block (MOVHload <t> [off] {sym} ptr mem)
  3658  	for {
  3659  		t := v.Type
  3660  		x := v_0
  3661  		if x.Op != OpMIPSMOVHUload {
  3662  			break
  3663  		}
  3664  		off := auxIntToInt32(x.AuxInt)
  3665  		sym := auxToSym(x.Aux)
  3666  		mem := x.Args[1]
  3667  		ptr := x.Args[0]
  3668  		if !(x.Uses == 1 && clobber(x)) {
  3669  			break
  3670  		}
  3671  		b = x.Block
  3672  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHload, t)
  3673  		v.copyOf(v0)
  3674  		v0.AuxInt = int32ToAuxInt(off)
  3675  		v0.Aux = symToAux(sym)
  3676  		v0.AddArg2(ptr, mem)
  3677  		return true
  3678  	}
  3679  	// match: (MOVHreg (ANDconst [c] x))
  3680  	// cond: c & 0x8000 == 0
  3681  	// result: (ANDconst [c&0x7fff] x)
  3682  	for {
  3683  		if v_0.Op != OpMIPSANDconst {
  3684  			break
  3685  		}
  3686  		c := auxIntToInt32(v_0.AuxInt)
  3687  		x := v_0.Args[0]
  3688  		if !(c&0x8000 == 0) {
  3689  			break
  3690  		}
  3691  		v.reset(OpMIPSANDconst)
  3692  		v.AuxInt = int32ToAuxInt(c & 0x7fff)
  3693  		v.AddArg(x)
  3694  		return true
  3695  	}
  3696  	// match: (MOVHreg (MOVWconst [c]))
  3697  	// result: (MOVWconst [int32(int16(c))])
  3698  	for {
  3699  		if v_0.Op != OpMIPSMOVWconst {
  3700  			break
  3701  		}
  3702  		c := auxIntToInt32(v_0.AuxInt)
  3703  		v.reset(OpMIPSMOVWconst)
  3704  		v.AuxInt = int32ToAuxInt(int32(int16(c)))
  3705  		return true
  3706  	}
  3707  	return false
  3708  }
  3709  func rewriteValueMIPS_OpMIPSMOVHstore(v *Value) bool {
  3710  	v_2 := v.Args[2]
  3711  	v_1 := v.Args[1]
  3712  	v_0 := v.Args[0]
  3713  	// match: (MOVHstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3714  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3715  	// result: (MOVHstore [off1+off2] {sym} ptr val mem)
  3716  	for {
  3717  		off1 := auxIntToInt32(v.AuxInt)
  3718  		sym := auxToSym(v.Aux)
  3719  		x := v_0
  3720  		if x.Op != OpMIPSADDconst {
  3721  			break
  3722  		}
  3723  		off2 := auxIntToInt32(x.AuxInt)
  3724  		ptr := x.Args[0]
  3725  		val := v_1
  3726  		mem := v_2
  3727  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3728  			break
  3729  		}
  3730  		v.reset(OpMIPSMOVHstore)
  3731  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3732  		v.Aux = symToAux(sym)
  3733  		v.AddArg3(ptr, val, mem)
  3734  		return true
  3735  	}
  3736  	// match: (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3737  	// cond: canMergeSym(sym1,sym2)
  3738  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3739  	for {
  3740  		off1 := auxIntToInt32(v.AuxInt)
  3741  		sym1 := auxToSym(v.Aux)
  3742  		if v_0.Op != OpMIPSMOVWaddr {
  3743  			break
  3744  		}
  3745  		off2 := auxIntToInt32(v_0.AuxInt)
  3746  		sym2 := auxToSym(v_0.Aux)
  3747  		ptr := v_0.Args[0]
  3748  		val := v_1
  3749  		mem := v_2
  3750  		if !(canMergeSym(sym1, sym2)) {
  3751  			break
  3752  		}
  3753  		v.reset(OpMIPSMOVHstore)
  3754  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3755  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3756  		v.AddArg3(ptr, val, mem)
  3757  		return true
  3758  	}
  3759  	// match: (MOVHstore [off] {sym} ptr (MOVWconst [0]) mem)
  3760  	// result: (MOVHstorezero [off] {sym} ptr mem)
  3761  	for {
  3762  		off := auxIntToInt32(v.AuxInt)
  3763  		sym := auxToSym(v.Aux)
  3764  		ptr := v_0
  3765  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3766  			break
  3767  		}
  3768  		mem := v_2
  3769  		v.reset(OpMIPSMOVHstorezero)
  3770  		v.AuxInt = int32ToAuxInt(off)
  3771  		v.Aux = symToAux(sym)
  3772  		v.AddArg2(ptr, mem)
  3773  		return true
  3774  	}
  3775  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  3776  	// result: (MOVHstore [off] {sym} ptr x mem)
  3777  	for {
  3778  		off := auxIntToInt32(v.AuxInt)
  3779  		sym := auxToSym(v.Aux)
  3780  		ptr := v_0
  3781  		if v_1.Op != OpMIPSMOVHreg {
  3782  			break
  3783  		}
  3784  		x := v_1.Args[0]
  3785  		mem := v_2
  3786  		v.reset(OpMIPSMOVHstore)
  3787  		v.AuxInt = int32ToAuxInt(off)
  3788  		v.Aux = symToAux(sym)
  3789  		v.AddArg3(ptr, x, mem)
  3790  		return true
  3791  	}
  3792  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
  3793  	// result: (MOVHstore [off] {sym} ptr x mem)
  3794  	for {
  3795  		off := auxIntToInt32(v.AuxInt)
  3796  		sym := auxToSym(v.Aux)
  3797  		ptr := v_0
  3798  		if v_1.Op != OpMIPSMOVHUreg {
  3799  			break
  3800  		}
  3801  		x := v_1.Args[0]
  3802  		mem := v_2
  3803  		v.reset(OpMIPSMOVHstore)
  3804  		v.AuxInt = int32ToAuxInt(off)
  3805  		v.Aux = symToAux(sym)
  3806  		v.AddArg3(ptr, x, mem)
  3807  		return true
  3808  	}
  3809  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
  3810  	// result: (MOVHstore [off] {sym} ptr x mem)
  3811  	for {
  3812  		off := auxIntToInt32(v.AuxInt)
  3813  		sym := auxToSym(v.Aux)
  3814  		ptr := v_0
  3815  		if v_1.Op != OpMIPSMOVWreg {
  3816  			break
  3817  		}
  3818  		x := v_1.Args[0]
  3819  		mem := v_2
  3820  		v.reset(OpMIPSMOVHstore)
  3821  		v.AuxInt = int32ToAuxInt(off)
  3822  		v.Aux = symToAux(sym)
  3823  		v.AddArg3(ptr, x, mem)
  3824  		return true
  3825  	}
  3826  	return false
  3827  }
  3828  func rewriteValueMIPS_OpMIPSMOVHstorezero(v *Value) bool {
  3829  	v_1 := v.Args[1]
  3830  	v_0 := v.Args[0]
  3831  	// match: (MOVHstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3832  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3833  	// result: (MOVHstorezero [off1+off2] {sym} ptr mem)
  3834  	for {
  3835  		off1 := auxIntToInt32(v.AuxInt)
  3836  		sym := auxToSym(v.Aux)
  3837  		x := v_0
  3838  		if x.Op != OpMIPSADDconst {
  3839  			break
  3840  		}
  3841  		off2 := auxIntToInt32(x.AuxInt)
  3842  		ptr := x.Args[0]
  3843  		mem := v_1
  3844  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3845  			break
  3846  		}
  3847  		v.reset(OpMIPSMOVHstorezero)
  3848  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3849  		v.Aux = symToAux(sym)
  3850  		v.AddArg2(ptr, mem)
  3851  		return true
  3852  	}
  3853  	// match: (MOVHstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3854  	// cond: canMergeSym(sym1,sym2)
  3855  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3856  	for {
  3857  		off1 := auxIntToInt32(v.AuxInt)
  3858  		sym1 := auxToSym(v.Aux)
  3859  		if v_0.Op != OpMIPSMOVWaddr {
  3860  			break
  3861  		}
  3862  		off2 := auxIntToInt32(v_0.AuxInt)
  3863  		sym2 := auxToSym(v_0.Aux)
  3864  		ptr := v_0.Args[0]
  3865  		mem := v_1
  3866  		if !(canMergeSym(sym1, sym2)) {
  3867  			break
  3868  		}
  3869  		v.reset(OpMIPSMOVHstorezero)
  3870  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3871  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3872  		v.AddArg2(ptr, mem)
  3873  		return true
  3874  	}
  3875  	return false
  3876  }
  3877  func rewriteValueMIPS_OpMIPSMOVWload(v *Value) bool {
  3878  	v_1 := v.Args[1]
  3879  	v_0 := v.Args[0]
  3880  	// match: (MOVWload [off] {sym} ptr (MOVFstore [off] {sym} ptr val _))
  3881  	// result: (MOVWfpgp val)
  3882  	for {
  3883  		off := auxIntToInt32(v.AuxInt)
  3884  		sym := auxToSym(v.Aux)
  3885  		ptr := v_0
  3886  		if v_1.Op != OpMIPSMOVFstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3887  			break
  3888  		}
  3889  		val := v_1.Args[1]
  3890  		if ptr != v_1.Args[0] {
  3891  			break
  3892  		}
  3893  		v.reset(OpMIPSMOVWfpgp)
  3894  		v.AddArg(val)
  3895  		return true
  3896  	}
  3897  	// match: (MOVWload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3898  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3899  	// result: (MOVWload [off1+off2] {sym} ptr mem)
  3900  	for {
  3901  		off1 := auxIntToInt32(v.AuxInt)
  3902  		sym := auxToSym(v.Aux)
  3903  		x := v_0
  3904  		if x.Op != OpMIPSADDconst {
  3905  			break
  3906  		}
  3907  		off2 := auxIntToInt32(x.AuxInt)
  3908  		ptr := x.Args[0]
  3909  		mem := v_1
  3910  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3911  			break
  3912  		}
  3913  		v.reset(OpMIPSMOVWload)
  3914  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3915  		v.Aux = symToAux(sym)
  3916  		v.AddArg2(ptr, mem)
  3917  		return true
  3918  	}
  3919  	// match: (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3920  	// cond: canMergeSym(sym1,sym2)
  3921  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3922  	for {
  3923  		off1 := auxIntToInt32(v.AuxInt)
  3924  		sym1 := auxToSym(v.Aux)
  3925  		if v_0.Op != OpMIPSMOVWaddr {
  3926  			break
  3927  		}
  3928  		off2 := auxIntToInt32(v_0.AuxInt)
  3929  		sym2 := auxToSym(v_0.Aux)
  3930  		ptr := v_0.Args[0]
  3931  		mem := v_1
  3932  		if !(canMergeSym(sym1, sym2)) {
  3933  			break
  3934  		}
  3935  		v.reset(OpMIPSMOVWload)
  3936  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3937  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3938  		v.AddArg2(ptr, mem)
  3939  		return true
  3940  	}
  3941  	// match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))
  3942  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3943  	// result: x
  3944  	for {
  3945  		off := auxIntToInt32(v.AuxInt)
  3946  		sym := auxToSym(v.Aux)
  3947  		ptr := v_0
  3948  		if v_1.Op != OpMIPSMOVWstore {
  3949  			break
  3950  		}
  3951  		off2 := auxIntToInt32(v_1.AuxInt)
  3952  		sym2 := auxToSym(v_1.Aux)
  3953  		x := v_1.Args[1]
  3954  		ptr2 := v_1.Args[0]
  3955  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3956  			break
  3957  		}
  3958  		v.copyOf(x)
  3959  		return true
  3960  	}
  3961  	return false
  3962  }
  3963  func rewriteValueMIPS_OpMIPSMOVWnop(v *Value) bool {
  3964  	v_0 := v.Args[0]
  3965  	// match: (MOVWnop (MOVWconst [c]))
  3966  	// result: (MOVWconst [c])
  3967  	for {
  3968  		if v_0.Op != OpMIPSMOVWconst {
  3969  			break
  3970  		}
  3971  		c := auxIntToInt32(v_0.AuxInt)
  3972  		v.reset(OpMIPSMOVWconst)
  3973  		v.AuxInt = int32ToAuxInt(c)
  3974  		return true
  3975  	}
  3976  	return false
  3977  }
  3978  func rewriteValueMIPS_OpMIPSMOVWreg(v *Value) bool {
  3979  	v_0 := v.Args[0]
  3980  	// match: (MOVWreg x)
  3981  	// cond: x.Uses == 1
  3982  	// result: (MOVWnop x)
  3983  	for {
  3984  		x := v_0
  3985  		if !(x.Uses == 1) {
  3986  			break
  3987  		}
  3988  		v.reset(OpMIPSMOVWnop)
  3989  		v.AddArg(x)
  3990  		return true
  3991  	}
  3992  	// match: (MOVWreg (MOVWconst [c]))
  3993  	// result: (MOVWconst [c])
  3994  	for {
  3995  		if v_0.Op != OpMIPSMOVWconst {
  3996  			break
  3997  		}
  3998  		c := auxIntToInt32(v_0.AuxInt)
  3999  		v.reset(OpMIPSMOVWconst)
  4000  		v.AuxInt = int32ToAuxInt(c)
  4001  		return true
  4002  	}
  4003  	return false
  4004  }
  4005  func rewriteValueMIPS_OpMIPSMOVWstore(v *Value) bool {
  4006  	v_2 := v.Args[2]
  4007  	v_1 := v.Args[1]
  4008  	v_0 := v.Args[0]
  4009  	// match: (MOVWstore [off] {sym} ptr (MOVWfpgp val) mem)
  4010  	// result: (MOVFstore [off] {sym} ptr val mem)
  4011  	for {
  4012  		off := auxIntToInt32(v.AuxInt)
  4013  		sym := auxToSym(v.Aux)
  4014  		ptr := v_0
  4015  		if v_1.Op != OpMIPSMOVWfpgp {
  4016  			break
  4017  		}
  4018  		val := v_1.Args[0]
  4019  		mem := v_2
  4020  		v.reset(OpMIPSMOVFstore)
  4021  		v.AuxInt = int32ToAuxInt(off)
  4022  		v.Aux = symToAux(sym)
  4023  		v.AddArg3(ptr, val, mem)
  4024  		return true
  4025  	}
  4026  	// match: (MOVWstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  4027  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  4028  	// result: (MOVWstore [off1+off2] {sym} ptr val mem)
  4029  	for {
  4030  		off1 := auxIntToInt32(v.AuxInt)
  4031  		sym := auxToSym(v.Aux)
  4032  		x := v_0
  4033  		if x.Op != OpMIPSADDconst {
  4034  			break
  4035  		}
  4036  		off2 := auxIntToInt32(x.AuxInt)
  4037  		ptr := x.Args[0]
  4038  		val := v_1
  4039  		mem := v_2
  4040  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  4041  			break
  4042  		}
  4043  		v.reset(OpMIPSMOVWstore)
  4044  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4045  		v.Aux = symToAux(sym)
  4046  		v.AddArg3(ptr, val, mem)
  4047  		return true
  4048  	}
  4049  	// match: (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  4050  	// cond: canMergeSym(sym1,sym2)
  4051  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  4052  	for {
  4053  		off1 := auxIntToInt32(v.AuxInt)
  4054  		sym1 := auxToSym(v.Aux)
  4055  		if v_0.Op != OpMIPSMOVWaddr {
  4056  			break
  4057  		}
  4058  		off2 := auxIntToInt32(v_0.AuxInt)
  4059  		sym2 := auxToSym(v_0.Aux)
  4060  		ptr := v_0.Args[0]
  4061  		val := v_1
  4062  		mem := v_2
  4063  		if !(canMergeSym(sym1, sym2)) {
  4064  			break
  4065  		}
  4066  		v.reset(OpMIPSMOVWstore)
  4067  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4068  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4069  		v.AddArg3(ptr, val, mem)
  4070  		return true
  4071  	}
  4072  	// match: (MOVWstore [off] {sym} ptr (MOVWconst [0]) mem)
  4073  	// result: (MOVWstorezero [off] {sym} ptr mem)
  4074  	for {
  4075  		off := auxIntToInt32(v.AuxInt)
  4076  		sym := auxToSym(v.Aux)
  4077  		ptr := v_0
  4078  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4079  			break
  4080  		}
  4081  		mem := v_2
  4082  		v.reset(OpMIPSMOVWstorezero)
  4083  		v.AuxInt = int32ToAuxInt(off)
  4084  		v.Aux = symToAux(sym)
  4085  		v.AddArg2(ptr, mem)
  4086  		return true
  4087  	}
  4088  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  4089  	// result: (MOVWstore [off] {sym} ptr x mem)
  4090  	for {
  4091  		off := auxIntToInt32(v.AuxInt)
  4092  		sym := auxToSym(v.Aux)
  4093  		ptr := v_0
  4094  		if v_1.Op != OpMIPSMOVWreg {
  4095  			break
  4096  		}
  4097  		x := v_1.Args[0]
  4098  		mem := v_2
  4099  		v.reset(OpMIPSMOVWstore)
  4100  		v.AuxInt = int32ToAuxInt(off)
  4101  		v.Aux = symToAux(sym)
  4102  		v.AddArg3(ptr, x, mem)
  4103  		return true
  4104  	}
  4105  	return false
  4106  }
  4107  func rewriteValueMIPS_OpMIPSMOVWstorezero(v *Value) bool {
  4108  	v_1 := v.Args[1]
  4109  	v_0 := v.Args[0]
  4110  	// match: (MOVWstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  4111  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  4112  	// result: (MOVWstorezero [off1+off2] {sym} ptr mem)
  4113  	for {
  4114  		off1 := auxIntToInt32(v.AuxInt)
  4115  		sym := auxToSym(v.Aux)
  4116  		x := v_0
  4117  		if x.Op != OpMIPSADDconst {
  4118  			break
  4119  		}
  4120  		off2 := auxIntToInt32(x.AuxInt)
  4121  		ptr := x.Args[0]
  4122  		mem := v_1
  4123  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  4124  			break
  4125  		}
  4126  		v.reset(OpMIPSMOVWstorezero)
  4127  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4128  		v.Aux = symToAux(sym)
  4129  		v.AddArg2(ptr, mem)
  4130  		return true
  4131  	}
  4132  	// match: (MOVWstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  4133  	// cond: canMergeSym(sym1,sym2)
  4134  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  4135  	for {
  4136  		off1 := auxIntToInt32(v.AuxInt)
  4137  		sym1 := auxToSym(v.Aux)
  4138  		if v_0.Op != OpMIPSMOVWaddr {
  4139  			break
  4140  		}
  4141  		off2 := auxIntToInt32(v_0.AuxInt)
  4142  		sym2 := auxToSym(v_0.Aux)
  4143  		ptr := v_0.Args[0]
  4144  		mem := v_1
  4145  		if !(canMergeSym(sym1, sym2)) {
  4146  			break
  4147  		}
  4148  		v.reset(OpMIPSMOVWstorezero)
  4149  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4150  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4151  		v.AddArg2(ptr, mem)
  4152  		return true
  4153  	}
  4154  	return false
  4155  }
  4156  func rewriteValueMIPS_OpMIPSMUL(v *Value) bool {
  4157  	v_1 := v.Args[1]
  4158  	v_0 := v.Args[0]
  4159  	// match: (MUL (MOVWconst [0]) _ )
  4160  	// result: (MOVWconst [0])
  4161  	for {
  4162  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4163  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4164  				continue
  4165  			}
  4166  			v.reset(OpMIPSMOVWconst)
  4167  			v.AuxInt = int32ToAuxInt(0)
  4168  			return true
  4169  		}
  4170  		break
  4171  	}
  4172  	// match: (MUL (MOVWconst [1]) x )
  4173  	// result: x
  4174  	for {
  4175  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4176  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 1 {
  4177  				continue
  4178  			}
  4179  			x := v_1
  4180  			v.copyOf(x)
  4181  			return true
  4182  		}
  4183  		break
  4184  	}
  4185  	// match: (MUL (MOVWconst [-1]) x )
  4186  	// result: (NEG x)
  4187  	for {
  4188  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4189  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != -1 {
  4190  				continue
  4191  			}
  4192  			x := v_1
  4193  			v.reset(OpMIPSNEG)
  4194  			v.AddArg(x)
  4195  			return true
  4196  		}
  4197  		break
  4198  	}
  4199  	// match: (MUL (MOVWconst [c]) x )
  4200  	// cond: isUnsignedPowerOfTwo(uint32(c))
  4201  	// result: (SLLconst [int32(log32u(uint32(c)))] x)
  4202  	for {
  4203  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4204  			if v_0.Op != OpMIPSMOVWconst {
  4205  				continue
  4206  			}
  4207  			c := auxIntToInt32(v_0.AuxInt)
  4208  			x := v_1
  4209  			if !(isUnsignedPowerOfTwo(uint32(c))) {
  4210  				continue
  4211  			}
  4212  			v.reset(OpMIPSSLLconst)
  4213  			v.AuxInt = int32ToAuxInt(int32(log32u(uint32(c))))
  4214  			v.AddArg(x)
  4215  			return true
  4216  		}
  4217  		break
  4218  	}
  4219  	// match: (MUL (MOVWconst [c]) (MOVWconst [d]))
  4220  	// result: (MOVWconst [c*d])
  4221  	for {
  4222  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4223  			if v_0.Op != OpMIPSMOVWconst {
  4224  				continue
  4225  			}
  4226  			c := auxIntToInt32(v_0.AuxInt)
  4227  			if v_1.Op != OpMIPSMOVWconst {
  4228  				continue
  4229  			}
  4230  			d := auxIntToInt32(v_1.AuxInt)
  4231  			v.reset(OpMIPSMOVWconst)
  4232  			v.AuxInt = int32ToAuxInt(c * d)
  4233  			return true
  4234  		}
  4235  		break
  4236  	}
  4237  	return false
  4238  }
  4239  func rewriteValueMIPS_OpMIPSNEG(v *Value) bool {
  4240  	v_0 := v.Args[0]
  4241  	// match: (NEG (SUB x y))
  4242  	// result: (SUB y x)
  4243  	for {
  4244  		if v_0.Op != OpMIPSSUB {
  4245  			break
  4246  		}
  4247  		y := v_0.Args[1]
  4248  		x := v_0.Args[0]
  4249  		v.reset(OpMIPSSUB)
  4250  		v.AddArg2(y, x)
  4251  		return true
  4252  	}
  4253  	// match: (NEG (NEG x))
  4254  	// result: x
  4255  	for {
  4256  		if v_0.Op != OpMIPSNEG {
  4257  			break
  4258  		}
  4259  		x := v_0.Args[0]
  4260  		v.copyOf(x)
  4261  		return true
  4262  	}
  4263  	// match: (NEG (MOVWconst [c]))
  4264  	// result: (MOVWconst [-c])
  4265  	for {
  4266  		if v_0.Op != OpMIPSMOVWconst {
  4267  			break
  4268  		}
  4269  		c := auxIntToInt32(v_0.AuxInt)
  4270  		v.reset(OpMIPSMOVWconst)
  4271  		v.AuxInt = int32ToAuxInt(-c)
  4272  		return true
  4273  	}
  4274  	return false
  4275  }
  4276  func rewriteValueMIPS_OpMIPSNOR(v *Value) bool {
  4277  	v_1 := v.Args[1]
  4278  	v_0 := v.Args[0]
  4279  	// match: (NOR x (MOVWconst [c]))
  4280  	// result: (NORconst [c] x)
  4281  	for {
  4282  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4283  			x := v_0
  4284  			if v_1.Op != OpMIPSMOVWconst {
  4285  				continue
  4286  			}
  4287  			c := auxIntToInt32(v_1.AuxInt)
  4288  			v.reset(OpMIPSNORconst)
  4289  			v.AuxInt = int32ToAuxInt(c)
  4290  			v.AddArg(x)
  4291  			return true
  4292  		}
  4293  		break
  4294  	}
  4295  	return false
  4296  }
  4297  func rewriteValueMIPS_OpMIPSNORconst(v *Value) bool {
  4298  	v_0 := v.Args[0]
  4299  	// match: (NORconst [c] (MOVWconst [d]))
  4300  	// result: (MOVWconst [^(c|d)])
  4301  	for {
  4302  		c := auxIntToInt32(v.AuxInt)
  4303  		if v_0.Op != OpMIPSMOVWconst {
  4304  			break
  4305  		}
  4306  		d := auxIntToInt32(v_0.AuxInt)
  4307  		v.reset(OpMIPSMOVWconst)
  4308  		v.AuxInt = int32ToAuxInt(^(c | d))
  4309  		return true
  4310  	}
  4311  	return false
  4312  }
  4313  func rewriteValueMIPS_OpMIPSOR(v *Value) bool {
  4314  	v_1 := v.Args[1]
  4315  	v_0 := v.Args[0]
  4316  	b := v.Block
  4317  	// match: (OR x (MOVWconst [c]))
  4318  	// result: (ORconst [c] x)
  4319  	for {
  4320  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4321  			x := v_0
  4322  			if v_1.Op != OpMIPSMOVWconst {
  4323  				continue
  4324  			}
  4325  			c := auxIntToInt32(v_1.AuxInt)
  4326  			v.reset(OpMIPSORconst)
  4327  			v.AuxInt = int32ToAuxInt(c)
  4328  			v.AddArg(x)
  4329  			return true
  4330  		}
  4331  		break
  4332  	}
  4333  	// match: (OR x x)
  4334  	// result: x
  4335  	for {
  4336  		x := v_0
  4337  		if x != v_1 {
  4338  			break
  4339  		}
  4340  		v.copyOf(x)
  4341  		return true
  4342  	}
  4343  	// match: (OR (SGTUzero x) (SGTUzero y))
  4344  	// result: (SGTUzero (OR <x.Type> x y))
  4345  	for {
  4346  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4347  			if v_0.Op != OpMIPSSGTUzero {
  4348  				continue
  4349  			}
  4350  			x := v_0.Args[0]
  4351  			if v_1.Op != OpMIPSSGTUzero {
  4352  				continue
  4353  			}
  4354  			y := v_1.Args[0]
  4355  			v.reset(OpMIPSSGTUzero)
  4356  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  4357  			v0.AddArg2(x, y)
  4358  			v.AddArg(v0)
  4359  			return true
  4360  		}
  4361  		break
  4362  	}
  4363  	return false
  4364  }
  4365  func rewriteValueMIPS_OpMIPSORconst(v *Value) bool {
  4366  	v_0 := v.Args[0]
  4367  	// match: (ORconst [0] x)
  4368  	// result: x
  4369  	for {
  4370  		if auxIntToInt32(v.AuxInt) != 0 {
  4371  			break
  4372  		}
  4373  		x := v_0
  4374  		v.copyOf(x)
  4375  		return true
  4376  	}
  4377  	// match: (ORconst [-1] _)
  4378  	// result: (MOVWconst [-1])
  4379  	for {
  4380  		if auxIntToInt32(v.AuxInt) != -1 {
  4381  			break
  4382  		}
  4383  		v.reset(OpMIPSMOVWconst)
  4384  		v.AuxInt = int32ToAuxInt(-1)
  4385  		return true
  4386  	}
  4387  	// match: (ORconst [c] (MOVWconst [d]))
  4388  	// result: (MOVWconst [c|d])
  4389  	for {
  4390  		c := auxIntToInt32(v.AuxInt)
  4391  		if v_0.Op != OpMIPSMOVWconst {
  4392  			break
  4393  		}
  4394  		d := auxIntToInt32(v_0.AuxInt)
  4395  		v.reset(OpMIPSMOVWconst)
  4396  		v.AuxInt = int32ToAuxInt(c | d)
  4397  		return true
  4398  	}
  4399  	// match: (ORconst [c] (ORconst [d] x))
  4400  	// result: (ORconst [c|d] x)
  4401  	for {
  4402  		c := auxIntToInt32(v.AuxInt)
  4403  		if v_0.Op != OpMIPSORconst {
  4404  			break
  4405  		}
  4406  		d := auxIntToInt32(v_0.AuxInt)
  4407  		x := v_0.Args[0]
  4408  		v.reset(OpMIPSORconst)
  4409  		v.AuxInt = int32ToAuxInt(c | d)
  4410  		v.AddArg(x)
  4411  		return true
  4412  	}
  4413  	return false
  4414  }
  4415  func rewriteValueMIPS_OpMIPSSGT(v *Value) bool {
  4416  	v_1 := v.Args[1]
  4417  	v_0 := v.Args[0]
  4418  	// match: (SGT (MOVWconst [c]) x)
  4419  	// result: (SGTconst [c] x)
  4420  	for {
  4421  		if v_0.Op != OpMIPSMOVWconst {
  4422  			break
  4423  		}
  4424  		c := auxIntToInt32(v_0.AuxInt)
  4425  		x := v_1
  4426  		v.reset(OpMIPSSGTconst)
  4427  		v.AuxInt = int32ToAuxInt(c)
  4428  		v.AddArg(x)
  4429  		return true
  4430  	}
  4431  	// match: (SGT x (MOVWconst [0]))
  4432  	// result: (SGTzero x)
  4433  	for {
  4434  		x := v_0
  4435  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4436  			break
  4437  		}
  4438  		v.reset(OpMIPSSGTzero)
  4439  		v.AddArg(x)
  4440  		return true
  4441  	}
  4442  	return false
  4443  }
  4444  func rewriteValueMIPS_OpMIPSSGTU(v *Value) bool {
  4445  	v_1 := v.Args[1]
  4446  	v_0 := v.Args[0]
  4447  	// match: (SGTU (MOVWconst [c]) x)
  4448  	// result: (SGTUconst [c] x)
  4449  	for {
  4450  		if v_0.Op != OpMIPSMOVWconst {
  4451  			break
  4452  		}
  4453  		c := auxIntToInt32(v_0.AuxInt)
  4454  		x := v_1
  4455  		v.reset(OpMIPSSGTUconst)
  4456  		v.AuxInt = int32ToAuxInt(c)
  4457  		v.AddArg(x)
  4458  		return true
  4459  	}
  4460  	// match: (SGTU x (MOVWconst [0]))
  4461  	// result: (SGTUzero x)
  4462  	for {
  4463  		x := v_0
  4464  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4465  			break
  4466  		}
  4467  		v.reset(OpMIPSSGTUzero)
  4468  		v.AddArg(x)
  4469  		return true
  4470  	}
  4471  	return false
  4472  }
  4473  func rewriteValueMIPS_OpMIPSSGTUconst(v *Value) bool {
  4474  	v_0 := v.Args[0]
  4475  	// match: (SGTUconst [c] (MOVWconst [d]))
  4476  	// cond: uint32(c) > uint32(d)
  4477  	// result: (MOVWconst [1])
  4478  	for {
  4479  		c := auxIntToInt32(v.AuxInt)
  4480  		if v_0.Op != OpMIPSMOVWconst {
  4481  			break
  4482  		}
  4483  		d := auxIntToInt32(v_0.AuxInt)
  4484  		if !(uint32(c) > uint32(d)) {
  4485  			break
  4486  		}
  4487  		v.reset(OpMIPSMOVWconst)
  4488  		v.AuxInt = int32ToAuxInt(1)
  4489  		return true
  4490  	}
  4491  	// match: (SGTUconst [c] (MOVWconst [d]))
  4492  	// cond: uint32(c) <= uint32(d)
  4493  	// result: (MOVWconst [0])
  4494  	for {
  4495  		c := auxIntToInt32(v.AuxInt)
  4496  		if v_0.Op != OpMIPSMOVWconst {
  4497  			break
  4498  		}
  4499  		d := auxIntToInt32(v_0.AuxInt)
  4500  		if !(uint32(c) <= uint32(d)) {
  4501  			break
  4502  		}
  4503  		v.reset(OpMIPSMOVWconst)
  4504  		v.AuxInt = int32ToAuxInt(0)
  4505  		return true
  4506  	}
  4507  	// match: (SGTUconst [c] (MOVBUreg _))
  4508  	// cond: 0xff < uint32(c)
  4509  	// result: (MOVWconst [1])
  4510  	for {
  4511  		c := auxIntToInt32(v.AuxInt)
  4512  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < uint32(c)) {
  4513  			break
  4514  		}
  4515  		v.reset(OpMIPSMOVWconst)
  4516  		v.AuxInt = int32ToAuxInt(1)
  4517  		return true
  4518  	}
  4519  	// match: (SGTUconst [c] (MOVHUreg _))
  4520  	// cond: 0xffff < uint32(c)
  4521  	// result: (MOVWconst [1])
  4522  	for {
  4523  		c := auxIntToInt32(v.AuxInt)
  4524  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < uint32(c)) {
  4525  			break
  4526  		}
  4527  		v.reset(OpMIPSMOVWconst)
  4528  		v.AuxInt = int32ToAuxInt(1)
  4529  		return true
  4530  	}
  4531  	// match: (SGTUconst [c] (ANDconst [m] _))
  4532  	// cond: uint32(m) < uint32(c)
  4533  	// result: (MOVWconst [1])
  4534  	for {
  4535  		c := auxIntToInt32(v.AuxInt)
  4536  		if v_0.Op != OpMIPSANDconst {
  4537  			break
  4538  		}
  4539  		m := auxIntToInt32(v_0.AuxInt)
  4540  		if !(uint32(m) < uint32(c)) {
  4541  			break
  4542  		}
  4543  		v.reset(OpMIPSMOVWconst)
  4544  		v.AuxInt = int32ToAuxInt(1)
  4545  		return true
  4546  	}
  4547  	// match: (SGTUconst [c] (SRLconst _ [d]))
  4548  	// cond: uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4549  	// result: (MOVWconst [1])
  4550  	for {
  4551  		c := auxIntToInt32(v.AuxInt)
  4552  		if v_0.Op != OpMIPSSRLconst {
  4553  			break
  4554  		}
  4555  		d := auxIntToInt32(v_0.AuxInt)
  4556  		if !(uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4557  			break
  4558  		}
  4559  		v.reset(OpMIPSMOVWconst)
  4560  		v.AuxInt = int32ToAuxInt(1)
  4561  		return true
  4562  	}
  4563  	return false
  4564  }
  4565  func rewriteValueMIPS_OpMIPSSGTUzero(v *Value) bool {
  4566  	v_0 := v.Args[0]
  4567  	// match: (SGTUzero (MOVWconst [d]))
  4568  	// cond: d != 0
  4569  	// result: (MOVWconst [1])
  4570  	for {
  4571  		if v_0.Op != OpMIPSMOVWconst {
  4572  			break
  4573  		}
  4574  		d := auxIntToInt32(v_0.AuxInt)
  4575  		if !(d != 0) {
  4576  			break
  4577  		}
  4578  		v.reset(OpMIPSMOVWconst)
  4579  		v.AuxInt = int32ToAuxInt(1)
  4580  		return true
  4581  	}
  4582  	// match: (SGTUzero (MOVWconst [d]))
  4583  	// cond: d == 0
  4584  	// result: (MOVWconst [0])
  4585  	for {
  4586  		if v_0.Op != OpMIPSMOVWconst {
  4587  			break
  4588  		}
  4589  		d := auxIntToInt32(v_0.AuxInt)
  4590  		if !(d == 0) {
  4591  			break
  4592  		}
  4593  		v.reset(OpMIPSMOVWconst)
  4594  		v.AuxInt = int32ToAuxInt(0)
  4595  		return true
  4596  	}
  4597  	return false
  4598  }
  4599  func rewriteValueMIPS_OpMIPSSGTconst(v *Value) bool {
  4600  	v_0 := v.Args[0]
  4601  	// match: (SGTconst [c] (MOVWconst [d]))
  4602  	// cond: c > d
  4603  	// result: (MOVWconst [1])
  4604  	for {
  4605  		c := auxIntToInt32(v.AuxInt)
  4606  		if v_0.Op != OpMIPSMOVWconst {
  4607  			break
  4608  		}
  4609  		d := auxIntToInt32(v_0.AuxInt)
  4610  		if !(c > d) {
  4611  			break
  4612  		}
  4613  		v.reset(OpMIPSMOVWconst)
  4614  		v.AuxInt = int32ToAuxInt(1)
  4615  		return true
  4616  	}
  4617  	// match: (SGTconst [c] (MOVWconst [d]))
  4618  	// cond: c <= d
  4619  	// result: (MOVWconst [0])
  4620  	for {
  4621  		c := auxIntToInt32(v.AuxInt)
  4622  		if v_0.Op != OpMIPSMOVWconst {
  4623  			break
  4624  		}
  4625  		d := auxIntToInt32(v_0.AuxInt)
  4626  		if !(c <= d) {
  4627  			break
  4628  		}
  4629  		v.reset(OpMIPSMOVWconst)
  4630  		v.AuxInt = int32ToAuxInt(0)
  4631  		return true
  4632  	}
  4633  	// match: (SGTconst [c] (MOVBreg _))
  4634  	// cond: 0x7f < c
  4635  	// result: (MOVWconst [1])
  4636  	for {
  4637  		c := auxIntToInt32(v.AuxInt)
  4638  		if v_0.Op != OpMIPSMOVBreg || !(0x7f < c) {
  4639  			break
  4640  		}
  4641  		v.reset(OpMIPSMOVWconst)
  4642  		v.AuxInt = int32ToAuxInt(1)
  4643  		return true
  4644  	}
  4645  	// match: (SGTconst [c] (MOVBreg _))
  4646  	// cond: c <= -0x80
  4647  	// result: (MOVWconst [0])
  4648  	for {
  4649  		c := auxIntToInt32(v.AuxInt)
  4650  		if v_0.Op != OpMIPSMOVBreg || !(c <= -0x80) {
  4651  			break
  4652  		}
  4653  		v.reset(OpMIPSMOVWconst)
  4654  		v.AuxInt = int32ToAuxInt(0)
  4655  		return true
  4656  	}
  4657  	// match: (SGTconst [c] (MOVBUreg _))
  4658  	// cond: 0xff < c
  4659  	// result: (MOVWconst [1])
  4660  	for {
  4661  		c := auxIntToInt32(v.AuxInt)
  4662  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < c) {
  4663  			break
  4664  		}
  4665  		v.reset(OpMIPSMOVWconst)
  4666  		v.AuxInt = int32ToAuxInt(1)
  4667  		return true
  4668  	}
  4669  	// match: (SGTconst [c] (MOVBUreg _))
  4670  	// cond: c < 0
  4671  	// result: (MOVWconst [0])
  4672  	for {
  4673  		c := auxIntToInt32(v.AuxInt)
  4674  		if v_0.Op != OpMIPSMOVBUreg || !(c < 0) {
  4675  			break
  4676  		}
  4677  		v.reset(OpMIPSMOVWconst)
  4678  		v.AuxInt = int32ToAuxInt(0)
  4679  		return true
  4680  	}
  4681  	// match: (SGTconst [c] (MOVHreg _))
  4682  	// cond: 0x7fff < c
  4683  	// result: (MOVWconst [1])
  4684  	for {
  4685  		c := auxIntToInt32(v.AuxInt)
  4686  		if v_0.Op != OpMIPSMOVHreg || !(0x7fff < c) {
  4687  			break
  4688  		}
  4689  		v.reset(OpMIPSMOVWconst)
  4690  		v.AuxInt = int32ToAuxInt(1)
  4691  		return true
  4692  	}
  4693  	// match: (SGTconst [c] (MOVHreg _))
  4694  	// cond: c <= -0x8000
  4695  	// result: (MOVWconst [0])
  4696  	for {
  4697  		c := auxIntToInt32(v.AuxInt)
  4698  		if v_0.Op != OpMIPSMOVHreg || !(c <= -0x8000) {
  4699  			break
  4700  		}
  4701  		v.reset(OpMIPSMOVWconst)
  4702  		v.AuxInt = int32ToAuxInt(0)
  4703  		return true
  4704  	}
  4705  	// match: (SGTconst [c] (MOVHUreg _))
  4706  	// cond: 0xffff < c
  4707  	// result: (MOVWconst [1])
  4708  	for {
  4709  		c := auxIntToInt32(v.AuxInt)
  4710  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < c) {
  4711  			break
  4712  		}
  4713  		v.reset(OpMIPSMOVWconst)
  4714  		v.AuxInt = int32ToAuxInt(1)
  4715  		return true
  4716  	}
  4717  	// match: (SGTconst [c] (MOVHUreg _))
  4718  	// cond: c < 0
  4719  	// result: (MOVWconst [0])
  4720  	for {
  4721  		c := auxIntToInt32(v.AuxInt)
  4722  		if v_0.Op != OpMIPSMOVHUreg || !(c < 0) {
  4723  			break
  4724  		}
  4725  		v.reset(OpMIPSMOVWconst)
  4726  		v.AuxInt = int32ToAuxInt(0)
  4727  		return true
  4728  	}
  4729  	// match: (SGTconst [c] (ANDconst [m] _))
  4730  	// cond: 0 <= m && m < c
  4731  	// result: (MOVWconst [1])
  4732  	for {
  4733  		c := auxIntToInt32(v.AuxInt)
  4734  		if v_0.Op != OpMIPSANDconst {
  4735  			break
  4736  		}
  4737  		m := auxIntToInt32(v_0.AuxInt)
  4738  		if !(0 <= m && m < c) {
  4739  			break
  4740  		}
  4741  		v.reset(OpMIPSMOVWconst)
  4742  		v.AuxInt = int32ToAuxInt(1)
  4743  		return true
  4744  	}
  4745  	// match: (SGTconst [c] (SRLconst _ [d]))
  4746  	// cond: 0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4747  	// result: (MOVWconst [1])
  4748  	for {
  4749  		c := auxIntToInt32(v.AuxInt)
  4750  		if v_0.Op != OpMIPSSRLconst {
  4751  			break
  4752  		}
  4753  		d := auxIntToInt32(v_0.AuxInt)
  4754  		if !(0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4755  			break
  4756  		}
  4757  		v.reset(OpMIPSMOVWconst)
  4758  		v.AuxInt = int32ToAuxInt(1)
  4759  		return true
  4760  	}
  4761  	return false
  4762  }
  4763  func rewriteValueMIPS_OpMIPSSGTzero(v *Value) bool {
  4764  	v_0 := v.Args[0]
  4765  	// match: (SGTzero (MOVWconst [d]))
  4766  	// cond: d > 0
  4767  	// result: (MOVWconst [1])
  4768  	for {
  4769  		if v_0.Op != OpMIPSMOVWconst {
  4770  			break
  4771  		}
  4772  		d := auxIntToInt32(v_0.AuxInt)
  4773  		if !(d > 0) {
  4774  			break
  4775  		}
  4776  		v.reset(OpMIPSMOVWconst)
  4777  		v.AuxInt = int32ToAuxInt(1)
  4778  		return true
  4779  	}
  4780  	// match: (SGTzero (MOVWconst [d]))
  4781  	// cond: d <= 0
  4782  	// result: (MOVWconst [0])
  4783  	for {
  4784  		if v_0.Op != OpMIPSMOVWconst {
  4785  			break
  4786  		}
  4787  		d := auxIntToInt32(v_0.AuxInt)
  4788  		if !(d <= 0) {
  4789  			break
  4790  		}
  4791  		v.reset(OpMIPSMOVWconst)
  4792  		v.AuxInt = int32ToAuxInt(0)
  4793  		return true
  4794  	}
  4795  	return false
  4796  }
  4797  func rewriteValueMIPS_OpMIPSSLL(v *Value) bool {
  4798  	v_1 := v.Args[1]
  4799  	v_0 := v.Args[0]
  4800  	// match: (SLL x (MOVWconst [c]))
  4801  	// result: (SLLconst x [c&31])
  4802  	for {
  4803  		x := v_0
  4804  		if v_1.Op != OpMIPSMOVWconst {
  4805  			break
  4806  		}
  4807  		c := auxIntToInt32(v_1.AuxInt)
  4808  		v.reset(OpMIPSSLLconst)
  4809  		v.AuxInt = int32ToAuxInt(c & 31)
  4810  		v.AddArg(x)
  4811  		return true
  4812  	}
  4813  	return false
  4814  }
  4815  func rewriteValueMIPS_OpMIPSSLLconst(v *Value) bool {
  4816  	v_0 := v.Args[0]
  4817  	// match: (SLLconst [c] (MOVWconst [d]))
  4818  	// result: (MOVWconst [d<<uint32(c)])
  4819  	for {
  4820  		c := auxIntToInt32(v.AuxInt)
  4821  		if v_0.Op != OpMIPSMOVWconst {
  4822  			break
  4823  		}
  4824  		d := auxIntToInt32(v_0.AuxInt)
  4825  		v.reset(OpMIPSMOVWconst)
  4826  		v.AuxInt = int32ToAuxInt(d << uint32(c))
  4827  		return true
  4828  	}
  4829  	return false
  4830  }
  4831  func rewriteValueMIPS_OpMIPSSRA(v *Value) bool {
  4832  	v_1 := v.Args[1]
  4833  	v_0 := v.Args[0]
  4834  	// match: (SRA x (MOVWconst [c]))
  4835  	// result: (SRAconst x [c&31])
  4836  	for {
  4837  		x := v_0
  4838  		if v_1.Op != OpMIPSMOVWconst {
  4839  			break
  4840  		}
  4841  		c := auxIntToInt32(v_1.AuxInt)
  4842  		v.reset(OpMIPSSRAconst)
  4843  		v.AuxInt = int32ToAuxInt(c & 31)
  4844  		v.AddArg(x)
  4845  		return true
  4846  	}
  4847  	return false
  4848  }
  4849  func rewriteValueMIPS_OpMIPSSRAconst(v *Value) bool {
  4850  	v_0 := v.Args[0]
  4851  	// match: (SRAconst [c] (MOVWconst [d]))
  4852  	// result: (MOVWconst [d>>uint32(c)])
  4853  	for {
  4854  		c := auxIntToInt32(v.AuxInt)
  4855  		if v_0.Op != OpMIPSMOVWconst {
  4856  			break
  4857  		}
  4858  		d := auxIntToInt32(v_0.AuxInt)
  4859  		v.reset(OpMIPSMOVWconst)
  4860  		v.AuxInt = int32ToAuxInt(d >> uint32(c))
  4861  		return true
  4862  	}
  4863  	return false
  4864  }
  4865  func rewriteValueMIPS_OpMIPSSRL(v *Value) bool {
  4866  	v_1 := v.Args[1]
  4867  	v_0 := v.Args[0]
  4868  	// match: (SRL x (MOVWconst [c]))
  4869  	// result: (SRLconst x [c&31])
  4870  	for {
  4871  		x := v_0
  4872  		if v_1.Op != OpMIPSMOVWconst {
  4873  			break
  4874  		}
  4875  		c := auxIntToInt32(v_1.AuxInt)
  4876  		v.reset(OpMIPSSRLconst)
  4877  		v.AuxInt = int32ToAuxInt(c & 31)
  4878  		v.AddArg(x)
  4879  		return true
  4880  	}
  4881  	return false
  4882  }
  4883  func rewriteValueMIPS_OpMIPSSRLconst(v *Value) bool {
  4884  	v_0 := v.Args[0]
  4885  	// match: (SRLconst [c] (MOVWconst [d]))
  4886  	// result: (MOVWconst [int32(uint32(d)>>uint32(c))])
  4887  	for {
  4888  		c := auxIntToInt32(v.AuxInt)
  4889  		if v_0.Op != OpMIPSMOVWconst {
  4890  			break
  4891  		}
  4892  		d := auxIntToInt32(v_0.AuxInt)
  4893  		v.reset(OpMIPSMOVWconst)
  4894  		v.AuxInt = int32ToAuxInt(int32(uint32(d) >> uint32(c)))
  4895  		return true
  4896  	}
  4897  	return false
  4898  }
  4899  func rewriteValueMIPS_OpMIPSSUB(v *Value) bool {
  4900  	v_1 := v.Args[1]
  4901  	v_0 := v.Args[0]
  4902  	// match: (SUB x (MOVWconst [c]))
  4903  	// result: (SUBconst [c] x)
  4904  	for {
  4905  		x := v_0
  4906  		if v_1.Op != OpMIPSMOVWconst {
  4907  			break
  4908  		}
  4909  		c := auxIntToInt32(v_1.AuxInt)
  4910  		v.reset(OpMIPSSUBconst)
  4911  		v.AuxInt = int32ToAuxInt(c)
  4912  		v.AddArg(x)
  4913  		return true
  4914  	}
  4915  	// match: (SUB x (NEG y))
  4916  	// result: (ADD x y)
  4917  	for {
  4918  		x := v_0
  4919  		if v_1.Op != OpMIPSNEG {
  4920  			break
  4921  		}
  4922  		y := v_1.Args[0]
  4923  		v.reset(OpMIPSADD)
  4924  		v.AddArg2(x, y)
  4925  		return true
  4926  	}
  4927  	// match: (SUB x x)
  4928  	// result: (MOVWconst [0])
  4929  	for {
  4930  		x := v_0
  4931  		if x != v_1 {
  4932  			break
  4933  		}
  4934  		v.reset(OpMIPSMOVWconst)
  4935  		v.AuxInt = int32ToAuxInt(0)
  4936  		return true
  4937  	}
  4938  	// match: (SUB (MOVWconst [0]) x)
  4939  	// result: (NEG x)
  4940  	for {
  4941  		if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4942  			break
  4943  		}
  4944  		x := v_1
  4945  		v.reset(OpMIPSNEG)
  4946  		v.AddArg(x)
  4947  		return true
  4948  	}
  4949  	return false
  4950  }
  4951  func rewriteValueMIPS_OpMIPSSUBconst(v *Value) bool {
  4952  	v_0 := v.Args[0]
  4953  	// match: (SUBconst [0] x)
  4954  	// result: x
  4955  	for {
  4956  		if auxIntToInt32(v.AuxInt) != 0 {
  4957  			break
  4958  		}
  4959  		x := v_0
  4960  		v.copyOf(x)
  4961  		return true
  4962  	}
  4963  	// match: (SUBconst [c] (MOVWconst [d]))
  4964  	// result: (MOVWconst [d-c])
  4965  	for {
  4966  		c := auxIntToInt32(v.AuxInt)
  4967  		if v_0.Op != OpMIPSMOVWconst {
  4968  			break
  4969  		}
  4970  		d := auxIntToInt32(v_0.AuxInt)
  4971  		v.reset(OpMIPSMOVWconst)
  4972  		v.AuxInt = int32ToAuxInt(d - c)
  4973  		return true
  4974  	}
  4975  	// match: (SUBconst [c] (SUBconst [d] x))
  4976  	// result: (ADDconst [-c-d] x)
  4977  	for {
  4978  		c := auxIntToInt32(v.AuxInt)
  4979  		if v_0.Op != OpMIPSSUBconst {
  4980  			break
  4981  		}
  4982  		d := auxIntToInt32(v_0.AuxInt)
  4983  		x := v_0.Args[0]
  4984  		v.reset(OpMIPSADDconst)
  4985  		v.AuxInt = int32ToAuxInt(-c - d)
  4986  		v.AddArg(x)
  4987  		return true
  4988  	}
  4989  	// match: (SUBconst [c] (ADDconst [d] x))
  4990  	// result: (ADDconst [-c+d] x)
  4991  	for {
  4992  		c := auxIntToInt32(v.AuxInt)
  4993  		if v_0.Op != OpMIPSADDconst {
  4994  			break
  4995  		}
  4996  		d := auxIntToInt32(v_0.AuxInt)
  4997  		x := v_0.Args[0]
  4998  		v.reset(OpMIPSADDconst)
  4999  		v.AuxInt = int32ToAuxInt(-c + d)
  5000  		v.AddArg(x)
  5001  		return true
  5002  	}
  5003  	return false
  5004  }
  5005  func rewriteValueMIPS_OpMIPSXOR(v *Value) bool {
  5006  	v_1 := v.Args[1]
  5007  	v_0 := v.Args[0]
  5008  	// match: (XOR x (MOVWconst [c]))
  5009  	// result: (XORconst [c] x)
  5010  	for {
  5011  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5012  			x := v_0
  5013  			if v_1.Op != OpMIPSMOVWconst {
  5014  				continue
  5015  			}
  5016  			c := auxIntToInt32(v_1.AuxInt)
  5017  			v.reset(OpMIPSXORconst)
  5018  			v.AuxInt = int32ToAuxInt(c)
  5019  			v.AddArg(x)
  5020  			return true
  5021  		}
  5022  		break
  5023  	}
  5024  	// match: (XOR x x)
  5025  	// result: (MOVWconst [0])
  5026  	for {
  5027  		x := v_0
  5028  		if x != v_1 {
  5029  			break
  5030  		}
  5031  		v.reset(OpMIPSMOVWconst)
  5032  		v.AuxInt = int32ToAuxInt(0)
  5033  		return true
  5034  	}
  5035  	return false
  5036  }
  5037  func rewriteValueMIPS_OpMIPSXORconst(v *Value) bool {
  5038  	v_0 := v.Args[0]
  5039  	// match: (XORconst [0] x)
  5040  	// result: x
  5041  	for {
  5042  		if auxIntToInt32(v.AuxInt) != 0 {
  5043  			break
  5044  		}
  5045  		x := v_0
  5046  		v.copyOf(x)
  5047  		return true
  5048  	}
  5049  	// match: (XORconst [-1] x)
  5050  	// result: (NORconst [0] x)
  5051  	for {
  5052  		if auxIntToInt32(v.AuxInt) != -1 {
  5053  			break
  5054  		}
  5055  		x := v_0
  5056  		v.reset(OpMIPSNORconst)
  5057  		v.AuxInt = int32ToAuxInt(0)
  5058  		v.AddArg(x)
  5059  		return true
  5060  	}
  5061  	// match: (XORconst [c] (MOVWconst [d]))
  5062  	// result: (MOVWconst [c^d])
  5063  	for {
  5064  		c := auxIntToInt32(v.AuxInt)
  5065  		if v_0.Op != OpMIPSMOVWconst {
  5066  			break
  5067  		}
  5068  		d := auxIntToInt32(v_0.AuxInt)
  5069  		v.reset(OpMIPSMOVWconst)
  5070  		v.AuxInt = int32ToAuxInt(c ^ d)
  5071  		return true
  5072  	}
  5073  	// match: (XORconst [c] (XORconst [d] x))
  5074  	// result: (XORconst [c^d] x)
  5075  	for {
  5076  		c := auxIntToInt32(v.AuxInt)
  5077  		if v_0.Op != OpMIPSXORconst {
  5078  			break
  5079  		}
  5080  		d := auxIntToInt32(v_0.AuxInt)
  5081  		x := v_0.Args[0]
  5082  		v.reset(OpMIPSXORconst)
  5083  		v.AuxInt = int32ToAuxInt(c ^ d)
  5084  		v.AddArg(x)
  5085  		return true
  5086  	}
  5087  	return false
  5088  }
  5089  func rewriteValueMIPS_OpMod16(v *Value) bool {
  5090  	v_1 := v.Args[1]
  5091  	v_0 := v.Args[0]
  5092  	b := v.Block
  5093  	typ := &b.Func.Config.Types
  5094  	// match: (Mod16 x y)
  5095  	// result: (Select0 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  5096  	for {
  5097  		x := v_0
  5098  		y := v_1
  5099  		v.reset(OpSelect0)
  5100  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5101  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5102  		v1.AddArg(x)
  5103  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5104  		v2.AddArg(y)
  5105  		v0.AddArg2(v1, v2)
  5106  		v.AddArg(v0)
  5107  		return true
  5108  	}
  5109  }
  5110  func rewriteValueMIPS_OpMod16u(v *Value) bool {
  5111  	v_1 := v.Args[1]
  5112  	v_0 := v.Args[0]
  5113  	b := v.Block
  5114  	typ := &b.Func.Config.Types
  5115  	// match: (Mod16u x y)
  5116  	// result: (Select0 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  5117  	for {
  5118  		x := v_0
  5119  		y := v_1
  5120  		v.reset(OpSelect0)
  5121  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5122  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5123  		v1.AddArg(x)
  5124  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5125  		v2.AddArg(y)
  5126  		v0.AddArg2(v1, v2)
  5127  		v.AddArg(v0)
  5128  		return true
  5129  	}
  5130  }
  5131  func rewriteValueMIPS_OpMod32(v *Value) bool {
  5132  	v_1 := v.Args[1]
  5133  	v_0 := v.Args[0]
  5134  	b := v.Block
  5135  	typ := &b.Func.Config.Types
  5136  	// match: (Mod32 x y)
  5137  	// result: (Select0 (DIV x y))
  5138  	for {
  5139  		x := v_0
  5140  		y := v_1
  5141  		v.reset(OpSelect0)
  5142  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5143  		v0.AddArg2(x, y)
  5144  		v.AddArg(v0)
  5145  		return true
  5146  	}
  5147  }
  5148  func rewriteValueMIPS_OpMod32u(v *Value) bool {
  5149  	v_1 := v.Args[1]
  5150  	v_0 := v.Args[0]
  5151  	b := v.Block
  5152  	typ := &b.Func.Config.Types
  5153  	// match: (Mod32u x y)
  5154  	// result: (Select0 (DIVU x y))
  5155  	for {
  5156  		x := v_0
  5157  		y := v_1
  5158  		v.reset(OpSelect0)
  5159  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5160  		v0.AddArg2(x, y)
  5161  		v.AddArg(v0)
  5162  		return true
  5163  	}
  5164  }
  5165  func rewriteValueMIPS_OpMod8(v *Value) bool {
  5166  	v_1 := v.Args[1]
  5167  	v_0 := v.Args[0]
  5168  	b := v.Block
  5169  	typ := &b.Func.Config.Types
  5170  	// match: (Mod8 x y)
  5171  	// result: (Select0 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  5172  	for {
  5173  		x := v_0
  5174  		y := v_1
  5175  		v.reset(OpSelect0)
  5176  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5177  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5178  		v1.AddArg(x)
  5179  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5180  		v2.AddArg(y)
  5181  		v0.AddArg2(v1, v2)
  5182  		v.AddArg(v0)
  5183  		return true
  5184  	}
  5185  }
  5186  func rewriteValueMIPS_OpMod8u(v *Value) bool {
  5187  	v_1 := v.Args[1]
  5188  	v_0 := v.Args[0]
  5189  	b := v.Block
  5190  	typ := &b.Func.Config.Types
  5191  	// match: (Mod8u x y)
  5192  	// result: (Select0 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  5193  	for {
  5194  		x := v_0
  5195  		y := v_1
  5196  		v.reset(OpSelect0)
  5197  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5198  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5199  		v1.AddArg(x)
  5200  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5201  		v2.AddArg(y)
  5202  		v0.AddArg2(v1, v2)
  5203  		v.AddArg(v0)
  5204  		return true
  5205  	}
  5206  }
  5207  func rewriteValueMIPS_OpMove(v *Value) bool {
  5208  	v_2 := v.Args[2]
  5209  	v_1 := v.Args[1]
  5210  	v_0 := v.Args[0]
  5211  	b := v.Block
  5212  	config := b.Func.Config
  5213  	typ := &b.Func.Config.Types
  5214  	// match: (Move [0] _ _ mem)
  5215  	// result: mem
  5216  	for {
  5217  		if auxIntToInt64(v.AuxInt) != 0 {
  5218  			break
  5219  		}
  5220  		mem := v_2
  5221  		v.copyOf(mem)
  5222  		return true
  5223  	}
  5224  	// match: (Move [1] dst src mem)
  5225  	// result: (MOVBstore dst (MOVBUload src mem) mem)
  5226  	for {
  5227  		if auxIntToInt64(v.AuxInt) != 1 {
  5228  			break
  5229  		}
  5230  		dst := v_0
  5231  		src := v_1
  5232  		mem := v_2
  5233  		v.reset(OpMIPSMOVBstore)
  5234  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5235  		v0.AddArg2(src, mem)
  5236  		v.AddArg3(dst, v0, mem)
  5237  		return true
  5238  	}
  5239  	// match: (Move [2] {t} dst src mem)
  5240  	// cond: t.Alignment()%2 == 0
  5241  	// result: (MOVHstore dst (MOVHUload src mem) mem)
  5242  	for {
  5243  		if auxIntToInt64(v.AuxInt) != 2 {
  5244  			break
  5245  		}
  5246  		t := auxToType(v.Aux)
  5247  		dst := v_0
  5248  		src := v_1
  5249  		mem := v_2
  5250  		if !(t.Alignment()%2 == 0) {
  5251  			break
  5252  		}
  5253  		v.reset(OpMIPSMOVHstore)
  5254  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5255  		v0.AddArg2(src, mem)
  5256  		v.AddArg3(dst, v0, mem)
  5257  		return true
  5258  	}
  5259  	// match: (Move [2] dst src mem)
  5260  	// result: (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))
  5261  	for {
  5262  		if auxIntToInt64(v.AuxInt) != 2 {
  5263  			break
  5264  		}
  5265  		dst := v_0
  5266  		src := v_1
  5267  		mem := v_2
  5268  		v.reset(OpMIPSMOVBstore)
  5269  		v.AuxInt = int32ToAuxInt(1)
  5270  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5271  		v0.AuxInt = int32ToAuxInt(1)
  5272  		v0.AddArg2(src, mem)
  5273  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5274  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5275  		v2.AddArg2(src, mem)
  5276  		v1.AddArg3(dst, v2, mem)
  5277  		v.AddArg3(dst, v0, v1)
  5278  		return true
  5279  	}
  5280  	// match: (Move [4] {t} dst src mem)
  5281  	// cond: t.Alignment()%4 == 0
  5282  	// result: (MOVWstore dst (MOVWload src mem) mem)
  5283  	for {
  5284  		if auxIntToInt64(v.AuxInt) != 4 {
  5285  			break
  5286  		}
  5287  		t := auxToType(v.Aux)
  5288  		dst := v_0
  5289  		src := v_1
  5290  		mem := v_2
  5291  		if !(t.Alignment()%4 == 0) {
  5292  			break
  5293  		}
  5294  		v.reset(OpMIPSMOVWstore)
  5295  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5296  		v0.AddArg2(src, mem)
  5297  		v.AddArg3(dst, v0, mem)
  5298  		return true
  5299  	}
  5300  	// match: (Move [4] {t} dst src mem)
  5301  	// cond: t.Alignment()%2 == 0
  5302  	// result: (MOVHstore [2] dst (MOVHUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
  5303  	for {
  5304  		if auxIntToInt64(v.AuxInt) != 4 {
  5305  			break
  5306  		}
  5307  		t := auxToType(v.Aux)
  5308  		dst := v_0
  5309  		src := v_1
  5310  		mem := v_2
  5311  		if !(t.Alignment()%2 == 0) {
  5312  			break
  5313  		}
  5314  		v.reset(OpMIPSMOVHstore)
  5315  		v.AuxInt = int32ToAuxInt(2)
  5316  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5317  		v0.AuxInt = int32ToAuxInt(2)
  5318  		v0.AddArg2(src, mem)
  5319  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5320  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5321  		v2.AddArg2(src, mem)
  5322  		v1.AddArg3(dst, v2, mem)
  5323  		v.AddArg3(dst, v0, v1)
  5324  		return true
  5325  	}
  5326  	// match: (Move [4] dst src mem)
  5327  	// result: (MOVBstore [3] dst (MOVBUload [3] src mem) (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))))
  5328  	for {
  5329  		if auxIntToInt64(v.AuxInt) != 4 {
  5330  			break
  5331  		}
  5332  		dst := v_0
  5333  		src := v_1
  5334  		mem := v_2
  5335  		v.reset(OpMIPSMOVBstore)
  5336  		v.AuxInt = int32ToAuxInt(3)
  5337  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5338  		v0.AuxInt = int32ToAuxInt(3)
  5339  		v0.AddArg2(src, mem)
  5340  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5341  		v1.AuxInt = int32ToAuxInt(2)
  5342  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5343  		v2.AuxInt = int32ToAuxInt(2)
  5344  		v2.AddArg2(src, mem)
  5345  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5346  		v3.AuxInt = int32ToAuxInt(1)
  5347  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5348  		v4.AuxInt = int32ToAuxInt(1)
  5349  		v4.AddArg2(src, mem)
  5350  		v5 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5351  		v6 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5352  		v6.AddArg2(src, mem)
  5353  		v5.AddArg3(dst, v6, mem)
  5354  		v3.AddArg3(dst, v4, v5)
  5355  		v1.AddArg3(dst, v2, v3)
  5356  		v.AddArg3(dst, v0, v1)
  5357  		return true
  5358  	}
  5359  	// match: (Move [3] dst src mem)
  5360  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)))
  5361  	for {
  5362  		if auxIntToInt64(v.AuxInt) != 3 {
  5363  			break
  5364  		}
  5365  		dst := v_0
  5366  		src := v_1
  5367  		mem := v_2
  5368  		v.reset(OpMIPSMOVBstore)
  5369  		v.AuxInt = int32ToAuxInt(2)
  5370  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5371  		v0.AuxInt = int32ToAuxInt(2)
  5372  		v0.AddArg2(src, mem)
  5373  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5374  		v1.AuxInt = int32ToAuxInt(1)
  5375  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5376  		v2.AuxInt = int32ToAuxInt(1)
  5377  		v2.AddArg2(src, mem)
  5378  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5379  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5380  		v4.AddArg2(src, mem)
  5381  		v3.AddArg3(dst, v4, mem)
  5382  		v1.AddArg3(dst, v2, v3)
  5383  		v.AddArg3(dst, v0, v1)
  5384  		return true
  5385  	}
  5386  	// match: (Move [8] {t} dst src mem)
  5387  	// cond: t.Alignment()%4 == 0
  5388  	// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))
  5389  	for {
  5390  		if auxIntToInt64(v.AuxInt) != 8 {
  5391  			break
  5392  		}
  5393  		t := auxToType(v.Aux)
  5394  		dst := v_0
  5395  		src := v_1
  5396  		mem := v_2
  5397  		if !(t.Alignment()%4 == 0) {
  5398  			break
  5399  		}
  5400  		v.reset(OpMIPSMOVWstore)
  5401  		v.AuxInt = int32ToAuxInt(4)
  5402  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5403  		v0.AuxInt = int32ToAuxInt(4)
  5404  		v0.AddArg2(src, mem)
  5405  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5406  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5407  		v2.AddArg2(src, mem)
  5408  		v1.AddArg3(dst, v2, mem)
  5409  		v.AddArg3(dst, v0, v1)
  5410  		return true
  5411  	}
  5412  	// match: (Move [8] {t} dst src mem)
  5413  	// cond: t.Alignment()%2 == 0
  5414  	// result: (MOVHstore [6] dst (MOVHload [6] src mem) (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))))
  5415  	for {
  5416  		if auxIntToInt64(v.AuxInt) != 8 {
  5417  			break
  5418  		}
  5419  		t := auxToType(v.Aux)
  5420  		dst := v_0
  5421  		src := v_1
  5422  		mem := v_2
  5423  		if !(t.Alignment()%2 == 0) {
  5424  			break
  5425  		}
  5426  		v.reset(OpMIPSMOVHstore)
  5427  		v.AuxInt = int32ToAuxInt(6)
  5428  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5429  		v0.AuxInt = int32ToAuxInt(6)
  5430  		v0.AddArg2(src, mem)
  5431  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5432  		v1.AuxInt = int32ToAuxInt(4)
  5433  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5434  		v2.AuxInt = int32ToAuxInt(4)
  5435  		v2.AddArg2(src, mem)
  5436  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5437  		v3.AuxInt = int32ToAuxInt(2)
  5438  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5439  		v4.AuxInt = int32ToAuxInt(2)
  5440  		v4.AddArg2(src, mem)
  5441  		v5 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5442  		v6 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5443  		v6.AddArg2(src, mem)
  5444  		v5.AddArg3(dst, v6, mem)
  5445  		v3.AddArg3(dst, v4, v5)
  5446  		v1.AddArg3(dst, v2, v3)
  5447  		v.AddArg3(dst, v0, v1)
  5448  		return true
  5449  	}
  5450  	// match: (Move [6] {t} dst src mem)
  5451  	// cond: t.Alignment()%2 == 0
  5452  	// result: (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)))
  5453  	for {
  5454  		if auxIntToInt64(v.AuxInt) != 6 {
  5455  			break
  5456  		}
  5457  		t := auxToType(v.Aux)
  5458  		dst := v_0
  5459  		src := v_1
  5460  		mem := v_2
  5461  		if !(t.Alignment()%2 == 0) {
  5462  			break
  5463  		}
  5464  		v.reset(OpMIPSMOVHstore)
  5465  		v.AuxInt = int32ToAuxInt(4)
  5466  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5467  		v0.AuxInt = int32ToAuxInt(4)
  5468  		v0.AddArg2(src, mem)
  5469  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5470  		v1.AuxInt = int32ToAuxInt(2)
  5471  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5472  		v2.AuxInt = int32ToAuxInt(2)
  5473  		v2.AddArg2(src, mem)
  5474  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5475  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5476  		v4.AddArg2(src, mem)
  5477  		v3.AddArg3(dst, v4, mem)
  5478  		v1.AddArg3(dst, v2, v3)
  5479  		v.AddArg3(dst, v0, v1)
  5480  		return true
  5481  	}
  5482  	// match: (Move [12] {t} dst src mem)
  5483  	// cond: t.Alignment()%4 == 0
  5484  	// result: (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem)))
  5485  	for {
  5486  		if auxIntToInt64(v.AuxInt) != 12 {
  5487  			break
  5488  		}
  5489  		t := auxToType(v.Aux)
  5490  		dst := v_0
  5491  		src := v_1
  5492  		mem := v_2
  5493  		if !(t.Alignment()%4 == 0) {
  5494  			break
  5495  		}
  5496  		v.reset(OpMIPSMOVWstore)
  5497  		v.AuxInt = int32ToAuxInt(8)
  5498  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5499  		v0.AuxInt = int32ToAuxInt(8)
  5500  		v0.AddArg2(src, mem)
  5501  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5502  		v1.AuxInt = int32ToAuxInt(4)
  5503  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5504  		v2.AuxInt = int32ToAuxInt(4)
  5505  		v2.AddArg2(src, mem)
  5506  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5507  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5508  		v4.AddArg2(src, mem)
  5509  		v3.AddArg3(dst, v4, mem)
  5510  		v1.AddArg3(dst, v2, v3)
  5511  		v.AddArg3(dst, v0, v1)
  5512  		return true
  5513  	}
  5514  	// match: (Move [16] {t} dst src mem)
  5515  	// cond: t.Alignment()%4 == 0
  5516  	// result: (MOVWstore [12] dst (MOVWload [12] src mem) (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))))
  5517  	for {
  5518  		if auxIntToInt64(v.AuxInt) != 16 {
  5519  			break
  5520  		}
  5521  		t := auxToType(v.Aux)
  5522  		dst := v_0
  5523  		src := v_1
  5524  		mem := v_2
  5525  		if !(t.Alignment()%4 == 0) {
  5526  			break
  5527  		}
  5528  		v.reset(OpMIPSMOVWstore)
  5529  		v.AuxInt = int32ToAuxInt(12)
  5530  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5531  		v0.AuxInt = int32ToAuxInt(12)
  5532  		v0.AddArg2(src, mem)
  5533  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5534  		v1.AuxInt = int32ToAuxInt(8)
  5535  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5536  		v2.AuxInt = int32ToAuxInt(8)
  5537  		v2.AddArg2(src, mem)
  5538  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5539  		v3.AuxInt = int32ToAuxInt(4)
  5540  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5541  		v4.AuxInt = int32ToAuxInt(4)
  5542  		v4.AddArg2(src, mem)
  5543  		v5 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5544  		v6 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5545  		v6.AddArg2(src, mem)
  5546  		v5.AddArg3(dst, v6, mem)
  5547  		v3.AddArg3(dst, v4, v5)
  5548  		v1.AddArg3(dst, v2, v3)
  5549  		v.AddArg3(dst, v0, v1)
  5550  		return true
  5551  	}
  5552  	// match: (Move [s] {t} dst src mem)
  5553  	// cond: (s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0)
  5554  	// result: (LoweredMove [int32(t.Alignment())] dst src (ADDconst <src.Type> src [int32(s-moveSize(t.Alignment(), config))]) mem)
  5555  	for {
  5556  		s := auxIntToInt64(v.AuxInt)
  5557  		t := auxToType(v.Aux)
  5558  		dst := v_0
  5559  		src := v_1
  5560  		mem := v_2
  5561  		if !(s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0) {
  5562  			break
  5563  		}
  5564  		v.reset(OpMIPSLoweredMove)
  5565  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  5566  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, src.Type)
  5567  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  5568  		v0.AddArg(src)
  5569  		v.AddArg4(dst, src, v0, mem)
  5570  		return true
  5571  	}
  5572  	return false
  5573  }
  5574  func rewriteValueMIPS_OpNeq16(v *Value) bool {
  5575  	v_1 := v.Args[1]
  5576  	v_0 := v.Args[0]
  5577  	b := v.Block
  5578  	typ := &b.Func.Config.Types
  5579  	// match: (Neq16 x y)
  5580  	// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
  5581  	for {
  5582  		x := v_0
  5583  		y := v_1
  5584  		v.reset(OpMIPSSGTU)
  5585  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5586  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5587  		v1.AddArg(x)
  5588  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5589  		v2.AddArg(y)
  5590  		v0.AddArg2(v1, v2)
  5591  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5592  		v3.AuxInt = int32ToAuxInt(0)
  5593  		v.AddArg2(v0, v3)
  5594  		return true
  5595  	}
  5596  }
  5597  func rewriteValueMIPS_OpNeq32(v *Value) bool {
  5598  	v_1 := v.Args[1]
  5599  	v_0 := v.Args[0]
  5600  	b := v.Block
  5601  	typ := &b.Func.Config.Types
  5602  	// match: (Neq32 x y)
  5603  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5604  	for {
  5605  		x := v_0
  5606  		y := v_1
  5607  		v.reset(OpMIPSSGTU)
  5608  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5609  		v0.AddArg2(x, y)
  5610  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5611  		v1.AuxInt = int32ToAuxInt(0)
  5612  		v.AddArg2(v0, v1)
  5613  		return true
  5614  	}
  5615  }
  5616  func rewriteValueMIPS_OpNeq32F(v *Value) bool {
  5617  	v_1 := v.Args[1]
  5618  	v_0 := v.Args[0]
  5619  	b := v.Block
  5620  	// match: (Neq32F x y)
  5621  	// result: (FPFlagFalse (CMPEQF x y))
  5622  	for {
  5623  		x := v_0
  5624  		y := v_1
  5625  		v.reset(OpMIPSFPFlagFalse)
  5626  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  5627  		v0.AddArg2(x, y)
  5628  		v.AddArg(v0)
  5629  		return true
  5630  	}
  5631  }
  5632  func rewriteValueMIPS_OpNeq64F(v *Value) bool {
  5633  	v_1 := v.Args[1]
  5634  	v_0 := v.Args[0]
  5635  	b := v.Block
  5636  	// match: (Neq64F x y)
  5637  	// result: (FPFlagFalse (CMPEQD x y))
  5638  	for {
  5639  		x := v_0
  5640  		y := v_1
  5641  		v.reset(OpMIPSFPFlagFalse)
  5642  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  5643  		v0.AddArg2(x, y)
  5644  		v.AddArg(v0)
  5645  		return true
  5646  	}
  5647  }
  5648  func rewriteValueMIPS_OpNeq8(v *Value) bool {
  5649  	v_1 := v.Args[1]
  5650  	v_0 := v.Args[0]
  5651  	b := v.Block
  5652  	typ := &b.Func.Config.Types
  5653  	// match: (Neq8 x y)
  5654  	// result: (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
  5655  	for {
  5656  		x := v_0
  5657  		y := v_1
  5658  		v.reset(OpMIPSSGTU)
  5659  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5660  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5661  		v1.AddArg(x)
  5662  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5663  		v2.AddArg(y)
  5664  		v0.AddArg2(v1, v2)
  5665  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5666  		v3.AuxInt = int32ToAuxInt(0)
  5667  		v.AddArg2(v0, v3)
  5668  		return true
  5669  	}
  5670  }
  5671  func rewriteValueMIPS_OpNeqPtr(v *Value) bool {
  5672  	v_1 := v.Args[1]
  5673  	v_0 := v.Args[0]
  5674  	b := v.Block
  5675  	typ := &b.Func.Config.Types
  5676  	// match: (NeqPtr x y)
  5677  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5678  	for {
  5679  		x := v_0
  5680  		y := v_1
  5681  		v.reset(OpMIPSSGTU)
  5682  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5683  		v0.AddArg2(x, y)
  5684  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5685  		v1.AuxInt = int32ToAuxInt(0)
  5686  		v.AddArg2(v0, v1)
  5687  		return true
  5688  	}
  5689  }
  5690  func rewriteValueMIPS_OpNot(v *Value) bool {
  5691  	v_0 := v.Args[0]
  5692  	// match: (Not x)
  5693  	// result: (XORconst [1] x)
  5694  	for {
  5695  		x := v_0
  5696  		v.reset(OpMIPSXORconst)
  5697  		v.AuxInt = int32ToAuxInt(1)
  5698  		v.AddArg(x)
  5699  		return true
  5700  	}
  5701  }
  5702  func rewriteValueMIPS_OpOffPtr(v *Value) bool {
  5703  	v_0 := v.Args[0]
  5704  	// match: (OffPtr [off] ptr:(SP))
  5705  	// result: (MOVWaddr [int32(off)] ptr)
  5706  	for {
  5707  		off := auxIntToInt64(v.AuxInt)
  5708  		ptr := v_0
  5709  		if ptr.Op != OpSP {
  5710  			break
  5711  		}
  5712  		v.reset(OpMIPSMOVWaddr)
  5713  		v.AuxInt = int32ToAuxInt(int32(off))
  5714  		v.AddArg(ptr)
  5715  		return true
  5716  	}
  5717  	// match: (OffPtr [off] ptr)
  5718  	// result: (ADDconst [int32(off)] ptr)
  5719  	for {
  5720  		off := auxIntToInt64(v.AuxInt)
  5721  		ptr := v_0
  5722  		v.reset(OpMIPSADDconst)
  5723  		v.AuxInt = int32ToAuxInt(int32(off))
  5724  		v.AddArg(ptr)
  5725  		return true
  5726  	}
  5727  }
  5728  func rewriteValueMIPS_OpRotateLeft16(v *Value) bool {
  5729  	v_1 := v.Args[1]
  5730  	v_0 := v.Args[0]
  5731  	b := v.Block
  5732  	typ := &b.Func.Config.Types
  5733  	// match: (RotateLeft16 <t> x (MOVWconst [c]))
  5734  	// result: (Or16 (Lsh16x32 <t> x (MOVWconst [c&15])) (Rsh16Ux32 <t> x (MOVWconst [-c&15])))
  5735  	for {
  5736  		t := v.Type
  5737  		x := v_0
  5738  		if v_1.Op != OpMIPSMOVWconst {
  5739  			break
  5740  		}
  5741  		c := auxIntToInt32(v_1.AuxInt)
  5742  		v.reset(OpOr16)
  5743  		v0 := b.NewValue0(v.Pos, OpLsh16x32, t)
  5744  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5745  		v1.AuxInt = int32ToAuxInt(c & 15)
  5746  		v0.AddArg2(x, v1)
  5747  		v2 := b.NewValue0(v.Pos, OpRsh16Ux32, t)
  5748  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5749  		v3.AuxInt = int32ToAuxInt(-c & 15)
  5750  		v2.AddArg2(x, v3)
  5751  		v.AddArg2(v0, v2)
  5752  		return true
  5753  	}
  5754  	return false
  5755  }
  5756  func rewriteValueMIPS_OpRotateLeft32(v *Value) bool {
  5757  	v_1 := v.Args[1]
  5758  	v_0 := v.Args[0]
  5759  	b := v.Block
  5760  	typ := &b.Func.Config.Types
  5761  	// match: (RotateLeft32 <t> x (MOVWconst [c]))
  5762  	// result: (Or32 (Lsh32x32 <t> x (MOVWconst [c&31])) (Rsh32Ux32 <t> x (MOVWconst [-c&31])))
  5763  	for {
  5764  		t := v.Type
  5765  		x := v_0
  5766  		if v_1.Op != OpMIPSMOVWconst {
  5767  			break
  5768  		}
  5769  		c := auxIntToInt32(v_1.AuxInt)
  5770  		v.reset(OpOr32)
  5771  		v0 := b.NewValue0(v.Pos, OpLsh32x32, t)
  5772  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5773  		v1.AuxInt = int32ToAuxInt(c & 31)
  5774  		v0.AddArg2(x, v1)
  5775  		v2 := b.NewValue0(v.Pos, OpRsh32Ux32, t)
  5776  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5777  		v3.AuxInt = int32ToAuxInt(-c & 31)
  5778  		v2.AddArg2(x, v3)
  5779  		v.AddArg2(v0, v2)
  5780  		return true
  5781  	}
  5782  	return false
  5783  }
  5784  func rewriteValueMIPS_OpRotateLeft64(v *Value) bool {
  5785  	v_1 := v.Args[1]
  5786  	v_0 := v.Args[0]
  5787  	b := v.Block
  5788  	typ := &b.Func.Config.Types
  5789  	// match: (RotateLeft64 <t> x (MOVWconst [c]))
  5790  	// result: (Or64 (Lsh64x32 <t> x (MOVWconst [c&63])) (Rsh64Ux32 <t> x (MOVWconst [-c&63])))
  5791  	for {
  5792  		t := v.Type
  5793  		x := v_0
  5794  		if v_1.Op != OpMIPSMOVWconst {
  5795  			break
  5796  		}
  5797  		c := auxIntToInt32(v_1.AuxInt)
  5798  		v.reset(OpOr64)
  5799  		v0 := b.NewValue0(v.Pos, OpLsh64x32, t)
  5800  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5801  		v1.AuxInt = int32ToAuxInt(c & 63)
  5802  		v0.AddArg2(x, v1)
  5803  		v2 := b.NewValue0(v.Pos, OpRsh64Ux32, t)
  5804  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5805  		v3.AuxInt = int32ToAuxInt(-c & 63)
  5806  		v2.AddArg2(x, v3)
  5807  		v.AddArg2(v0, v2)
  5808  		return true
  5809  	}
  5810  	return false
  5811  }
  5812  func rewriteValueMIPS_OpRotateLeft8(v *Value) bool {
  5813  	v_1 := v.Args[1]
  5814  	v_0 := v.Args[0]
  5815  	b := v.Block
  5816  	typ := &b.Func.Config.Types
  5817  	// match: (RotateLeft8 <t> x (MOVWconst [c]))
  5818  	// result: (Or8 (Lsh8x32 <t> x (MOVWconst [c&7])) (Rsh8Ux32 <t> x (MOVWconst [-c&7])))
  5819  	for {
  5820  		t := v.Type
  5821  		x := v_0
  5822  		if v_1.Op != OpMIPSMOVWconst {
  5823  			break
  5824  		}
  5825  		c := auxIntToInt32(v_1.AuxInt)
  5826  		v.reset(OpOr8)
  5827  		v0 := b.NewValue0(v.Pos, OpLsh8x32, t)
  5828  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5829  		v1.AuxInt = int32ToAuxInt(c & 7)
  5830  		v0.AddArg2(x, v1)
  5831  		v2 := b.NewValue0(v.Pos, OpRsh8Ux32, t)
  5832  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5833  		v3.AuxInt = int32ToAuxInt(-c & 7)
  5834  		v2.AddArg2(x, v3)
  5835  		v.AddArg2(v0, v2)
  5836  		return true
  5837  	}
  5838  	return false
  5839  }
  5840  func rewriteValueMIPS_OpRsh16Ux16(v *Value) bool {
  5841  	v_1 := v.Args[1]
  5842  	v_0 := v.Args[0]
  5843  	b := v.Block
  5844  	typ := &b.Func.Config.Types
  5845  	// match: (Rsh16Ux16 <t> x y)
  5846  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  5847  	for {
  5848  		t := v.Type
  5849  		x := v_0
  5850  		y := v_1
  5851  		v.reset(OpMIPSCMOVZ)
  5852  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5853  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5854  		v1.AddArg(x)
  5855  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5856  		v2.AddArg(y)
  5857  		v0.AddArg2(v1, v2)
  5858  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5859  		v3.AuxInt = int32ToAuxInt(0)
  5860  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5861  		v4.AuxInt = int32ToAuxInt(32)
  5862  		v4.AddArg(v2)
  5863  		v.AddArg3(v0, v3, v4)
  5864  		return true
  5865  	}
  5866  }
  5867  func rewriteValueMIPS_OpRsh16Ux32(v *Value) bool {
  5868  	v_1 := v.Args[1]
  5869  	v_0 := v.Args[0]
  5870  	b := v.Block
  5871  	typ := &b.Func.Config.Types
  5872  	// match: (Rsh16Ux32 <t> x y)
  5873  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  5874  	for {
  5875  		t := v.Type
  5876  		x := v_0
  5877  		y := v_1
  5878  		v.reset(OpMIPSCMOVZ)
  5879  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5880  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5881  		v1.AddArg(x)
  5882  		v0.AddArg2(v1, y)
  5883  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5884  		v2.AuxInt = int32ToAuxInt(0)
  5885  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5886  		v3.AuxInt = int32ToAuxInt(32)
  5887  		v3.AddArg(y)
  5888  		v.AddArg3(v0, v2, v3)
  5889  		return true
  5890  	}
  5891  }
  5892  func rewriteValueMIPS_OpRsh16Ux64(v *Value) bool {
  5893  	v_1 := v.Args[1]
  5894  	v_0 := v.Args[0]
  5895  	b := v.Block
  5896  	typ := &b.Func.Config.Types
  5897  	// match: (Rsh16Ux64 x (Const64 [c]))
  5898  	// cond: uint32(c) < 16
  5899  	// result: (SRLconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5900  	for {
  5901  		x := v_0
  5902  		if v_1.Op != OpConst64 {
  5903  			break
  5904  		}
  5905  		c := auxIntToInt64(v_1.AuxInt)
  5906  		if !(uint32(c) < 16) {
  5907  			break
  5908  		}
  5909  		v.reset(OpMIPSSRLconst)
  5910  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5911  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5912  		v0.AuxInt = int32ToAuxInt(16)
  5913  		v0.AddArg(x)
  5914  		v.AddArg(v0)
  5915  		return true
  5916  	}
  5917  	// match: (Rsh16Ux64 _ (Const64 [c]))
  5918  	// cond: uint32(c) >= 16
  5919  	// result: (MOVWconst [0])
  5920  	for {
  5921  		if v_1.Op != OpConst64 {
  5922  			break
  5923  		}
  5924  		c := auxIntToInt64(v_1.AuxInt)
  5925  		if !(uint32(c) >= 16) {
  5926  			break
  5927  		}
  5928  		v.reset(OpMIPSMOVWconst)
  5929  		v.AuxInt = int32ToAuxInt(0)
  5930  		return true
  5931  	}
  5932  	return false
  5933  }
  5934  func rewriteValueMIPS_OpRsh16Ux8(v *Value) bool {
  5935  	v_1 := v.Args[1]
  5936  	v_0 := v.Args[0]
  5937  	b := v.Block
  5938  	typ := &b.Func.Config.Types
  5939  	// match: (Rsh16Ux8 <t> x y)
  5940  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  5941  	for {
  5942  		t := v.Type
  5943  		x := v_0
  5944  		y := v_1
  5945  		v.reset(OpMIPSCMOVZ)
  5946  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5947  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5948  		v1.AddArg(x)
  5949  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5950  		v2.AddArg(y)
  5951  		v0.AddArg2(v1, v2)
  5952  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5953  		v3.AuxInt = int32ToAuxInt(0)
  5954  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5955  		v4.AuxInt = int32ToAuxInt(32)
  5956  		v4.AddArg(v2)
  5957  		v.AddArg3(v0, v3, v4)
  5958  		return true
  5959  	}
  5960  }
  5961  func rewriteValueMIPS_OpRsh16x16(v *Value) bool {
  5962  	v_1 := v.Args[1]
  5963  	v_0 := v.Args[0]
  5964  	b := v.Block
  5965  	typ := &b.Func.Config.Types
  5966  	// match: (Rsh16x16 x y)
  5967  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  5968  	for {
  5969  		x := v_0
  5970  		y := v_1
  5971  		v.reset(OpMIPSSRA)
  5972  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5973  		v0.AddArg(x)
  5974  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5975  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5976  		v2.AddArg(y)
  5977  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5978  		v3.AuxInt = int32ToAuxInt(31)
  5979  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5980  		v4.AuxInt = int32ToAuxInt(32)
  5981  		v4.AddArg(v2)
  5982  		v1.AddArg3(v2, v3, v4)
  5983  		v.AddArg2(v0, v1)
  5984  		return true
  5985  	}
  5986  }
  5987  func rewriteValueMIPS_OpRsh16x32(v *Value) bool {
  5988  	v_1 := v.Args[1]
  5989  	v_0 := v.Args[0]
  5990  	b := v.Block
  5991  	typ := &b.Func.Config.Types
  5992  	// match: (Rsh16x32 x y)
  5993  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  5994  	for {
  5995  		x := v_0
  5996  		y := v_1
  5997  		v.reset(OpMIPSSRA)
  5998  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5999  		v0.AddArg(x)
  6000  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6001  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6002  		v2.AuxInt = int32ToAuxInt(31)
  6003  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6004  		v3.AuxInt = int32ToAuxInt(32)
  6005  		v3.AddArg(y)
  6006  		v1.AddArg3(y, v2, v3)
  6007  		v.AddArg2(v0, v1)
  6008  		return true
  6009  	}
  6010  }
  6011  func rewriteValueMIPS_OpRsh16x64(v *Value) bool {
  6012  	v_1 := v.Args[1]
  6013  	v_0 := v.Args[0]
  6014  	b := v.Block
  6015  	typ := &b.Func.Config.Types
  6016  	// match: (Rsh16x64 x (Const64 [c]))
  6017  	// cond: uint32(c) < 16
  6018  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  6019  	for {
  6020  		x := v_0
  6021  		if v_1.Op != OpConst64 {
  6022  			break
  6023  		}
  6024  		c := auxIntToInt64(v_1.AuxInt)
  6025  		if !(uint32(c) < 16) {
  6026  			break
  6027  		}
  6028  		v.reset(OpMIPSSRAconst)
  6029  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  6030  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6031  		v0.AuxInt = int32ToAuxInt(16)
  6032  		v0.AddArg(x)
  6033  		v.AddArg(v0)
  6034  		return true
  6035  	}
  6036  	// match: (Rsh16x64 x (Const64 [c]))
  6037  	// cond: uint32(c) >= 16
  6038  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [31])
  6039  	for {
  6040  		x := v_0
  6041  		if v_1.Op != OpConst64 {
  6042  			break
  6043  		}
  6044  		c := auxIntToInt64(v_1.AuxInt)
  6045  		if !(uint32(c) >= 16) {
  6046  			break
  6047  		}
  6048  		v.reset(OpMIPSSRAconst)
  6049  		v.AuxInt = int32ToAuxInt(31)
  6050  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6051  		v0.AuxInt = int32ToAuxInt(16)
  6052  		v0.AddArg(x)
  6053  		v.AddArg(v0)
  6054  		return true
  6055  	}
  6056  	return false
  6057  }
  6058  func rewriteValueMIPS_OpRsh16x8(v *Value) bool {
  6059  	v_1 := v.Args[1]
  6060  	v_0 := v.Args[0]
  6061  	b := v.Block
  6062  	typ := &b.Func.Config.Types
  6063  	// match: (Rsh16x8 x y)
  6064  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6065  	for {
  6066  		x := v_0
  6067  		y := v_1
  6068  		v.reset(OpMIPSSRA)
  6069  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6070  		v0.AddArg(x)
  6071  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6072  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6073  		v2.AddArg(y)
  6074  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6075  		v3.AuxInt = int32ToAuxInt(31)
  6076  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6077  		v4.AuxInt = int32ToAuxInt(32)
  6078  		v4.AddArg(v2)
  6079  		v1.AddArg3(v2, v3, v4)
  6080  		v.AddArg2(v0, v1)
  6081  		return true
  6082  	}
  6083  }
  6084  func rewriteValueMIPS_OpRsh32Ux16(v *Value) bool {
  6085  	v_1 := v.Args[1]
  6086  	v_0 := v.Args[0]
  6087  	b := v.Block
  6088  	typ := &b.Func.Config.Types
  6089  	// match: (Rsh32Ux16 <t> x y)
  6090  	// result: (CMOVZ (SRL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6091  	for {
  6092  		t := v.Type
  6093  		x := v_0
  6094  		y := v_1
  6095  		v.reset(OpMIPSCMOVZ)
  6096  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6097  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6098  		v1.AddArg(y)
  6099  		v0.AddArg2(x, v1)
  6100  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6101  		v2.AuxInt = int32ToAuxInt(0)
  6102  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6103  		v3.AuxInt = int32ToAuxInt(32)
  6104  		v3.AddArg(v1)
  6105  		v.AddArg3(v0, v2, v3)
  6106  		return true
  6107  	}
  6108  }
  6109  func rewriteValueMIPS_OpRsh32Ux32(v *Value) bool {
  6110  	v_1 := v.Args[1]
  6111  	v_0 := v.Args[0]
  6112  	b := v.Block
  6113  	typ := &b.Func.Config.Types
  6114  	// match: (Rsh32Ux32 <t> x y)
  6115  	// result: (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  6116  	for {
  6117  		t := v.Type
  6118  		x := v_0
  6119  		y := v_1
  6120  		v.reset(OpMIPSCMOVZ)
  6121  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6122  		v0.AddArg2(x, y)
  6123  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6124  		v1.AuxInt = int32ToAuxInt(0)
  6125  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6126  		v2.AuxInt = int32ToAuxInt(32)
  6127  		v2.AddArg(y)
  6128  		v.AddArg3(v0, v1, v2)
  6129  		return true
  6130  	}
  6131  }
  6132  func rewriteValueMIPS_OpRsh32Ux64(v *Value) bool {
  6133  	v_1 := v.Args[1]
  6134  	v_0 := v.Args[0]
  6135  	// match: (Rsh32Ux64 x (Const64 [c]))
  6136  	// cond: uint32(c) < 32
  6137  	// result: (SRLconst x [int32(c)])
  6138  	for {
  6139  		x := v_0
  6140  		if v_1.Op != OpConst64 {
  6141  			break
  6142  		}
  6143  		c := auxIntToInt64(v_1.AuxInt)
  6144  		if !(uint32(c) < 32) {
  6145  			break
  6146  		}
  6147  		v.reset(OpMIPSSRLconst)
  6148  		v.AuxInt = int32ToAuxInt(int32(c))
  6149  		v.AddArg(x)
  6150  		return true
  6151  	}
  6152  	// match: (Rsh32Ux64 _ (Const64 [c]))
  6153  	// cond: uint32(c) >= 32
  6154  	// result: (MOVWconst [0])
  6155  	for {
  6156  		if v_1.Op != OpConst64 {
  6157  			break
  6158  		}
  6159  		c := auxIntToInt64(v_1.AuxInt)
  6160  		if !(uint32(c) >= 32) {
  6161  			break
  6162  		}
  6163  		v.reset(OpMIPSMOVWconst)
  6164  		v.AuxInt = int32ToAuxInt(0)
  6165  		return true
  6166  	}
  6167  	return false
  6168  }
  6169  func rewriteValueMIPS_OpRsh32Ux8(v *Value) bool {
  6170  	v_1 := v.Args[1]
  6171  	v_0 := v.Args[0]
  6172  	b := v.Block
  6173  	typ := &b.Func.Config.Types
  6174  	// match: (Rsh32Ux8 <t> x y)
  6175  	// result: (CMOVZ (SRL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6176  	for {
  6177  		t := v.Type
  6178  		x := v_0
  6179  		y := v_1
  6180  		v.reset(OpMIPSCMOVZ)
  6181  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6182  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6183  		v1.AddArg(y)
  6184  		v0.AddArg2(x, v1)
  6185  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6186  		v2.AuxInt = int32ToAuxInt(0)
  6187  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6188  		v3.AuxInt = int32ToAuxInt(32)
  6189  		v3.AddArg(v1)
  6190  		v.AddArg3(v0, v2, v3)
  6191  		return true
  6192  	}
  6193  }
  6194  func rewriteValueMIPS_OpRsh32x16(v *Value) bool {
  6195  	v_1 := v.Args[1]
  6196  	v_0 := v.Args[0]
  6197  	b := v.Block
  6198  	typ := &b.Func.Config.Types
  6199  	// match: (Rsh32x16 x y)
  6200  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6201  	for {
  6202  		x := v_0
  6203  		y := v_1
  6204  		v.reset(OpMIPSSRA)
  6205  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6206  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6207  		v1.AddArg(y)
  6208  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6209  		v2.AuxInt = int32ToAuxInt(31)
  6210  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6211  		v3.AuxInt = int32ToAuxInt(32)
  6212  		v3.AddArg(v1)
  6213  		v0.AddArg3(v1, v2, v3)
  6214  		v.AddArg2(x, v0)
  6215  		return true
  6216  	}
  6217  }
  6218  func rewriteValueMIPS_OpRsh32x32(v *Value) bool {
  6219  	v_1 := v.Args[1]
  6220  	v_0 := v.Args[0]
  6221  	b := v.Block
  6222  	typ := &b.Func.Config.Types
  6223  	// match: (Rsh32x32 x y)
  6224  	// result: (SRA x ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6225  	for {
  6226  		x := v_0
  6227  		y := v_1
  6228  		v.reset(OpMIPSSRA)
  6229  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6230  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6231  		v1.AuxInt = int32ToAuxInt(31)
  6232  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6233  		v2.AuxInt = int32ToAuxInt(32)
  6234  		v2.AddArg(y)
  6235  		v0.AddArg3(y, v1, v2)
  6236  		v.AddArg2(x, v0)
  6237  		return true
  6238  	}
  6239  }
  6240  func rewriteValueMIPS_OpRsh32x64(v *Value) bool {
  6241  	v_1 := v.Args[1]
  6242  	v_0 := v.Args[0]
  6243  	// match: (Rsh32x64 x (Const64 [c]))
  6244  	// cond: uint32(c) < 32
  6245  	// result: (SRAconst x [int32(c)])
  6246  	for {
  6247  		x := v_0
  6248  		if v_1.Op != OpConst64 {
  6249  			break
  6250  		}
  6251  		c := auxIntToInt64(v_1.AuxInt)
  6252  		if !(uint32(c) < 32) {
  6253  			break
  6254  		}
  6255  		v.reset(OpMIPSSRAconst)
  6256  		v.AuxInt = int32ToAuxInt(int32(c))
  6257  		v.AddArg(x)
  6258  		return true
  6259  	}
  6260  	// match: (Rsh32x64 x (Const64 [c]))
  6261  	// cond: uint32(c) >= 32
  6262  	// result: (SRAconst x [31])
  6263  	for {
  6264  		x := v_0
  6265  		if v_1.Op != OpConst64 {
  6266  			break
  6267  		}
  6268  		c := auxIntToInt64(v_1.AuxInt)
  6269  		if !(uint32(c) >= 32) {
  6270  			break
  6271  		}
  6272  		v.reset(OpMIPSSRAconst)
  6273  		v.AuxInt = int32ToAuxInt(31)
  6274  		v.AddArg(x)
  6275  		return true
  6276  	}
  6277  	return false
  6278  }
  6279  func rewriteValueMIPS_OpRsh32x8(v *Value) bool {
  6280  	v_1 := v.Args[1]
  6281  	v_0 := v.Args[0]
  6282  	b := v.Block
  6283  	typ := &b.Func.Config.Types
  6284  	// match: (Rsh32x8 x y)
  6285  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6286  	for {
  6287  		x := v_0
  6288  		y := v_1
  6289  		v.reset(OpMIPSSRA)
  6290  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6291  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6292  		v1.AddArg(y)
  6293  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6294  		v2.AuxInt = int32ToAuxInt(31)
  6295  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6296  		v3.AuxInt = int32ToAuxInt(32)
  6297  		v3.AddArg(v1)
  6298  		v0.AddArg3(v1, v2, v3)
  6299  		v.AddArg2(x, v0)
  6300  		return true
  6301  	}
  6302  }
  6303  func rewriteValueMIPS_OpRsh8Ux16(v *Value) bool {
  6304  	v_1 := v.Args[1]
  6305  	v_0 := v.Args[0]
  6306  	b := v.Block
  6307  	typ := &b.Func.Config.Types
  6308  	// match: (Rsh8Ux16 <t> x y)
  6309  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6310  	for {
  6311  		t := v.Type
  6312  		x := v_0
  6313  		y := v_1
  6314  		v.reset(OpMIPSCMOVZ)
  6315  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6316  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6317  		v1.AddArg(x)
  6318  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6319  		v2.AddArg(y)
  6320  		v0.AddArg2(v1, v2)
  6321  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6322  		v3.AuxInt = int32ToAuxInt(0)
  6323  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6324  		v4.AuxInt = int32ToAuxInt(32)
  6325  		v4.AddArg(v2)
  6326  		v.AddArg3(v0, v3, v4)
  6327  		return true
  6328  	}
  6329  }
  6330  func rewriteValueMIPS_OpRsh8Ux32(v *Value) bool {
  6331  	v_1 := v.Args[1]
  6332  	v_0 := v.Args[0]
  6333  	b := v.Block
  6334  	typ := &b.Func.Config.Types
  6335  	// match: (Rsh8Ux32 <t> x y)
  6336  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  6337  	for {
  6338  		t := v.Type
  6339  		x := v_0
  6340  		y := v_1
  6341  		v.reset(OpMIPSCMOVZ)
  6342  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6343  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6344  		v1.AddArg(x)
  6345  		v0.AddArg2(v1, y)
  6346  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6347  		v2.AuxInt = int32ToAuxInt(0)
  6348  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6349  		v3.AuxInt = int32ToAuxInt(32)
  6350  		v3.AddArg(y)
  6351  		v.AddArg3(v0, v2, v3)
  6352  		return true
  6353  	}
  6354  }
  6355  func rewriteValueMIPS_OpRsh8Ux64(v *Value) bool {
  6356  	v_1 := v.Args[1]
  6357  	v_0 := v.Args[0]
  6358  	b := v.Block
  6359  	typ := &b.Func.Config.Types
  6360  	// match: (Rsh8Ux64 x (Const64 [c]))
  6361  	// cond: uint32(c) < 8
  6362  	// result: (SRLconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6363  	for {
  6364  		x := v_0
  6365  		if v_1.Op != OpConst64 {
  6366  			break
  6367  		}
  6368  		c := auxIntToInt64(v_1.AuxInt)
  6369  		if !(uint32(c) < 8) {
  6370  			break
  6371  		}
  6372  		v.reset(OpMIPSSRLconst)
  6373  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6374  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6375  		v0.AuxInt = int32ToAuxInt(24)
  6376  		v0.AddArg(x)
  6377  		v.AddArg(v0)
  6378  		return true
  6379  	}
  6380  	// match: (Rsh8Ux64 _ (Const64 [c]))
  6381  	// cond: uint32(c) >= 8
  6382  	// result: (MOVWconst [0])
  6383  	for {
  6384  		if v_1.Op != OpConst64 {
  6385  			break
  6386  		}
  6387  		c := auxIntToInt64(v_1.AuxInt)
  6388  		if !(uint32(c) >= 8) {
  6389  			break
  6390  		}
  6391  		v.reset(OpMIPSMOVWconst)
  6392  		v.AuxInt = int32ToAuxInt(0)
  6393  		return true
  6394  	}
  6395  	return false
  6396  }
  6397  func rewriteValueMIPS_OpRsh8Ux8(v *Value) bool {
  6398  	v_1 := v.Args[1]
  6399  	v_0 := v.Args[0]
  6400  	b := v.Block
  6401  	typ := &b.Func.Config.Types
  6402  	// match: (Rsh8Ux8 <t> x y)
  6403  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6404  	for {
  6405  		t := v.Type
  6406  		x := v_0
  6407  		y := v_1
  6408  		v.reset(OpMIPSCMOVZ)
  6409  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6410  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6411  		v1.AddArg(x)
  6412  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6413  		v2.AddArg(y)
  6414  		v0.AddArg2(v1, v2)
  6415  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6416  		v3.AuxInt = int32ToAuxInt(0)
  6417  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6418  		v4.AuxInt = int32ToAuxInt(32)
  6419  		v4.AddArg(v2)
  6420  		v.AddArg3(v0, v3, v4)
  6421  		return true
  6422  	}
  6423  }
  6424  func rewriteValueMIPS_OpRsh8x16(v *Value) bool {
  6425  	v_1 := v.Args[1]
  6426  	v_0 := v.Args[0]
  6427  	b := v.Block
  6428  	typ := &b.Func.Config.Types
  6429  	// match: (Rsh8x16 x y)
  6430  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6431  	for {
  6432  		x := v_0
  6433  		y := v_1
  6434  		v.reset(OpMIPSSRA)
  6435  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6436  		v0.AddArg(x)
  6437  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6438  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6439  		v2.AddArg(y)
  6440  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6441  		v3.AuxInt = int32ToAuxInt(31)
  6442  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6443  		v4.AuxInt = int32ToAuxInt(32)
  6444  		v4.AddArg(v2)
  6445  		v1.AddArg3(v2, v3, v4)
  6446  		v.AddArg2(v0, v1)
  6447  		return true
  6448  	}
  6449  }
  6450  func rewriteValueMIPS_OpRsh8x32(v *Value) bool {
  6451  	v_1 := v.Args[1]
  6452  	v_0 := v.Args[0]
  6453  	b := v.Block
  6454  	typ := &b.Func.Config.Types
  6455  	// match: (Rsh8x32 x y)
  6456  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6457  	for {
  6458  		x := v_0
  6459  		y := v_1
  6460  		v.reset(OpMIPSSRA)
  6461  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6462  		v0.AddArg(x)
  6463  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6464  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6465  		v2.AuxInt = int32ToAuxInt(31)
  6466  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6467  		v3.AuxInt = int32ToAuxInt(32)
  6468  		v3.AddArg(y)
  6469  		v1.AddArg3(y, v2, v3)
  6470  		v.AddArg2(v0, v1)
  6471  		return true
  6472  	}
  6473  }
  6474  func rewriteValueMIPS_OpRsh8x64(v *Value) bool {
  6475  	v_1 := v.Args[1]
  6476  	v_0 := v.Args[0]
  6477  	b := v.Block
  6478  	typ := &b.Func.Config.Types
  6479  	// match: (Rsh8x64 x (Const64 [c]))
  6480  	// cond: uint32(c) < 8
  6481  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6482  	for {
  6483  		x := v_0
  6484  		if v_1.Op != OpConst64 {
  6485  			break
  6486  		}
  6487  		c := auxIntToInt64(v_1.AuxInt)
  6488  		if !(uint32(c) < 8) {
  6489  			break
  6490  		}
  6491  		v.reset(OpMIPSSRAconst)
  6492  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6493  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6494  		v0.AuxInt = int32ToAuxInt(24)
  6495  		v0.AddArg(x)
  6496  		v.AddArg(v0)
  6497  		return true
  6498  	}
  6499  	// match: (Rsh8x64 x (Const64 [c]))
  6500  	// cond: uint32(c) >= 8
  6501  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [31])
  6502  	for {
  6503  		x := v_0
  6504  		if v_1.Op != OpConst64 {
  6505  			break
  6506  		}
  6507  		c := auxIntToInt64(v_1.AuxInt)
  6508  		if !(uint32(c) >= 8) {
  6509  			break
  6510  		}
  6511  		v.reset(OpMIPSSRAconst)
  6512  		v.AuxInt = int32ToAuxInt(31)
  6513  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6514  		v0.AuxInt = int32ToAuxInt(24)
  6515  		v0.AddArg(x)
  6516  		v.AddArg(v0)
  6517  		return true
  6518  	}
  6519  	return false
  6520  }
  6521  func rewriteValueMIPS_OpRsh8x8(v *Value) bool {
  6522  	v_1 := v.Args[1]
  6523  	v_0 := v.Args[0]
  6524  	b := v.Block
  6525  	typ := &b.Func.Config.Types
  6526  	// match: (Rsh8x8 x y)
  6527  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6528  	for {
  6529  		x := v_0
  6530  		y := v_1
  6531  		v.reset(OpMIPSSRA)
  6532  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6533  		v0.AddArg(x)
  6534  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6535  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6536  		v2.AddArg(y)
  6537  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6538  		v3.AuxInt = int32ToAuxInt(31)
  6539  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6540  		v4.AuxInt = int32ToAuxInt(32)
  6541  		v4.AddArg(v2)
  6542  		v1.AddArg3(v2, v3, v4)
  6543  		v.AddArg2(v0, v1)
  6544  		return true
  6545  	}
  6546  }
  6547  func rewriteValueMIPS_OpSelect0(v *Value) bool {
  6548  	v_0 := v.Args[0]
  6549  	b := v.Block
  6550  	typ := &b.Func.Config.Types
  6551  	// match: (Select0 (Add32carry <t> x y))
  6552  	// result: (ADD <t.FieldType(0)> x y)
  6553  	for {
  6554  		if v_0.Op != OpAdd32carry {
  6555  			break
  6556  		}
  6557  		t := v_0.Type
  6558  		y := v_0.Args[1]
  6559  		x := v_0.Args[0]
  6560  		v.reset(OpMIPSADD)
  6561  		v.Type = t.FieldType(0)
  6562  		v.AddArg2(x, y)
  6563  		return true
  6564  	}
  6565  	// match: (Select0 (Sub32carry <t> x y))
  6566  	// result: (SUB <t.FieldType(0)> x y)
  6567  	for {
  6568  		if v_0.Op != OpSub32carry {
  6569  			break
  6570  		}
  6571  		t := v_0.Type
  6572  		y := v_0.Args[1]
  6573  		x := v_0.Args[0]
  6574  		v.reset(OpMIPSSUB)
  6575  		v.Type = t.FieldType(0)
  6576  		v.AddArg2(x, y)
  6577  		return true
  6578  	}
  6579  	// match: (Select0 (MULTU (MOVWconst [0]) _ ))
  6580  	// result: (MOVWconst [0])
  6581  	for {
  6582  		if v_0.Op != OpMIPSMULTU {
  6583  			break
  6584  		}
  6585  		v_0_0 := v_0.Args[0]
  6586  		v_0_1 := v_0.Args[1]
  6587  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6588  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6589  				continue
  6590  			}
  6591  			v.reset(OpMIPSMOVWconst)
  6592  			v.AuxInt = int32ToAuxInt(0)
  6593  			return true
  6594  		}
  6595  		break
  6596  	}
  6597  	// match: (Select0 (MULTU (MOVWconst [1]) _ ))
  6598  	// result: (MOVWconst [0])
  6599  	for {
  6600  		if v_0.Op != OpMIPSMULTU {
  6601  			break
  6602  		}
  6603  		v_0_0 := v_0.Args[0]
  6604  		v_0_1 := v_0.Args[1]
  6605  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6606  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6607  				continue
  6608  			}
  6609  			v.reset(OpMIPSMOVWconst)
  6610  			v.AuxInt = int32ToAuxInt(0)
  6611  			return true
  6612  		}
  6613  		break
  6614  	}
  6615  	// match: (Select0 (MULTU (MOVWconst [-1]) x ))
  6616  	// result: (CMOVZ (ADDconst <x.Type> [-1] x) (MOVWconst [0]) x)
  6617  	for {
  6618  		if v_0.Op != OpMIPSMULTU {
  6619  			break
  6620  		}
  6621  		_ = v_0.Args[1]
  6622  		v_0_0 := v_0.Args[0]
  6623  		v_0_1 := v_0.Args[1]
  6624  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6625  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6626  				continue
  6627  			}
  6628  			x := v_0_1
  6629  			v.reset(OpMIPSCMOVZ)
  6630  			v0 := b.NewValue0(v.Pos, OpMIPSADDconst, x.Type)
  6631  			v0.AuxInt = int32ToAuxInt(-1)
  6632  			v0.AddArg(x)
  6633  			v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6634  			v1.AuxInt = int32ToAuxInt(0)
  6635  			v.AddArg3(v0, v1, x)
  6636  			return true
  6637  		}
  6638  		break
  6639  	}
  6640  	// match: (Select0 (MULTU (MOVWconst [c]) x ))
  6641  	// cond: isUnsignedPowerOfTwo(uint32(c))
  6642  	// result: (SRLconst [int32(32-log32u(uint32(c)))] x)
  6643  	for {
  6644  		if v_0.Op != OpMIPSMULTU {
  6645  			break
  6646  		}
  6647  		_ = v_0.Args[1]
  6648  		v_0_0 := v_0.Args[0]
  6649  		v_0_1 := v_0.Args[1]
  6650  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6651  			if v_0_0.Op != OpMIPSMOVWconst {
  6652  				continue
  6653  			}
  6654  			c := auxIntToInt32(v_0_0.AuxInt)
  6655  			x := v_0_1
  6656  			if !(isUnsignedPowerOfTwo(uint32(c))) {
  6657  				continue
  6658  			}
  6659  			v.reset(OpMIPSSRLconst)
  6660  			v.AuxInt = int32ToAuxInt(int32(32 - log32u(uint32(c))))
  6661  			v.AddArg(x)
  6662  			return true
  6663  		}
  6664  		break
  6665  	}
  6666  	// match: (Select0 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6667  	// result: (MOVWconst [int32((int64(uint32(c))*int64(uint32(d)))>>32)])
  6668  	for {
  6669  		if v_0.Op != OpMIPSMULTU {
  6670  			break
  6671  		}
  6672  		_ = v_0.Args[1]
  6673  		v_0_0 := v_0.Args[0]
  6674  		v_0_1 := v_0.Args[1]
  6675  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6676  			if v_0_0.Op != OpMIPSMOVWconst {
  6677  				continue
  6678  			}
  6679  			c := auxIntToInt32(v_0_0.AuxInt)
  6680  			if v_0_1.Op != OpMIPSMOVWconst {
  6681  				continue
  6682  			}
  6683  			d := auxIntToInt32(v_0_1.AuxInt)
  6684  			v.reset(OpMIPSMOVWconst)
  6685  			v.AuxInt = int32ToAuxInt(int32((int64(uint32(c)) * int64(uint32(d))) >> 32))
  6686  			return true
  6687  		}
  6688  		break
  6689  	}
  6690  	// match: (Select0 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6691  	// cond: d != 0
  6692  	// result: (MOVWconst [c%d])
  6693  	for {
  6694  		if v_0.Op != OpMIPSDIV {
  6695  			break
  6696  		}
  6697  		_ = v_0.Args[1]
  6698  		v_0_0 := v_0.Args[0]
  6699  		if v_0_0.Op != OpMIPSMOVWconst {
  6700  			break
  6701  		}
  6702  		c := auxIntToInt32(v_0_0.AuxInt)
  6703  		v_0_1 := v_0.Args[1]
  6704  		if v_0_1.Op != OpMIPSMOVWconst {
  6705  			break
  6706  		}
  6707  		d := auxIntToInt32(v_0_1.AuxInt)
  6708  		if !(d != 0) {
  6709  			break
  6710  		}
  6711  		v.reset(OpMIPSMOVWconst)
  6712  		v.AuxInt = int32ToAuxInt(c % d)
  6713  		return true
  6714  	}
  6715  	// match: (Select0 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6716  	// cond: d != 0
  6717  	// result: (MOVWconst [int32(uint32(c)%uint32(d))])
  6718  	for {
  6719  		if v_0.Op != OpMIPSDIVU {
  6720  			break
  6721  		}
  6722  		_ = v_0.Args[1]
  6723  		v_0_0 := v_0.Args[0]
  6724  		if v_0_0.Op != OpMIPSMOVWconst {
  6725  			break
  6726  		}
  6727  		c := auxIntToInt32(v_0_0.AuxInt)
  6728  		v_0_1 := v_0.Args[1]
  6729  		if v_0_1.Op != OpMIPSMOVWconst {
  6730  			break
  6731  		}
  6732  		d := auxIntToInt32(v_0_1.AuxInt)
  6733  		if !(d != 0) {
  6734  			break
  6735  		}
  6736  		v.reset(OpMIPSMOVWconst)
  6737  		v.AuxInt = int32ToAuxInt(int32(uint32(c) % uint32(d)))
  6738  		return true
  6739  	}
  6740  	return false
  6741  }
  6742  func rewriteValueMIPS_OpSelect1(v *Value) bool {
  6743  	v_0 := v.Args[0]
  6744  	b := v.Block
  6745  	typ := &b.Func.Config.Types
  6746  	// match: (Select1 (Add32carry <t> x y))
  6747  	// result: (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
  6748  	for {
  6749  		if v_0.Op != OpAdd32carry {
  6750  			break
  6751  		}
  6752  		t := v_0.Type
  6753  		y := v_0.Args[1]
  6754  		x := v_0.Args[0]
  6755  		v.reset(OpMIPSSGTU)
  6756  		v.Type = typ.Bool
  6757  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6758  		v0.AddArg2(x, y)
  6759  		v.AddArg2(x, v0)
  6760  		return true
  6761  	}
  6762  	// match: (Select1 (Sub32carry <t> x y))
  6763  	// result: (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
  6764  	for {
  6765  		if v_0.Op != OpSub32carry {
  6766  			break
  6767  		}
  6768  		t := v_0.Type
  6769  		y := v_0.Args[1]
  6770  		x := v_0.Args[0]
  6771  		v.reset(OpMIPSSGTU)
  6772  		v.Type = typ.Bool
  6773  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t.FieldType(0))
  6774  		v0.AddArg2(x, y)
  6775  		v.AddArg2(v0, x)
  6776  		return true
  6777  	}
  6778  	// match: (Select1 (MULTU (MOVWconst [0]) _ ))
  6779  	// result: (MOVWconst [0])
  6780  	for {
  6781  		if v_0.Op != OpMIPSMULTU {
  6782  			break
  6783  		}
  6784  		v_0_0 := v_0.Args[0]
  6785  		v_0_1 := v_0.Args[1]
  6786  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6787  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6788  				continue
  6789  			}
  6790  			v.reset(OpMIPSMOVWconst)
  6791  			v.AuxInt = int32ToAuxInt(0)
  6792  			return true
  6793  		}
  6794  		break
  6795  	}
  6796  	// match: (Select1 (MULTU (MOVWconst [1]) x ))
  6797  	// result: x
  6798  	for {
  6799  		if v_0.Op != OpMIPSMULTU {
  6800  			break
  6801  		}
  6802  		_ = v_0.Args[1]
  6803  		v_0_0 := v_0.Args[0]
  6804  		v_0_1 := v_0.Args[1]
  6805  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6806  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6807  				continue
  6808  			}
  6809  			x := v_0_1
  6810  			v.copyOf(x)
  6811  			return true
  6812  		}
  6813  		break
  6814  	}
  6815  	// match: (Select1 (MULTU (MOVWconst [-1]) x ))
  6816  	// result: (NEG <x.Type> x)
  6817  	for {
  6818  		if v_0.Op != OpMIPSMULTU {
  6819  			break
  6820  		}
  6821  		_ = v_0.Args[1]
  6822  		v_0_0 := v_0.Args[0]
  6823  		v_0_1 := v_0.Args[1]
  6824  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6825  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6826  				continue
  6827  			}
  6828  			x := v_0_1
  6829  			v.reset(OpMIPSNEG)
  6830  			v.Type = x.Type
  6831  			v.AddArg(x)
  6832  			return true
  6833  		}
  6834  		break
  6835  	}
  6836  	// match: (Select1 (MULTU (MOVWconst [c]) x ))
  6837  	// cond: isUnsignedPowerOfTwo(uint32(c))
  6838  	// result: (SLLconst [int32(log32u(uint32(c)))] x)
  6839  	for {
  6840  		if v_0.Op != OpMIPSMULTU {
  6841  			break
  6842  		}
  6843  		_ = v_0.Args[1]
  6844  		v_0_0 := v_0.Args[0]
  6845  		v_0_1 := v_0.Args[1]
  6846  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6847  			if v_0_0.Op != OpMIPSMOVWconst {
  6848  				continue
  6849  			}
  6850  			c := auxIntToInt32(v_0_0.AuxInt)
  6851  			x := v_0_1
  6852  			if !(isUnsignedPowerOfTwo(uint32(c))) {
  6853  				continue
  6854  			}
  6855  			v.reset(OpMIPSSLLconst)
  6856  			v.AuxInt = int32ToAuxInt(int32(log32u(uint32(c))))
  6857  			v.AddArg(x)
  6858  			return true
  6859  		}
  6860  		break
  6861  	}
  6862  	// match: (Select1 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6863  	// result: (MOVWconst [int32(uint32(c)*uint32(d))])
  6864  	for {
  6865  		if v_0.Op != OpMIPSMULTU {
  6866  			break
  6867  		}
  6868  		_ = v_0.Args[1]
  6869  		v_0_0 := v_0.Args[0]
  6870  		v_0_1 := v_0.Args[1]
  6871  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6872  			if v_0_0.Op != OpMIPSMOVWconst {
  6873  				continue
  6874  			}
  6875  			c := auxIntToInt32(v_0_0.AuxInt)
  6876  			if v_0_1.Op != OpMIPSMOVWconst {
  6877  				continue
  6878  			}
  6879  			d := auxIntToInt32(v_0_1.AuxInt)
  6880  			v.reset(OpMIPSMOVWconst)
  6881  			v.AuxInt = int32ToAuxInt(int32(uint32(c) * uint32(d)))
  6882  			return true
  6883  		}
  6884  		break
  6885  	}
  6886  	// match: (Select1 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6887  	// cond: d != 0
  6888  	// result: (MOVWconst [c/d])
  6889  	for {
  6890  		if v_0.Op != OpMIPSDIV {
  6891  			break
  6892  		}
  6893  		_ = v_0.Args[1]
  6894  		v_0_0 := v_0.Args[0]
  6895  		if v_0_0.Op != OpMIPSMOVWconst {
  6896  			break
  6897  		}
  6898  		c := auxIntToInt32(v_0_0.AuxInt)
  6899  		v_0_1 := v_0.Args[1]
  6900  		if v_0_1.Op != OpMIPSMOVWconst {
  6901  			break
  6902  		}
  6903  		d := auxIntToInt32(v_0_1.AuxInt)
  6904  		if !(d != 0) {
  6905  			break
  6906  		}
  6907  		v.reset(OpMIPSMOVWconst)
  6908  		v.AuxInt = int32ToAuxInt(c / d)
  6909  		return true
  6910  	}
  6911  	// match: (Select1 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6912  	// cond: d != 0
  6913  	// result: (MOVWconst [int32(uint32(c)/uint32(d))])
  6914  	for {
  6915  		if v_0.Op != OpMIPSDIVU {
  6916  			break
  6917  		}
  6918  		_ = v_0.Args[1]
  6919  		v_0_0 := v_0.Args[0]
  6920  		if v_0_0.Op != OpMIPSMOVWconst {
  6921  			break
  6922  		}
  6923  		c := auxIntToInt32(v_0_0.AuxInt)
  6924  		v_0_1 := v_0.Args[1]
  6925  		if v_0_1.Op != OpMIPSMOVWconst {
  6926  			break
  6927  		}
  6928  		d := auxIntToInt32(v_0_1.AuxInt)
  6929  		if !(d != 0) {
  6930  			break
  6931  		}
  6932  		v.reset(OpMIPSMOVWconst)
  6933  		v.AuxInt = int32ToAuxInt(int32(uint32(c) / uint32(d)))
  6934  		return true
  6935  	}
  6936  	return false
  6937  }
  6938  func rewriteValueMIPS_OpSignmask(v *Value) bool {
  6939  	v_0 := v.Args[0]
  6940  	// match: (Signmask x)
  6941  	// result: (SRAconst x [31])
  6942  	for {
  6943  		x := v_0
  6944  		v.reset(OpMIPSSRAconst)
  6945  		v.AuxInt = int32ToAuxInt(31)
  6946  		v.AddArg(x)
  6947  		return true
  6948  	}
  6949  }
  6950  func rewriteValueMIPS_OpSlicemask(v *Value) bool {
  6951  	v_0 := v.Args[0]
  6952  	b := v.Block
  6953  	// match: (Slicemask <t> x)
  6954  	// result: (SRAconst (NEG <t> x) [31])
  6955  	for {
  6956  		t := v.Type
  6957  		x := v_0
  6958  		v.reset(OpMIPSSRAconst)
  6959  		v.AuxInt = int32ToAuxInt(31)
  6960  		v0 := b.NewValue0(v.Pos, OpMIPSNEG, t)
  6961  		v0.AddArg(x)
  6962  		v.AddArg(v0)
  6963  		return true
  6964  	}
  6965  }
  6966  func rewriteValueMIPS_OpStore(v *Value) bool {
  6967  	v_2 := v.Args[2]
  6968  	v_1 := v.Args[1]
  6969  	v_0 := v.Args[0]
  6970  	// match: (Store {t} ptr val mem)
  6971  	// cond: t.Size() == 1
  6972  	// result: (MOVBstore ptr val mem)
  6973  	for {
  6974  		t := auxToType(v.Aux)
  6975  		ptr := v_0
  6976  		val := v_1
  6977  		mem := v_2
  6978  		if !(t.Size() == 1) {
  6979  			break
  6980  		}
  6981  		v.reset(OpMIPSMOVBstore)
  6982  		v.AddArg3(ptr, val, mem)
  6983  		return true
  6984  	}
  6985  	// match: (Store {t} ptr val mem)
  6986  	// cond: t.Size() == 2
  6987  	// result: (MOVHstore ptr val mem)
  6988  	for {
  6989  		t := auxToType(v.Aux)
  6990  		ptr := v_0
  6991  		val := v_1
  6992  		mem := v_2
  6993  		if !(t.Size() == 2) {
  6994  			break
  6995  		}
  6996  		v.reset(OpMIPSMOVHstore)
  6997  		v.AddArg3(ptr, val, mem)
  6998  		return true
  6999  	}
  7000  	// match: (Store {t} ptr val mem)
  7001  	// cond: t.Size() == 4 && !t.IsFloat()
  7002  	// result: (MOVWstore ptr val mem)
  7003  	for {
  7004  		t := auxToType(v.Aux)
  7005  		ptr := v_0
  7006  		val := v_1
  7007  		mem := v_2
  7008  		if !(t.Size() == 4 && !t.IsFloat()) {
  7009  			break
  7010  		}
  7011  		v.reset(OpMIPSMOVWstore)
  7012  		v.AddArg3(ptr, val, mem)
  7013  		return true
  7014  	}
  7015  	// match: (Store {t} ptr val mem)
  7016  	// cond: t.Size() == 4 && t.IsFloat()
  7017  	// result: (MOVFstore ptr val mem)
  7018  	for {
  7019  		t := auxToType(v.Aux)
  7020  		ptr := v_0
  7021  		val := v_1
  7022  		mem := v_2
  7023  		if !(t.Size() == 4 && t.IsFloat()) {
  7024  			break
  7025  		}
  7026  		v.reset(OpMIPSMOVFstore)
  7027  		v.AddArg3(ptr, val, mem)
  7028  		return true
  7029  	}
  7030  	// match: (Store {t} ptr val mem)
  7031  	// cond: t.Size() == 8 && t.IsFloat()
  7032  	// result: (MOVDstore ptr val mem)
  7033  	for {
  7034  		t := auxToType(v.Aux)
  7035  		ptr := v_0
  7036  		val := v_1
  7037  		mem := v_2
  7038  		if !(t.Size() == 8 && t.IsFloat()) {
  7039  			break
  7040  		}
  7041  		v.reset(OpMIPSMOVDstore)
  7042  		v.AddArg3(ptr, val, mem)
  7043  		return true
  7044  	}
  7045  	return false
  7046  }
  7047  func rewriteValueMIPS_OpSub32withcarry(v *Value) bool {
  7048  	v_2 := v.Args[2]
  7049  	v_1 := v.Args[1]
  7050  	v_0 := v.Args[0]
  7051  	b := v.Block
  7052  	// match: (Sub32withcarry <t> x y c)
  7053  	// result: (SUB (SUB <t> x y) c)
  7054  	for {
  7055  		t := v.Type
  7056  		x := v_0
  7057  		y := v_1
  7058  		c := v_2
  7059  		v.reset(OpMIPSSUB)
  7060  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t)
  7061  		v0.AddArg2(x, y)
  7062  		v.AddArg2(v0, c)
  7063  		return true
  7064  	}
  7065  }
  7066  func rewriteValueMIPS_OpZero(v *Value) bool {
  7067  	v_1 := v.Args[1]
  7068  	v_0 := v.Args[0]
  7069  	b := v.Block
  7070  	config := b.Func.Config
  7071  	typ := &b.Func.Config.Types
  7072  	// match: (Zero [0] _ mem)
  7073  	// result: mem
  7074  	for {
  7075  		if auxIntToInt64(v.AuxInt) != 0 {
  7076  			break
  7077  		}
  7078  		mem := v_1
  7079  		v.copyOf(mem)
  7080  		return true
  7081  	}
  7082  	// match: (Zero [1] ptr mem)
  7083  	// result: (MOVBstore ptr (MOVWconst [0]) mem)
  7084  	for {
  7085  		if auxIntToInt64(v.AuxInt) != 1 {
  7086  			break
  7087  		}
  7088  		ptr := v_0
  7089  		mem := v_1
  7090  		v.reset(OpMIPSMOVBstore)
  7091  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7092  		v0.AuxInt = int32ToAuxInt(0)
  7093  		v.AddArg3(ptr, v0, mem)
  7094  		return true
  7095  	}
  7096  	// match: (Zero [2] {t} ptr mem)
  7097  	// cond: t.Alignment()%2 == 0
  7098  	// result: (MOVHstore ptr (MOVWconst [0]) mem)
  7099  	for {
  7100  		if auxIntToInt64(v.AuxInt) != 2 {
  7101  			break
  7102  		}
  7103  		t := auxToType(v.Aux)
  7104  		ptr := v_0
  7105  		mem := v_1
  7106  		if !(t.Alignment()%2 == 0) {
  7107  			break
  7108  		}
  7109  		v.reset(OpMIPSMOVHstore)
  7110  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7111  		v0.AuxInt = int32ToAuxInt(0)
  7112  		v.AddArg3(ptr, v0, mem)
  7113  		return true
  7114  	}
  7115  	// match: (Zero [2] ptr mem)
  7116  	// result: (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))
  7117  	for {
  7118  		if auxIntToInt64(v.AuxInt) != 2 {
  7119  			break
  7120  		}
  7121  		ptr := v_0
  7122  		mem := v_1
  7123  		v.reset(OpMIPSMOVBstore)
  7124  		v.AuxInt = int32ToAuxInt(1)
  7125  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7126  		v0.AuxInt = int32ToAuxInt(0)
  7127  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7128  		v1.AuxInt = int32ToAuxInt(0)
  7129  		v1.AddArg3(ptr, v0, mem)
  7130  		v.AddArg3(ptr, v0, v1)
  7131  		return true
  7132  	}
  7133  	// match: (Zero [4] {t} ptr mem)
  7134  	// cond: t.Alignment()%4 == 0
  7135  	// result: (MOVWstore ptr (MOVWconst [0]) mem)
  7136  	for {
  7137  		if auxIntToInt64(v.AuxInt) != 4 {
  7138  			break
  7139  		}
  7140  		t := auxToType(v.Aux)
  7141  		ptr := v_0
  7142  		mem := v_1
  7143  		if !(t.Alignment()%4 == 0) {
  7144  			break
  7145  		}
  7146  		v.reset(OpMIPSMOVWstore)
  7147  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7148  		v0.AuxInt = int32ToAuxInt(0)
  7149  		v.AddArg3(ptr, v0, mem)
  7150  		return true
  7151  	}
  7152  	// match: (Zero [4] {t} ptr mem)
  7153  	// cond: t.Alignment()%2 == 0
  7154  	// result: (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem))
  7155  	for {
  7156  		if auxIntToInt64(v.AuxInt) != 4 {
  7157  			break
  7158  		}
  7159  		t := auxToType(v.Aux)
  7160  		ptr := v_0
  7161  		mem := v_1
  7162  		if !(t.Alignment()%2 == 0) {
  7163  			break
  7164  		}
  7165  		v.reset(OpMIPSMOVHstore)
  7166  		v.AuxInt = int32ToAuxInt(2)
  7167  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7168  		v0.AuxInt = int32ToAuxInt(0)
  7169  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7170  		v1.AuxInt = int32ToAuxInt(0)
  7171  		v1.AddArg3(ptr, v0, mem)
  7172  		v.AddArg3(ptr, v0, v1)
  7173  		return true
  7174  	}
  7175  	// match: (Zero [4] ptr mem)
  7176  	// result: (MOVBstore [3] ptr (MOVWconst [0]) (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))))
  7177  	for {
  7178  		if auxIntToInt64(v.AuxInt) != 4 {
  7179  			break
  7180  		}
  7181  		ptr := v_0
  7182  		mem := v_1
  7183  		v.reset(OpMIPSMOVBstore)
  7184  		v.AuxInt = int32ToAuxInt(3)
  7185  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7186  		v0.AuxInt = int32ToAuxInt(0)
  7187  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7188  		v1.AuxInt = int32ToAuxInt(2)
  7189  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7190  		v2.AuxInt = int32ToAuxInt(1)
  7191  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7192  		v3.AuxInt = int32ToAuxInt(0)
  7193  		v3.AddArg3(ptr, v0, mem)
  7194  		v2.AddArg3(ptr, v0, v3)
  7195  		v1.AddArg3(ptr, v0, v2)
  7196  		v.AddArg3(ptr, v0, v1)
  7197  		return true
  7198  	}
  7199  	// match: (Zero [3] ptr mem)
  7200  	// result: (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem)))
  7201  	for {
  7202  		if auxIntToInt64(v.AuxInt) != 3 {
  7203  			break
  7204  		}
  7205  		ptr := v_0
  7206  		mem := v_1
  7207  		v.reset(OpMIPSMOVBstore)
  7208  		v.AuxInt = int32ToAuxInt(2)
  7209  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7210  		v0.AuxInt = int32ToAuxInt(0)
  7211  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7212  		v1.AuxInt = int32ToAuxInt(1)
  7213  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7214  		v2.AuxInt = int32ToAuxInt(0)
  7215  		v2.AddArg3(ptr, v0, mem)
  7216  		v1.AddArg3(ptr, v0, v2)
  7217  		v.AddArg3(ptr, v0, v1)
  7218  		return true
  7219  	}
  7220  	// match: (Zero [6] {t} ptr mem)
  7221  	// cond: t.Alignment()%2 == 0
  7222  	// result: (MOVHstore [4] ptr (MOVWconst [0]) (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem)))
  7223  	for {
  7224  		if auxIntToInt64(v.AuxInt) != 6 {
  7225  			break
  7226  		}
  7227  		t := auxToType(v.Aux)
  7228  		ptr := v_0
  7229  		mem := v_1
  7230  		if !(t.Alignment()%2 == 0) {
  7231  			break
  7232  		}
  7233  		v.reset(OpMIPSMOVHstore)
  7234  		v.AuxInt = int32ToAuxInt(4)
  7235  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7236  		v0.AuxInt = int32ToAuxInt(0)
  7237  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7238  		v1.AuxInt = int32ToAuxInt(2)
  7239  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7240  		v2.AuxInt = int32ToAuxInt(0)
  7241  		v2.AddArg3(ptr, v0, mem)
  7242  		v1.AddArg3(ptr, v0, v2)
  7243  		v.AddArg3(ptr, v0, v1)
  7244  		return true
  7245  	}
  7246  	// match: (Zero [8] {t} ptr mem)
  7247  	// cond: t.Alignment()%4 == 0
  7248  	// result: (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))
  7249  	for {
  7250  		if auxIntToInt64(v.AuxInt) != 8 {
  7251  			break
  7252  		}
  7253  		t := auxToType(v.Aux)
  7254  		ptr := v_0
  7255  		mem := v_1
  7256  		if !(t.Alignment()%4 == 0) {
  7257  			break
  7258  		}
  7259  		v.reset(OpMIPSMOVWstore)
  7260  		v.AuxInt = int32ToAuxInt(4)
  7261  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7262  		v0.AuxInt = int32ToAuxInt(0)
  7263  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7264  		v1.AuxInt = int32ToAuxInt(0)
  7265  		v1.AddArg3(ptr, v0, mem)
  7266  		v.AddArg3(ptr, v0, v1)
  7267  		return true
  7268  	}
  7269  	// match: (Zero [12] {t} ptr mem)
  7270  	// cond: t.Alignment()%4 == 0
  7271  	// result: (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem)))
  7272  	for {
  7273  		if auxIntToInt64(v.AuxInt) != 12 {
  7274  			break
  7275  		}
  7276  		t := auxToType(v.Aux)
  7277  		ptr := v_0
  7278  		mem := v_1
  7279  		if !(t.Alignment()%4 == 0) {
  7280  			break
  7281  		}
  7282  		v.reset(OpMIPSMOVWstore)
  7283  		v.AuxInt = int32ToAuxInt(8)
  7284  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7285  		v0.AuxInt = int32ToAuxInt(0)
  7286  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7287  		v1.AuxInt = int32ToAuxInt(4)
  7288  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7289  		v2.AuxInt = int32ToAuxInt(0)
  7290  		v2.AddArg3(ptr, v0, mem)
  7291  		v1.AddArg3(ptr, v0, v2)
  7292  		v.AddArg3(ptr, v0, v1)
  7293  		return true
  7294  	}
  7295  	// match: (Zero [16] {t} ptr mem)
  7296  	// cond: t.Alignment()%4 == 0
  7297  	// result: (MOVWstore [12] ptr (MOVWconst [0]) (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))))
  7298  	for {
  7299  		if auxIntToInt64(v.AuxInt) != 16 {
  7300  			break
  7301  		}
  7302  		t := auxToType(v.Aux)
  7303  		ptr := v_0
  7304  		mem := v_1
  7305  		if !(t.Alignment()%4 == 0) {
  7306  			break
  7307  		}
  7308  		v.reset(OpMIPSMOVWstore)
  7309  		v.AuxInt = int32ToAuxInt(12)
  7310  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7311  		v0.AuxInt = int32ToAuxInt(0)
  7312  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7313  		v1.AuxInt = int32ToAuxInt(8)
  7314  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7315  		v2.AuxInt = int32ToAuxInt(4)
  7316  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7317  		v3.AuxInt = int32ToAuxInt(0)
  7318  		v3.AddArg3(ptr, v0, mem)
  7319  		v2.AddArg3(ptr, v0, v3)
  7320  		v1.AddArg3(ptr, v0, v2)
  7321  		v.AddArg3(ptr, v0, v1)
  7322  		return true
  7323  	}
  7324  	// match: (Zero [s] {t} ptr mem)
  7325  	// cond: (s > 16 || t.Alignment()%4 != 0)
  7326  	// result: (LoweredZero [int32(t.Alignment())] ptr (ADDconst <ptr.Type> ptr [int32(s-moveSize(t.Alignment(), config))]) mem)
  7327  	for {
  7328  		s := auxIntToInt64(v.AuxInt)
  7329  		t := auxToType(v.Aux)
  7330  		ptr := v_0
  7331  		mem := v_1
  7332  		if !(s > 16 || t.Alignment()%4 != 0) {
  7333  			break
  7334  		}
  7335  		v.reset(OpMIPSLoweredZero)
  7336  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  7337  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, ptr.Type)
  7338  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  7339  		v0.AddArg(ptr)
  7340  		v.AddArg3(ptr, v0, mem)
  7341  		return true
  7342  	}
  7343  	return false
  7344  }
  7345  func rewriteValueMIPS_OpZeromask(v *Value) bool {
  7346  	v_0 := v.Args[0]
  7347  	b := v.Block
  7348  	typ := &b.Func.Config.Types
  7349  	// match: (Zeromask x)
  7350  	// result: (NEG (SGTU x (MOVWconst [0])))
  7351  	for {
  7352  		x := v_0
  7353  		v.reset(OpMIPSNEG)
  7354  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  7355  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7356  		v1.AuxInt = int32ToAuxInt(0)
  7357  		v0.AddArg2(x, v1)
  7358  		v.AddArg(v0)
  7359  		return true
  7360  	}
  7361  }
  7362  func rewriteBlockMIPS(b *Block) bool {
  7363  	switch b.Kind {
  7364  	case BlockMIPSEQ:
  7365  		// match: (EQ (FPFlagTrue cmp) yes no)
  7366  		// result: (FPF cmp yes no)
  7367  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7368  			v_0 := b.Controls[0]
  7369  			cmp := v_0.Args[0]
  7370  			b.resetWithControl(BlockMIPSFPF, cmp)
  7371  			return true
  7372  		}
  7373  		// match: (EQ (FPFlagFalse cmp) yes no)
  7374  		// result: (FPT cmp yes no)
  7375  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7376  			v_0 := b.Controls[0]
  7377  			cmp := v_0.Args[0]
  7378  			b.resetWithControl(BlockMIPSFPT, cmp)
  7379  			return true
  7380  		}
  7381  		// match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no)
  7382  		// result: (NE cmp yes no)
  7383  		for b.Controls[0].Op == OpMIPSXORconst {
  7384  			v_0 := b.Controls[0]
  7385  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7386  				break
  7387  			}
  7388  			cmp := v_0.Args[0]
  7389  			if cmp.Op != OpMIPSSGT {
  7390  				break
  7391  			}
  7392  			b.resetWithControl(BlockMIPSNE, cmp)
  7393  			return true
  7394  		}
  7395  		// match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no)
  7396  		// result: (NE cmp yes no)
  7397  		for b.Controls[0].Op == OpMIPSXORconst {
  7398  			v_0 := b.Controls[0]
  7399  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7400  				break
  7401  			}
  7402  			cmp := v_0.Args[0]
  7403  			if cmp.Op != OpMIPSSGTU {
  7404  				break
  7405  			}
  7406  			b.resetWithControl(BlockMIPSNE, cmp)
  7407  			return true
  7408  		}
  7409  		// match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no)
  7410  		// result: (NE cmp yes no)
  7411  		for b.Controls[0].Op == OpMIPSXORconst {
  7412  			v_0 := b.Controls[0]
  7413  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7414  				break
  7415  			}
  7416  			cmp := v_0.Args[0]
  7417  			if cmp.Op != OpMIPSSGTconst {
  7418  				break
  7419  			}
  7420  			b.resetWithControl(BlockMIPSNE, cmp)
  7421  			return true
  7422  		}
  7423  		// match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no)
  7424  		// result: (NE cmp yes no)
  7425  		for b.Controls[0].Op == OpMIPSXORconst {
  7426  			v_0 := b.Controls[0]
  7427  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7428  				break
  7429  			}
  7430  			cmp := v_0.Args[0]
  7431  			if cmp.Op != OpMIPSSGTUconst {
  7432  				break
  7433  			}
  7434  			b.resetWithControl(BlockMIPSNE, cmp)
  7435  			return true
  7436  		}
  7437  		// match: (EQ (XORconst [1] cmp:(SGTzero _)) yes no)
  7438  		// result: (NE cmp yes no)
  7439  		for b.Controls[0].Op == OpMIPSXORconst {
  7440  			v_0 := b.Controls[0]
  7441  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7442  				break
  7443  			}
  7444  			cmp := v_0.Args[0]
  7445  			if cmp.Op != OpMIPSSGTzero {
  7446  				break
  7447  			}
  7448  			b.resetWithControl(BlockMIPSNE, cmp)
  7449  			return true
  7450  		}
  7451  		// match: (EQ (XORconst [1] cmp:(SGTUzero _)) yes no)
  7452  		// result: (NE cmp yes no)
  7453  		for b.Controls[0].Op == OpMIPSXORconst {
  7454  			v_0 := b.Controls[0]
  7455  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7456  				break
  7457  			}
  7458  			cmp := v_0.Args[0]
  7459  			if cmp.Op != OpMIPSSGTUzero {
  7460  				break
  7461  			}
  7462  			b.resetWithControl(BlockMIPSNE, cmp)
  7463  			return true
  7464  		}
  7465  		// match: (EQ (SGTUconst [1] x) yes no)
  7466  		// result: (NE x yes no)
  7467  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7468  			v_0 := b.Controls[0]
  7469  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7470  				break
  7471  			}
  7472  			x := v_0.Args[0]
  7473  			b.resetWithControl(BlockMIPSNE, x)
  7474  			return true
  7475  		}
  7476  		// match: (EQ (SGTUzero x) yes no)
  7477  		// result: (EQ x yes no)
  7478  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7479  			v_0 := b.Controls[0]
  7480  			x := v_0.Args[0]
  7481  			b.resetWithControl(BlockMIPSEQ, x)
  7482  			return true
  7483  		}
  7484  		// match: (EQ (SGTconst [0] x) yes no)
  7485  		// result: (GEZ x yes no)
  7486  		for b.Controls[0].Op == OpMIPSSGTconst {
  7487  			v_0 := b.Controls[0]
  7488  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7489  				break
  7490  			}
  7491  			x := v_0.Args[0]
  7492  			b.resetWithControl(BlockMIPSGEZ, x)
  7493  			return true
  7494  		}
  7495  		// match: (EQ (SGTzero x) yes no)
  7496  		// result: (LEZ x yes no)
  7497  		for b.Controls[0].Op == OpMIPSSGTzero {
  7498  			v_0 := b.Controls[0]
  7499  			x := v_0.Args[0]
  7500  			b.resetWithControl(BlockMIPSLEZ, x)
  7501  			return true
  7502  		}
  7503  		// match: (EQ (MOVWconst [0]) yes no)
  7504  		// result: (First yes no)
  7505  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7506  			v_0 := b.Controls[0]
  7507  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7508  				break
  7509  			}
  7510  			b.Reset(BlockFirst)
  7511  			return true
  7512  		}
  7513  		// match: (EQ (MOVWconst [c]) yes no)
  7514  		// cond: c != 0
  7515  		// result: (First no yes)
  7516  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7517  			v_0 := b.Controls[0]
  7518  			c := auxIntToInt32(v_0.AuxInt)
  7519  			if !(c != 0) {
  7520  				break
  7521  			}
  7522  			b.Reset(BlockFirst)
  7523  			b.swapSuccessors()
  7524  			return true
  7525  		}
  7526  	case BlockMIPSGEZ:
  7527  		// match: (GEZ (MOVWconst [c]) yes no)
  7528  		// cond: c >= 0
  7529  		// result: (First yes no)
  7530  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7531  			v_0 := b.Controls[0]
  7532  			c := auxIntToInt32(v_0.AuxInt)
  7533  			if !(c >= 0) {
  7534  				break
  7535  			}
  7536  			b.Reset(BlockFirst)
  7537  			return true
  7538  		}
  7539  		// match: (GEZ (MOVWconst [c]) yes no)
  7540  		// cond: c < 0
  7541  		// result: (First no yes)
  7542  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7543  			v_0 := b.Controls[0]
  7544  			c := auxIntToInt32(v_0.AuxInt)
  7545  			if !(c < 0) {
  7546  				break
  7547  			}
  7548  			b.Reset(BlockFirst)
  7549  			b.swapSuccessors()
  7550  			return true
  7551  		}
  7552  	case BlockMIPSGTZ:
  7553  		// match: (GTZ (MOVWconst [c]) yes no)
  7554  		// cond: c > 0
  7555  		// result: (First yes no)
  7556  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7557  			v_0 := b.Controls[0]
  7558  			c := auxIntToInt32(v_0.AuxInt)
  7559  			if !(c > 0) {
  7560  				break
  7561  			}
  7562  			b.Reset(BlockFirst)
  7563  			return true
  7564  		}
  7565  		// match: (GTZ (MOVWconst [c]) yes no)
  7566  		// cond: c <= 0
  7567  		// result: (First no yes)
  7568  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7569  			v_0 := b.Controls[0]
  7570  			c := auxIntToInt32(v_0.AuxInt)
  7571  			if !(c <= 0) {
  7572  				break
  7573  			}
  7574  			b.Reset(BlockFirst)
  7575  			b.swapSuccessors()
  7576  			return true
  7577  		}
  7578  	case BlockIf:
  7579  		// match: (If cond yes no)
  7580  		// result: (NE cond yes no)
  7581  		for {
  7582  			cond := b.Controls[0]
  7583  			b.resetWithControl(BlockMIPSNE, cond)
  7584  			return true
  7585  		}
  7586  	case BlockMIPSLEZ:
  7587  		// match: (LEZ (MOVWconst [c]) yes no)
  7588  		// cond: c <= 0
  7589  		// result: (First yes no)
  7590  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7591  			v_0 := b.Controls[0]
  7592  			c := auxIntToInt32(v_0.AuxInt)
  7593  			if !(c <= 0) {
  7594  				break
  7595  			}
  7596  			b.Reset(BlockFirst)
  7597  			return true
  7598  		}
  7599  		// match: (LEZ (MOVWconst [c]) yes no)
  7600  		// cond: c > 0
  7601  		// result: (First no yes)
  7602  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7603  			v_0 := b.Controls[0]
  7604  			c := auxIntToInt32(v_0.AuxInt)
  7605  			if !(c > 0) {
  7606  				break
  7607  			}
  7608  			b.Reset(BlockFirst)
  7609  			b.swapSuccessors()
  7610  			return true
  7611  		}
  7612  	case BlockMIPSLTZ:
  7613  		// match: (LTZ (MOVWconst [c]) yes no)
  7614  		// cond: c < 0
  7615  		// result: (First yes no)
  7616  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7617  			v_0 := b.Controls[0]
  7618  			c := auxIntToInt32(v_0.AuxInt)
  7619  			if !(c < 0) {
  7620  				break
  7621  			}
  7622  			b.Reset(BlockFirst)
  7623  			return true
  7624  		}
  7625  		// match: (LTZ (MOVWconst [c]) yes no)
  7626  		// cond: c >= 0
  7627  		// result: (First no yes)
  7628  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7629  			v_0 := b.Controls[0]
  7630  			c := auxIntToInt32(v_0.AuxInt)
  7631  			if !(c >= 0) {
  7632  				break
  7633  			}
  7634  			b.Reset(BlockFirst)
  7635  			b.swapSuccessors()
  7636  			return true
  7637  		}
  7638  	case BlockMIPSNE:
  7639  		// match: (NE (FPFlagTrue cmp) yes no)
  7640  		// result: (FPT cmp yes no)
  7641  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7642  			v_0 := b.Controls[0]
  7643  			cmp := v_0.Args[0]
  7644  			b.resetWithControl(BlockMIPSFPT, cmp)
  7645  			return true
  7646  		}
  7647  		// match: (NE (FPFlagFalse cmp) yes no)
  7648  		// result: (FPF cmp yes no)
  7649  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7650  			v_0 := b.Controls[0]
  7651  			cmp := v_0.Args[0]
  7652  			b.resetWithControl(BlockMIPSFPF, cmp)
  7653  			return true
  7654  		}
  7655  		// match: (NE (XORconst [1] cmp:(SGT _ _)) yes no)
  7656  		// result: (EQ cmp yes no)
  7657  		for b.Controls[0].Op == OpMIPSXORconst {
  7658  			v_0 := b.Controls[0]
  7659  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7660  				break
  7661  			}
  7662  			cmp := v_0.Args[0]
  7663  			if cmp.Op != OpMIPSSGT {
  7664  				break
  7665  			}
  7666  			b.resetWithControl(BlockMIPSEQ, cmp)
  7667  			return true
  7668  		}
  7669  		// match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no)
  7670  		// result: (EQ cmp yes no)
  7671  		for b.Controls[0].Op == OpMIPSXORconst {
  7672  			v_0 := b.Controls[0]
  7673  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7674  				break
  7675  			}
  7676  			cmp := v_0.Args[0]
  7677  			if cmp.Op != OpMIPSSGTU {
  7678  				break
  7679  			}
  7680  			b.resetWithControl(BlockMIPSEQ, cmp)
  7681  			return true
  7682  		}
  7683  		// match: (NE (XORconst [1] cmp:(SGTconst _)) yes no)
  7684  		// result: (EQ cmp yes no)
  7685  		for b.Controls[0].Op == OpMIPSXORconst {
  7686  			v_0 := b.Controls[0]
  7687  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7688  				break
  7689  			}
  7690  			cmp := v_0.Args[0]
  7691  			if cmp.Op != OpMIPSSGTconst {
  7692  				break
  7693  			}
  7694  			b.resetWithControl(BlockMIPSEQ, cmp)
  7695  			return true
  7696  		}
  7697  		// match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no)
  7698  		// result: (EQ cmp yes no)
  7699  		for b.Controls[0].Op == OpMIPSXORconst {
  7700  			v_0 := b.Controls[0]
  7701  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7702  				break
  7703  			}
  7704  			cmp := v_0.Args[0]
  7705  			if cmp.Op != OpMIPSSGTUconst {
  7706  				break
  7707  			}
  7708  			b.resetWithControl(BlockMIPSEQ, cmp)
  7709  			return true
  7710  		}
  7711  		// match: (NE (XORconst [1] cmp:(SGTzero _)) yes no)
  7712  		// result: (EQ cmp yes no)
  7713  		for b.Controls[0].Op == OpMIPSXORconst {
  7714  			v_0 := b.Controls[0]
  7715  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7716  				break
  7717  			}
  7718  			cmp := v_0.Args[0]
  7719  			if cmp.Op != OpMIPSSGTzero {
  7720  				break
  7721  			}
  7722  			b.resetWithControl(BlockMIPSEQ, cmp)
  7723  			return true
  7724  		}
  7725  		// match: (NE (XORconst [1] cmp:(SGTUzero _)) yes no)
  7726  		// result: (EQ cmp yes no)
  7727  		for b.Controls[0].Op == OpMIPSXORconst {
  7728  			v_0 := b.Controls[0]
  7729  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7730  				break
  7731  			}
  7732  			cmp := v_0.Args[0]
  7733  			if cmp.Op != OpMIPSSGTUzero {
  7734  				break
  7735  			}
  7736  			b.resetWithControl(BlockMIPSEQ, cmp)
  7737  			return true
  7738  		}
  7739  		// match: (NE (SGTUconst [1] x) yes no)
  7740  		// result: (EQ x yes no)
  7741  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7742  			v_0 := b.Controls[0]
  7743  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7744  				break
  7745  			}
  7746  			x := v_0.Args[0]
  7747  			b.resetWithControl(BlockMIPSEQ, x)
  7748  			return true
  7749  		}
  7750  		// match: (NE (SGTUzero x) yes no)
  7751  		// result: (NE x yes no)
  7752  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7753  			v_0 := b.Controls[0]
  7754  			x := v_0.Args[0]
  7755  			b.resetWithControl(BlockMIPSNE, x)
  7756  			return true
  7757  		}
  7758  		// match: (NE (SGTconst [0] x) yes no)
  7759  		// result: (LTZ x yes no)
  7760  		for b.Controls[0].Op == OpMIPSSGTconst {
  7761  			v_0 := b.Controls[0]
  7762  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7763  				break
  7764  			}
  7765  			x := v_0.Args[0]
  7766  			b.resetWithControl(BlockMIPSLTZ, x)
  7767  			return true
  7768  		}
  7769  		// match: (NE (SGTzero x) yes no)
  7770  		// result: (GTZ x yes no)
  7771  		for b.Controls[0].Op == OpMIPSSGTzero {
  7772  			v_0 := b.Controls[0]
  7773  			x := v_0.Args[0]
  7774  			b.resetWithControl(BlockMIPSGTZ, x)
  7775  			return true
  7776  		}
  7777  		// match: (NE (MOVWconst [0]) yes no)
  7778  		// result: (First no yes)
  7779  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7780  			v_0 := b.Controls[0]
  7781  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7782  				break
  7783  			}
  7784  			b.Reset(BlockFirst)
  7785  			b.swapSuccessors()
  7786  			return true
  7787  		}
  7788  		// match: (NE (MOVWconst [c]) yes no)
  7789  		// cond: c != 0
  7790  		// result: (First yes no)
  7791  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7792  			v_0 := b.Controls[0]
  7793  			c := auxIntToInt32(v_0.AuxInt)
  7794  			if !(c != 0) {
  7795  				break
  7796  			}
  7797  			b.Reset(BlockFirst)
  7798  			return true
  7799  		}
  7800  	}
  7801  	return false
  7802  }
  7803