1
2
3 package ssa
4
5 import (
6 "cmd/internal/obj"
7 "cmd/internal/obj/arm"
8 "cmd/internal/obj/arm64"
9 "cmd/internal/obj/loong64"
10 "cmd/internal/obj/mips"
11 "cmd/internal/obj/ppc64"
12 "cmd/internal/obj/riscv"
13 "cmd/internal/obj/s390x"
14 "cmd/internal/obj/wasm"
15 "cmd/internal/obj/x86"
16 )
17
18 const (
19 BlockInvalid BlockKind = iota
20
21 Block386EQ
22 Block386NE
23 Block386LT
24 Block386LE
25 Block386GT
26 Block386GE
27 Block386OS
28 Block386OC
29 Block386ULT
30 Block386ULE
31 Block386UGT
32 Block386UGE
33 Block386EQF
34 Block386NEF
35 Block386ORD
36 Block386NAN
37
38 BlockAMD64EQ
39 BlockAMD64NE
40 BlockAMD64LT
41 BlockAMD64LE
42 BlockAMD64GT
43 BlockAMD64GE
44 BlockAMD64OS
45 BlockAMD64OC
46 BlockAMD64ULT
47 BlockAMD64ULE
48 BlockAMD64UGT
49 BlockAMD64UGE
50 BlockAMD64EQF
51 BlockAMD64NEF
52 BlockAMD64ORD
53 BlockAMD64NAN
54 BlockAMD64JUMPTABLE
55
56 BlockARMEQ
57 BlockARMNE
58 BlockARMLT
59 BlockARMLE
60 BlockARMGT
61 BlockARMGE
62 BlockARMULT
63 BlockARMULE
64 BlockARMUGT
65 BlockARMUGE
66 BlockARMLTnoov
67 BlockARMLEnoov
68 BlockARMGTnoov
69 BlockARMGEnoov
70
71 BlockARM64EQ
72 BlockARM64NE
73 BlockARM64LT
74 BlockARM64LE
75 BlockARM64GT
76 BlockARM64GE
77 BlockARM64ULT
78 BlockARM64ULE
79 BlockARM64UGT
80 BlockARM64UGE
81 BlockARM64Z
82 BlockARM64NZ
83 BlockARM64ZW
84 BlockARM64NZW
85 BlockARM64TBZ
86 BlockARM64TBNZ
87 BlockARM64FLT
88 BlockARM64FLE
89 BlockARM64FGT
90 BlockARM64FGE
91 BlockARM64LTnoov
92 BlockARM64LEnoov
93 BlockARM64GTnoov
94 BlockARM64GEnoov
95 BlockARM64JUMPTABLE
96
97 BlockLOONG64EQ
98 BlockLOONG64NE
99 BlockLOONG64LTZ
100 BlockLOONG64LEZ
101 BlockLOONG64GTZ
102 BlockLOONG64GEZ
103 BlockLOONG64FPT
104 BlockLOONG64FPF
105 BlockLOONG64BEQ
106 BlockLOONG64BNE
107 BlockLOONG64BGE
108 BlockLOONG64BLT
109 BlockLOONG64BGEU
110 BlockLOONG64BLTU
111
112 BlockMIPSEQ
113 BlockMIPSNE
114 BlockMIPSLTZ
115 BlockMIPSLEZ
116 BlockMIPSGTZ
117 BlockMIPSGEZ
118 BlockMIPSFPT
119 BlockMIPSFPF
120
121 BlockMIPS64EQ
122 BlockMIPS64NE
123 BlockMIPS64LTZ
124 BlockMIPS64LEZ
125 BlockMIPS64GTZ
126 BlockMIPS64GEZ
127 BlockMIPS64FPT
128 BlockMIPS64FPF
129
130 BlockPPC64EQ
131 BlockPPC64NE
132 BlockPPC64LT
133 BlockPPC64LE
134 BlockPPC64GT
135 BlockPPC64GE
136 BlockPPC64FLT
137 BlockPPC64FLE
138 BlockPPC64FGT
139 BlockPPC64FGE
140
141 BlockRISCV64BEQ
142 BlockRISCV64BNE
143 BlockRISCV64BLT
144 BlockRISCV64BGE
145 BlockRISCV64BLTU
146 BlockRISCV64BGEU
147 BlockRISCV64BEQZ
148 BlockRISCV64BNEZ
149 BlockRISCV64BLEZ
150 BlockRISCV64BGEZ
151 BlockRISCV64BLTZ
152 BlockRISCV64BGTZ
153
154 BlockS390XBRC
155 BlockS390XCRJ
156 BlockS390XCGRJ
157 BlockS390XCLRJ
158 BlockS390XCLGRJ
159 BlockS390XCIJ
160 BlockS390XCGIJ
161 BlockS390XCLIJ
162 BlockS390XCLGIJ
163
164 BlockPlain
165 BlockIf
166 BlockDefer
167 BlockRet
168 BlockRetJmp
169 BlockExit
170 BlockJumpTable
171 BlockFirst
172 )
173
174 var blockString = [...]string{
175 BlockInvalid: "BlockInvalid",
176
177 Block386EQ: "EQ",
178 Block386NE: "NE",
179 Block386LT: "LT",
180 Block386LE: "LE",
181 Block386GT: "GT",
182 Block386GE: "GE",
183 Block386OS: "OS",
184 Block386OC: "OC",
185 Block386ULT: "ULT",
186 Block386ULE: "ULE",
187 Block386UGT: "UGT",
188 Block386UGE: "UGE",
189 Block386EQF: "EQF",
190 Block386NEF: "NEF",
191 Block386ORD: "ORD",
192 Block386NAN: "NAN",
193
194 BlockAMD64EQ: "EQ",
195 BlockAMD64NE: "NE",
196 BlockAMD64LT: "LT",
197 BlockAMD64LE: "LE",
198 BlockAMD64GT: "GT",
199 BlockAMD64GE: "GE",
200 BlockAMD64OS: "OS",
201 BlockAMD64OC: "OC",
202 BlockAMD64ULT: "ULT",
203 BlockAMD64ULE: "ULE",
204 BlockAMD64UGT: "UGT",
205 BlockAMD64UGE: "UGE",
206 BlockAMD64EQF: "EQF",
207 BlockAMD64NEF: "NEF",
208 BlockAMD64ORD: "ORD",
209 BlockAMD64NAN: "NAN",
210 BlockAMD64JUMPTABLE: "JUMPTABLE",
211
212 BlockARMEQ: "EQ",
213 BlockARMNE: "NE",
214 BlockARMLT: "LT",
215 BlockARMLE: "LE",
216 BlockARMGT: "GT",
217 BlockARMGE: "GE",
218 BlockARMULT: "ULT",
219 BlockARMULE: "ULE",
220 BlockARMUGT: "UGT",
221 BlockARMUGE: "UGE",
222 BlockARMLTnoov: "LTnoov",
223 BlockARMLEnoov: "LEnoov",
224 BlockARMGTnoov: "GTnoov",
225 BlockARMGEnoov: "GEnoov",
226
227 BlockARM64EQ: "EQ",
228 BlockARM64NE: "NE",
229 BlockARM64LT: "LT",
230 BlockARM64LE: "LE",
231 BlockARM64GT: "GT",
232 BlockARM64GE: "GE",
233 BlockARM64ULT: "ULT",
234 BlockARM64ULE: "ULE",
235 BlockARM64UGT: "UGT",
236 BlockARM64UGE: "UGE",
237 BlockARM64Z: "Z",
238 BlockARM64NZ: "NZ",
239 BlockARM64ZW: "ZW",
240 BlockARM64NZW: "NZW",
241 BlockARM64TBZ: "TBZ",
242 BlockARM64TBNZ: "TBNZ",
243 BlockARM64FLT: "FLT",
244 BlockARM64FLE: "FLE",
245 BlockARM64FGT: "FGT",
246 BlockARM64FGE: "FGE",
247 BlockARM64LTnoov: "LTnoov",
248 BlockARM64LEnoov: "LEnoov",
249 BlockARM64GTnoov: "GTnoov",
250 BlockARM64GEnoov: "GEnoov",
251 BlockARM64JUMPTABLE: "JUMPTABLE",
252
253 BlockLOONG64EQ: "EQ",
254 BlockLOONG64NE: "NE",
255 BlockLOONG64LTZ: "LTZ",
256 BlockLOONG64LEZ: "LEZ",
257 BlockLOONG64GTZ: "GTZ",
258 BlockLOONG64GEZ: "GEZ",
259 BlockLOONG64FPT: "FPT",
260 BlockLOONG64FPF: "FPF",
261 BlockLOONG64BEQ: "BEQ",
262 BlockLOONG64BNE: "BNE",
263 BlockLOONG64BGE: "BGE",
264 BlockLOONG64BLT: "BLT",
265 BlockLOONG64BGEU: "BGEU",
266 BlockLOONG64BLTU: "BLTU",
267
268 BlockMIPSEQ: "EQ",
269 BlockMIPSNE: "NE",
270 BlockMIPSLTZ: "LTZ",
271 BlockMIPSLEZ: "LEZ",
272 BlockMIPSGTZ: "GTZ",
273 BlockMIPSGEZ: "GEZ",
274 BlockMIPSFPT: "FPT",
275 BlockMIPSFPF: "FPF",
276
277 BlockMIPS64EQ: "EQ",
278 BlockMIPS64NE: "NE",
279 BlockMIPS64LTZ: "LTZ",
280 BlockMIPS64LEZ: "LEZ",
281 BlockMIPS64GTZ: "GTZ",
282 BlockMIPS64GEZ: "GEZ",
283 BlockMIPS64FPT: "FPT",
284 BlockMIPS64FPF: "FPF",
285
286 BlockPPC64EQ: "EQ",
287 BlockPPC64NE: "NE",
288 BlockPPC64LT: "LT",
289 BlockPPC64LE: "LE",
290 BlockPPC64GT: "GT",
291 BlockPPC64GE: "GE",
292 BlockPPC64FLT: "FLT",
293 BlockPPC64FLE: "FLE",
294 BlockPPC64FGT: "FGT",
295 BlockPPC64FGE: "FGE",
296
297 BlockRISCV64BEQ: "BEQ",
298 BlockRISCV64BNE: "BNE",
299 BlockRISCV64BLT: "BLT",
300 BlockRISCV64BGE: "BGE",
301 BlockRISCV64BLTU: "BLTU",
302 BlockRISCV64BGEU: "BGEU",
303 BlockRISCV64BEQZ: "BEQZ",
304 BlockRISCV64BNEZ: "BNEZ",
305 BlockRISCV64BLEZ: "BLEZ",
306 BlockRISCV64BGEZ: "BGEZ",
307 BlockRISCV64BLTZ: "BLTZ",
308 BlockRISCV64BGTZ: "BGTZ",
309
310 BlockS390XBRC: "BRC",
311 BlockS390XCRJ: "CRJ",
312 BlockS390XCGRJ: "CGRJ",
313 BlockS390XCLRJ: "CLRJ",
314 BlockS390XCLGRJ: "CLGRJ",
315 BlockS390XCIJ: "CIJ",
316 BlockS390XCGIJ: "CGIJ",
317 BlockS390XCLIJ: "CLIJ",
318 BlockS390XCLGIJ: "CLGIJ",
319
320 BlockPlain: "Plain",
321 BlockIf: "If",
322 BlockDefer: "Defer",
323 BlockRet: "Ret",
324 BlockRetJmp: "RetJmp",
325 BlockExit: "Exit",
326 BlockJumpTable: "JumpTable",
327 BlockFirst: "First",
328 }
329
330 func (k BlockKind) String() string { return blockString[k] }
331 func (k BlockKind) AuxIntType() string {
332 switch k {
333 case BlockARM64TBZ:
334 return "int64"
335 case BlockARM64TBNZ:
336 return "int64"
337 case BlockS390XCIJ:
338 return "int8"
339 case BlockS390XCGIJ:
340 return "int8"
341 case BlockS390XCLIJ:
342 return "uint8"
343 case BlockS390XCLGIJ:
344 return "uint8"
345 }
346 return ""
347 }
348
349 const (
350 OpInvalid Op = iota
351
352 Op386ADDSS
353 Op386ADDSD
354 Op386SUBSS
355 Op386SUBSD
356 Op386MULSS
357 Op386MULSD
358 Op386DIVSS
359 Op386DIVSD
360 Op386MOVSSload
361 Op386MOVSDload
362 Op386MOVSSconst
363 Op386MOVSDconst
364 Op386MOVSSloadidx1
365 Op386MOVSSloadidx4
366 Op386MOVSDloadidx1
367 Op386MOVSDloadidx8
368 Op386MOVSSstore
369 Op386MOVSDstore
370 Op386MOVSSstoreidx1
371 Op386MOVSSstoreidx4
372 Op386MOVSDstoreidx1
373 Op386MOVSDstoreidx8
374 Op386ADDSSload
375 Op386ADDSDload
376 Op386SUBSSload
377 Op386SUBSDload
378 Op386MULSSload
379 Op386MULSDload
380 Op386DIVSSload
381 Op386DIVSDload
382 Op386ADDL
383 Op386ADDLconst
384 Op386ADDLcarry
385 Op386ADDLconstcarry
386 Op386ADCL
387 Op386ADCLconst
388 Op386SUBL
389 Op386SUBLconst
390 Op386SUBLcarry
391 Op386SUBLconstcarry
392 Op386SBBL
393 Op386SBBLconst
394 Op386MULL
395 Op386MULLconst
396 Op386MULLU
397 Op386HMULL
398 Op386HMULLU
399 Op386MULLQU
400 Op386AVGLU
401 Op386DIVL
402 Op386DIVW
403 Op386DIVLU
404 Op386DIVWU
405 Op386MODL
406 Op386MODW
407 Op386MODLU
408 Op386MODWU
409 Op386ANDL
410 Op386ANDLconst
411 Op386ORL
412 Op386ORLconst
413 Op386XORL
414 Op386XORLconst
415 Op386CMPL
416 Op386CMPW
417 Op386CMPB
418 Op386CMPLconst
419 Op386CMPWconst
420 Op386CMPBconst
421 Op386CMPLload
422 Op386CMPWload
423 Op386CMPBload
424 Op386CMPLconstload
425 Op386CMPWconstload
426 Op386CMPBconstload
427 Op386UCOMISS
428 Op386UCOMISD
429 Op386TESTL
430 Op386TESTW
431 Op386TESTB
432 Op386TESTLconst
433 Op386TESTWconst
434 Op386TESTBconst
435 Op386SHLL
436 Op386SHLLconst
437 Op386SHRL
438 Op386SHRW
439 Op386SHRB
440 Op386SHRLconst
441 Op386SHRWconst
442 Op386SHRBconst
443 Op386SARL
444 Op386SARW
445 Op386SARB
446 Op386SARLconst
447 Op386SARWconst
448 Op386SARBconst
449 Op386ROLL
450 Op386ROLW
451 Op386ROLB
452 Op386ROLLconst
453 Op386ROLWconst
454 Op386ROLBconst
455 Op386ADDLload
456 Op386SUBLload
457 Op386MULLload
458 Op386ANDLload
459 Op386ORLload
460 Op386XORLload
461 Op386ADDLloadidx4
462 Op386SUBLloadidx4
463 Op386MULLloadidx4
464 Op386ANDLloadidx4
465 Op386ORLloadidx4
466 Op386XORLloadidx4
467 Op386NEGL
468 Op386NOTL
469 Op386BSFL
470 Op386BSFW
471 Op386LoweredCtz32
472 Op386LoweredCtz64
473 Op386BSRL
474 Op386BSRW
475 Op386BSWAPL
476 Op386SQRTSD
477 Op386SQRTSS
478 Op386SBBLcarrymask
479 Op386SETEQ
480 Op386SETNE
481 Op386SETL
482 Op386SETLE
483 Op386SETG
484 Op386SETGE
485 Op386SETB
486 Op386SETBE
487 Op386SETA
488 Op386SETAE
489 Op386SETO
490 Op386SETEQF
491 Op386SETNEF
492 Op386SETORD
493 Op386SETNAN
494 Op386SETGF
495 Op386SETGEF
496 Op386MOVBLSX
497 Op386MOVBLZX
498 Op386MOVWLSX
499 Op386MOVWLZX
500 Op386MOVLconst
501 Op386CVTTSD2SL
502 Op386CVTTSS2SL
503 Op386CVTSL2SS
504 Op386CVTSL2SD
505 Op386CVTSD2SS
506 Op386CVTSS2SD
507 Op386PXOR
508 Op386LEAL
509 Op386LEAL1
510 Op386LEAL2
511 Op386LEAL4
512 Op386LEAL8
513 Op386MOVBload
514 Op386MOVBLSXload
515 Op386MOVWload
516 Op386MOVWLSXload
517 Op386MOVLload
518 Op386MOVBstore
519 Op386MOVWstore
520 Op386MOVLstore
521 Op386ADDLmodify
522 Op386SUBLmodify
523 Op386ANDLmodify
524 Op386ORLmodify
525 Op386XORLmodify
526 Op386ADDLmodifyidx4
527 Op386SUBLmodifyidx4
528 Op386ANDLmodifyidx4
529 Op386ORLmodifyidx4
530 Op386XORLmodifyidx4
531 Op386ADDLconstmodify
532 Op386ANDLconstmodify
533 Op386ORLconstmodify
534 Op386XORLconstmodify
535 Op386ADDLconstmodifyidx4
536 Op386ANDLconstmodifyidx4
537 Op386ORLconstmodifyidx4
538 Op386XORLconstmodifyidx4
539 Op386MOVBloadidx1
540 Op386MOVWloadidx1
541 Op386MOVWloadidx2
542 Op386MOVLloadidx1
543 Op386MOVLloadidx4
544 Op386MOVBstoreidx1
545 Op386MOVWstoreidx1
546 Op386MOVWstoreidx2
547 Op386MOVLstoreidx1
548 Op386MOVLstoreidx4
549 Op386MOVBstoreconst
550 Op386MOVWstoreconst
551 Op386MOVLstoreconst
552 Op386MOVBstoreconstidx1
553 Op386MOVWstoreconstidx1
554 Op386MOVWstoreconstidx2
555 Op386MOVLstoreconstidx1
556 Op386MOVLstoreconstidx4
557 Op386DUFFZERO
558 Op386REPSTOSL
559 Op386CALLstatic
560 Op386CALLtail
561 Op386CALLclosure
562 Op386CALLinter
563 Op386DUFFCOPY
564 Op386REPMOVSL
565 Op386InvertFlags
566 Op386LoweredGetG
567 Op386LoweredGetClosurePtr
568 Op386LoweredGetCallerPC
569 Op386LoweredGetCallerSP
570 Op386LoweredNilCheck
571 Op386LoweredWB
572 Op386LoweredPanicBoundsRR
573 Op386LoweredPanicBoundsRC
574 Op386LoweredPanicBoundsCR
575 Op386LoweredPanicBoundsCC
576 Op386LoweredPanicExtendRR
577 Op386LoweredPanicExtendRC
578 Op386FlagEQ
579 Op386FlagLT_ULT
580 Op386FlagLT_UGT
581 Op386FlagGT_UGT
582 Op386FlagGT_ULT
583 Op386MOVSSconst1
584 Op386MOVSDconst1
585 Op386MOVSSconst2
586 Op386MOVSDconst2
587
588 OpAMD64ADDSS
589 OpAMD64ADDSD
590 OpAMD64SUBSS
591 OpAMD64SUBSD
592 OpAMD64MULSS
593 OpAMD64MULSD
594 OpAMD64DIVSS
595 OpAMD64DIVSD
596 OpAMD64MOVSSload
597 OpAMD64MOVSDload
598 OpAMD64MOVSSconst
599 OpAMD64MOVSDconst
600 OpAMD64MOVSSloadidx1
601 OpAMD64MOVSSloadidx4
602 OpAMD64MOVSDloadidx1
603 OpAMD64MOVSDloadidx8
604 OpAMD64MOVSSstore
605 OpAMD64MOVSDstore
606 OpAMD64MOVSSstoreidx1
607 OpAMD64MOVSSstoreidx4
608 OpAMD64MOVSDstoreidx1
609 OpAMD64MOVSDstoreidx8
610 OpAMD64ADDSSload
611 OpAMD64ADDSDload
612 OpAMD64SUBSSload
613 OpAMD64SUBSDload
614 OpAMD64MULSSload
615 OpAMD64MULSDload
616 OpAMD64DIVSSload
617 OpAMD64DIVSDload
618 OpAMD64ADDSSloadidx1
619 OpAMD64ADDSSloadidx4
620 OpAMD64ADDSDloadidx1
621 OpAMD64ADDSDloadidx8
622 OpAMD64SUBSSloadidx1
623 OpAMD64SUBSSloadidx4
624 OpAMD64SUBSDloadidx1
625 OpAMD64SUBSDloadidx8
626 OpAMD64MULSSloadidx1
627 OpAMD64MULSSloadidx4
628 OpAMD64MULSDloadidx1
629 OpAMD64MULSDloadidx8
630 OpAMD64DIVSSloadidx1
631 OpAMD64DIVSSloadidx4
632 OpAMD64DIVSDloadidx1
633 OpAMD64DIVSDloadidx8
634 OpAMD64ADDQ
635 OpAMD64ADDL
636 OpAMD64ADDQconst
637 OpAMD64ADDLconst
638 OpAMD64ADDQconstmodify
639 OpAMD64ADDLconstmodify
640 OpAMD64SUBQ
641 OpAMD64SUBL
642 OpAMD64SUBQconst
643 OpAMD64SUBLconst
644 OpAMD64MULQ
645 OpAMD64MULL
646 OpAMD64MULQconst
647 OpAMD64MULLconst
648 OpAMD64MULLU
649 OpAMD64MULQU
650 OpAMD64HMULQ
651 OpAMD64HMULL
652 OpAMD64HMULQU
653 OpAMD64HMULLU
654 OpAMD64AVGQU
655 OpAMD64DIVQ
656 OpAMD64DIVL
657 OpAMD64DIVW
658 OpAMD64DIVQU
659 OpAMD64DIVLU
660 OpAMD64DIVWU
661 OpAMD64NEGLflags
662 OpAMD64ADDQconstflags
663 OpAMD64ADDLconstflags
664 OpAMD64ADDQcarry
665 OpAMD64ADCQ
666 OpAMD64ADDQconstcarry
667 OpAMD64ADCQconst
668 OpAMD64SUBQborrow
669 OpAMD64SBBQ
670 OpAMD64SUBQconstborrow
671 OpAMD64SBBQconst
672 OpAMD64MULQU2
673 OpAMD64DIVQU2
674 OpAMD64ANDQ
675 OpAMD64ANDL
676 OpAMD64ANDQconst
677 OpAMD64ANDLconst
678 OpAMD64ANDQconstmodify
679 OpAMD64ANDLconstmodify
680 OpAMD64ORQ
681 OpAMD64ORL
682 OpAMD64ORQconst
683 OpAMD64ORLconst
684 OpAMD64ORQconstmodify
685 OpAMD64ORLconstmodify
686 OpAMD64XORQ
687 OpAMD64XORL
688 OpAMD64XORQconst
689 OpAMD64XORLconst
690 OpAMD64XORQconstmodify
691 OpAMD64XORLconstmodify
692 OpAMD64CMPQ
693 OpAMD64CMPL
694 OpAMD64CMPW
695 OpAMD64CMPB
696 OpAMD64CMPQconst
697 OpAMD64CMPLconst
698 OpAMD64CMPWconst
699 OpAMD64CMPBconst
700 OpAMD64CMPQload
701 OpAMD64CMPLload
702 OpAMD64CMPWload
703 OpAMD64CMPBload
704 OpAMD64CMPQconstload
705 OpAMD64CMPLconstload
706 OpAMD64CMPWconstload
707 OpAMD64CMPBconstload
708 OpAMD64CMPQloadidx8
709 OpAMD64CMPQloadidx1
710 OpAMD64CMPLloadidx4
711 OpAMD64CMPLloadidx1
712 OpAMD64CMPWloadidx2
713 OpAMD64CMPWloadidx1
714 OpAMD64CMPBloadidx1
715 OpAMD64CMPQconstloadidx8
716 OpAMD64CMPQconstloadidx1
717 OpAMD64CMPLconstloadidx4
718 OpAMD64CMPLconstloadidx1
719 OpAMD64CMPWconstloadidx2
720 OpAMD64CMPWconstloadidx1
721 OpAMD64CMPBconstloadidx1
722 OpAMD64UCOMISS
723 OpAMD64UCOMISD
724 OpAMD64BTL
725 OpAMD64BTQ
726 OpAMD64BTCL
727 OpAMD64BTCQ
728 OpAMD64BTRL
729 OpAMD64BTRQ
730 OpAMD64BTSL
731 OpAMD64BTSQ
732 OpAMD64BTLconst
733 OpAMD64BTQconst
734 OpAMD64BTCQconst
735 OpAMD64BTRQconst
736 OpAMD64BTSQconst
737 OpAMD64BTSQconstmodify
738 OpAMD64BTRQconstmodify
739 OpAMD64BTCQconstmodify
740 OpAMD64TESTQ
741 OpAMD64TESTL
742 OpAMD64TESTW
743 OpAMD64TESTB
744 OpAMD64TESTQconst
745 OpAMD64TESTLconst
746 OpAMD64TESTWconst
747 OpAMD64TESTBconst
748 OpAMD64SHLQ
749 OpAMD64SHLL
750 OpAMD64SHLQconst
751 OpAMD64SHLLconst
752 OpAMD64SHRQ
753 OpAMD64SHRL
754 OpAMD64SHRW
755 OpAMD64SHRB
756 OpAMD64SHRQconst
757 OpAMD64SHRLconst
758 OpAMD64SHRWconst
759 OpAMD64SHRBconst
760 OpAMD64SARQ
761 OpAMD64SARL
762 OpAMD64SARW
763 OpAMD64SARB
764 OpAMD64SARQconst
765 OpAMD64SARLconst
766 OpAMD64SARWconst
767 OpAMD64SARBconst
768 OpAMD64SHRDQ
769 OpAMD64SHLDQ
770 OpAMD64ROLQ
771 OpAMD64ROLL
772 OpAMD64ROLW
773 OpAMD64ROLB
774 OpAMD64RORQ
775 OpAMD64RORL
776 OpAMD64RORW
777 OpAMD64RORB
778 OpAMD64ROLQconst
779 OpAMD64ROLLconst
780 OpAMD64ROLWconst
781 OpAMD64ROLBconst
782 OpAMD64ADDLload
783 OpAMD64ADDQload
784 OpAMD64SUBQload
785 OpAMD64SUBLload
786 OpAMD64ANDLload
787 OpAMD64ANDQload
788 OpAMD64ORQload
789 OpAMD64ORLload
790 OpAMD64XORQload
791 OpAMD64XORLload
792 OpAMD64ADDLloadidx1
793 OpAMD64ADDLloadidx4
794 OpAMD64ADDLloadidx8
795 OpAMD64ADDQloadidx1
796 OpAMD64ADDQloadidx8
797 OpAMD64SUBLloadidx1
798 OpAMD64SUBLloadidx4
799 OpAMD64SUBLloadidx8
800 OpAMD64SUBQloadidx1
801 OpAMD64SUBQloadidx8
802 OpAMD64ANDLloadidx1
803 OpAMD64ANDLloadidx4
804 OpAMD64ANDLloadidx8
805 OpAMD64ANDQloadidx1
806 OpAMD64ANDQloadidx8
807 OpAMD64ORLloadidx1
808 OpAMD64ORLloadidx4
809 OpAMD64ORLloadidx8
810 OpAMD64ORQloadidx1
811 OpAMD64ORQloadidx8
812 OpAMD64XORLloadidx1
813 OpAMD64XORLloadidx4
814 OpAMD64XORLloadidx8
815 OpAMD64XORQloadidx1
816 OpAMD64XORQloadidx8
817 OpAMD64ADDQmodify
818 OpAMD64SUBQmodify
819 OpAMD64ANDQmodify
820 OpAMD64ORQmodify
821 OpAMD64XORQmodify
822 OpAMD64ADDLmodify
823 OpAMD64SUBLmodify
824 OpAMD64ANDLmodify
825 OpAMD64ORLmodify
826 OpAMD64XORLmodify
827 OpAMD64ADDQmodifyidx1
828 OpAMD64ADDQmodifyidx8
829 OpAMD64SUBQmodifyidx1
830 OpAMD64SUBQmodifyidx8
831 OpAMD64ANDQmodifyidx1
832 OpAMD64ANDQmodifyidx8
833 OpAMD64ORQmodifyidx1
834 OpAMD64ORQmodifyidx8
835 OpAMD64XORQmodifyidx1
836 OpAMD64XORQmodifyidx8
837 OpAMD64ADDLmodifyidx1
838 OpAMD64ADDLmodifyidx4
839 OpAMD64ADDLmodifyidx8
840 OpAMD64SUBLmodifyidx1
841 OpAMD64SUBLmodifyidx4
842 OpAMD64SUBLmodifyidx8
843 OpAMD64ANDLmodifyidx1
844 OpAMD64ANDLmodifyidx4
845 OpAMD64ANDLmodifyidx8
846 OpAMD64ORLmodifyidx1
847 OpAMD64ORLmodifyidx4
848 OpAMD64ORLmodifyidx8
849 OpAMD64XORLmodifyidx1
850 OpAMD64XORLmodifyidx4
851 OpAMD64XORLmodifyidx8
852 OpAMD64ADDQconstmodifyidx1
853 OpAMD64ADDQconstmodifyidx8
854 OpAMD64ANDQconstmodifyidx1
855 OpAMD64ANDQconstmodifyidx8
856 OpAMD64ORQconstmodifyidx1
857 OpAMD64ORQconstmodifyidx8
858 OpAMD64XORQconstmodifyidx1
859 OpAMD64XORQconstmodifyidx8
860 OpAMD64ADDLconstmodifyidx1
861 OpAMD64ADDLconstmodifyidx4
862 OpAMD64ADDLconstmodifyidx8
863 OpAMD64ANDLconstmodifyidx1
864 OpAMD64ANDLconstmodifyidx4
865 OpAMD64ANDLconstmodifyidx8
866 OpAMD64ORLconstmodifyidx1
867 OpAMD64ORLconstmodifyidx4
868 OpAMD64ORLconstmodifyidx8
869 OpAMD64XORLconstmodifyidx1
870 OpAMD64XORLconstmodifyidx4
871 OpAMD64XORLconstmodifyidx8
872 OpAMD64NEGQ
873 OpAMD64NEGL
874 OpAMD64NOTQ
875 OpAMD64NOTL
876 OpAMD64BSFQ
877 OpAMD64BSFL
878 OpAMD64BSRQ
879 OpAMD64BSRL
880 OpAMD64CMOVQEQ
881 OpAMD64CMOVQNE
882 OpAMD64CMOVQLT
883 OpAMD64CMOVQGT
884 OpAMD64CMOVQLE
885 OpAMD64CMOVQGE
886 OpAMD64CMOVQLS
887 OpAMD64CMOVQHI
888 OpAMD64CMOVQCC
889 OpAMD64CMOVQCS
890 OpAMD64CMOVLEQ
891 OpAMD64CMOVLNE
892 OpAMD64CMOVLLT
893 OpAMD64CMOVLGT
894 OpAMD64CMOVLLE
895 OpAMD64CMOVLGE
896 OpAMD64CMOVLLS
897 OpAMD64CMOVLHI
898 OpAMD64CMOVLCC
899 OpAMD64CMOVLCS
900 OpAMD64CMOVWEQ
901 OpAMD64CMOVWNE
902 OpAMD64CMOVWLT
903 OpAMD64CMOVWGT
904 OpAMD64CMOVWLE
905 OpAMD64CMOVWGE
906 OpAMD64CMOVWLS
907 OpAMD64CMOVWHI
908 OpAMD64CMOVWCC
909 OpAMD64CMOVWCS
910 OpAMD64CMOVQEQF
911 OpAMD64CMOVQNEF
912 OpAMD64CMOVQGTF
913 OpAMD64CMOVQGEF
914 OpAMD64CMOVLEQF
915 OpAMD64CMOVLNEF
916 OpAMD64CMOVLGTF
917 OpAMD64CMOVLGEF
918 OpAMD64CMOVWEQF
919 OpAMD64CMOVWNEF
920 OpAMD64CMOVWGTF
921 OpAMD64CMOVWGEF
922 OpAMD64BSWAPQ
923 OpAMD64BSWAPL
924 OpAMD64POPCNTQ
925 OpAMD64POPCNTL
926 OpAMD64SQRTSD
927 OpAMD64SQRTSS
928 OpAMD64ROUNDSD
929 OpAMD64LoweredRound32F
930 OpAMD64LoweredRound64F
931 OpAMD64VFMADD231SS
932 OpAMD64VFMADD231SD
933 OpAMD64MINSD
934 OpAMD64MINSS
935 OpAMD64SBBQcarrymask
936 OpAMD64SBBLcarrymask
937 OpAMD64SETEQ
938 OpAMD64SETNE
939 OpAMD64SETL
940 OpAMD64SETLE
941 OpAMD64SETG
942 OpAMD64SETGE
943 OpAMD64SETB
944 OpAMD64SETBE
945 OpAMD64SETA
946 OpAMD64SETAE
947 OpAMD64SETO
948 OpAMD64SETEQstore
949 OpAMD64SETNEstore
950 OpAMD64SETLstore
951 OpAMD64SETLEstore
952 OpAMD64SETGstore
953 OpAMD64SETGEstore
954 OpAMD64SETBstore
955 OpAMD64SETBEstore
956 OpAMD64SETAstore
957 OpAMD64SETAEstore
958 OpAMD64SETEQstoreidx1
959 OpAMD64SETNEstoreidx1
960 OpAMD64SETLstoreidx1
961 OpAMD64SETLEstoreidx1
962 OpAMD64SETGstoreidx1
963 OpAMD64SETGEstoreidx1
964 OpAMD64SETBstoreidx1
965 OpAMD64SETBEstoreidx1
966 OpAMD64SETAstoreidx1
967 OpAMD64SETAEstoreidx1
968 OpAMD64SETEQF
969 OpAMD64SETNEF
970 OpAMD64SETORD
971 OpAMD64SETNAN
972 OpAMD64SETGF
973 OpAMD64SETGEF
974 OpAMD64MOVBQSX
975 OpAMD64MOVBQZX
976 OpAMD64MOVWQSX
977 OpAMD64MOVWQZX
978 OpAMD64MOVLQSX
979 OpAMD64MOVLQZX
980 OpAMD64MOVLconst
981 OpAMD64MOVQconst
982 OpAMD64CVTTSD2SL
983 OpAMD64CVTTSD2SQ
984 OpAMD64CVTTSS2SL
985 OpAMD64CVTTSS2SQ
986 OpAMD64CVTSL2SS
987 OpAMD64CVTSL2SD
988 OpAMD64CVTSQ2SS
989 OpAMD64CVTSQ2SD
990 OpAMD64CVTSD2SS
991 OpAMD64CVTSS2SD
992 OpAMD64MOVQi2f
993 OpAMD64MOVQf2i
994 OpAMD64MOVLi2f
995 OpAMD64MOVLf2i
996 OpAMD64PXOR
997 OpAMD64POR
998 OpAMD64LEAQ
999 OpAMD64LEAL
1000 OpAMD64LEAW
1001 OpAMD64LEAQ1
1002 OpAMD64LEAL1
1003 OpAMD64LEAW1
1004 OpAMD64LEAQ2
1005 OpAMD64LEAL2
1006 OpAMD64LEAW2
1007 OpAMD64LEAQ4
1008 OpAMD64LEAL4
1009 OpAMD64LEAW4
1010 OpAMD64LEAQ8
1011 OpAMD64LEAL8
1012 OpAMD64LEAW8
1013 OpAMD64MOVBload
1014 OpAMD64MOVBQSXload
1015 OpAMD64MOVWload
1016 OpAMD64MOVWQSXload
1017 OpAMD64MOVLload
1018 OpAMD64MOVLQSXload
1019 OpAMD64MOVQload
1020 OpAMD64MOVBstore
1021 OpAMD64MOVWstore
1022 OpAMD64MOVLstore
1023 OpAMD64MOVQstore
1024 OpAMD64MOVOload
1025 OpAMD64MOVOstore
1026 OpAMD64MOVBloadidx1
1027 OpAMD64MOVWloadidx1
1028 OpAMD64MOVWloadidx2
1029 OpAMD64MOVLloadidx1
1030 OpAMD64MOVLloadidx4
1031 OpAMD64MOVLloadidx8
1032 OpAMD64MOVQloadidx1
1033 OpAMD64MOVQloadidx8
1034 OpAMD64MOVBstoreidx1
1035 OpAMD64MOVWstoreidx1
1036 OpAMD64MOVWstoreidx2
1037 OpAMD64MOVLstoreidx1
1038 OpAMD64MOVLstoreidx4
1039 OpAMD64MOVLstoreidx8
1040 OpAMD64MOVQstoreidx1
1041 OpAMD64MOVQstoreidx8
1042 OpAMD64MOVBstoreconst
1043 OpAMD64MOVWstoreconst
1044 OpAMD64MOVLstoreconst
1045 OpAMD64MOVQstoreconst
1046 OpAMD64MOVOstoreconst
1047 OpAMD64MOVBstoreconstidx1
1048 OpAMD64MOVWstoreconstidx1
1049 OpAMD64MOVWstoreconstidx2
1050 OpAMD64MOVLstoreconstidx1
1051 OpAMD64MOVLstoreconstidx4
1052 OpAMD64MOVQstoreconstidx1
1053 OpAMD64MOVQstoreconstidx8
1054 OpAMD64LoweredZero
1055 OpAMD64LoweredZeroLoop
1056 OpAMD64REPSTOSQ
1057 OpAMD64CALLstatic
1058 OpAMD64CALLtail
1059 OpAMD64CALLclosure
1060 OpAMD64CALLinter
1061 OpAMD64DUFFCOPY
1062 OpAMD64REPMOVSQ
1063 OpAMD64InvertFlags
1064 OpAMD64LoweredGetG
1065 OpAMD64LoweredGetClosurePtr
1066 OpAMD64LoweredGetCallerPC
1067 OpAMD64LoweredGetCallerSP
1068 OpAMD64LoweredNilCheck
1069 OpAMD64LoweredWB
1070 OpAMD64LoweredHasCPUFeature
1071 OpAMD64LoweredPanicBoundsRR
1072 OpAMD64LoweredPanicBoundsRC
1073 OpAMD64LoweredPanicBoundsCR
1074 OpAMD64LoweredPanicBoundsCC
1075 OpAMD64FlagEQ
1076 OpAMD64FlagLT_ULT
1077 OpAMD64FlagLT_UGT
1078 OpAMD64FlagGT_UGT
1079 OpAMD64FlagGT_ULT
1080 OpAMD64MOVBatomicload
1081 OpAMD64MOVLatomicload
1082 OpAMD64MOVQatomicload
1083 OpAMD64XCHGB
1084 OpAMD64XCHGL
1085 OpAMD64XCHGQ
1086 OpAMD64XADDLlock
1087 OpAMD64XADDQlock
1088 OpAMD64AddTupleFirst32
1089 OpAMD64AddTupleFirst64
1090 OpAMD64CMPXCHGLlock
1091 OpAMD64CMPXCHGQlock
1092 OpAMD64ANDBlock
1093 OpAMD64ANDLlock
1094 OpAMD64ANDQlock
1095 OpAMD64ORBlock
1096 OpAMD64ORLlock
1097 OpAMD64ORQlock
1098 OpAMD64LoweredAtomicAnd64
1099 OpAMD64LoweredAtomicAnd32
1100 OpAMD64LoweredAtomicOr64
1101 OpAMD64LoweredAtomicOr32
1102 OpAMD64PrefetchT0
1103 OpAMD64PrefetchNTA
1104 OpAMD64ANDNQ
1105 OpAMD64ANDNL
1106 OpAMD64BLSIQ
1107 OpAMD64BLSIL
1108 OpAMD64BLSMSKQ
1109 OpAMD64BLSMSKL
1110 OpAMD64BLSRQ
1111 OpAMD64BLSRL
1112 OpAMD64TZCNTQ
1113 OpAMD64TZCNTL
1114 OpAMD64LZCNTQ
1115 OpAMD64LZCNTL
1116 OpAMD64MOVBEWstore
1117 OpAMD64MOVBELload
1118 OpAMD64MOVBELstore
1119 OpAMD64MOVBEQload
1120 OpAMD64MOVBEQstore
1121 OpAMD64MOVBELloadidx1
1122 OpAMD64MOVBELloadidx4
1123 OpAMD64MOVBELloadidx8
1124 OpAMD64MOVBEQloadidx1
1125 OpAMD64MOVBEQloadidx8
1126 OpAMD64MOVBEWstoreidx1
1127 OpAMD64MOVBEWstoreidx2
1128 OpAMD64MOVBELstoreidx1
1129 OpAMD64MOVBELstoreidx4
1130 OpAMD64MOVBELstoreidx8
1131 OpAMD64MOVBEQstoreidx1
1132 OpAMD64MOVBEQstoreidx8
1133 OpAMD64SARXQ
1134 OpAMD64SARXL
1135 OpAMD64SHLXQ
1136 OpAMD64SHLXL
1137 OpAMD64SHRXQ
1138 OpAMD64SHRXL
1139 OpAMD64SARXLload
1140 OpAMD64SARXQload
1141 OpAMD64SHLXLload
1142 OpAMD64SHLXQload
1143 OpAMD64SHRXLload
1144 OpAMD64SHRXQload
1145 OpAMD64SARXLloadidx1
1146 OpAMD64SARXLloadidx4
1147 OpAMD64SARXLloadidx8
1148 OpAMD64SARXQloadidx1
1149 OpAMD64SARXQloadidx8
1150 OpAMD64SHLXLloadidx1
1151 OpAMD64SHLXLloadidx4
1152 OpAMD64SHLXLloadidx8
1153 OpAMD64SHLXQloadidx1
1154 OpAMD64SHLXQloadidx8
1155 OpAMD64SHRXLloadidx1
1156 OpAMD64SHRXLloadidx4
1157 OpAMD64SHRXLloadidx8
1158 OpAMD64SHRXQloadidx1
1159 OpAMD64SHRXQloadidx8
1160 OpAMD64PUNPCKLBW
1161 OpAMD64PSHUFLW
1162 OpAMD64PSHUFBbroadcast
1163 OpAMD64VPBROADCASTB
1164 OpAMD64PSIGNB
1165 OpAMD64PCMPEQB
1166 OpAMD64PMOVMSKB
1167
1168 OpARMADD
1169 OpARMADDconst
1170 OpARMSUB
1171 OpARMSUBconst
1172 OpARMRSB
1173 OpARMRSBconst
1174 OpARMMUL
1175 OpARMHMUL
1176 OpARMHMULU
1177 OpARMCALLudiv
1178 OpARMADDS
1179 OpARMADDSconst
1180 OpARMADC
1181 OpARMADCconst
1182 OpARMSUBS
1183 OpARMSUBSconst
1184 OpARMRSBSconst
1185 OpARMSBC
1186 OpARMSBCconst
1187 OpARMRSCconst
1188 OpARMMULLU
1189 OpARMMULA
1190 OpARMMULS
1191 OpARMADDF
1192 OpARMADDD
1193 OpARMSUBF
1194 OpARMSUBD
1195 OpARMMULF
1196 OpARMMULD
1197 OpARMNMULF
1198 OpARMNMULD
1199 OpARMDIVF
1200 OpARMDIVD
1201 OpARMMULAF
1202 OpARMMULAD
1203 OpARMMULSF
1204 OpARMMULSD
1205 OpARMFMULAD
1206 OpARMAND
1207 OpARMANDconst
1208 OpARMOR
1209 OpARMORconst
1210 OpARMXOR
1211 OpARMXORconst
1212 OpARMBIC
1213 OpARMBICconst
1214 OpARMBFX
1215 OpARMBFXU
1216 OpARMMVN
1217 OpARMNEGF
1218 OpARMNEGD
1219 OpARMSQRTD
1220 OpARMSQRTF
1221 OpARMABSD
1222 OpARMCLZ
1223 OpARMREV
1224 OpARMREV16
1225 OpARMRBIT
1226 OpARMSLL
1227 OpARMSLLconst
1228 OpARMSRL
1229 OpARMSRLconst
1230 OpARMSRA
1231 OpARMSRAconst
1232 OpARMSRR
1233 OpARMSRRconst
1234 OpARMADDshiftLL
1235 OpARMADDshiftRL
1236 OpARMADDshiftRA
1237 OpARMSUBshiftLL
1238 OpARMSUBshiftRL
1239 OpARMSUBshiftRA
1240 OpARMRSBshiftLL
1241 OpARMRSBshiftRL
1242 OpARMRSBshiftRA
1243 OpARMANDshiftLL
1244 OpARMANDshiftRL
1245 OpARMANDshiftRA
1246 OpARMORshiftLL
1247 OpARMORshiftRL
1248 OpARMORshiftRA
1249 OpARMXORshiftLL
1250 OpARMXORshiftRL
1251 OpARMXORshiftRA
1252 OpARMXORshiftRR
1253 OpARMBICshiftLL
1254 OpARMBICshiftRL
1255 OpARMBICshiftRA
1256 OpARMMVNshiftLL
1257 OpARMMVNshiftRL
1258 OpARMMVNshiftRA
1259 OpARMADCshiftLL
1260 OpARMADCshiftRL
1261 OpARMADCshiftRA
1262 OpARMSBCshiftLL
1263 OpARMSBCshiftRL
1264 OpARMSBCshiftRA
1265 OpARMRSCshiftLL
1266 OpARMRSCshiftRL
1267 OpARMRSCshiftRA
1268 OpARMADDSshiftLL
1269 OpARMADDSshiftRL
1270 OpARMADDSshiftRA
1271 OpARMSUBSshiftLL
1272 OpARMSUBSshiftRL
1273 OpARMSUBSshiftRA
1274 OpARMRSBSshiftLL
1275 OpARMRSBSshiftRL
1276 OpARMRSBSshiftRA
1277 OpARMADDshiftLLreg
1278 OpARMADDshiftRLreg
1279 OpARMADDshiftRAreg
1280 OpARMSUBshiftLLreg
1281 OpARMSUBshiftRLreg
1282 OpARMSUBshiftRAreg
1283 OpARMRSBshiftLLreg
1284 OpARMRSBshiftRLreg
1285 OpARMRSBshiftRAreg
1286 OpARMANDshiftLLreg
1287 OpARMANDshiftRLreg
1288 OpARMANDshiftRAreg
1289 OpARMORshiftLLreg
1290 OpARMORshiftRLreg
1291 OpARMORshiftRAreg
1292 OpARMXORshiftLLreg
1293 OpARMXORshiftRLreg
1294 OpARMXORshiftRAreg
1295 OpARMBICshiftLLreg
1296 OpARMBICshiftRLreg
1297 OpARMBICshiftRAreg
1298 OpARMMVNshiftLLreg
1299 OpARMMVNshiftRLreg
1300 OpARMMVNshiftRAreg
1301 OpARMADCshiftLLreg
1302 OpARMADCshiftRLreg
1303 OpARMADCshiftRAreg
1304 OpARMSBCshiftLLreg
1305 OpARMSBCshiftRLreg
1306 OpARMSBCshiftRAreg
1307 OpARMRSCshiftLLreg
1308 OpARMRSCshiftRLreg
1309 OpARMRSCshiftRAreg
1310 OpARMADDSshiftLLreg
1311 OpARMADDSshiftRLreg
1312 OpARMADDSshiftRAreg
1313 OpARMSUBSshiftLLreg
1314 OpARMSUBSshiftRLreg
1315 OpARMSUBSshiftRAreg
1316 OpARMRSBSshiftLLreg
1317 OpARMRSBSshiftRLreg
1318 OpARMRSBSshiftRAreg
1319 OpARMCMP
1320 OpARMCMPconst
1321 OpARMCMN
1322 OpARMCMNconst
1323 OpARMTST
1324 OpARMTSTconst
1325 OpARMTEQ
1326 OpARMTEQconst
1327 OpARMCMPF
1328 OpARMCMPD
1329 OpARMCMPshiftLL
1330 OpARMCMPshiftRL
1331 OpARMCMPshiftRA
1332 OpARMCMNshiftLL
1333 OpARMCMNshiftRL
1334 OpARMCMNshiftRA
1335 OpARMTSTshiftLL
1336 OpARMTSTshiftRL
1337 OpARMTSTshiftRA
1338 OpARMTEQshiftLL
1339 OpARMTEQshiftRL
1340 OpARMTEQshiftRA
1341 OpARMCMPshiftLLreg
1342 OpARMCMPshiftRLreg
1343 OpARMCMPshiftRAreg
1344 OpARMCMNshiftLLreg
1345 OpARMCMNshiftRLreg
1346 OpARMCMNshiftRAreg
1347 OpARMTSTshiftLLreg
1348 OpARMTSTshiftRLreg
1349 OpARMTSTshiftRAreg
1350 OpARMTEQshiftLLreg
1351 OpARMTEQshiftRLreg
1352 OpARMTEQshiftRAreg
1353 OpARMCMPF0
1354 OpARMCMPD0
1355 OpARMMOVWconst
1356 OpARMMOVFconst
1357 OpARMMOVDconst
1358 OpARMMOVWaddr
1359 OpARMMOVBload
1360 OpARMMOVBUload
1361 OpARMMOVHload
1362 OpARMMOVHUload
1363 OpARMMOVWload
1364 OpARMMOVFload
1365 OpARMMOVDload
1366 OpARMMOVBstore
1367 OpARMMOVHstore
1368 OpARMMOVWstore
1369 OpARMMOVFstore
1370 OpARMMOVDstore
1371 OpARMMOVWloadidx
1372 OpARMMOVWloadshiftLL
1373 OpARMMOVWloadshiftRL
1374 OpARMMOVWloadshiftRA
1375 OpARMMOVBUloadidx
1376 OpARMMOVBloadidx
1377 OpARMMOVHUloadidx
1378 OpARMMOVHloadidx
1379 OpARMMOVWstoreidx
1380 OpARMMOVWstoreshiftLL
1381 OpARMMOVWstoreshiftRL
1382 OpARMMOVWstoreshiftRA
1383 OpARMMOVBstoreidx
1384 OpARMMOVHstoreidx
1385 OpARMMOVBreg
1386 OpARMMOVBUreg
1387 OpARMMOVHreg
1388 OpARMMOVHUreg
1389 OpARMMOVWreg
1390 OpARMMOVWnop
1391 OpARMMOVWF
1392 OpARMMOVWD
1393 OpARMMOVWUF
1394 OpARMMOVWUD
1395 OpARMMOVFW
1396 OpARMMOVDW
1397 OpARMMOVFWU
1398 OpARMMOVDWU
1399 OpARMMOVFD
1400 OpARMMOVDF
1401 OpARMCMOVWHSconst
1402 OpARMCMOVWLSconst
1403 OpARMSRAcond
1404 OpARMCALLstatic
1405 OpARMCALLtail
1406 OpARMCALLclosure
1407 OpARMCALLinter
1408 OpARMLoweredNilCheck
1409 OpARMEqual
1410 OpARMNotEqual
1411 OpARMLessThan
1412 OpARMLessEqual
1413 OpARMGreaterThan
1414 OpARMGreaterEqual
1415 OpARMLessThanU
1416 OpARMLessEqualU
1417 OpARMGreaterThanU
1418 OpARMGreaterEqualU
1419 OpARMDUFFZERO
1420 OpARMDUFFCOPY
1421 OpARMLoweredZero
1422 OpARMLoweredMove
1423 OpARMLoweredGetClosurePtr
1424 OpARMLoweredGetCallerSP
1425 OpARMLoweredGetCallerPC
1426 OpARMLoweredPanicBoundsRR
1427 OpARMLoweredPanicBoundsRC
1428 OpARMLoweredPanicBoundsCR
1429 OpARMLoweredPanicBoundsCC
1430 OpARMLoweredPanicExtendRR
1431 OpARMLoweredPanicExtendRC
1432 OpARMFlagConstant
1433 OpARMInvertFlags
1434 OpARMLoweredWB
1435
1436 OpARM64ADCSflags
1437 OpARM64ADCzerocarry
1438 OpARM64ADD
1439 OpARM64ADDconst
1440 OpARM64ADDSconstflags
1441 OpARM64ADDSflags
1442 OpARM64SUB
1443 OpARM64SUBconst
1444 OpARM64SBCSflags
1445 OpARM64SUBSflags
1446 OpARM64MUL
1447 OpARM64MULW
1448 OpARM64MNEG
1449 OpARM64MNEGW
1450 OpARM64MULH
1451 OpARM64UMULH
1452 OpARM64MULL
1453 OpARM64UMULL
1454 OpARM64DIV
1455 OpARM64UDIV
1456 OpARM64DIVW
1457 OpARM64UDIVW
1458 OpARM64MOD
1459 OpARM64UMOD
1460 OpARM64MODW
1461 OpARM64UMODW
1462 OpARM64FADDS
1463 OpARM64FADDD
1464 OpARM64FSUBS
1465 OpARM64FSUBD
1466 OpARM64FMULS
1467 OpARM64FMULD
1468 OpARM64FNMULS
1469 OpARM64FNMULD
1470 OpARM64FDIVS
1471 OpARM64FDIVD
1472 OpARM64AND
1473 OpARM64ANDconst
1474 OpARM64OR
1475 OpARM64ORconst
1476 OpARM64XOR
1477 OpARM64XORconst
1478 OpARM64BIC
1479 OpARM64EON
1480 OpARM64ORN
1481 OpARM64MVN
1482 OpARM64NEG
1483 OpARM64NEGSflags
1484 OpARM64NGCzerocarry
1485 OpARM64FABSD
1486 OpARM64FNEGS
1487 OpARM64FNEGD
1488 OpARM64FSQRTD
1489 OpARM64FSQRTS
1490 OpARM64FMIND
1491 OpARM64FMINS
1492 OpARM64FMAXD
1493 OpARM64FMAXS
1494 OpARM64REV
1495 OpARM64REVW
1496 OpARM64REV16
1497 OpARM64REV16W
1498 OpARM64RBIT
1499 OpARM64RBITW
1500 OpARM64CLZ
1501 OpARM64CLZW
1502 OpARM64VCNT
1503 OpARM64VUADDLV
1504 OpARM64LoweredRound32F
1505 OpARM64LoweredRound64F
1506 OpARM64FMADDS
1507 OpARM64FMADDD
1508 OpARM64FNMADDS
1509 OpARM64FNMADDD
1510 OpARM64FMSUBS
1511 OpARM64FMSUBD
1512 OpARM64FNMSUBS
1513 OpARM64FNMSUBD
1514 OpARM64MADD
1515 OpARM64MADDW
1516 OpARM64MSUB
1517 OpARM64MSUBW
1518 OpARM64SLL
1519 OpARM64SLLconst
1520 OpARM64SRL
1521 OpARM64SRLconst
1522 OpARM64SRA
1523 OpARM64SRAconst
1524 OpARM64ROR
1525 OpARM64RORW
1526 OpARM64RORconst
1527 OpARM64RORWconst
1528 OpARM64EXTRconst
1529 OpARM64EXTRWconst
1530 OpARM64CMP
1531 OpARM64CMPconst
1532 OpARM64CMPW
1533 OpARM64CMPWconst
1534 OpARM64CMN
1535 OpARM64CMNconst
1536 OpARM64CMNW
1537 OpARM64CMNWconst
1538 OpARM64TST
1539 OpARM64TSTconst
1540 OpARM64TSTW
1541 OpARM64TSTWconst
1542 OpARM64FCMPS
1543 OpARM64FCMPD
1544 OpARM64FCMPS0
1545 OpARM64FCMPD0
1546 OpARM64MVNshiftLL
1547 OpARM64MVNshiftRL
1548 OpARM64MVNshiftRA
1549 OpARM64MVNshiftRO
1550 OpARM64NEGshiftLL
1551 OpARM64NEGshiftRL
1552 OpARM64NEGshiftRA
1553 OpARM64ADDshiftLL
1554 OpARM64ADDshiftRL
1555 OpARM64ADDshiftRA
1556 OpARM64SUBshiftLL
1557 OpARM64SUBshiftRL
1558 OpARM64SUBshiftRA
1559 OpARM64ANDshiftLL
1560 OpARM64ANDshiftRL
1561 OpARM64ANDshiftRA
1562 OpARM64ANDshiftRO
1563 OpARM64ORshiftLL
1564 OpARM64ORshiftRL
1565 OpARM64ORshiftRA
1566 OpARM64ORshiftRO
1567 OpARM64XORshiftLL
1568 OpARM64XORshiftRL
1569 OpARM64XORshiftRA
1570 OpARM64XORshiftRO
1571 OpARM64BICshiftLL
1572 OpARM64BICshiftRL
1573 OpARM64BICshiftRA
1574 OpARM64BICshiftRO
1575 OpARM64EONshiftLL
1576 OpARM64EONshiftRL
1577 OpARM64EONshiftRA
1578 OpARM64EONshiftRO
1579 OpARM64ORNshiftLL
1580 OpARM64ORNshiftRL
1581 OpARM64ORNshiftRA
1582 OpARM64ORNshiftRO
1583 OpARM64CMPshiftLL
1584 OpARM64CMPshiftRL
1585 OpARM64CMPshiftRA
1586 OpARM64CMNshiftLL
1587 OpARM64CMNshiftRL
1588 OpARM64CMNshiftRA
1589 OpARM64TSTshiftLL
1590 OpARM64TSTshiftRL
1591 OpARM64TSTshiftRA
1592 OpARM64TSTshiftRO
1593 OpARM64BFI
1594 OpARM64BFXIL
1595 OpARM64SBFIZ
1596 OpARM64SBFX
1597 OpARM64UBFIZ
1598 OpARM64UBFX
1599 OpARM64MOVDconst
1600 OpARM64FMOVSconst
1601 OpARM64FMOVDconst
1602 OpARM64MOVDaddr
1603 OpARM64MOVBload
1604 OpARM64MOVBUload
1605 OpARM64MOVHload
1606 OpARM64MOVHUload
1607 OpARM64MOVWload
1608 OpARM64MOVWUload
1609 OpARM64MOVDload
1610 OpARM64FMOVSload
1611 OpARM64FMOVDload
1612 OpARM64LDP
1613 OpARM64LDPW
1614 OpARM64LDPSW
1615 OpARM64FLDPD
1616 OpARM64FLDPS
1617 OpARM64MOVDloadidx
1618 OpARM64MOVWloadidx
1619 OpARM64MOVWUloadidx
1620 OpARM64MOVHloadidx
1621 OpARM64MOVHUloadidx
1622 OpARM64MOVBloadidx
1623 OpARM64MOVBUloadidx
1624 OpARM64FMOVSloadidx
1625 OpARM64FMOVDloadidx
1626 OpARM64MOVHloadidx2
1627 OpARM64MOVHUloadidx2
1628 OpARM64MOVWloadidx4
1629 OpARM64MOVWUloadidx4
1630 OpARM64MOVDloadidx8
1631 OpARM64FMOVSloadidx4
1632 OpARM64FMOVDloadidx8
1633 OpARM64MOVBstore
1634 OpARM64MOVHstore
1635 OpARM64MOVWstore
1636 OpARM64MOVDstore
1637 OpARM64FMOVSstore
1638 OpARM64FMOVDstore
1639 OpARM64STP
1640 OpARM64STPW
1641 OpARM64FSTPD
1642 OpARM64FSTPS
1643 OpARM64MOVBstoreidx
1644 OpARM64MOVHstoreidx
1645 OpARM64MOVWstoreidx
1646 OpARM64MOVDstoreidx
1647 OpARM64FMOVSstoreidx
1648 OpARM64FMOVDstoreidx
1649 OpARM64MOVHstoreidx2
1650 OpARM64MOVWstoreidx4
1651 OpARM64MOVDstoreidx8
1652 OpARM64FMOVSstoreidx4
1653 OpARM64FMOVDstoreidx8
1654 OpARM64FMOVDgpfp
1655 OpARM64FMOVDfpgp
1656 OpARM64FMOVSgpfp
1657 OpARM64FMOVSfpgp
1658 OpARM64MOVBreg
1659 OpARM64MOVBUreg
1660 OpARM64MOVHreg
1661 OpARM64MOVHUreg
1662 OpARM64MOVWreg
1663 OpARM64MOVWUreg
1664 OpARM64MOVDreg
1665 OpARM64MOVDnop
1666 OpARM64SCVTFWS
1667 OpARM64SCVTFWD
1668 OpARM64UCVTFWS
1669 OpARM64UCVTFWD
1670 OpARM64SCVTFS
1671 OpARM64SCVTFD
1672 OpARM64UCVTFS
1673 OpARM64UCVTFD
1674 OpARM64FCVTZSSW
1675 OpARM64FCVTZSDW
1676 OpARM64FCVTZUSW
1677 OpARM64FCVTZUDW
1678 OpARM64FCVTZSS
1679 OpARM64FCVTZSD
1680 OpARM64FCVTZUS
1681 OpARM64FCVTZUD
1682 OpARM64FCVTSD
1683 OpARM64FCVTDS
1684 OpARM64FRINTAD
1685 OpARM64FRINTMD
1686 OpARM64FRINTND
1687 OpARM64FRINTPD
1688 OpARM64FRINTZD
1689 OpARM64CSEL
1690 OpARM64CSEL0
1691 OpARM64CSINC
1692 OpARM64CSINV
1693 OpARM64CSNEG
1694 OpARM64CSETM
1695 OpARM64CALLstatic
1696 OpARM64CALLtail
1697 OpARM64CALLclosure
1698 OpARM64CALLinter
1699 OpARM64LoweredNilCheck
1700 OpARM64Equal
1701 OpARM64NotEqual
1702 OpARM64LessThan
1703 OpARM64LessEqual
1704 OpARM64GreaterThan
1705 OpARM64GreaterEqual
1706 OpARM64LessThanU
1707 OpARM64LessEqualU
1708 OpARM64GreaterThanU
1709 OpARM64GreaterEqualU
1710 OpARM64LessThanF
1711 OpARM64LessEqualF
1712 OpARM64GreaterThanF
1713 OpARM64GreaterEqualF
1714 OpARM64NotLessThanF
1715 OpARM64NotLessEqualF
1716 OpARM64NotGreaterThanF
1717 OpARM64NotGreaterEqualF
1718 OpARM64LessThanNoov
1719 OpARM64GreaterEqualNoov
1720 OpARM64DUFFZERO
1721 OpARM64LoweredZero
1722 OpARM64DUFFCOPY
1723 OpARM64LoweredMove
1724 OpARM64LoweredGetClosurePtr
1725 OpARM64LoweredGetCallerSP
1726 OpARM64LoweredGetCallerPC
1727 OpARM64FlagConstant
1728 OpARM64InvertFlags
1729 OpARM64LDAR
1730 OpARM64LDARB
1731 OpARM64LDARW
1732 OpARM64STLRB
1733 OpARM64STLR
1734 OpARM64STLRW
1735 OpARM64LoweredAtomicExchange64
1736 OpARM64LoweredAtomicExchange32
1737 OpARM64LoweredAtomicExchange8
1738 OpARM64LoweredAtomicExchange64Variant
1739 OpARM64LoweredAtomicExchange32Variant
1740 OpARM64LoweredAtomicExchange8Variant
1741 OpARM64LoweredAtomicAdd64
1742 OpARM64LoweredAtomicAdd32
1743 OpARM64LoweredAtomicAdd64Variant
1744 OpARM64LoweredAtomicAdd32Variant
1745 OpARM64LoweredAtomicCas64
1746 OpARM64LoweredAtomicCas32
1747 OpARM64LoweredAtomicCas64Variant
1748 OpARM64LoweredAtomicCas32Variant
1749 OpARM64LoweredAtomicAnd8
1750 OpARM64LoweredAtomicOr8
1751 OpARM64LoweredAtomicAnd64
1752 OpARM64LoweredAtomicOr64
1753 OpARM64LoweredAtomicAnd32
1754 OpARM64LoweredAtomicOr32
1755 OpARM64LoweredAtomicAnd8Variant
1756 OpARM64LoweredAtomicOr8Variant
1757 OpARM64LoweredAtomicAnd64Variant
1758 OpARM64LoweredAtomicOr64Variant
1759 OpARM64LoweredAtomicAnd32Variant
1760 OpARM64LoweredAtomicOr32Variant
1761 OpARM64LoweredWB
1762 OpARM64LoweredPanicBoundsRR
1763 OpARM64LoweredPanicBoundsRC
1764 OpARM64LoweredPanicBoundsCR
1765 OpARM64LoweredPanicBoundsCC
1766 OpARM64PRFM
1767 OpARM64DMB
1768 OpARM64ZERO
1769
1770 OpLOONG64NEGV
1771 OpLOONG64NEGF
1772 OpLOONG64NEGD
1773 OpLOONG64SQRTD
1774 OpLOONG64SQRTF
1775 OpLOONG64ABSD
1776 OpLOONG64CLZW
1777 OpLOONG64CLZV
1778 OpLOONG64CTZW
1779 OpLOONG64CTZV
1780 OpLOONG64REVB2H
1781 OpLOONG64REVB2W
1782 OpLOONG64REVBV
1783 OpLOONG64BITREV4B
1784 OpLOONG64BITREVW
1785 OpLOONG64BITREVV
1786 OpLOONG64VPCNT64
1787 OpLOONG64VPCNT32
1788 OpLOONG64VPCNT16
1789 OpLOONG64ADDV
1790 OpLOONG64ADDVconst
1791 OpLOONG64SUBV
1792 OpLOONG64SUBVconst
1793 OpLOONG64MULV
1794 OpLOONG64MULHV
1795 OpLOONG64MULHVU
1796 OpLOONG64DIVV
1797 OpLOONG64DIVVU
1798 OpLOONG64REMV
1799 OpLOONG64REMVU
1800 OpLOONG64ADDF
1801 OpLOONG64ADDD
1802 OpLOONG64SUBF
1803 OpLOONG64SUBD
1804 OpLOONG64MULF
1805 OpLOONG64MULD
1806 OpLOONG64DIVF
1807 OpLOONG64DIVD
1808 OpLOONG64AND
1809 OpLOONG64ANDconst
1810 OpLOONG64OR
1811 OpLOONG64ORconst
1812 OpLOONG64XOR
1813 OpLOONG64XORconst
1814 OpLOONG64NOR
1815 OpLOONG64NORconst
1816 OpLOONG64ANDN
1817 OpLOONG64ORN
1818 OpLOONG64FMADDF
1819 OpLOONG64FMADDD
1820 OpLOONG64FMSUBF
1821 OpLOONG64FMSUBD
1822 OpLOONG64FNMADDF
1823 OpLOONG64FNMADDD
1824 OpLOONG64FNMSUBF
1825 OpLOONG64FNMSUBD
1826 OpLOONG64FMINF
1827 OpLOONG64FMIND
1828 OpLOONG64FMAXF
1829 OpLOONG64FMAXD
1830 OpLOONG64MASKEQZ
1831 OpLOONG64MASKNEZ
1832 OpLOONG64FCOPYSGD
1833 OpLOONG64SLL
1834 OpLOONG64SLLV
1835 OpLOONG64SLLconst
1836 OpLOONG64SLLVconst
1837 OpLOONG64SRL
1838 OpLOONG64SRLV
1839 OpLOONG64SRLconst
1840 OpLOONG64SRLVconst
1841 OpLOONG64SRA
1842 OpLOONG64SRAV
1843 OpLOONG64SRAconst
1844 OpLOONG64SRAVconst
1845 OpLOONG64ROTR
1846 OpLOONG64ROTRV
1847 OpLOONG64ROTRconst
1848 OpLOONG64ROTRVconst
1849 OpLOONG64SGT
1850 OpLOONG64SGTconst
1851 OpLOONG64SGTU
1852 OpLOONG64SGTUconst
1853 OpLOONG64CMPEQF
1854 OpLOONG64CMPEQD
1855 OpLOONG64CMPGEF
1856 OpLOONG64CMPGED
1857 OpLOONG64CMPGTF
1858 OpLOONG64CMPGTD
1859 OpLOONG64BSTRPICKW
1860 OpLOONG64BSTRPICKV
1861 OpLOONG64MOVVconst
1862 OpLOONG64MOVFconst
1863 OpLOONG64MOVDconst
1864 OpLOONG64MOVVaddr
1865 OpLOONG64MOVBload
1866 OpLOONG64MOVBUload
1867 OpLOONG64MOVHload
1868 OpLOONG64MOVHUload
1869 OpLOONG64MOVWload
1870 OpLOONG64MOVWUload
1871 OpLOONG64MOVVload
1872 OpLOONG64MOVFload
1873 OpLOONG64MOVDload
1874 OpLOONG64MOVVloadidx
1875 OpLOONG64MOVWloadidx
1876 OpLOONG64MOVWUloadidx
1877 OpLOONG64MOVHloadidx
1878 OpLOONG64MOVHUloadidx
1879 OpLOONG64MOVBloadidx
1880 OpLOONG64MOVBUloadidx
1881 OpLOONG64MOVFloadidx
1882 OpLOONG64MOVDloadidx
1883 OpLOONG64MOVBstore
1884 OpLOONG64MOVHstore
1885 OpLOONG64MOVWstore
1886 OpLOONG64MOVVstore
1887 OpLOONG64MOVFstore
1888 OpLOONG64MOVDstore
1889 OpLOONG64MOVBstoreidx
1890 OpLOONG64MOVHstoreidx
1891 OpLOONG64MOVWstoreidx
1892 OpLOONG64MOVVstoreidx
1893 OpLOONG64MOVFstoreidx
1894 OpLOONG64MOVDstoreidx
1895 OpLOONG64MOVBstorezero
1896 OpLOONG64MOVHstorezero
1897 OpLOONG64MOVWstorezero
1898 OpLOONG64MOVVstorezero
1899 OpLOONG64MOVBstorezeroidx
1900 OpLOONG64MOVHstorezeroidx
1901 OpLOONG64MOVWstorezeroidx
1902 OpLOONG64MOVVstorezeroidx
1903 OpLOONG64MOVWfpgp
1904 OpLOONG64MOVWgpfp
1905 OpLOONG64MOVVfpgp
1906 OpLOONG64MOVVgpfp
1907 OpLOONG64MOVBreg
1908 OpLOONG64MOVBUreg
1909 OpLOONG64MOVHreg
1910 OpLOONG64MOVHUreg
1911 OpLOONG64MOVWreg
1912 OpLOONG64MOVWUreg
1913 OpLOONG64MOVVreg
1914 OpLOONG64MOVVnop
1915 OpLOONG64MOVWF
1916 OpLOONG64MOVWD
1917 OpLOONG64MOVVF
1918 OpLOONG64MOVVD
1919 OpLOONG64TRUNCFW
1920 OpLOONG64TRUNCDW
1921 OpLOONG64TRUNCFV
1922 OpLOONG64TRUNCDV
1923 OpLOONG64MOVFD
1924 OpLOONG64MOVDF
1925 OpLOONG64LoweredRound32F
1926 OpLOONG64LoweredRound64F
1927 OpLOONG64CALLstatic
1928 OpLOONG64CALLtail
1929 OpLOONG64CALLclosure
1930 OpLOONG64CALLinter
1931 OpLOONG64DUFFZERO
1932 OpLOONG64DUFFCOPY
1933 OpLOONG64LoweredZero
1934 OpLOONG64LoweredMove
1935 OpLOONG64LoweredAtomicLoad8
1936 OpLOONG64LoweredAtomicLoad32
1937 OpLOONG64LoweredAtomicLoad64
1938 OpLOONG64LoweredAtomicStore8
1939 OpLOONG64LoweredAtomicStore32
1940 OpLOONG64LoweredAtomicStore64
1941 OpLOONG64LoweredAtomicStore8Variant
1942 OpLOONG64LoweredAtomicStore32Variant
1943 OpLOONG64LoweredAtomicStore64Variant
1944 OpLOONG64LoweredAtomicExchange32
1945 OpLOONG64LoweredAtomicExchange64
1946 OpLOONG64LoweredAtomicExchange8Variant
1947 OpLOONG64LoweredAtomicAdd32
1948 OpLOONG64LoweredAtomicAdd64
1949 OpLOONG64LoweredAtomicCas32
1950 OpLOONG64LoweredAtomicCas64
1951 OpLOONG64LoweredAtomicCas64Variant
1952 OpLOONG64LoweredAtomicCas32Variant
1953 OpLOONG64LoweredAtomicAnd32
1954 OpLOONG64LoweredAtomicOr32
1955 OpLOONG64LoweredAtomicAnd32value
1956 OpLOONG64LoweredAtomicAnd64value
1957 OpLOONG64LoweredAtomicOr32value
1958 OpLOONG64LoweredAtomicOr64value
1959 OpLOONG64LoweredNilCheck
1960 OpLOONG64FPFlagTrue
1961 OpLOONG64FPFlagFalse
1962 OpLOONG64LoweredGetClosurePtr
1963 OpLOONG64LoweredGetCallerSP
1964 OpLOONG64LoweredGetCallerPC
1965 OpLOONG64LoweredWB
1966 OpLOONG64LoweredPubBarrier
1967 OpLOONG64LoweredPanicBoundsRR
1968 OpLOONG64LoweredPanicBoundsRC
1969 OpLOONG64LoweredPanicBoundsCR
1970 OpLOONG64LoweredPanicBoundsCC
1971 OpLOONG64PRELD
1972 OpLOONG64PRELDX
1973
1974 OpMIPSADD
1975 OpMIPSADDconst
1976 OpMIPSSUB
1977 OpMIPSSUBconst
1978 OpMIPSMUL
1979 OpMIPSMULT
1980 OpMIPSMULTU
1981 OpMIPSDIV
1982 OpMIPSDIVU
1983 OpMIPSADDF
1984 OpMIPSADDD
1985 OpMIPSSUBF
1986 OpMIPSSUBD
1987 OpMIPSMULF
1988 OpMIPSMULD
1989 OpMIPSDIVF
1990 OpMIPSDIVD
1991 OpMIPSAND
1992 OpMIPSANDconst
1993 OpMIPSOR
1994 OpMIPSORconst
1995 OpMIPSXOR
1996 OpMIPSXORconst
1997 OpMIPSNOR
1998 OpMIPSNORconst
1999 OpMIPSNEG
2000 OpMIPSNEGF
2001 OpMIPSNEGD
2002 OpMIPSABSD
2003 OpMIPSSQRTD
2004 OpMIPSSQRTF
2005 OpMIPSSLL
2006 OpMIPSSLLconst
2007 OpMIPSSRL
2008 OpMIPSSRLconst
2009 OpMIPSSRA
2010 OpMIPSSRAconst
2011 OpMIPSCLZ
2012 OpMIPSSGT
2013 OpMIPSSGTconst
2014 OpMIPSSGTzero
2015 OpMIPSSGTU
2016 OpMIPSSGTUconst
2017 OpMIPSSGTUzero
2018 OpMIPSCMPEQF
2019 OpMIPSCMPEQD
2020 OpMIPSCMPGEF
2021 OpMIPSCMPGED
2022 OpMIPSCMPGTF
2023 OpMIPSCMPGTD
2024 OpMIPSMOVWconst
2025 OpMIPSMOVFconst
2026 OpMIPSMOVDconst
2027 OpMIPSMOVWaddr
2028 OpMIPSMOVBload
2029 OpMIPSMOVBUload
2030 OpMIPSMOVHload
2031 OpMIPSMOVHUload
2032 OpMIPSMOVWload
2033 OpMIPSMOVFload
2034 OpMIPSMOVDload
2035 OpMIPSMOVBstore
2036 OpMIPSMOVHstore
2037 OpMIPSMOVWstore
2038 OpMIPSMOVFstore
2039 OpMIPSMOVDstore
2040 OpMIPSMOVBstorezero
2041 OpMIPSMOVHstorezero
2042 OpMIPSMOVWstorezero
2043 OpMIPSMOVWfpgp
2044 OpMIPSMOVWgpfp
2045 OpMIPSMOVBreg
2046 OpMIPSMOVBUreg
2047 OpMIPSMOVHreg
2048 OpMIPSMOVHUreg
2049 OpMIPSMOVWreg
2050 OpMIPSMOVWnop
2051 OpMIPSCMOVZ
2052 OpMIPSCMOVZzero
2053 OpMIPSMOVWF
2054 OpMIPSMOVWD
2055 OpMIPSTRUNCFW
2056 OpMIPSTRUNCDW
2057 OpMIPSMOVFD
2058 OpMIPSMOVDF
2059 OpMIPSCALLstatic
2060 OpMIPSCALLtail
2061 OpMIPSCALLclosure
2062 OpMIPSCALLinter
2063 OpMIPSLoweredAtomicLoad8
2064 OpMIPSLoweredAtomicLoad32
2065 OpMIPSLoweredAtomicStore8
2066 OpMIPSLoweredAtomicStore32
2067 OpMIPSLoweredAtomicStorezero
2068 OpMIPSLoweredAtomicExchange
2069 OpMIPSLoweredAtomicAdd
2070 OpMIPSLoweredAtomicAddconst
2071 OpMIPSLoweredAtomicCas
2072 OpMIPSLoweredAtomicAnd
2073 OpMIPSLoweredAtomicOr
2074 OpMIPSLoweredZero
2075 OpMIPSLoweredMove
2076 OpMIPSLoweredNilCheck
2077 OpMIPSFPFlagTrue
2078 OpMIPSFPFlagFalse
2079 OpMIPSLoweredGetClosurePtr
2080 OpMIPSLoweredGetCallerSP
2081 OpMIPSLoweredGetCallerPC
2082 OpMIPSLoweredWB
2083 OpMIPSLoweredPubBarrier
2084 OpMIPSLoweredPanicBoundsRR
2085 OpMIPSLoweredPanicBoundsRC
2086 OpMIPSLoweredPanicBoundsCR
2087 OpMIPSLoweredPanicBoundsCC
2088 OpMIPSLoweredPanicExtendRR
2089 OpMIPSLoweredPanicExtendRC
2090
2091 OpMIPS64ADDV
2092 OpMIPS64ADDVconst
2093 OpMIPS64SUBV
2094 OpMIPS64SUBVconst
2095 OpMIPS64MULV
2096 OpMIPS64MULVU
2097 OpMIPS64DIVV
2098 OpMIPS64DIVVU
2099 OpMIPS64ADDF
2100 OpMIPS64ADDD
2101 OpMIPS64SUBF
2102 OpMIPS64SUBD
2103 OpMIPS64MULF
2104 OpMIPS64MULD
2105 OpMIPS64DIVF
2106 OpMIPS64DIVD
2107 OpMIPS64AND
2108 OpMIPS64ANDconst
2109 OpMIPS64OR
2110 OpMIPS64ORconst
2111 OpMIPS64XOR
2112 OpMIPS64XORconst
2113 OpMIPS64NOR
2114 OpMIPS64NORconst
2115 OpMIPS64NEGV
2116 OpMIPS64NEGF
2117 OpMIPS64NEGD
2118 OpMIPS64ABSD
2119 OpMIPS64SQRTD
2120 OpMIPS64SQRTF
2121 OpMIPS64SLLV
2122 OpMIPS64SLLVconst
2123 OpMIPS64SRLV
2124 OpMIPS64SRLVconst
2125 OpMIPS64SRAV
2126 OpMIPS64SRAVconst
2127 OpMIPS64SGT
2128 OpMIPS64SGTconst
2129 OpMIPS64SGTU
2130 OpMIPS64SGTUconst
2131 OpMIPS64CMPEQF
2132 OpMIPS64CMPEQD
2133 OpMIPS64CMPGEF
2134 OpMIPS64CMPGED
2135 OpMIPS64CMPGTF
2136 OpMIPS64CMPGTD
2137 OpMIPS64MOVVconst
2138 OpMIPS64MOVFconst
2139 OpMIPS64MOVDconst
2140 OpMIPS64MOVVaddr
2141 OpMIPS64MOVBload
2142 OpMIPS64MOVBUload
2143 OpMIPS64MOVHload
2144 OpMIPS64MOVHUload
2145 OpMIPS64MOVWload
2146 OpMIPS64MOVWUload
2147 OpMIPS64MOVVload
2148 OpMIPS64MOVFload
2149 OpMIPS64MOVDload
2150 OpMIPS64MOVBstore
2151 OpMIPS64MOVHstore
2152 OpMIPS64MOVWstore
2153 OpMIPS64MOVVstore
2154 OpMIPS64MOVFstore
2155 OpMIPS64MOVDstore
2156 OpMIPS64MOVBstorezero
2157 OpMIPS64MOVHstorezero
2158 OpMIPS64MOVWstorezero
2159 OpMIPS64MOVVstorezero
2160 OpMIPS64MOVWfpgp
2161 OpMIPS64MOVWgpfp
2162 OpMIPS64MOVVfpgp
2163 OpMIPS64MOVVgpfp
2164 OpMIPS64MOVBreg
2165 OpMIPS64MOVBUreg
2166 OpMIPS64MOVHreg
2167 OpMIPS64MOVHUreg
2168 OpMIPS64MOVWreg
2169 OpMIPS64MOVWUreg
2170 OpMIPS64MOVVreg
2171 OpMIPS64MOVVnop
2172 OpMIPS64MOVWF
2173 OpMIPS64MOVWD
2174 OpMIPS64MOVVF
2175 OpMIPS64MOVVD
2176 OpMIPS64TRUNCFW
2177 OpMIPS64TRUNCDW
2178 OpMIPS64TRUNCFV
2179 OpMIPS64TRUNCDV
2180 OpMIPS64MOVFD
2181 OpMIPS64MOVDF
2182 OpMIPS64CALLstatic
2183 OpMIPS64CALLtail
2184 OpMIPS64CALLclosure
2185 OpMIPS64CALLinter
2186 OpMIPS64DUFFZERO
2187 OpMIPS64DUFFCOPY
2188 OpMIPS64LoweredZero
2189 OpMIPS64LoweredMove
2190 OpMIPS64LoweredAtomicAnd32
2191 OpMIPS64LoweredAtomicOr32
2192 OpMIPS64LoweredAtomicLoad8
2193 OpMIPS64LoweredAtomicLoad32
2194 OpMIPS64LoweredAtomicLoad64
2195 OpMIPS64LoweredAtomicStore8
2196 OpMIPS64LoweredAtomicStore32
2197 OpMIPS64LoweredAtomicStore64
2198 OpMIPS64LoweredAtomicStorezero32
2199 OpMIPS64LoweredAtomicStorezero64
2200 OpMIPS64LoweredAtomicExchange32
2201 OpMIPS64LoweredAtomicExchange64
2202 OpMIPS64LoweredAtomicAdd32
2203 OpMIPS64LoweredAtomicAdd64
2204 OpMIPS64LoweredAtomicAddconst32
2205 OpMIPS64LoweredAtomicAddconst64
2206 OpMIPS64LoweredAtomicCas32
2207 OpMIPS64LoweredAtomicCas64
2208 OpMIPS64LoweredNilCheck
2209 OpMIPS64FPFlagTrue
2210 OpMIPS64FPFlagFalse
2211 OpMIPS64LoweredGetClosurePtr
2212 OpMIPS64LoweredGetCallerSP
2213 OpMIPS64LoweredGetCallerPC
2214 OpMIPS64LoweredWB
2215 OpMIPS64LoweredPubBarrier
2216 OpMIPS64LoweredPanicBoundsRR
2217 OpMIPS64LoweredPanicBoundsRC
2218 OpMIPS64LoweredPanicBoundsCR
2219 OpMIPS64LoweredPanicBoundsCC
2220
2221 OpPPC64ADD
2222 OpPPC64ADDCC
2223 OpPPC64ADDconst
2224 OpPPC64ADDCCconst
2225 OpPPC64FADD
2226 OpPPC64FADDS
2227 OpPPC64SUB
2228 OpPPC64SUBCC
2229 OpPPC64SUBFCconst
2230 OpPPC64FSUB
2231 OpPPC64FSUBS
2232 OpPPC64XSMINJDP
2233 OpPPC64XSMAXJDP
2234 OpPPC64MULLD
2235 OpPPC64MULLW
2236 OpPPC64MULLDconst
2237 OpPPC64MULLWconst
2238 OpPPC64MADDLD
2239 OpPPC64MULHD
2240 OpPPC64MULHW
2241 OpPPC64MULHDU
2242 OpPPC64MULHDUCC
2243 OpPPC64MULHWU
2244 OpPPC64FMUL
2245 OpPPC64FMULS
2246 OpPPC64FMADD
2247 OpPPC64FMADDS
2248 OpPPC64FMSUB
2249 OpPPC64FMSUBS
2250 OpPPC64SRAD
2251 OpPPC64SRAW
2252 OpPPC64SRD
2253 OpPPC64SRW
2254 OpPPC64SLD
2255 OpPPC64SLW
2256 OpPPC64ROTL
2257 OpPPC64ROTLW
2258 OpPPC64CLRLSLWI
2259 OpPPC64CLRLSLDI
2260 OpPPC64ADDC
2261 OpPPC64SUBC
2262 OpPPC64ADDCconst
2263 OpPPC64SUBCconst
2264 OpPPC64ADDE
2265 OpPPC64ADDZE
2266 OpPPC64SUBE
2267 OpPPC64ADDZEzero
2268 OpPPC64SUBZEzero
2269 OpPPC64SRADconst
2270 OpPPC64SRAWconst
2271 OpPPC64SRDconst
2272 OpPPC64SRWconst
2273 OpPPC64SLDconst
2274 OpPPC64SLWconst
2275 OpPPC64ROTLconst
2276 OpPPC64ROTLWconst
2277 OpPPC64EXTSWSLconst
2278 OpPPC64RLWINM
2279 OpPPC64RLWNM
2280 OpPPC64RLWMI
2281 OpPPC64RLDICL
2282 OpPPC64RLDICLCC
2283 OpPPC64RLDICR
2284 OpPPC64CNTLZD
2285 OpPPC64CNTLZDCC
2286 OpPPC64CNTLZW
2287 OpPPC64CNTTZD
2288 OpPPC64CNTTZW
2289 OpPPC64POPCNTD
2290 OpPPC64POPCNTW
2291 OpPPC64POPCNTB
2292 OpPPC64FDIV
2293 OpPPC64FDIVS
2294 OpPPC64DIVD
2295 OpPPC64DIVW
2296 OpPPC64DIVDU
2297 OpPPC64DIVWU
2298 OpPPC64MODUD
2299 OpPPC64MODSD
2300 OpPPC64MODUW
2301 OpPPC64MODSW
2302 OpPPC64FCTIDZ
2303 OpPPC64FCTIWZ
2304 OpPPC64FCFID
2305 OpPPC64FCFIDS
2306 OpPPC64FRSP
2307 OpPPC64MFVSRD
2308 OpPPC64MTVSRD
2309 OpPPC64AND
2310 OpPPC64ANDN
2311 OpPPC64ANDNCC
2312 OpPPC64ANDCC
2313 OpPPC64OR
2314 OpPPC64ORN
2315 OpPPC64ORCC
2316 OpPPC64NOR
2317 OpPPC64NORCC
2318 OpPPC64XOR
2319 OpPPC64XORCC
2320 OpPPC64EQV
2321 OpPPC64NEG
2322 OpPPC64NEGCC
2323 OpPPC64BRD
2324 OpPPC64BRW
2325 OpPPC64BRH
2326 OpPPC64FNEG
2327 OpPPC64FSQRT
2328 OpPPC64FSQRTS
2329 OpPPC64FFLOOR
2330 OpPPC64FCEIL
2331 OpPPC64FTRUNC
2332 OpPPC64FROUND
2333 OpPPC64FABS
2334 OpPPC64FNABS
2335 OpPPC64FCPSGN
2336 OpPPC64ORconst
2337 OpPPC64XORconst
2338 OpPPC64ANDCCconst
2339 OpPPC64ANDconst
2340 OpPPC64MOVBreg
2341 OpPPC64MOVBZreg
2342 OpPPC64MOVHreg
2343 OpPPC64MOVHZreg
2344 OpPPC64MOVWreg
2345 OpPPC64MOVWZreg
2346 OpPPC64MOVBZload
2347 OpPPC64MOVHload
2348 OpPPC64MOVHZload
2349 OpPPC64MOVWload
2350 OpPPC64MOVWZload
2351 OpPPC64MOVDload
2352 OpPPC64MOVDBRload
2353 OpPPC64MOVWBRload
2354 OpPPC64MOVHBRload
2355 OpPPC64MOVBZloadidx
2356 OpPPC64MOVHloadidx
2357 OpPPC64MOVHZloadidx
2358 OpPPC64MOVWloadidx
2359 OpPPC64MOVWZloadidx
2360 OpPPC64MOVDloadidx
2361 OpPPC64MOVHBRloadidx
2362 OpPPC64MOVWBRloadidx
2363 OpPPC64MOVDBRloadidx
2364 OpPPC64FMOVDloadidx
2365 OpPPC64FMOVSloadidx
2366 OpPPC64DCBT
2367 OpPPC64MOVDBRstore
2368 OpPPC64MOVWBRstore
2369 OpPPC64MOVHBRstore
2370 OpPPC64FMOVDload
2371 OpPPC64FMOVSload
2372 OpPPC64MOVBstore
2373 OpPPC64MOVHstore
2374 OpPPC64MOVWstore
2375 OpPPC64MOVDstore
2376 OpPPC64FMOVDstore
2377 OpPPC64FMOVSstore
2378 OpPPC64MOVBstoreidx
2379 OpPPC64MOVHstoreidx
2380 OpPPC64MOVWstoreidx
2381 OpPPC64MOVDstoreidx
2382 OpPPC64FMOVDstoreidx
2383 OpPPC64FMOVSstoreidx
2384 OpPPC64MOVHBRstoreidx
2385 OpPPC64MOVWBRstoreidx
2386 OpPPC64MOVDBRstoreidx
2387 OpPPC64MOVBstorezero
2388 OpPPC64MOVHstorezero
2389 OpPPC64MOVWstorezero
2390 OpPPC64MOVDstorezero
2391 OpPPC64MOVDaddr
2392 OpPPC64MOVDconst
2393 OpPPC64FMOVDconst
2394 OpPPC64FMOVSconst
2395 OpPPC64FCMPU
2396 OpPPC64CMP
2397 OpPPC64CMPU
2398 OpPPC64CMPW
2399 OpPPC64CMPWU
2400 OpPPC64CMPconst
2401 OpPPC64CMPUconst
2402 OpPPC64CMPWconst
2403 OpPPC64CMPWUconst
2404 OpPPC64ISEL
2405 OpPPC64ISELZ
2406 OpPPC64SETBC
2407 OpPPC64SETBCR
2408 OpPPC64Equal
2409 OpPPC64NotEqual
2410 OpPPC64LessThan
2411 OpPPC64FLessThan
2412 OpPPC64LessEqual
2413 OpPPC64FLessEqual
2414 OpPPC64GreaterThan
2415 OpPPC64FGreaterThan
2416 OpPPC64GreaterEqual
2417 OpPPC64FGreaterEqual
2418 OpPPC64LoweredGetClosurePtr
2419 OpPPC64LoweredGetCallerSP
2420 OpPPC64LoweredGetCallerPC
2421 OpPPC64LoweredNilCheck
2422 OpPPC64LoweredRound32F
2423 OpPPC64LoweredRound64F
2424 OpPPC64CALLstatic
2425 OpPPC64CALLtail
2426 OpPPC64CALLclosure
2427 OpPPC64CALLinter
2428 OpPPC64LoweredZero
2429 OpPPC64LoweredZeroShort
2430 OpPPC64LoweredQuadZeroShort
2431 OpPPC64LoweredQuadZero
2432 OpPPC64LoweredMove
2433 OpPPC64LoweredMoveShort
2434 OpPPC64LoweredQuadMove
2435 OpPPC64LoweredQuadMoveShort
2436 OpPPC64LoweredAtomicStore8
2437 OpPPC64LoweredAtomicStore32
2438 OpPPC64LoweredAtomicStore64
2439 OpPPC64LoweredAtomicLoad8
2440 OpPPC64LoweredAtomicLoad32
2441 OpPPC64LoweredAtomicLoad64
2442 OpPPC64LoweredAtomicLoadPtr
2443 OpPPC64LoweredAtomicAdd32
2444 OpPPC64LoweredAtomicAdd64
2445 OpPPC64LoweredAtomicExchange8
2446 OpPPC64LoweredAtomicExchange32
2447 OpPPC64LoweredAtomicExchange64
2448 OpPPC64LoweredAtomicCas64
2449 OpPPC64LoweredAtomicCas32
2450 OpPPC64LoweredAtomicAnd8
2451 OpPPC64LoweredAtomicAnd32
2452 OpPPC64LoweredAtomicOr8
2453 OpPPC64LoweredAtomicOr32
2454 OpPPC64LoweredWB
2455 OpPPC64LoweredPubBarrier
2456 OpPPC64LoweredPanicBoundsRR
2457 OpPPC64LoweredPanicBoundsRC
2458 OpPPC64LoweredPanicBoundsCR
2459 OpPPC64LoweredPanicBoundsCC
2460 OpPPC64InvertFlags
2461 OpPPC64FlagEQ
2462 OpPPC64FlagLT
2463 OpPPC64FlagGT
2464
2465 OpRISCV64ADD
2466 OpRISCV64ADDI
2467 OpRISCV64ADDIW
2468 OpRISCV64NEG
2469 OpRISCV64NEGW
2470 OpRISCV64SUB
2471 OpRISCV64SUBW
2472 OpRISCV64MUL
2473 OpRISCV64MULW
2474 OpRISCV64MULH
2475 OpRISCV64MULHU
2476 OpRISCV64LoweredMuluhilo
2477 OpRISCV64LoweredMuluover
2478 OpRISCV64DIV
2479 OpRISCV64DIVU
2480 OpRISCV64DIVW
2481 OpRISCV64DIVUW
2482 OpRISCV64REM
2483 OpRISCV64REMU
2484 OpRISCV64REMW
2485 OpRISCV64REMUW
2486 OpRISCV64MOVaddr
2487 OpRISCV64MOVDconst
2488 OpRISCV64MOVBload
2489 OpRISCV64MOVHload
2490 OpRISCV64MOVWload
2491 OpRISCV64MOVDload
2492 OpRISCV64MOVBUload
2493 OpRISCV64MOVHUload
2494 OpRISCV64MOVWUload
2495 OpRISCV64MOVBstore
2496 OpRISCV64MOVHstore
2497 OpRISCV64MOVWstore
2498 OpRISCV64MOVDstore
2499 OpRISCV64MOVBstorezero
2500 OpRISCV64MOVHstorezero
2501 OpRISCV64MOVWstorezero
2502 OpRISCV64MOVDstorezero
2503 OpRISCV64MOVBreg
2504 OpRISCV64MOVHreg
2505 OpRISCV64MOVWreg
2506 OpRISCV64MOVDreg
2507 OpRISCV64MOVBUreg
2508 OpRISCV64MOVHUreg
2509 OpRISCV64MOVWUreg
2510 OpRISCV64MOVDnop
2511 OpRISCV64SLL
2512 OpRISCV64SLLW
2513 OpRISCV64SRA
2514 OpRISCV64SRAW
2515 OpRISCV64SRL
2516 OpRISCV64SRLW
2517 OpRISCV64SLLI
2518 OpRISCV64SLLIW
2519 OpRISCV64SRAI
2520 OpRISCV64SRAIW
2521 OpRISCV64SRLI
2522 OpRISCV64SRLIW
2523 OpRISCV64SH1ADD
2524 OpRISCV64SH2ADD
2525 OpRISCV64SH3ADD
2526 OpRISCV64AND
2527 OpRISCV64ANDN
2528 OpRISCV64ANDI
2529 OpRISCV64CLZ
2530 OpRISCV64CLZW
2531 OpRISCV64CPOP
2532 OpRISCV64CPOPW
2533 OpRISCV64CTZ
2534 OpRISCV64CTZW
2535 OpRISCV64NOT
2536 OpRISCV64OR
2537 OpRISCV64ORN
2538 OpRISCV64ORI
2539 OpRISCV64REV8
2540 OpRISCV64ROL
2541 OpRISCV64ROLW
2542 OpRISCV64ROR
2543 OpRISCV64RORI
2544 OpRISCV64RORIW
2545 OpRISCV64RORW
2546 OpRISCV64XNOR
2547 OpRISCV64XOR
2548 OpRISCV64XORI
2549 OpRISCV64MIN
2550 OpRISCV64MAX
2551 OpRISCV64MINU
2552 OpRISCV64MAXU
2553 OpRISCV64SEQZ
2554 OpRISCV64SNEZ
2555 OpRISCV64SLT
2556 OpRISCV64SLTI
2557 OpRISCV64SLTU
2558 OpRISCV64SLTIU
2559 OpRISCV64LoweredRound32F
2560 OpRISCV64LoweredRound64F
2561 OpRISCV64CALLstatic
2562 OpRISCV64CALLtail
2563 OpRISCV64CALLclosure
2564 OpRISCV64CALLinter
2565 OpRISCV64DUFFZERO
2566 OpRISCV64DUFFCOPY
2567 OpRISCV64LoweredZero
2568 OpRISCV64LoweredMove
2569 OpRISCV64LoweredAtomicLoad8
2570 OpRISCV64LoweredAtomicLoad32
2571 OpRISCV64LoweredAtomicLoad64
2572 OpRISCV64LoweredAtomicStore8
2573 OpRISCV64LoweredAtomicStore32
2574 OpRISCV64LoweredAtomicStore64
2575 OpRISCV64LoweredAtomicExchange32
2576 OpRISCV64LoweredAtomicExchange64
2577 OpRISCV64LoweredAtomicAdd32
2578 OpRISCV64LoweredAtomicAdd64
2579 OpRISCV64LoweredAtomicCas32
2580 OpRISCV64LoweredAtomicCas64
2581 OpRISCV64LoweredAtomicAnd32
2582 OpRISCV64LoweredAtomicOr32
2583 OpRISCV64LoweredNilCheck
2584 OpRISCV64LoweredGetClosurePtr
2585 OpRISCV64LoweredGetCallerSP
2586 OpRISCV64LoweredGetCallerPC
2587 OpRISCV64LoweredWB
2588 OpRISCV64LoweredPubBarrier
2589 OpRISCV64LoweredPanicBoundsRR
2590 OpRISCV64LoweredPanicBoundsRC
2591 OpRISCV64LoweredPanicBoundsCR
2592 OpRISCV64LoweredPanicBoundsCC
2593 OpRISCV64FADDS
2594 OpRISCV64FSUBS
2595 OpRISCV64FMULS
2596 OpRISCV64FDIVS
2597 OpRISCV64FMADDS
2598 OpRISCV64FMSUBS
2599 OpRISCV64FNMADDS
2600 OpRISCV64FNMSUBS
2601 OpRISCV64FSQRTS
2602 OpRISCV64FNEGS
2603 OpRISCV64FMVSX
2604 OpRISCV64FMVXS
2605 OpRISCV64FCVTSW
2606 OpRISCV64FCVTSL
2607 OpRISCV64FCVTWS
2608 OpRISCV64FCVTLS
2609 OpRISCV64FMOVWload
2610 OpRISCV64FMOVWstore
2611 OpRISCV64FEQS
2612 OpRISCV64FNES
2613 OpRISCV64FLTS
2614 OpRISCV64FLES
2615 OpRISCV64LoweredFMAXS
2616 OpRISCV64LoweredFMINS
2617 OpRISCV64FADDD
2618 OpRISCV64FSUBD
2619 OpRISCV64FMULD
2620 OpRISCV64FDIVD
2621 OpRISCV64FMADDD
2622 OpRISCV64FMSUBD
2623 OpRISCV64FNMADDD
2624 OpRISCV64FNMSUBD
2625 OpRISCV64FSQRTD
2626 OpRISCV64FNEGD
2627 OpRISCV64FABSD
2628 OpRISCV64FSGNJD
2629 OpRISCV64FMVDX
2630 OpRISCV64FMVXD
2631 OpRISCV64FCVTDW
2632 OpRISCV64FCVTDL
2633 OpRISCV64FCVTWD
2634 OpRISCV64FCVTLD
2635 OpRISCV64FCVTDS
2636 OpRISCV64FCVTSD
2637 OpRISCV64FMOVDload
2638 OpRISCV64FMOVDstore
2639 OpRISCV64FEQD
2640 OpRISCV64FNED
2641 OpRISCV64FLTD
2642 OpRISCV64FLED
2643 OpRISCV64LoweredFMIND
2644 OpRISCV64LoweredFMAXD
2645
2646 OpS390XFADDS
2647 OpS390XFADD
2648 OpS390XFSUBS
2649 OpS390XFSUB
2650 OpS390XFMULS
2651 OpS390XFMUL
2652 OpS390XFDIVS
2653 OpS390XFDIV
2654 OpS390XFNEGS
2655 OpS390XFNEG
2656 OpS390XFMADDS
2657 OpS390XFMADD
2658 OpS390XFMSUBS
2659 OpS390XFMSUB
2660 OpS390XLPDFR
2661 OpS390XLNDFR
2662 OpS390XCPSDR
2663 OpS390XWFMAXDB
2664 OpS390XWFMAXSB
2665 OpS390XWFMINDB
2666 OpS390XWFMINSB
2667 OpS390XFIDBR
2668 OpS390XFMOVSload
2669 OpS390XFMOVDload
2670 OpS390XFMOVSconst
2671 OpS390XFMOVDconst
2672 OpS390XFMOVSloadidx
2673 OpS390XFMOVDloadidx
2674 OpS390XFMOVSstore
2675 OpS390XFMOVDstore
2676 OpS390XFMOVSstoreidx
2677 OpS390XFMOVDstoreidx
2678 OpS390XADD
2679 OpS390XADDW
2680 OpS390XADDconst
2681 OpS390XADDWconst
2682 OpS390XADDload
2683 OpS390XADDWload
2684 OpS390XSUB
2685 OpS390XSUBW
2686 OpS390XSUBconst
2687 OpS390XSUBWconst
2688 OpS390XSUBload
2689 OpS390XSUBWload
2690 OpS390XMULLD
2691 OpS390XMULLW
2692 OpS390XMULLDconst
2693 OpS390XMULLWconst
2694 OpS390XMULLDload
2695 OpS390XMULLWload
2696 OpS390XMULHD
2697 OpS390XMULHDU
2698 OpS390XDIVD
2699 OpS390XDIVW
2700 OpS390XDIVDU
2701 OpS390XDIVWU
2702 OpS390XMODD
2703 OpS390XMODW
2704 OpS390XMODDU
2705 OpS390XMODWU
2706 OpS390XAND
2707 OpS390XANDW
2708 OpS390XANDconst
2709 OpS390XANDWconst
2710 OpS390XANDload
2711 OpS390XANDWload
2712 OpS390XOR
2713 OpS390XORW
2714 OpS390XORconst
2715 OpS390XORWconst
2716 OpS390XORload
2717 OpS390XORWload
2718 OpS390XXOR
2719 OpS390XXORW
2720 OpS390XXORconst
2721 OpS390XXORWconst
2722 OpS390XXORload
2723 OpS390XXORWload
2724 OpS390XADDC
2725 OpS390XADDCconst
2726 OpS390XADDE
2727 OpS390XSUBC
2728 OpS390XSUBE
2729 OpS390XCMP
2730 OpS390XCMPW
2731 OpS390XCMPU
2732 OpS390XCMPWU
2733 OpS390XCMPconst
2734 OpS390XCMPWconst
2735 OpS390XCMPUconst
2736 OpS390XCMPWUconst
2737 OpS390XFCMPS
2738 OpS390XFCMP
2739 OpS390XLTDBR
2740 OpS390XLTEBR
2741 OpS390XSLD
2742 OpS390XSLW
2743 OpS390XSLDconst
2744 OpS390XSLWconst
2745 OpS390XSRD
2746 OpS390XSRW
2747 OpS390XSRDconst
2748 OpS390XSRWconst
2749 OpS390XSRAD
2750 OpS390XSRAW
2751 OpS390XSRADconst
2752 OpS390XSRAWconst
2753 OpS390XRLLG
2754 OpS390XRLL
2755 OpS390XRLLconst
2756 OpS390XRXSBG
2757 OpS390XRISBGZ
2758 OpS390XNEG
2759 OpS390XNEGW
2760 OpS390XNOT
2761 OpS390XNOTW
2762 OpS390XFSQRT
2763 OpS390XFSQRTS
2764 OpS390XLOCGR
2765 OpS390XMOVBreg
2766 OpS390XMOVBZreg
2767 OpS390XMOVHreg
2768 OpS390XMOVHZreg
2769 OpS390XMOVWreg
2770 OpS390XMOVWZreg
2771 OpS390XMOVDconst
2772 OpS390XLDGR
2773 OpS390XLGDR
2774 OpS390XCFDBRA
2775 OpS390XCGDBRA
2776 OpS390XCFEBRA
2777 OpS390XCGEBRA
2778 OpS390XCEFBRA
2779 OpS390XCDFBRA
2780 OpS390XCEGBRA
2781 OpS390XCDGBRA
2782 OpS390XCLFEBR
2783 OpS390XCLFDBR
2784 OpS390XCLGEBR
2785 OpS390XCLGDBR
2786 OpS390XCELFBR
2787 OpS390XCDLFBR
2788 OpS390XCELGBR
2789 OpS390XCDLGBR
2790 OpS390XLEDBR
2791 OpS390XLDEBR
2792 OpS390XMOVDaddr
2793 OpS390XMOVDaddridx
2794 OpS390XMOVBZload
2795 OpS390XMOVBload
2796 OpS390XMOVHZload
2797 OpS390XMOVHload
2798 OpS390XMOVWZload
2799 OpS390XMOVWload
2800 OpS390XMOVDload
2801 OpS390XMOVWBR
2802 OpS390XMOVDBR
2803 OpS390XMOVHBRload
2804 OpS390XMOVWBRload
2805 OpS390XMOVDBRload
2806 OpS390XMOVBstore
2807 OpS390XMOVHstore
2808 OpS390XMOVWstore
2809 OpS390XMOVDstore
2810 OpS390XMOVHBRstore
2811 OpS390XMOVWBRstore
2812 OpS390XMOVDBRstore
2813 OpS390XMVC
2814 OpS390XMOVBZloadidx
2815 OpS390XMOVBloadidx
2816 OpS390XMOVHZloadidx
2817 OpS390XMOVHloadidx
2818 OpS390XMOVWZloadidx
2819 OpS390XMOVWloadidx
2820 OpS390XMOVDloadidx
2821 OpS390XMOVHBRloadidx
2822 OpS390XMOVWBRloadidx
2823 OpS390XMOVDBRloadidx
2824 OpS390XMOVBstoreidx
2825 OpS390XMOVHstoreidx
2826 OpS390XMOVWstoreidx
2827 OpS390XMOVDstoreidx
2828 OpS390XMOVHBRstoreidx
2829 OpS390XMOVWBRstoreidx
2830 OpS390XMOVDBRstoreidx
2831 OpS390XMOVBstoreconst
2832 OpS390XMOVHstoreconst
2833 OpS390XMOVWstoreconst
2834 OpS390XMOVDstoreconst
2835 OpS390XCLEAR
2836 OpS390XCALLstatic
2837 OpS390XCALLtail
2838 OpS390XCALLclosure
2839 OpS390XCALLinter
2840 OpS390XInvertFlags
2841 OpS390XLoweredGetG
2842 OpS390XLoweredGetClosurePtr
2843 OpS390XLoweredGetCallerSP
2844 OpS390XLoweredGetCallerPC
2845 OpS390XLoweredNilCheck
2846 OpS390XLoweredRound32F
2847 OpS390XLoweredRound64F
2848 OpS390XLoweredWB
2849 OpS390XLoweredPanicBoundsRR
2850 OpS390XLoweredPanicBoundsRC
2851 OpS390XLoweredPanicBoundsCR
2852 OpS390XLoweredPanicBoundsCC
2853 OpS390XFlagEQ
2854 OpS390XFlagLT
2855 OpS390XFlagGT
2856 OpS390XFlagOV
2857 OpS390XSYNC
2858 OpS390XMOVBZatomicload
2859 OpS390XMOVWZatomicload
2860 OpS390XMOVDatomicload
2861 OpS390XMOVBatomicstore
2862 OpS390XMOVWatomicstore
2863 OpS390XMOVDatomicstore
2864 OpS390XLAA
2865 OpS390XLAAG
2866 OpS390XAddTupleFirst32
2867 OpS390XAddTupleFirst64
2868 OpS390XLAN
2869 OpS390XLANfloor
2870 OpS390XLAO
2871 OpS390XLAOfloor
2872 OpS390XLoweredAtomicCas32
2873 OpS390XLoweredAtomicCas64
2874 OpS390XLoweredAtomicExchange32
2875 OpS390XLoweredAtomicExchange64
2876 OpS390XFLOGR
2877 OpS390XPOPCNT
2878 OpS390XMLGR
2879 OpS390XSumBytes2
2880 OpS390XSumBytes4
2881 OpS390XSumBytes8
2882 OpS390XSTMG2
2883 OpS390XSTMG3
2884 OpS390XSTMG4
2885 OpS390XSTM2
2886 OpS390XSTM3
2887 OpS390XSTM4
2888 OpS390XLoweredMove
2889 OpS390XLoweredZero
2890
2891 OpWasmLoweredStaticCall
2892 OpWasmLoweredTailCall
2893 OpWasmLoweredClosureCall
2894 OpWasmLoweredInterCall
2895 OpWasmLoweredAddr
2896 OpWasmLoweredMove
2897 OpWasmLoweredZero
2898 OpWasmLoweredGetClosurePtr
2899 OpWasmLoweredGetCallerPC
2900 OpWasmLoweredGetCallerSP
2901 OpWasmLoweredNilCheck
2902 OpWasmLoweredWB
2903 OpWasmLoweredConvert
2904 OpWasmSelect
2905 OpWasmI64Load8U
2906 OpWasmI64Load8S
2907 OpWasmI64Load16U
2908 OpWasmI64Load16S
2909 OpWasmI64Load32U
2910 OpWasmI64Load32S
2911 OpWasmI64Load
2912 OpWasmI64Store8
2913 OpWasmI64Store16
2914 OpWasmI64Store32
2915 OpWasmI64Store
2916 OpWasmF32Load
2917 OpWasmF64Load
2918 OpWasmF32Store
2919 OpWasmF64Store
2920 OpWasmI64Const
2921 OpWasmF32Const
2922 OpWasmF64Const
2923 OpWasmI64Eqz
2924 OpWasmI64Eq
2925 OpWasmI64Ne
2926 OpWasmI64LtS
2927 OpWasmI64LtU
2928 OpWasmI64GtS
2929 OpWasmI64GtU
2930 OpWasmI64LeS
2931 OpWasmI64LeU
2932 OpWasmI64GeS
2933 OpWasmI64GeU
2934 OpWasmF32Eq
2935 OpWasmF32Ne
2936 OpWasmF32Lt
2937 OpWasmF32Gt
2938 OpWasmF32Le
2939 OpWasmF32Ge
2940 OpWasmF64Eq
2941 OpWasmF64Ne
2942 OpWasmF64Lt
2943 OpWasmF64Gt
2944 OpWasmF64Le
2945 OpWasmF64Ge
2946 OpWasmI64Add
2947 OpWasmI64AddConst
2948 OpWasmI64Sub
2949 OpWasmI64Mul
2950 OpWasmI64DivS
2951 OpWasmI64DivU
2952 OpWasmI64RemS
2953 OpWasmI64RemU
2954 OpWasmI64And
2955 OpWasmI64Or
2956 OpWasmI64Xor
2957 OpWasmI64Shl
2958 OpWasmI64ShrS
2959 OpWasmI64ShrU
2960 OpWasmF32Neg
2961 OpWasmF32Add
2962 OpWasmF32Sub
2963 OpWasmF32Mul
2964 OpWasmF32Div
2965 OpWasmF64Neg
2966 OpWasmF64Add
2967 OpWasmF64Sub
2968 OpWasmF64Mul
2969 OpWasmF64Div
2970 OpWasmI64TruncSatF64S
2971 OpWasmI64TruncSatF64U
2972 OpWasmI64TruncSatF32S
2973 OpWasmI64TruncSatF32U
2974 OpWasmF32ConvertI64S
2975 OpWasmF32ConvertI64U
2976 OpWasmF64ConvertI64S
2977 OpWasmF64ConvertI64U
2978 OpWasmF32DemoteF64
2979 OpWasmF64PromoteF32
2980 OpWasmI64Extend8S
2981 OpWasmI64Extend16S
2982 OpWasmI64Extend32S
2983 OpWasmF32Sqrt
2984 OpWasmF32Trunc
2985 OpWasmF32Ceil
2986 OpWasmF32Floor
2987 OpWasmF32Nearest
2988 OpWasmF32Abs
2989 OpWasmF32Copysign
2990 OpWasmF64Sqrt
2991 OpWasmF64Trunc
2992 OpWasmF64Ceil
2993 OpWasmF64Floor
2994 OpWasmF64Nearest
2995 OpWasmF64Abs
2996 OpWasmF64Copysign
2997 OpWasmI64Ctz
2998 OpWasmI64Clz
2999 OpWasmI32Rotl
3000 OpWasmI64Rotl
3001 OpWasmI64Popcnt
3002
3003 OpAdd8
3004 OpAdd16
3005 OpAdd32
3006 OpAdd64
3007 OpAddPtr
3008 OpAdd32F
3009 OpAdd64F
3010 OpSub8
3011 OpSub16
3012 OpSub32
3013 OpSub64
3014 OpSubPtr
3015 OpSub32F
3016 OpSub64F
3017 OpMul8
3018 OpMul16
3019 OpMul32
3020 OpMul64
3021 OpMul32F
3022 OpMul64F
3023 OpDiv32F
3024 OpDiv64F
3025 OpHmul32
3026 OpHmul32u
3027 OpHmul64
3028 OpHmul64u
3029 OpMul32uhilo
3030 OpMul64uhilo
3031 OpMul32uover
3032 OpMul64uover
3033 OpAvg32u
3034 OpAvg64u
3035 OpDiv8
3036 OpDiv8u
3037 OpDiv16
3038 OpDiv16u
3039 OpDiv32
3040 OpDiv32u
3041 OpDiv64
3042 OpDiv64u
3043 OpDiv128u
3044 OpMod8
3045 OpMod8u
3046 OpMod16
3047 OpMod16u
3048 OpMod32
3049 OpMod32u
3050 OpMod64
3051 OpMod64u
3052 OpAnd8
3053 OpAnd16
3054 OpAnd32
3055 OpAnd64
3056 OpOr8
3057 OpOr16
3058 OpOr32
3059 OpOr64
3060 OpXor8
3061 OpXor16
3062 OpXor32
3063 OpXor64
3064 OpLsh8x8
3065 OpLsh8x16
3066 OpLsh8x32
3067 OpLsh8x64
3068 OpLsh16x8
3069 OpLsh16x16
3070 OpLsh16x32
3071 OpLsh16x64
3072 OpLsh32x8
3073 OpLsh32x16
3074 OpLsh32x32
3075 OpLsh32x64
3076 OpLsh64x8
3077 OpLsh64x16
3078 OpLsh64x32
3079 OpLsh64x64
3080 OpRsh8x8
3081 OpRsh8x16
3082 OpRsh8x32
3083 OpRsh8x64
3084 OpRsh16x8
3085 OpRsh16x16
3086 OpRsh16x32
3087 OpRsh16x64
3088 OpRsh32x8
3089 OpRsh32x16
3090 OpRsh32x32
3091 OpRsh32x64
3092 OpRsh64x8
3093 OpRsh64x16
3094 OpRsh64x32
3095 OpRsh64x64
3096 OpRsh8Ux8
3097 OpRsh8Ux16
3098 OpRsh8Ux32
3099 OpRsh8Ux64
3100 OpRsh16Ux8
3101 OpRsh16Ux16
3102 OpRsh16Ux32
3103 OpRsh16Ux64
3104 OpRsh32Ux8
3105 OpRsh32Ux16
3106 OpRsh32Ux32
3107 OpRsh32Ux64
3108 OpRsh64Ux8
3109 OpRsh64Ux16
3110 OpRsh64Ux32
3111 OpRsh64Ux64
3112 OpEq8
3113 OpEq16
3114 OpEq32
3115 OpEq64
3116 OpEqPtr
3117 OpEqInter
3118 OpEqSlice
3119 OpEq32F
3120 OpEq64F
3121 OpNeq8
3122 OpNeq16
3123 OpNeq32
3124 OpNeq64
3125 OpNeqPtr
3126 OpNeqInter
3127 OpNeqSlice
3128 OpNeq32F
3129 OpNeq64F
3130 OpLess8
3131 OpLess8U
3132 OpLess16
3133 OpLess16U
3134 OpLess32
3135 OpLess32U
3136 OpLess64
3137 OpLess64U
3138 OpLess32F
3139 OpLess64F
3140 OpLeq8
3141 OpLeq8U
3142 OpLeq16
3143 OpLeq16U
3144 OpLeq32
3145 OpLeq32U
3146 OpLeq64
3147 OpLeq64U
3148 OpLeq32F
3149 OpLeq64F
3150 OpCondSelect
3151 OpAndB
3152 OpOrB
3153 OpEqB
3154 OpNeqB
3155 OpNot
3156 OpNeg8
3157 OpNeg16
3158 OpNeg32
3159 OpNeg64
3160 OpNeg32F
3161 OpNeg64F
3162 OpCom8
3163 OpCom16
3164 OpCom32
3165 OpCom64
3166 OpCtz8
3167 OpCtz16
3168 OpCtz32
3169 OpCtz64
3170 OpCtz64On32
3171 OpCtz8NonZero
3172 OpCtz16NonZero
3173 OpCtz32NonZero
3174 OpCtz64NonZero
3175 OpBitLen8
3176 OpBitLen16
3177 OpBitLen32
3178 OpBitLen64
3179 OpBswap16
3180 OpBswap32
3181 OpBswap64
3182 OpBitRev8
3183 OpBitRev16
3184 OpBitRev32
3185 OpBitRev64
3186 OpPopCount8
3187 OpPopCount16
3188 OpPopCount32
3189 OpPopCount64
3190 OpRotateLeft64
3191 OpRotateLeft32
3192 OpRotateLeft16
3193 OpRotateLeft8
3194 OpSqrt
3195 OpSqrt32
3196 OpFloor
3197 OpCeil
3198 OpTrunc
3199 OpRound
3200 OpRoundToEven
3201 OpAbs
3202 OpCopysign
3203 OpMin64
3204 OpMax64
3205 OpMin64u
3206 OpMax64u
3207 OpMin64F
3208 OpMin32F
3209 OpMax64F
3210 OpMax32F
3211 OpFMA
3212 OpPhi
3213 OpCopy
3214 OpConvert
3215 OpConstBool
3216 OpConstString
3217 OpConstNil
3218 OpConst8
3219 OpConst16
3220 OpConst32
3221 OpConst64
3222 OpConst32F
3223 OpConst64F
3224 OpConstInterface
3225 OpConstSlice
3226 OpInitMem
3227 OpArg
3228 OpArgIntReg
3229 OpArgFloatReg
3230 OpAddr
3231 OpLocalAddr
3232 OpSP
3233 OpSB
3234 OpSPanchored
3235 OpLoad
3236 OpDereference
3237 OpStore
3238 OpMove
3239 OpZero
3240 OpStoreWB
3241 OpMoveWB
3242 OpZeroWB
3243 OpWBend
3244 OpWB
3245 OpHasCPUFeature
3246 OpPanicBounds
3247 OpPanicExtend
3248 OpClosureCall
3249 OpStaticCall
3250 OpInterCall
3251 OpTailCall
3252 OpClosureLECall
3253 OpStaticLECall
3254 OpInterLECall
3255 OpTailLECall
3256 OpSignExt8to16
3257 OpSignExt8to32
3258 OpSignExt8to64
3259 OpSignExt16to32
3260 OpSignExt16to64
3261 OpSignExt32to64
3262 OpZeroExt8to16
3263 OpZeroExt8to32
3264 OpZeroExt8to64
3265 OpZeroExt16to32
3266 OpZeroExt16to64
3267 OpZeroExt32to64
3268 OpTrunc16to8
3269 OpTrunc32to8
3270 OpTrunc32to16
3271 OpTrunc64to8
3272 OpTrunc64to16
3273 OpTrunc64to32
3274 OpCvt32to32F
3275 OpCvt32to64F
3276 OpCvt64to32F
3277 OpCvt64to64F
3278 OpCvt32Fto32
3279 OpCvt32Fto64
3280 OpCvt64Fto32
3281 OpCvt64Fto64
3282 OpCvt32Fto64F
3283 OpCvt64Fto32F
3284 OpCvtBoolToUint8
3285 OpRound32F
3286 OpRound64F
3287 OpIsNonNil
3288 OpIsInBounds
3289 OpIsSliceInBounds
3290 OpNilCheck
3291 OpGetG
3292 OpGetClosurePtr
3293 OpGetCallerPC
3294 OpGetCallerSP
3295 OpPtrIndex
3296 OpOffPtr
3297 OpSliceMake
3298 OpSlicePtr
3299 OpSliceLen
3300 OpSliceCap
3301 OpSlicePtrUnchecked
3302 OpComplexMake
3303 OpComplexReal
3304 OpComplexImag
3305 OpStringMake
3306 OpStringPtr
3307 OpStringLen
3308 OpIMake
3309 OpITab
3310 OpIData
3311 OpStructMake
3312 OpStructSelect
3313 OpArrayMake0
3314 OpArrayMake1
3315 OpArraySelect
3316 OpStoreReg
3317 OpLoadReg
3318 OpFwdRef
3319 OpUnknown
3320 OpVarDef
3321 OpVarLive
3322 OpKeepAlive
3323 OpInlMark
3324 OpInt64Make
3325 OpInt64Hi
3326 OpInt64Lo
3327 OpAdd32carry
3328 OpAdd32withcarry
3329 OpSub32carry
3330 OpSub32withcarry
3331 OpAdd64carry
3332 OpSub64borrow
3333 OpSignmask
3334 OpZeromask
3335 OpSlicemask
3336 OpSpectreIndex
3337 OpSpectreSliceIndex
3338 OpCvt32Uto32F
3339 OpCvt32Uto64F
3340 OpCvt32Fto32U
3341 OpCvt64Fto32U
3342 OpCvt64Uto32F
3343 OpCvt64Uto64F
3344 OpCvt32Fto64U
3345 OpCvt64Fto64U
3346 OpSelect0
3347 OpSelect1
3348 OpMakeTuple
3349 OpSelectN
3350 OpSelectNAddr
3351 OpMakeResult
3352 OpAtomicLoad8
3353 OpAtomicLoad32
3354 OpAtomicLoad64
3355 OpAtomicLoadPtr
3356 OpAtomicLoadAcq32
3357 OpAtomicLoadAcq64
3358 OpAtomicStore8
3359 OpAtomicStore32
3360 OpAtomicStore64
3361 OpAtomicStorePtrNoWB
3362 OpAtomicStoreRel32
3363 OpAtomicStoreRel64
3364 OpAtomicExchange8
3365 OpAtomicExchange32
3366 OpAtomicExchange64
3367 OpAtomicAdd32
3368 OpAtomicAdd64
3369 OpAtomicCompareAndSwap32
3370 OpAtomicCompareAndSwap64
3371 OpAtomicCompareAndSwapRel32
3372 OpAtomicAnd8
3373 OpAtomicOr8
3374 OpAtomicAnd32
3375 OpAtomicOr32
3376 OpAtomicAnd64value
3377 OpAtomicAnd32value
3378 OpAtomicAnd8value
3379 OpAtomicOr64value
3380 OpAtomicOr32value
3381 OpAtomicOr8value
3382 OpAtomicStore8Variant
3383 OpAtomicStore32Variant
3384 OpAtomicStore64Variant
3385 OpAtomicAdd32Variant
3386 OpAtomicAdd64Variant
3387 OpAtomicExchange8Variant
3388 OpAtomicExchange32Variant
3389 OpAtomicExchange64Variant
3390 OpAtomicCompareAndSwap32Variant
3391 OpAtomicCompareAndSwap64Variant
3392 OpAtomicAnd64valueVariant
3393 OpAtomicOr64valueVariant
3394 OpAtomicAnd32valueVariant
3395 OpAtomicOr32valueVariant
3396 OpAtomicAnd8valueVariant
3397 OpAtomicOr8valueVariant
3398 OpPubBarrier
3399 OpClobber
3400 OpClobberReg
3401 OpPrefetchCache
3402 OpPrefetchCacheStreamed
3403 )
3404
3405 var opcodeTable = [...]opInfo{
3406 {name: "OpInvalid"},
3407
3408 {
3409 name: "ADDSS",
3410 argLen: 2,
3411 commutative: true,
3412 resultInArg0: true,
3413 asm: x86.AADDSS,
3414 reg: regInfo{
3415 inputs: []inputInfo{
3416 {0, 65280},
3417 {1, 65280},
3418 },
3419 outputs: []outputInfo{
3420 {0, 65280},
3421 },
3422 },
3423 },
3424 {
3425 name: "ADDSD",
3426 argLen: 2,
3427 commutative: true,
3428 resultInArg0: true,
3429 asm: x86.AADDSD,
3430 reg: regInfo{
3431 inputs: []inputInfo{
3432 {0, 65280},
3433 {1, 65280},
3434 },
3435 outputs: []outputInfo{
3436 {0, 65280},
3437 },
3438 },
3439 },
3440 {
3441 name: "SUBSS",
3442 argLen: 2,
3443 resultInArg0: true,
3444 asm: x86.ASUBSS,
3445 reg: regInfo{
3446 inputs: []inputInfo{
3447 {0, 65280},
3448 {1, 65280},
3449 },
3450 outputs: []outputInfo{
3451 {0, 65280},
3452 },
3453 },
3454 },
3455 {
3456 name: "SUBSD",
3457 argLen: 2,
3458 resultInArg0: true,
3459 asm: x86.ASUBSD,
3460 reg: regInfo{
3461 inputs: []inputInfo{
3462 {0, 65280},
3463 {1, 65280},
3464 },
3465 outputs: []outputInfo{
3466 {0, 65280},
3467 },
3468 },
3469 },
3470 {
3471 name: "MULSS",
3472 argLen: 2,
3473 commutative: true,
3474 resultInArg0: true,
3475 asm: x86.AMULSS,
3476 reg: regInfo{
3477 inputs: []inputInfo{
3478 {0, 65280},
3479 {1, 65280},
3480 },
3481 outputs: []outputInfo{
3482 {0, 65280},
3483 },
3484 },
3485 },
3486 {
3487 name: "MULSD",
3488 argLen: 2,
3489 commutative: true,
3490 resultInArg0: true,
3491 asm: x86.AMULSD,
3492 reg: regInfo{
3493 inputs: []inputInfo{
3494 {0, 65280},
3495 {1, 65280},
3496 },
3497 outputs: []outputInfo{
3498 {0, 65280},
3499 },
3500 },
3501 },
3502 {
3503 name: "DIVSS",
3504 argLen: 2,
3505 resultInArg0: true,
3506 asm: x86.ADIVSS,
3507 reg: regInfo{
3508 inputs: []inputInfo{
3509 {0, 65280},
3510 {1, 65280},
3511 },
3512 outputs: []outputInfo{
3513 {0, 65280},
3514 },
3515 },
3516 },
3517 {
3518 name: "DIVSD",
3519 argLen: 2,
3520 resultInArg0: true,
3521 asm: x86.ADIVSD,
3522 reg: regInfo{
3523 inputs: []inputInfo{
3524 {0, 65280},
3525 {1, 65280},
3526 },
3527 outputs: []outputInfo{
3528 {0, 65280},
3529 },
3530 },
3531 },
3532 {
3533 name: "MOVSSload",
3534 auxType: auxSymOff,
3535 argLen: 2,
3536 faultOnNilArg0: true,
3537 symEffect: SymRead,
3538 asm: x86.AMOVSS,
3539 reg: regInfo{
3540 inputs: []inputInfo{
3541 {0, 65791},
3542 },
3543 outputs: []outputInfo{
3544 {0, 65280},
3545 },
3546 },
3547 },
3548 {
3549 name: "MOVSDload",
3550 auxType: auxSymOff,
3551 argLen: 2,
3552 faultOnNilArg0: true,
3553 symEffect: SymRead,
3554 asm: x86.AMOVSD,
3555 reg: regInfo{
3556 inputs: []inputInfo{
3557 {0, 65791},
3558 },
3559 outputs: []outputInfo{
3560 {0, 65280},
3561 },
3562 },
3563 },
3564 {
3565 name: "MOVSSconst",
3566 auxType: auxFloat32,
3567 argLen: 0,
3568 rematerializeable: true,
3569 asm: x86.AMOVSS,
3570 reg: regInfo{
3571 outputs: []outputInfo{
3572 {0, 65280},
3573 },
3574 },
3575 },
3576 {
3577 name: "MOVSDconst",
3578 auxType: auxFloat64,
3579 argLen: 0,
3580 rematerializeable: true,
3581 asm: x86.AMOVSD,
3582 reg: regInfo{
3583 outputs: []outputInfo{
3584 {0, 65280},
3585 },
3586 },
3587 },
3588 {
3589 name: "MOVSSloadidx1",
3590 auxType: auxSymOff,
3591 argLen: 3,
3592 symEffect: SymRead,
3593 asm: x86.AMOVSS,
3594 reg: regInfo{
3595 inputs: []inputInfo{
3596 {1, 255},
3597 {0, 65791},
3598 },
3599 outputs: []outputInfo{
3600 {0, 65280},
3601 },
3602 },
3603 },
3604 {
3605 name: "MOVSSloadidx4",
3606 auxType: auxSymOff,
3607 argLen: 3,
3608 symEffect: SymRead,
3609 asm: x86.AMOVSS,
3610 reg: regInfo{
3611 inputs: []inputInfo{
3612 {1, 255},
3613 {0, 65791},
3614 },
3615 outputs: []outputInfo{
3616 {0, 65280},
3617 },
3618 },
3619 },
3620 {
3621 name: "MOVSDloadidx1",
3622 auxType: auxSymOff,
3623 argLen: 3,
3624 symEffect: SymRead,
3625 asm: x86.AMOVSD,
3626 reg: regInfo{
3627 inputs: []inputInfo{
3628 {1, 255},
3629 {0, 65791},
3630 },
3631 outputs: []outputInfo{
3632 {0, 65280},
3633 },
3634 },
3635 },
3636 {
3637 name: "MOVSDloadidx8",
3638 auxType: auxSymOff,
3639 argLen: 3,
3640 symEffect: SymRead,
3641 asm: x86.AMOVSD,
3642 reg: regInfo{
3643 inputs: []inputInfo{
3644 {1, 255},
3645 {0, 65791},
3646 },
3647 outputs: []outputInfo{
3648 {0, 65280},
3649 },
3650 },
3651 },
3652 {
3653 name: "MOVSSstore",
3654 auxType: auxSymOff,
3655 argLen: 3,
3656 faultOnNilArg0: true,
3657 symEffect: SymWrite,
3658 asm: x86.AMOVSS,
3659 reg: regInfo{
3660 inputs: []inputInfo{
3661 {1, 65280},
3662 {0, 65791},
3663 },
3664 },
3665 },
3666 {
3667 name: "MOVSDstore",
3668 auxType: auxSymOff,
3669 argLen: 3,
3670 faultOnNilArg0: true,
3671 symEffect: SymWrite,
3672 asm: x86.AMOVSD,
3673 reg: regInfo{
3674 inputs: []inputInfo{
3675 {1, 65280},
3676 {0, 65791},
3677 },
3678 },
3679 },
3680 {
3681 name: "MOVSSstoreidx1",
3682 auxType: auxSymOff,
3683 argLen: 4,
3684 symEffect: SymWrite,
3685 asm: x86.AMOVSS,
3686 reg: regInfo{
3687 inputs: []inputInfo{
3688 {1, 255},
3689 {2, 65280},
3690 {0, 65791},
3691 },
3692 },
3693 },
3694 {
3695 name: "MOVSSstoreidx4",
3696 auxType: auxSymOff,
3697 argLen: 4,
3698 symEffect: SymWrite,
3699 asm: x86.AMOVSS,
3700 reg: regInfo{
3701 inputs: []inputInfo{
3702 {1, 255},
3703 {2, 65280},
3704 {0, 65791},
3705 },
3706 },
3707 },
3708 {
3709 name: "MOVSDstoreidx1",
3710 auxType: auxSymOff,
3711 argLen: 4,
3712 symEffect: SymWrite,
3713 asm: x86.AMOVSD,
3714 reg: regInfo{
3715 inputs: []inputInfo{
3716 {1, 255},
3717 {2, 65280},
3718 {0, 65791},
3719 },
3720 },
3721 },
3722 {
3723 name: "MOVSDstoreidx8",
3724 auxType: auxSymOff,
3725 argLen: 4,
3726 symEffect: SymWrite,
3727 asm: x86.AMOVSD,
3728 reg: regInfo{
3729 inputs: []inputInfo{
3730 {1, 255},
3731 {2, 65280},
3732 {0, 65791},
3733 },
3734 },
3735 },
3736 {
3737 name: "ADDSSload",
3738 auxType: auxSymOff,
3739 argLen: 3,
3740 resultInArg0: true,
3741 faultOnNilArg1: true,
3742 symEffect: SymRead,
3743 asm: x86.AADDSS,
3744 reg: regInfo{
3745 inputs: []inputInfo{
3746 {0, 65280},
3747 {1, 65791},
3748 },
3749 outputs: []outputInfo{
3750 {0, 65280},
3751 },
3752 },
3753 },
3754 {
3755 name: "ADDSDload",
3756 auxType: auxSymOff,
3757 argLen: 3,
3758 resultInArg0: true,
3759 faultOnNilArg1: true,
3760 symEffect: SymRead,
3761 asm: x86.AADDSD,
3762 reg: regInfo{
3763 inputs: []inputInfo{
3764 {0, 65280},
3765 {1, 65791},
3766 },
3767 outputs: []outputInfo{
3768 {0, 65280},
3769 },
3770 },
3771 },
3772 {
3773 name: "SUBSSload",
3774 auxType: auxSymOff,
3775 argLen: 3,
3776 resultInArg0: true,
3777 faultOnNilArg1: true,
3778 symEffect: SymRead,
3779 asm: x86.ASUBSS,
3780 reg: regInfo{
3781 inputs: []inputInfo{
3782 {0, 65280},
3783 {1, 65791},
3784 },
3785 outputs: []outputInfo{
3786 {0, 65280},
3787 },
3788 },
3789 },
3790 {
3791 name: "SUBSDload",
3792 auxType: auxSymOff,
3793 argLen: 3,
3794 resultInArg0: true,
3795 faultOnNilArg1: true,
3796 symEffect: SymRead,
3797 asm: x86.ASUBSD,
3798 reg: regInfo{
3799 inputs: []inputInfo{
3800 {0, 65280},
3801 {1, 65791},
3802 },
3803 outputs: []outputInfo{
3804 {0, 65280},
3805 },
3806 },
3807 },
3808 {
3809 name: "MULSSload",
3810 auxType: auxSymOff,
3811 argLen: 3,
3812 resultInArg0: true,
3813 faultOnNilArg1: true,
3814 symEffect: SymRead,
3815 asm: x86.AMULSS,
3816 reg: regInfo{
3817 inputs: []inputInfo{
3818 {0, 65280},
3819 {1, 65791},
3820 },
3821 outputs: []outputInfo{
3822 {0, 65280},
3823 },
3824 },
3825 },
3826 {
3827 name: "MULSDload",
3828 auxType: auxSymOff,
3829 argLen: 3,
3830 resultInArg0: true,
3831 faultOnNilArg1: true,
3832 symEffect: SymRead,
3833 asm: x86.AMULSD,
3834 reg: regInfo{
3835 inputs: []inputInfo{
3836 {0, 65280},
3837 {1, 65791},
3838 },
3839 outputs: []outputInfo{
3840 {0, 65280},
3841 },
3842 },
3843 },
3844 {
3845 name: "DIVSSload",
3846 auxType: auxSymOff,
3847 argLen: 3,
3848 resultInArg0: true,
3849 faultOnNilArg1: true,
3850 symEffect: SymRead,
3851 asm: x86.ADIVSS,
3852 reg: regInfo{
3853 inputs: []inputInfo{
3854 {0, 65280},
3855 {1, 65791},
3856 },
3857 outputs: []outputInfo{
3858 {0, 65280},
3859 },
3860 },
3861 },
3862 {
3863 name: "DIVSDload",
3864 auxType: auxSymOff,
3865 argLen: 3,
3866 resultInArg0: true,
3867 faultOnNilArg1: true,
3868 symEffect: SymRead,
3869 asm: x86.ADIVSD,
3870 reg: regInfo{
3871 inputs: []inputInfo{
3872 {0, 65280},
3873 {1, 65791},
3874 },
3875 outputs: []outputInfo{
3876 {0, 65280},
3877 },
3878 },
3879 },
3880 {
3881 name: "ADDL",
3882 argLen: 2,
3883 commutative: true,
3884 clobberFlags: true,
3885 asm: x86.AADDL,
3886 reg: regInfo{
3887 inputs: []inputInfo{
3888 {1, 239},
3889 {0, 255},
3890 },
3891 outputs: []outputInfo{
3892 {0, 239},
3893 },
3894 },
3895 },
3896 {
3897 name: "ADDLconst",
3898 auxType: auxInt32,
3899 argLen: 1,
3900 clobberFlags: true,
3901 asm: x86.AADDL,
3902 reg: regInfo{
3903 inputs: []inputInfo{
3904 {0, 255},
3905 },
3906 outputs: []outputInfo{
3907 {0, 239},
3908 },
3909 },
3910 },
3911 {
3912 name: "ADDLcarry",
3913 argLen: 2,
3914 commutative: true,
3915 resultInArg0: true,
3916 asm: x86.AADDL,
3917 reg: regInfo{
3918 inputs: []inputInfo{
3919 {0, 239},
3920 {1, 239},
3921 },
3922 outputs: []outputInfo{
3923 {1, 0},
3924 {0, 239},
3925 },
3926 },
3927 },
3928 {
3929 name: "ADDLconstcarry",
3930 auxType: auxInt32,
3931 argLen: 1,
3932 resultInArg0: true,
3933 asm: x86.AADDL,
3934 reg: regInfo{
3935 inputs: []inputInfo{
3936 {0, 239},
3937 },
3938 outputs: []outputInfo{
3939 {1, 0},
3940 {0, 239},
3941 },
3942 },
3943 },
3944 {
3945 name: "ADCL",
3946 argLen: 3,
3947 commutative: true,
3948 resultInArg0: true,
3949 clobberFlags: true,
3950 asm: x86.AADCL,
3951 reg: regInfo{
3952 inputs: []inputInfo{
3953 {0, 239},
3954 {1, 239},
3955 },
3956 outputs: []outputInfo{
3957 {0, 239},
3958 },
3959 },
3960 },
3961 {
3962 name: "ADCLconst",
3963 auxType: auxInt32,
3964 argLen: 2,
3965 resultInArg0: true,
3966 clobberFlags: true,
3967 asm: x86.AADCL,
3968 reg: regInfo{
3969 inputs: []inputInfo{
3970 {0, 239},
3971 },
3972 outputs: []outputInfo{
3973 {0, 239},
3974 },
3975 },
3976 },
3977 {
3978 name: "SUBL",
3979 argLen: 2,
3980 resultInArg0: true,
3981 clobberFlags: true,
3982 asm: x86.ASUBL,
3983 reg: regInfo{
3984 inputs: []inputInfo{
3985 {0, 239},
3986 {1, 239},
3987 },
3988 outputs: []outputInfo{
3989 {0, 239},
3990 },
3991 },
3992 },
3993 {
3994 name: "SUBLconst",
3995 auxType: auxInt32,
3996 argLen: 1,
3997 resultInArg0: true,
3998 clobberFlags: true,
3999 asm: x86.ASUBL,
4000 reg: regInfo{
4001 inputs: []inputInfo{
4002 {0, 239},
4003 },
4004 outputs: []outputInfo{
4005 {0, 239},
4006 },
4007 },
4008 },
4009 {
4010 name: "SUBLcarry",
4011 argLen: 2,
4012 resultInArg0: true,
4013 asm: x86.ASUBL,
4014 reg: regInfo{
4015 inputs: []inputInfo{
4016 {0, 239},
4017 {1, 239},
4018 },
4019 outputs: []outputInfo{
4020 {1, 0},
4021 {0, 239},
4022 },
4023 },
4024 },
4025 {
4026 name: "SUBLconstcarry",
4027 auxType: auxInt32,
4028 argLen: 1,
4029 resultInArg0: true,
4030 asm: x86.ASUBL,
4031 reg: regInfo{
4032 inputs: []inputInfo{
4033 {0, 239},
4034 },
4035 outputs: []outputInfo{
4036 {1, 0},
4037 {0, 239},
4038 },
4039 },
4040 },
4041 {
4042 name: "SBBL",
4043 argLen: 3,
4044 resultInArg0: true,
4045 clobberFlags: true,
4046 asm: x86.ASBBL,
4047 reg: regInfo{
4048 inputs: []inputInfo{
4049 {0, 239},
4050 {1, 239},
4051 },
4052 outputs: []outputInfo{
4053 {0, 239},
4054 },
4055 },
4056 },
4057 {
4058 name: "SBBLconst",
4059 auxType: auxInt32,
4060 argLen: 2,
4061 resultInArg0: true,
4062 clobberFlags: true,
4063 asm: x86.ASBBL,
4064 reg: regInfo{
4065 inputs: []inputInfo{
4066 {0, 239},
4067 },
4068 outputs: []outputInfo{
4069 {0, 239},
4070 },
4071 },
4072 },
4073 {
4074 name: "MULL",
4075 argLen: 2,
4076 commutative: true,
4077 resultInArg0: true,
4078 clobberFlags: true,
4079 asm: x86.AIMULL,
4080 reg: regInfo{
4081 inputs: []inputInfo{
4082 {0, 239},
4083 {1, 239},
4084 },
4085 outputs: []outputInfo{
4086 {0, 239},
4087 },
4088 },
4089 },
4090 {
4091 name: "MULLconst",
4092 auxType: auxInt32,
4093 argLen: 1,
4094 clobberFlags: true,
4095 asm: x86.AIMUL3L,
4096 reg: regInfo{
4097 inputs: []inputInfo{
4098 {0, 239},
4099 },
4100 outputs: []outputInfo{
4101 {0, 239},
4102 },
4103 },
4104 },
4105 {
4106 name: "MULLU",
4107 argLen: 2,
4108 commutative: true,
4109 clobberFlags: true,
4110 asm: x86.AMULL,
4111 reg: regInfo{
4112 inputs: []inputInfo{
4113 {0, 1},
4114 {1, 255},
4115 },
4116 clobbers: 4,
4117 outputs: []outputInfo{
4118 {1, 0},
4119 {0, 1},
4120 },
4121 },
4122 },
4123 {
4124 name: "HMULL",
4125 argLen: 2,
4126 commutative: true,
4127 clobberFlags: true,
4128 asm: x86.AIMULL,
4129 reg: regInfo{
4130 inputs: []inputInfo{
4131 {0, 1},
4132 {1, 255},
4133 },
4134 clobbers: 1,
4135 outputs: []outputInfo{
4136 {0, 4},
4137 },
4138 },
4139 },
4140 {
4141 name: "HMULLU",
4142 argLen: 2,
4143 commutative: true,
4144 clobberFlags: true,
4145 asm: x86.AMULL,
4146 reg: regInfo{
4147 inputs: []inputInfo{
4148 {0, 1},
4149 {1, 255},
4150 },
4151 clobbers: 1,
4152 outputs: []outputInfo{
4153 {0, 4},
4154 },
4155 },
4156 },
4157 {
4158 name: "MULLQU",
4159 argLen: 2,
4160 commutative: true,
4161 clobberFlags: true,
4162 asm: x86.AMULL,
4163 reg: regInfo{
4164 inputs: []inputInfo{
4165 {0, 1},
4166 {1, 255},
4167 },
4168 outputs: []outputInfo{
4169 {0, 4},
4170 {1, 1},
4171 },
4172 },
4173 },
4174 {
4175 name: "AVGLU",
4176 argLen: 2,
4177 commutative: true,
4178 resultInArg0: true,
4179 clobberFlags: true,
4180 reg: regInfo{
4181 inputs: []inputInfo{
4182 {0, 239},
4183 {1, 239},
4184 },
4185 outputs: []outputInfo{
4186 {0, 239},
4187 },
4188 },
4189 },
4190 {
4191 name: "DIVL",
4192 auxType: auxBool,
4193 argLen: 2,
4194 clobberFlags: true,
4195 asm: x86.AIDIVL,
4196 reg: regInfo{
4197 inputs: []inputInfo{
4198 {0, 1},
4199 {1, 251},
4200 },
4201 clobbers: 4,
4202 outputs: []outputInfo{
4203 {0, 1},
4204 },
4205 },
4206 },
4207 {
4208 name: "DIVW",
4209 auxType: auxBool,
4210 argLen: 2,
4211 clobberFlags: true,
4212 asm: x86.AIDIVW,
4213 reg: regInfo{
4214 inputs: []inputInfo{
4215 {0, 1},
4216 {1, 251},
4217 },
4218 clobbers: 4,
4219 outputs: []outputInfo{
4220 {0, 1},
4221 },
4222 },
4223 },
4224 {
4225 name: "DIVLU",
4226 argLen: 2,
4227 clobberFlags: true,
4228 asm: x86.ADIVL,
4229 reg: regInfo{
4230 inputs: []inputInfo{
4231 {0, 1},
4232 {1, 251},
4233 },
4234 clobbers: 4,
4235 outputs: []outputInfo{
4236 {0, 1},
4237 },
4238 },
4239 },
4240 {
4241 name: "DIVWU",
4242 argLen: 2,
4243 clobberFlags: true,
4244 asm: x86.ADIVW,
4245 reg: regInfo{
4246 inputs: []inputInfo{
4247 {0, 1},
4248 {1, 251},
4249 },
4250 clobbers: 4,
4251 outputs: []outputInfo{
4252 {0, 1},
4253 },
4254 },
4255 },
4256 {
4257 name: "MODL",
4258 auxType: auxBool,
4259 argLen: 2,
4260 clobberFlags: true,
4261 asm: x86.AIDIVL,
4262 reg: regInfo{
4263 inputs: []inputInfo{
4264 {0, 1},
4265 {1, 251},
4266 },
4267 clobbers: 1,
4268 outputs: []outputInfo{
4269 {0, 4},
4270 },
4271 },
4272 },
4273 {
4274 name: "MODW",
4275 auxType: auxBool,
4276 argLen: 2,
4277 clobberFlags: true,
4278 asm: x86.AIDIVW,
4279 reg: regInfo{
4280 inputs: []inputInfo{
4281 {0, 1},
4282 {1, 251},
4283 },
4284 clobbers: 1,
4285 outputs: []outputInfo{
4286 {0, 4},
4287 },
4288 },
4289 },
4290 {
4291 name: "MODLU",
4292 argLen: 2,
4293 clobberFlags: true,
4294 asm: x86.ADIVL,
4295 reg: regInfo{
4296 inputs: []inputInfo{
4297 {0, 1},
4298 {1, 251},
4299 },
4300 clobbers: 1,
4301 outputs: []outputInfo{
4302 {0, 4},
4303 },
4304 },
4305 },
4306 {
4307 name: "MODWU",
4308 argLen: 2,
4309 clobberFlags: true,
4310 asm: x86.ADIVW,
4311 reg: regInfo{
4312 inputs: []inputInfo{
4313 {0, 1},
4314 {1, 251},
4315 },
4316 clobbers: 1,
4317 outputs: []outputInfo{
4318 {0, 4},
4319 },
4320 },
4321 },
4322 {
4323 name: "ANDL",
4324 argLen: 2,
4325 commutative: true,
4326 resultInArg0: true,
4327 clobberFlags: true,
4328 asm: x86.AANDL,
4329 reg: regInfo{
4330 inputs: []inputInfo{
4331 {0, 239},
4332 {1, 239},
4333 },
4334 outputs: []outputInfo{
4335 {0, 239},
4336 },
4337 },
4338 },
4339 {
4340 name: "ANDLconst",
4341 auxType: auxInt32,
4342 argLen: 1,
4343 resultInArg0: true,
4344 clobberFlags: true,
4345 asm: x86.AANDL,
4346 reg: regInfo{
4347 inputs: []inputInfo{
4348 {0, 239},
4349 },
4350 outputs: []outputInfo{
4351 {0, 239},
4352 },
4353 },
4354 },
4355 {
4356 name: "ORL",
4357 argLen: 2,
4358 commutative: true,
4359 resultInArg0: true,
4360 clobberFlags: true,
4361 asm: x86.AORL,
4362 reg: regInfo{
4363 inputs: []inputInfo{
4364 {0, 239},
4365 {1, 239},
4366 },
4367 outputs: []outputInfo{
4368 {0, 239},
4369 },
4370 },
4371 },
4372 {
4373 name: "ORLconst",
4374 auxType: auxInt32,
4375 argLen: 1,
4376 resultInArg0: true,
4377 clobberFlags: true,
4378 asm: x86.AORL,
4379 reg: regInfo{
4380 inputs: []inputInfo{
4381 {0, 239},
4382 },
4383 outputs: []outputInfo{
4384 {0, 239},
4385 },
4386 },
4387 },
4388 {
4389 name: "XORL",
4390 argLen: 2,
4391 commutative: true,
4392 resultInArg0: true,
4393 clobberFlags: true,
4394 asm: x86.AXORL,
4395 reg: regInfo{
4396 inputs: []inputInfo{
4397 {0, 239},
4398 {1, 239},
4399 },
4400 outputs: []outputInfo{
4401 {0, 239},
4402 },
4403 },
4404 },
4405 {
4406 name: "XORLconst",
4407 auxType: auxInt32,
4408 argLen: 1,
4409 resultInArg0: true,
4410 clobberFlags: true,
4411 asm: x86.AXORL,
4412 reg: regInfo{
4413 inputs: []inputInfo{
4414 {0, 239},
4415 },
4416 outputs: []outputInfo{
4417 {0, 239},
4418 },
4419 },
4420 },
4421 {
4422 name: "CMPL",
4423 argLen: 2,
4424 asm: x86.ACMPL,
4425 reg: regInfo{
4426 inputs: []inputInfo{
4427 {0, 255},
4428 {1, 255},
4429 },
4430 },
4431 },
4432 {
4433 name: "CMPW",
4434 argLen: 2,
4435 asm: x86.ACMPW,
4436 reg: regInfo{
4437 inputs: []inputInfo{
4438 {0, 255},
4439 {1, 255},
4440 },
4441 },
4442 },
4443 {
4444 name: "CMPB",
4445 argLen: 2,
4446 asm: x86.ACMPB,
4447 reg: regInfo{
4448 inputs: []inputInfo{
4449 {0, 255},
4450 {1, 255},
4451 },
4452 },
4453 },
4454 {
4455 name: "CMPLconst",
4456 auxType: auxInt32,
4457 argLen: 1,
4458 asm: x86.ACMPL,
4459 reg: regInfo{
4460 inputs: []inputInfo{
4461 {0, 255},
4462 },
4463 },
4464 },
4465 {
4466 name: "CMPWconst",
4467 auxType: auxInt16,
4468 argLen: 1,
4469 asm: x86.ACMPW,
4470 reg: regInfo{
4471 inputs: []inputInfo{
4472 {0, 255},
4473 },
4474 },
4475 },
4476 {
4477 name: "CMPBconst",
4478 auxType: auxInt8,
4479 argLen: 1,
4480 asm: x86.ACMPB,
4481 reg: regInfo{
4482 inputs: []inputInfo{
4483 {0, 255},
4484 },
4485 },
4486 },
4487 {
4488 name: "CMPLload",
4489 auxType: auxSymOff,
4490 argLen: 3,
4491 faultOnNilArg0: true,
4492 symEffect: SymRead,
4493 asm: x86.ACMPL,
4494 reg: regInfo{
4495 inputs: []inputInfo{
4496 {1, 255},
4497 {0, 65791},
4498 },
4499 },
4500 },
4501 {
4502 name: "CMPWload",
4503 auxType: auxSymOff,
4504 argLen: 3,
4505 faultOnNilArg0: true,
4506 symEffect: SymRead,
4507 asm: x86.ACMPW,
4508 reg: regInfo{
4509 inputs: []inputInfo{
4510 {1, 255},
4511 {0, 65791},
4512 },
4513 },
4514 },
4515 {
4516 name: "CMPBload",
4517 auxType: auxSymOff,
4518 argLen: 3,
4519 faultOnNilArg0: true,
4520 symEffect: SymRead,
4521 asm: x86.ACMPB,
4522 reg: regInfo{
4523 inputs: []inputInfo{
4524 {1, 255},
4525 {0, 65791},
4526 },
4527 },
4528 },
4529 {
4530 name: "CMPLconstload",
4531 auxType: auxSymValAndOff,
4532 argLen: 2,
4533 faultOnNilArg0: true,
4534 symEffect: SymRead,
4535 asm: x86.ACMPL,
4536 reg: regInfo{
4537 inputs: []inputInfo{
4538 {0, 65791},
4539 },
4540 },
4541 },
4542 {
4543 name: "CMPWconstload",
4544 auxType: auxSymValAndOff,
4545 argLen: 2,
4546 faultOnNilArg0: true,
4547 symEffect: SymRead,
4548 asm: x86.ACMPW,
4549 reg: regInfo{
4550 inputs: []inputInfo{
4551 {0, 65791},
4552 },
4553 },
4554 },
4555 {
4556 name: "CMPBconstload",
4557 auxType: auxSymValAndOff,
4558 argLen: 2,
4559 faultOnNilArg0: true,
4560 symEffect: SymRead,
4561 asm: x86.ACMPB,
4562 reg: regInfo{
4563 inputs: []inputInfo{
4564 {0, 65791},
4565 },
4566 },
4567 },
4568 {
4569 name: "UCOMISS",
4570 argLen: 2,
4571 asm: x86.AUCOMISS,
4572 reg: regInfo{
4573 inputs: []inputInfo{
4574 {0, 65280},
4575 {1, 65280},
4576 },
4577 },
4578 },
4579 {
4580 name: "UCOMISD",
4581 argLen: 2,
4582 asm: x86.AUCOMISD,
4583 reg: regInfo{
4584 inputs: []inputInfo{
4585 {0, 65280},
4586 {1, 65280},
4587 },
4588 },
4589 },
4590 {
4591 name: "TESTL",
4592 argLen: 2,
4593 commutative: true,
4594 asm: x86.ATESTL,
4595 reg: regInfo{
4596 inputs: []inputInfo{
4597 {0, 255},
4598 {1, 255},
4599 },
4600 },
4601 },
4602 {
4603 name: "TESTW",
4604 argLen: 2,
4605 commutative: true,
4606 asm: x86.ATESTW,
4607 reg: regInfo{
4608 inputs: []inputInfo{
4609 {0, 255},
4610 {1, 255},
4611 },
4612 },
4613 },
4614 {
4615 name: "TESTB",
4616 argLen: 2,
4617 commutative: true,
4618 asm: x86.ATESTB,
4619 reg: regInfo{
4620 inputs: []inputInfo{
4621 {0, 255},
4622 {1, 255},
4623 },
4624 },
4625 },
4626 {
4627 name: "TESTLconst",
4628 auxType: auxInt32,
4629 argLen: 1,
4630 asm: x86.ATESTL,
4631 reg: regInfo{
4632 inputs: []inputInfo{
4633 {0, 255},
4634 },
4635 },
4636 },
4637 {
4638 name: "TESTWconst",
4639 auxType: auxInt16,
4640 argLen: 1,
4641 asm: x86.ATESTW,
4642 reg: regInfo{
4643 inputs: []inputInfo{
4644 {0, 255},
4645 },
4646 },
4647 },
4648 {
4649 name: "TESTBconst",
4650 auxType: auxInt8,
4651 argLen: 1,
4652 asm: x86.ATESTB,
4653 reg: regInfo{
4654 inputs: []inputInfo{
4655 {0, 255},
4656 },
4657 },
4658 },
4659 {
4660 name: "SHLL",
4661 argLen: 2,
4662 resultInArg0: true,
4663 clobberFlags: true,
4664 asm: x86.ASHLL,
4665 reg: regInfo{
4666 inputs: []inputInfo{
4667 {1, 2},
4668 {0, 239},
4669 },
4670 outputs: []outputInfo{
4671 {0, 239},
4672 },
4673 },
4674 },
4675 {
4676 name: "SHLLconst",
4677 auxType: auxInt32,
4678 argLen: 1,
4679 resultInArg0: true,
4680 clobberFlags: true,
4681 asm: x86.ASHLL,
4682 reg: regInfo{
4683 inputs: []inputInfo{
4684 {0, 239},
4685 },
4686 outputs: []outputInfo{
4687 {0, 239},
4688 },
4689 },
4690 },
4691 {
4692 name: "SHRL",
4693 argLen: 2,
4694 resultInArg0: true,
4695 clobberFlags: true,
4696 asm: x86.ASHRL,
4697 reg: regInfo{
4698 inputs: []inputInfo{
4699 {1, 2},
4700 {0, 239},
4701 },
4702 outputs: []outputInfo{
4703 {0, 239},
4704 },
4705 },
4706 },
4707 {
4708 name: "SHRW",
4709 argLen: 2,
4710 resultInArg0: true,
4711 clobberFlags: true,
4712 asm: x86.ASHRW,
4713 reg: regInfo{
4714 inputs: []inputInfo{
4715 {1, 2},
4716 {0, 239},
4717 },
4718 outputs: []outputInfo{
4719 {0, 239},
4720 },
4721 },
4722 },
4723 {
4724 name: "SHRB",
4725 argLen: 2,
4726 resultInArg0: true,
4727 clobberFlags: true,
4728 asm: x86.ASHRB,
4729 reg: regInfo{
4730 inputs: []inputInfo{
4731 {1, 2},
4732 {0, 239},
4733 },
4734 outputs: []outputInfo{
4735 {0, 239},
4736 },
4737 },
4738 },
4739 {
4740 name: "SHRLconst",
4741 auxType: auxInt32,
4742 argLen: 1,
4743 resultInArg0: true,
4744 clobberFlags: true,
4745 asm: x86.ASHRL,
4746 reg: regInfo{
4747 inputs: []inputInfo{
4748 {0, 239},
4749 },
4750 outputs: []outputInfo{
4751 {0, 239},
4752 },
4753 },
4754 },
4755 {
4756 name: "SHRWconst",
4757 auxType: auxInt16,
4758 argLen: 1,
4759 resultInArg0: true,
4760 clobberFlags: true,
4761 asm: x86.ASHRW,
4762 reg: regInfo{
4763 inputs: []inputInfo{
4764 {0, 239},
4765 },
4766 outputs: []outputInfo{
4767 {0, 239},
4768 },
4769 },
4770 },
4771 {
4772 name: "SHRBconst",
4773 auxType: auxInt8,
4774 argLen: 1,
4775 resultInArg0: true,
4776 clobberFlags: true,
4777 asm: x86.ASHRB,
4778 reg: regInfo{
4779 inputs: []inputInfo{
4780 {0, 239},
4781 },
4782 outputs: []outputInfo{
4783 {0, 239},
4784 },
4785 },
4786 },
4787 {
4788 name: "SARL",
4789 argLen: 2,
4790 resultInArg0: true,
4791 clobberFlags: true,
4792 asm: x86.ASARL,
4793 reg: regInfo{
4794 inputs: []inputInfo{
4795 {1, 2},
4796 {0, 239},
4797 },
4798 outputs: []outputInfo{
4799 {0, 239},
4800 },
4801 },
4802 },
4803 {
4804 name: "SARW",
4805 argLen: 2,
4806 resultInArg0: true,
4807 clobberFlags: true,
4808 asm: x86.ASARW,
4809 reg: regInfo{
4810 inputs: []inputInfo{
4811 {1, 2},
4812 {0, 239},
4813 },
4814 outputs: []outputInfo{
4815 {0, 239},
4816 },
4817 },
4818 },
4819 {
4820 name: "SARB",
4821 argLen: 2,
4822 resultInArg0: true,
4823 clobberFlags: true,
4824 asm: x86.ASARB,
4825 reg: regInfo{
4826 inputs: []inputInfo{
4827 {1, 2},
4828 {0, 239},
4829 },
4830 outputs: []outputInfo{
4831 {0, 239},
4832 },
4833 },
4834 },
4835 {
4836 name: "SARLconst",
4837 auxType: auxInt32,
4838 argLen: 1,
4839 resultInArg0: true,
4840 clobberFlags: true,
4841 asm: x86.ASARL,
4842 reg: regInfo{
4843 inputs: []inputInfo{
4844 {0, 239},
4845 },
4846 outputs: []outputInfo{
4847 {0, 239},
4848 },
4849 },
4850 },
4851 {
4852 name: "SARWconst",
4853 auxType: auxInt16,
4854 argLen: 1,
4855 resultInArg0: true,
4856 clobberFlags: true,
4857 asm: x86.ASARW,
4858 reg: regInfo{
4859 inputs: []inputInfo{
4860 {0, 239},
4861 },
4862 outputs: []outputInfo{
4863 {0, 239},
4864 },
4865 },
4866 },
4867 {
4868 name: "SARBconst",
4869 auxType: auxInt8,
4870 argLen: 1,
4871 resultInArg0: true,
4872 clobberFlags: true,
4873 asm: x86.ASARB,
4874 reg: regInfo{
4875 inputs: []inputInfo{
4876 {0, 239},
4877 },
4878 outputs: []outputInfo{
4879 {0, 239},
4880 },
4881 },
4882 },
4883 {
4884 name: "ROLL",
4885 argLen: 2,
4886 resultInArg0: true,
4887 clobberFlags: true,
4888 asm: x86.AROLL,
4889 reg: regInfo{
4890 inputs: []inputInfo{
4891 {1, 2},
4892 {0, 239},
4893 },
4894 outputs: []outputInfo{
4895 {0, 239},
4896 },
4897 },
4898 },
4899 {
4900 name: "ROLW",
4901 argLen: 2,
4902 resultInArg0: true,
4903 clobberFlags: true,
4904 asm: x86.AROLW,
4905 reg: regInfo{
4906 inputs: []inputInfo{
4907 {1, 2},
4908 {0, 239},
4909 },
4910 outputs: []outputInfo{
4911 {0, 239},
4912 },
4913 },
4914 },
4915 {
4916 name: "ROLB",
4917 argLen: 2,
4918 resultInArg0: true,
4919 clobberFlags: true,
4920 asm: x86.AROLB,
4921 reg: regInfo{
4922 inputs: []inputInfo{
4923 {1, 2},
4924 {0, 239},
4925 },
4926 outputs: []outputInfo{
4927 {0, 239},
4928 },
4929 },
4930 },
4931 {
4932 name: "ROLLconst",
4933 auxType: auxInt32,
4934 argLen: 1,
4935 resultInArg0: true,
4936 clobberFlags: true,
4937 asm: x86.AROLL,
4938 reg: regInfo{
4939 inputs: []inputInfo{
4940 {0, 239},
4941 },
4942 outputs: []outputInfo{
4943 {0, 239},
4944 },
4945 },
4946 },
4947 {
4948 name: "ROLWconst",
4949 auxType: auxInt16,
4950 argLen: 1,
4951 resultInArg0: true,
4952 clobberFlags: true,
4953 asm: x86.AROLW,
4954 reg: regInfo{
4955 inputs: []inputInfo{
4956 {0, 239},
4957 },
4958 outputs: []outputInfo{
4959 {0, 239},
4960 },
4961 },
4962 },
4963 {
4964 name: "ROLBconst",
4965 auxType: auxInt8,
4966 argLen: 1,
4967 resultInArg0: true,
4968 clobberFlags: true,
4969 asm: x86.AROLB,
4970 reg: regInfo{
4971 inputs: []inputInfo{
4972 {0, 239},
4973 },
4974 outputs: []outputInfo{
4975 {0, 239},
4976 },
4977 },
4978 },
4979 {
4980 name: "ADDLload",
4981 auxType: auxSymOff,
4982 argLen: 3,
4983 resultInArg0: true,
4984 clobberFlags: true,
4985 faultOnNilArg1: true,
4986 symEffect: SymRead,
4987 asm: x86.AADDL,
4988 reg: regInfo{
4989 inputs: []inputInfo{
4990 {0, 239},
4991 {1, 65791},
4992 },
4993 outputs: []outputInfo{
4994 {0, 239},
4995 },
4996 },
4997 },
4998 {
4999 name: "SUBLload",
5000 auxType: auxSymOff,
5001 argLen: 3,
5002 resultInArg0: true,
5003 clobberFlags: true,
5004 faultOnNilArg1: true,
5005 symEffect: SymRead,
5006 asm: x86.ASUBL,
5007 reg: regInfo{
5008 inputs: []inputInfo{
5009 {0, 239},
5010 {1, 65791},
5011 },
5012 outputs: []outputInfo{
5013 {0, 239},
5014 },
5015 },
5016 },
5017 {
5018 name: "MULLload",
5019 auxType: auxSymOff,
5020 argLen: 3,
5021 resultInArg0: true,
5022 clobberFlags: true,
5023 faultOnNilArg1: true,
5024 symEffect: SymRead,
5025 asm: x86.AIMULL,
5026 reg: regInfo{
5027 inputs: []inputInfo{
5028 {0, 239},
5029 {1, 65791},
5030 },
5031 outputs: []outputInfo{
5032 {0, 239},
5033 },
5034 },
5035 },
5036 {
5037 name: "ANDLload",
5038 auxType: auxSymOff,
5039 argLen: 3,
5040 resultInArg0: true,
5041 clobberFlags: true,
5042 faultOnNilArg1: true,
5043 symEffect: SymRead,
5044 asm: x86.AANDL,
5045 reg: regInfo{
5046 inputs: []inputInfo{
5047 {0, 239},
5048 {1, 65791},
5049 },
5050 outputs: []outputInfo{
5051 {0, 239},
5052 },
5053 },
5054 },
5055 {
5056 name: "ORLload",
5057 auxType: auxSymOff,
5058 argLen: 3,
5059 resultInArg0: true,
5060 clobberFlags: true,
5061 faultOnNilArg1: true,
5062 symEffect: SymRead,
5063 asm: x86.AORL,
5064 reg: regInfo{
5065 inputs: []inputInfo{
5066 {0, 239},
5067 {1, 65791},
5068 },
5069 outputs: []outputInfo{
5070 {0, 239},
5071 },
5072 },
5073 },
5074 {
5075 name: "XORLload",
5076 auxType: auxSymOff,
5077 argLen: 3,
5078 resultInArg0: true,
5079 clobberFlags: true,
5080 faultOnNilArg1: true,
5081 symEffect: SymRead,
5082 asm: x86.AXORL,
5083 reg: regInfo{
5084 inputs: []inputInfo{
5085 {0, 239},
5086 {1, 65791},
5087 },
5088 outputs: []outputInfo{
5089 {0, 239},
5090 },
5091 },
5092 },
5093 {
5094 name: "ADDLloadidx4",
5095 auxType: auxSymOff,
5096 argLen: 4,
5097 resultInArg0: true,
5098 clobberFlags: true,
5099 symEffect: SymRead,
5100 asm: x86.AADDL,
5101 reg: regInfo{
5102 inputs: []inputInfo{
5103 {0, 239},
5104 {2, 255},
5105 {1, 65791},
5106 },
5107 outputs: []outputInfo{
5108 {0, 239},
5109 },
5110 },
5111 },
5112 {
5113 name: "SUBLloadidx4",
5114 auxType: auxSymOff,
5115 argLen: 4,
5116 resultInArg0: true,
5117 clobberFlags: true,
5118 symEffect: SymRead,
5119 asm: x86.ASUBL,
5120 reg: regInfo{
5121 inputs: []inputInfo{
5122 {0, 239},
5123 {2, 255},
5124 {1, 65791},
5125 },
5126 outputs: []outputInfo{
5127 {0, 239},
5128 },
5129 },
5130 },
5131 {
5132 name: "MULLloadidx4",
5133 auxType: auxSymOff,
5134 argLen: 4,
5135 resultInArg0: true,
5136 clobberFlags: true,
5137 symEffect: SymRead,
5138 asm: x86.AIMULL,
5139 reg: regInfo{
5140 inputs: []inputInfo{
5141 {0, 239},
5142 {2, 255},
5143 {1, 65791},
5144 },
5145 outputs: []outputInfo{
5146 {0, 239},
5147 },
5148 },
5149 },
5150 {
5151 name: "ANDLloadidx4",
5152 auxType: auxSymOff,
5153 argLen: 4,
5154 resultInArg0: true,
5155 clobberFlags: true,
5156 symEffect: SymRead,
5157 asm: x86.AANDL,
5158 reg: regInfo{
5159 inputs: []inputInfo{
5160 {0, 239},
5161 {2, 255},
5162 {1, 65791},
5163 },
5164 outputs: []outputInfo{
5165 {0, 239},
5166 },
5167 },
5168 },
5169 {
5170 name: "ORLloadidx4",
5171 auxType: auxSymOff,
5172 argLen: 4,
5173 resultInArg0: true,
5174 clobberFlags: true,
5175 symEffect: SymRead,
5176 asm: x86.AORL,
5177 reg: regInfo{
5178 inputs: []inputInfo{
5179 {0, 239},
5180 {2, 255},
5181 {1, 65791},
5182 },
5183 outputs: []outputInfo{
5184 {0, 239},
5185 },
5186 },
5187 },
5188 {
5189 name: "XORLloadidx4",
5190 auxType: auxSymOff,
5191 argLen: 4,
5192 resultInArg0: true,
5193 clobberFlags: true,
5194 symEffect: SymRead,
5195 asm: x86.AXORL,
5196 reg: regInfo{
5197 inputs: []inputInfo{
5198 {0, 239},
5199 {2, 255},
5200 {1, 65791},
5201 },
5202 outputs: []outputInfo{
5203 {0, 239},
5204 },
5205 },
5206 },
5207 {
5208 name: "NEGL",
5209 argLen: 1,
5210 resultInArg0: true,
5211 clobberFlags: true,
5212 asm: x86.ANEGL,
5213 reg: regInfo{
5214 inputs: []inputInfo{
5215 {0, 239},
5216 },
5217 outputs: []outputInfo{
5218 {0, 239},
5219 },
5220 },
5221 },
5222 {
5223 name: "NOTL",
5224 argLen: 1,
5225 resultInArg0: true,
5226 asm: x86.ANOTL,
5227 reg: regInfo{
5228 inputs: []inputInfo{
5229 {0, 239},
5230 },
5231 outputs: []outputInfo{
5232 {0, 239},
5233 },
5234 },
5235 },
5236 {
5237 name: "BSFL",
5238 argLen: 1,
5239 clobberFlags: true,
5240 asm: x86.ABSFL,
5241 reg: regInfo{
5242 inputs: []inputInfo{
5243 {0, 239},
5244 },
5245 outputs: []outputInfo{
5246 {0, 239},
5247 },
5248 },
5249 },
5250 {
5251 name: "BSFW",
5252 argLen: 1,
5253 clobberFlags: true,
5254 asm: x86.ABSFW,
5255 reg: regInfo{
5256 inputs: []inputInfo{
5257 {0, 239},
5258 },
5259 outputs: []outputInfo{
5260 {0, 239},
5261 },
5262 },
5263 },
5264 {
5265 name: "LoweredCtz32",
5266 argLen: 1,
5267 clobberFlags: true,
5268 reg: regInfo{
5269 inputs: []inputInfo{
5270 {0, 239},
5271 },
5272 outputs: []outputInfo{
5273 {0, 239},
5274 },
5275 },
5276 },
5277 {
5278 name: "LoweredCtz64",
5279 argLen: 2,
5280 resultNotInArgs: true,
5281 clobberFlags: true,
5282 reg: regInfo{
5283 inputs: []inputInfo{
5284 {0, 239},
5285 {1, 239},
5286 },
5287 outputs: []outputInfo{
5288 {0, 239},
5289 },
5290 },
5291 },
5292 {
5293 name: "BSRL",
5294 argLen: 1,
5295 clobberFlags: true,
5296 asm: x86.ABSRL,
5297 reg: regInfo{
5298 inputs: []inputInfo{
5299 {0, 239},
5300 },
5301 outputs: []outputInfo{
5302 {0, 239},
5303 },
5304 },
5305 },
5306 {
5307 name: "BSRW",
5308 argLen: 1,
5309 clobberFlags: true,
5310 asm: x86.ABSRW,
5311 reg: regInfo{
5312 inputs: []inputInfo{
5313 {0, 239},
5314 },
5315 outputs: []outputInfo{
5316 {0, 239},
5317 },
5318 },
5319 },
5320 {
5321 name: "BSWAPL",
5322 argLen: 1,
5323 resultInArg0: true,
5324 asm: x86.ABSWAPL,
5325 reg: regInfo{
5326 inputs: []inputInfo{
5327 {0, 239},
5328 },
5329 outputs: []outputInfo{
5330 {0, 239},
5331 },
5332 },
5333 },
5334 {
5335 name: "SQRTSD",
5336 argLen: 1,
5337 asm: x86.ASQRTSD,
5338 reg: regInfo{
5339 inputs: []inputInfo{
5340 {0, 65280},
5341 },
5342 outputs: []outputInfo{
5343 {0, 65280},
5344 },
5345 },
5346 },
5347 {
5348 name: "SQRTSS",
5349 argLen: 1,
5350 asm: x86.ASQRTSS,
5351 reg: regInfo{
5352 inputs: []inputInfo{
5353 {0, 65280},
5354 },
5355 outputs: []outputInfo{
5356 {0, 65280},
5357 },
5358 },
5359 },
5360 {
5361 name: "SBBLcarrymask",
5362 argLen: 1,
5363 asm: x86.ASBBL,
5364 reg: regInfo{
5365 outputs: []outputInfo{
5366 {0, 239},
5367 },
5368 },
5369 },
5370 {
5371 name: "SETEQ",
5372 argLen: 1,
5373 asm: x86.ASETEQ,
5374 reg: regInfo{
5375 outputs: []outputInfo{
5376 {0, 239},
5377 },
5378 },
5379 },
5380 {
5381 name: "SETNE",
5382 argLen: 1,
5383 asm: x86.ASETNE,
5384 reg: regInfo{
5385 outputs: []outputInfo{
5386 {0, 239},
5387 },
5388 },
5389 },
5390 {
5391 name: "SETL",
5392 argLen: 1,
5393 asm: x86.ASETLT,
5394 reg: regInfo{
5395 outputs: []outputInfo{
5396 {0, 239},
5397 },
5398 },
5399 },
5400 {
5401 name: "SETLE",
5402 argLen: 1,
5403 asm: x86.ASETLE,
5404 reg: regInfo{
5405 outputs: []outputInfo{
5406 {0, 239},
5407 },
5408 },
5409 },
5410 {
5411 name: "SETG",
5412 argLen: 1,
5413 asm: x86.ASETGT,
5414 reg: regInfo{
5415 outputs: []outputInfo{
5416 {0, 239},
5417 },
5418 },
5419 },
5420 {
5421 name: "SETGE",
5422 argLen: 1,
5423 asm: x86.ASETGE,
5424 reg: regInfo{
5425 outputs: []outputInfo{
5426 {0, 239},
5427 },
5428 },
5429 },
5430 {
5431 name: "SETB",
5432 argLen: 1,
5433 asm: x86.ASETCS,
5434 reg: regInfo{
5435 outputs: []outputInfo{
5436 {0, 239},
5437 },
5438 },
5439 },
5440 {
5441 name: "SETBE",
5442 argLen: 1,
5443 asm: x86.ASETLS,
5444 reg: regInfo{
5445 outputs: []outputInfo{
5446 {0, 239},
5447 },
5448 },
5449 },
5450 {
5451 name: "SETA",
5452 argLen: 1,
5453 asm: x86.ASETHI,
5454 reg: regInfo{
5455 outputs: []outputInfo{
5456 {0, 239},
5457 },
5458 },
5459 },
5460 {
5461 name: "SETAE",
5462 argLen: 1,
5463 asm: x86.ASETCC,
5464 reg: regInfo{
5465 outputs: []outputInfo{
5466 {0, 239},
5467 },
5468 },
5469 },
5470 {
5471 name: "SETO",
5472 argLen: 1,
5473 asm: x86.ASETOS,
5474 reg: regInfo{
5475 outputs: []outputInfo{
5476 {0, 239},
5477 },
5478 },
5479 },
5480 {
5481 name: "SETEQF",
5482 argLen: 1,
5483 clobberFlags: true,
5484 asm: x86.ASETEQ,
5485 reg: regInfo{
5486 clobbers: 1,
5487 outputs: []outputInfo{
5488 {0, 238},
5489 },
5490 },
5491 },
5492 {
5493 name: "SETNEF",
5494 argLen: 1,
5495 clobberFlags: true,
5496 asm: x86.ASETNE,
5497 reg: regInfo{
5498 clobbers: 1,
5499 outputs: []outputInfo{
5500 {0, 238},
5501 },
5502 },
5503 },
5504 {
5505 name: "SETORD",
5506 argLen: 1,
5507 asm: x86.ASETPC,
5508 reg: regInfo{
5509 outputs: []outputInfo{
5510 {0, 239},
5511 },
5512 },
5513 },
5514 {
5515 name: "SETNAN",
5516 argLen: 1,
5517 asm: x86.ASETPS,
5518 reg: regInfo{
5519 outputs: []outputInfo{
5520 {0, 239},
5521 },
5522 },
5523 },
5524 {
5525 name: "SETGF",
5526 argLen: 1,
5527 asm: x86.ASETHI,
5528 reg: regInfo{
5529 outputs: []outputInfo{
5530 {0, 239},
5531 },
5532 },
5533 },
5534 {
5535 name: "SETGEF",
5536 argLen: 1,
5537 asm: x86.ASETCC,
5538 reg: regInfo{
5539 outputs: []outputInfo{
5540 {0, 239},
5541 },
5542 },
5543 },
5544 {
5545 name: "MOVBLSX",
5546 argLen: 1,
5547 asm: x86.AMOVBLSX,
5548 reg: regInfo{
5549 inputs: []inputInfo{
5550 {0, 239},
5551 },
5552 outputs: []outputInfo{
5553 {0, 239},
5554 },
5555 },
5556 },
5557 {
5558 name: "MOVBLZX",
5559 argLen: 1,
5560 asm: x86.AMOVBLZX,
5561 reg: regInfo{
5562 inputs: []inputInfo{
5563 {0, 239},
5564 },
5565 outputs: []outputInfo{
5566 {0, 239},
5567 },
5568 },
5569 },
5570 {
5571 name: "MOVWLSX",
5572 argLen: 1,
5573 asm: x86.AMOVWLSX,
5574 reg: regInfo{
5575 inputs: []inputInfo{
5576 {0, 239},
5577 },
5578 outputs: []outputInfo{
5579 {0, 239},
5580 },
5581 },
5582 },
5583 {
5584 name: "MOVWLZX",
5585 argLen: 1,
5586 asm: x86.AMOVWLZX,
5587 reg: regInfo{
5588 inputs: []inputInfo{
5589 {0, 239},
5590 },
5591 outputs: []outputInfo{
5592 {0, 239},
5593 },
5594 },
5595 },
5596 {
5597 name: "MOVLconst",
5598 auxType: auxInt32,
5599 argLen: 0,
5600 rematerializeable: true,
5601 asm: x86.AMOVL,
5602 reg: regInfo{
5603 outputs: []outputInfo{
5604 {0, 239},
5605 },
5606 },
5607 },
5608 {
5609 name: "CVTTSD2SL",
5610 argLen: 1,
5611 asm: x86.ACVTTSD2SL,
5612 reg: regInfo{
5613 inputs: []inputInfo{
5614 {0, 65280},
5615 },
5616 outputs: []outputInfo{
5617 {0, 239},
5618 },
5619 },
5620 },
5621 {
5622 name: "CVTTSS2SL",
5623 argLen: 1,
5624 asm: x86.ACVTTSS2SL,
5625 reg: regInfo{
5626 inputs: []inputInfo{
5627 {0, 65280},
5628 },
5629 outputs: []outputInfo{
5630 {0, 239},
5631 },
5632 },
5633 },
5634 {
5635 name: "CVTSL2SS",
5636 argLen: 1,
5637 asm: x86.ACVTSL2SS,
5638 reg: regInfo{
5639 inputs: []inputInfo{
5640 {0, 239},
5641 },
5642 outputs: []outputInfo{
5643 {0, 65280},
5644 },
5645 },
5646 },
5647 {
5648 name: "CVTSL2SD",
5649 argLen: 1,
5650 asm: x86.ACVTSL2SD,
5651 reg: regInfo{
5652 inputs: []inputInfo{
5653 {0, 239},
5654 },
5655 outputs: []outputInfo{
5656 {0, 65280},
5657 },
5658 },
5659 },
5660 {
5661 name: "CVTSD2SS",
5662 argLen: 1,
5663 asm: x86.ACVTSD2SS,
5664 reg: regInfo{
5665 inputs: []inputInfo{
5666 {0, 65280},
5667 },
5668 outputs: []outputInfo{
5669 {0, 65280},
5670 },
5671 },
5672 },
5673 {
5674 name: "CVTSS2SD",
5675 argLen: 1,
5676 asm: x86.ACVTSS2SD,
5677 reg: regInfo{
5678 inputs: []inputInfo{
5679 {0, 65280},
5680 },
5681 outputs: []outputInfo{
5682 {0, 65280},
5683 },
5684 },
5685 },
5686 {
5687 name: "PXOR",
5688 argLen: 2,
5689 commutative: true,
5690 resultInArg0: true,
5691 asm: x86.APXOR,
5692 reg: regInfo{
5693 inputs: []inputInfo{
5694 {0, 65280},
5695 {1, 65280},
5696 },
5697 outputs: []outputInfo{
5698 {0, 65280},
5699 },
5700 },
5701 },
5702 {
5703 name: "LEAL",
5704 auxType: auxSymOff,
5705 argLen: 1,
5706 rematerializeable: true,
5707 symEffect: SymAddr,
5708 reg: regInfo{
5709 inputs: []inputInfo{
5710 {0, 65791},
5711 },
5712 outputs: []outputInfo{
5713 {0, 239},
5714 },
5715 },
5716 },
5717 {
5718 name: "LEAL1",
5719 auxType: auxSymOff,
5720 argLen: 2,
5721 commutative: true,
5722 symEffect: SymAddr,
5723 reg: regInfo{
5724 inputs: []inputInfo{
5725 {1, 255},
5726 {0, 65791},
5727 },
5728 outputs: []outputInfo{
5729 {0, 239},
5730 },
5731 },
5732 },
5733 {
5734 name: "LEAL2",
5735 auxType: auxSymOff,
5736 argLen: 2,
5737 symEffect: SymAddr,
5738 reg: regInfo{
5739 inputs: []inputInfo{
5740 {1, 255},
5741 {0, 65791},
5742 },
5743 outputs: []outputInfo{
5744 {0, 239},
5745 },
5746 },
5747 },
5748 {
5749 name: "LEAL4",
5750 auxType: auxSymOff,
5751 argLen: 2,
5752 symEffect: SymAddr,
5753 reg: regInfo{
5754 inputs: []inputInfo{
5755 {1, 255},
5756 {0, 65791},
5757 },
5758 outputs: []outputInfo{
5759 {0, 239},
5760 },
5761 },
5762 },
5763 {
5764 name: "LEAL8",
5765 auxType: auxSymOff,
5766 argLen: 2,
5767 symEffect: SymAddr,
5768 reg: regInfo{
5769 inputs: []inputInfo{
5770 {1, 255},
5771 {0, 65791},
5772 },
5773 outputs: []outputInfo{
5774 {0, 239},
5775 },
5776 },
5777 },
5778 {
5779 name: "MOVBload",
5780 auxType: auxSymOff,
5781 argLen: 2,
5782 faultOnNilArg0: true,
5783 symEffect: SymRead,
5784 asm: x86.AMOVBLZX,
5785 reg: regInfo{
5786 inputs: []inputInfo{
5787 {0, 65791},
5788 },
5789 outputs: []outputInfo{
5790 {0, 239},
5791 },
5792 },
5793 },
5794 {
5795 name: "MOVBLSXload",
5796 auxType: auxSymOff,
5797 argLen: 2,
5798 faultOnNilArg0: true,
5799 symEffect: SymRead,
5800 asm: x86.AMOVBLSX,
5801 reg: regInfo{
5802 inputs: []inputInfo{
5803 {0, 65791},
5804 },
5805 outputs: []outputInfo{
5806 {0, 239},
5807 },
5808 },
5809 },
5810 {
5811 name: "MOVWload",
5812 auxType: auxSymOff,
5813 argLen: 2,
5814 faultOnNilArg0: true,
5815 symEffect: SymRead,
5816 asm: x86.AMOVWLZX,
5817 reg: regInfo{
5818 inputs: []inputInfo{
5819 {0, 65791},
5820 },
5821 outputs: []outputInfo{
5822 {0, 239},
5823 },
5824 },
5825 },
5826 {
5827 name: "MOVWLSXload",
5828 auxType: auxSymOff,
5829 argLen: 2,
5830 faultOnNilArg0: true,
5831 symEffect: SymRead,
5832 asm: x86.AMOVWLSX,
5833 reg: regInfo{
5834 inputs: []inputInfo{
5835 {0, 65791},
5836 },
5837 outputs: []outputInfo{
5838 {0, 239},
5839 },
5840 },
5841 },
5842 {
5843 name: "MOVLload",
5844 auxType: auxSymOff,
5845 argLen: 2,
5846 faultOnNilArg0: true,
5847 symEffect: SymRead,
5848 asm: x86.AMOVL,
5849 reg: regInfo{
5850 inputs: []inputInfo{
5851 {0, 65791},
5852 },
5853 outputs: []outputInfo{
5854 {0, 239},
5855 },
5856 },
5857 },
5858 {
5859 name: "MOVBstore",
5860 auxType: auxSymOff,
5861 argLen: 3,
5862 faultOnNilArg0: true,
5863 symEffect: SymWrite,
5864 asm: x86.AMOVB,
5865 reg: regInfo{
5866 inputs: []inputInfo{
5867 {1, 255},
5868 {0, 65791},
5869 },
5870 },
5871 },
5872 {
5873 name: "MOVWstore",
5874 auxType: auxSymOff,
5875 argLen: 3,
5876 faultOnNilArg0: true,
5877 symEffect: SymWrite,
5878 asm: x86.AMOVW,
5879 reg: regInfo{
5880 inputs: []inputInfo{
5881 {1, 255},
5882 {0, 65791},
5883 },
5884 },
5885 },
5886 {
5887 name: "MOVLstore",
5888 auxType: auxSymOff,
5889 argLen: 3,
5890 faultOnNilArg0: true,
5891 symEffect: SymWrite,
5892 asm: x86.AMOVL,
5893 reg: regInfo{
5894 inputs: []inputInfo{
5895 {1, 255},
5896 {0, 65791},
5897 },
5898 },
5899 },
5900 {
5901 name: "ADDLmodify",
5902 auxType: auxSymOff,
5903 argLen: 3,
5904 clobberFlags: true,
5905 faultOnNilArg0: true,
5906 symEffect: SymRead | SymWrite,
5907 asm: x86.AADDL,
5908 reg: regInfo{
5909 inputs: []inputInfo{
5910 {1, 255},
5911 {0, 65791},
5912 },
5913 },
5914 },
5915 {
5916 name: "SUBLmodify",
5917 auxType: auxSymOff,
5918 argLen: 3,
5919 clobberFlags: true,
5920 faultOnNilArg0: true,
5921 symEffect: SymRead | SymWrite,
5922 asm: x86.ASUBL,
5923 reg: regInfo{
5924 inputs: []inputInfo{
5925 {1, 255},
5926 {0, 65791},
5927 },
5928 },
5929 },
5930 {
5931 name: "ANDLmodify",
5932 auxType: auxSymOff,
5933 argLen: 3,
5934 clobberFlags: true,
5935 faultOnNilArg0: true,
5936 symEffect: SymRead | SymWrite,
5937 asm: x86.AANDL,
5938 reg: regInfo{
5939 inputs: []inputInfo{
5940 {1, 255},
5941 {0, 65791},
5942 },
5943 },
5944 },
5945 {
5946 name: "ORLmodify",
5947 auxType: auxSymOff,
5948 argLen: 3,
5949 clobberFlags: true,
5950 faultOnNilArg0: true,
5951 symEffect: SymRead | SymWrite,
5952 asm: x86.AORL,
5953 reg: regInfo{
5954 inputs: []inputInfo{
5955 {1, 255},
5956 {0, 65791},
5957 },
5958 },
5959 },
5960 {
5961 name: "XORLmodify",
5962 auxType: auxSymOff,
5963 argLen: 3,
5964 clobberFlags: true,
5965 faultOnNilArg0: true,
5966 symEffect: SymRead | SymWrite,
5967 asm: x86.AXORL,
5968 reg: regInfo{
5969 inputs: []inputInfo{
5970 {1, 255},
5971 {0, 65791},
5972 },
5973 },
5974 },
5975 {
5976 name: "ADDLmodifyidx4",
5977 auxType: auxSymOff,
5978 argLen: 4,
5979 clobberFlags: true,
5980 symEffect: SymRead | SymWrite,
5981 asm: x86.AADDL,
5982 reg: regInfo{
5983 inputs: []inputInfo{
5984 {1, 255},
5985 {2, 255},
5986 {0, 65791},
5987 },
5988 },
5989 },
5990 {
5991 name: "SUBLmodifyidx4",
5992 auxType: auxSymOff,
5993 argLen: 4,
5994 clobberFlags: true,
5995 symEffect: SymRead | SymWrite,
5996 asm: x86.ASUBL,
5997 reg: regInfo{
5998 inputs: []inputInfo{
5999 {1, 255},
6000 {2, 255},
6001 {0, 65791},
6002 },
6003 },
6004 },
6005 {
6006 name: "ANDLmodifyidx4",
6007 auxType: auxSymOff,
6008 argLen: 4,
6009 clobberFlags: true,
6010 symEffect: SymRead | SymWrite,
6011 asm: x86.AANDL,
6012 reg: regInfo{
6013 inputs: []inputInfo{
6014 {1, 255},
6015 {2, 255},
6016 {0, 65791},
6017 },
6018 },
6019 },
6020 {
6021 name: "ORLmodifyidx4",
6022 auxType: auxSymOff,
6023 argLen: 4,
6024 clobberFlags: true,
6025 symEffect: SymRead | SymWrite,
6026 asm: x86.AORL,
6027 reg: regInfo{
6028 inputs: []inputInfo{
6029 {1, 255},
6030 {2, 255},
6031 {0, 65791},
6032 },
6033 },
6034 },
6035 {
6036 name: "XORLmodifyidx4",
6037 auxType: auxSymOff,
6038 argLen: 4,
6039 clobberFlags: true,
6040 symEffect: SymRead | SymWrite,
6041 asm: x86.AXORL,
6042 reg: regInfo{
6043 inputs: []inputInfo{
6044 {1, 255},
6045 {2, 255},
6046 {0, 65791},
6047 },
6048 },
6049 },
6050 {
6051 name: "ADDLconstmodify",
6052 auxType: auxSymValAndOff,
6053 argLen: 2,
6054 clobberFlags: true,
6055 faultOnNilArg0: true,
6056 symEffect: SymRead | SymWrite,
6057 asm: x86.AADDL,
6058 reg: regInfo{
6059 inputs: []inputInfo{
6060 {0, 65791},
6061 },
6062 },
6063 },
6064 {
6065 name: "ANDLconstmodify",
6066 auxType: auxSymValAndOff,
6067 argLen: 2,
6068 clobberFlags: true,
6069 faultOnNilArg0: true,
6070 symEffect: SymRead | SymWrite,
6071 asm: x86.AANDL,
6072 reg: regInfo{
6073 inputs: []inputInfo{
6074 {0, 65791},
6075 },
6076 },
6077 },
6078 {
6079 name: "ORLconstmodify",
6080 auxType: auxSymValAndOff,
6081 argLen: 2,
6082 clobberFlags: true,
6083 faultOnNilArg0: true,
6084 symEffect: SymRead | SymWrite,
6085 asm: x86.AORL,
6086 reg: regInfo{
6087 inputs: []inputInfo{
6088 {0, 65791},
6089 },
6090 },
6091 },
6092 {
6093 name: "XORLconstmodify",
6094 auxType: auxSymValAndOff,
6095 argLen: 2,
6096 clobberFlags: true,
6097 faultOnNilArg0: true,
6098 symEffect: SymRead | SymWrite,
6099 asm: x86.AXORL,
6100 reg: regInfo{
6101 inputs: []inputInfo{
6102 {0, 65791},
6103 },
6104 },
6105 },
6106 {
6107 name: "ADDLconstmodifyidx4",
6108 auxType: auxSymValAndOff,
6109 argLen: 3,
6110 clobberFlags: true,
6111 symEffect: SymRead | SymWrite,
6112 asm: x86.AADDL,
6113 reg: regInfo{
6114 inputs: []inputInfo{
6115 {1, 255},
6116 {0, 65791},
6117 },
6118 },
6119 },
6120 {
6121 name: "ANDLconstmodifyidx4",
6122 auxType: auxSymValAndOff,
6123 argLen: 3,
6124 clobberFlags: true,
6125 symEffect: SymRead | SymWrite,
6126 asm: x86.AANDL,
6127 reg: regInfo{
6128 inputs: []inputInfo{
6129 {1, 255},
6130 {0, 65791},
6131 },
6132 },
6133 },
6134 {
6135 name: "ORLconstmodifyidx4",
6136 auxType: auxSymValAndOff,
6137 argLen: 3,
6138 clobberFlags: true,
6139 symEffect: SymRead | SymWrite,
6140 asm: x86.AORL,
6141 reg: regInfo{
6142 inputs: []inputInfo{
6143 {1, 255},
6144 {0, 65791},
6145 },
6146 },
6147 },
6148 {
6149 name: "XORLconstmodifyidx4",
6150 auxType: auxSymValAndOff,
6151 argLen: 3,
6152 clobberFlags: true,
6153 symEffect: SymRead | SymWrite,
6154 asm: x86.AXORL,
6155 reg: regInfo{
6156 inputs: []inputInfo{
6157 {1, 255},
6158 {0, 65791},
6159 },
6160 },
6161 },
6162 {
6163 name: "MOVBloadidx1",
6164 auxType: auxSymOff,
6165 argLen: 3,
6166 commutative: true,
6167 symEffect: SymRead,
6168 asm: x86.AMOVBLZX,
6169 reg: regInfo{
6170 inputs: []inputInfo{
6171 {1, 255},
6172 {0, 65791},
6173 },
6174 outputs: []outputInfo{
6175 {0, 239},
6176 },
6177 },
6178 },
6179 {
6180 name: "MOVWloadidx1",
6181 auxType: auxSymOff,
6182 argLen: 3,
6183 commutative: true,
6184 symEffect: SymRead,
6185 asm: x86.AMOVWLZX,
6186 reg: regInfo{
6187 inputs: []inputInfo{
6188 {1, 255},
6189 {0, 65791},
6190 },
6191 outputs: []outputInfo{
6192 {0, 239},
6193 },
6194 },
6195 },
6196 {
6197 name: "MOVWloadidx2",
6198 auxType: auxSymOff,
6199 argLen: 3,
6200 symEffect: SymRead,
6201 asm: x86.AMOVWLZX,
6202 reg: regInfo{
6203 inputs: []inputInfo{
6204 {1, 255},
6205 {0, 65791},
6206 },
6207 outputs: []outputInfo{
6208 {0, 239},
6209 },
6210 },
6211 },
6212 {
6213 name: "MOVLloadidx1",
6214 auxType: auxSymOff,
6215 argLen: 3,
6216 commutative: true,
6217 symEffect: SymRead,
6218 asm: x86.AMOVL,
6219 reg: regInfo{
6220 inputs: []inputInfo{
6221 {1, 255},
6222 {0, 65791},
6223 },
6224 outputs: []outputInfo{
6225 {0, 239},
6226 },
6227 },
6228 },
6229 {
6230 name: "MOVLloadidx4",
6231 auxType: auxSymOff,
6232 argLen: 3,
6233 symEffect: SymRead,
6234 asm: x86.AMOVL,
6235 reg: regInfo{
6236 inputs: []inputInfo{
6237 {1, 255},
6238 {0, 65791},
6239 },
6240 outputs: []outputInfo{
6241 {0, 239},
6242 },
6243 },
6244 },
6245 {
6246 name: "MOVBstoreidx1",
6247 auxType: auxSymOff,
6248 argLen: 4,
6249 commutative: true,
6250 symEffect: SymWrite,
6251 asm: x86.AMOVB,
6252 reg: regInfo{
6253 inputs: []inputInfo{
6254 {1, 255},
6255 {2, 255},
6256 {0, 65791},
6257 },
6258 },
6259 },
6260 {
6261 name: "MOVWstoreidx1",
6262 auxType: auxSymOff,
6263 argLen: 4,
6264 commutative: true,
6265 symEffect: SymWrite,
6266 asm: x86.AMOVW,
6267 reg: regInfo{
6268 inputs: []inputInfo{
6269 {1, 255},
6270 {2, 255},
6271 {0, 65791},
6272 },
6273 },
6274 },
6275 {
6276 name: "MOVWstoreidx2",
6277 auxType: auxSymOff,
6278 argLen: 4,
6279 symEffect: SymWrite,
6280 asm: x86.AMOVW,
6281 reg: regInfo{
6282 inputs: []inputInfo{
6283 {1, 255},
6284 {2, 255},
6285 {0, 65791},
6286 },
6287 },
6288 },
6289 {
6290 name: "MOVLstoreidx1",
6291 auxType: auxSymOff,
6292 argLen: 4,
6293 commutative: true,
6294 symEffect: SymWrite,
6295 asm: x86.AMOVL,
6296 reg: regInfo{
6297 inputs: []inputInfo{
6298 {1, 255},
6299 {2, 255},
6300 {0, 65791},
6301 },
6302 },
6303 },
6304 {
6305 name: "MOVLstoreidx4",
6306 auxType: auxSymOff,
6307 argLen: 4,
6308 symEffect: SymWrite,
6309 asm: x86.AMOVL,
6310 reg: regInfo{
6311 inputs: []inputInfo{
6312 {1, 255},
6313 {2, 255},
6314 {0, 65791},
6315 },
6316 },
6317 },
6318 {
6319 name: "MOVBstoreconst",
6320 auxType: auxSymValAndOff,
6321 argLen: 2,
6322 faultOnNilArg0: true,
6323 symEffect: SymWrite,
6324 asm: x86.AMOVB,
6325 reg: regInfo{
6326 inputs: []inputInfo{
6327 {0, 65791},
6328 },
6329 },
6330 },
6331 {
6332 name: "MOVWstoreconst",
6333 auxType: auxSymValAndOff,
6334 argLen: 2,
6335 faultOnNilArg0: true,
6336 symEffect: SymWrite,
6337 asm: x86.AMOVW,
6338 reg: regInfo{
6339 inputs: []inputInfo{
6340 {0, 65791},
6341 },
6342 },
6343 },
6344 {
6345 name: "MOVLstoreconst",
6346 auxType: auxSymValAndOff,
6347 argLen: 2,
6348 faultOnNilArg0: true,
6349 symEffect: SymWrite,
6350 asm: x86.AMOVL,
6351 reg: regInfo{
6352 inputs: []inputInfo{
6353 {0, 65791},
6354 },
6355 },
6356 },
6357 {
6358 name: "MOVBstoreconstidx1",
6359 auxType: auxSymValAndOff,
6360 argLen: 3,
6361 symEffect: SymWrite,
6362 asm: x86.AMOVB,
6363 reg: regInfo{
6364 inputs: []inputInfo{
6365 {1, 255},
6366 {0, 65791},
6367 },
6368 },
6369 },
6370 {
6371 name: "MOVWstoreconstidx1",
6372 auxType: auxSymValAndOff,
6373 argLen: 3,
6374 symEffect: SymWrite,
6375 asm: x86.AMOVW,
6376 reg: regInfo{
6377 inputs: []inputInfo{
6378 {1, 255},
6379 {0, 65791},
6380 },
6381 },
6382 },
6383 {
6384 name: "MOVWstoreconstidx2",
6385 auxType: auxSymValAndOff,
6386 argLen: 3,
6387 symEffect: SymWrite,
6388 asm: x86.AMOVW,
6389 reg: regInfo{
6390 inputs: []inputInfo{
6391 {1, 255},
6392 {0, 65791},
6393 },
6394 },
6395 },
6396 {
6397 name: "MOVLstoreconstidx1",
6398 auxType: auxSymValAndOff,
6399 argLen: 3,
6400 symEffect: SymWrite,
6401 asm: x86.AMOVL,
6402 reg: regInfo{
6403 inputs: []inputInfo{
6404 {1, 255},
6405 {0, 65791},
6406 },
6407 },
6408 },
6409 {
6410 name: "MOVLstoreconstidx4",
6411 auxType: auxSymValAndOff,
6412 argLen: 3,
6413 symEffect: SymWrite,
6414 asm: x86.AMOVL,
6415 reg: regInfo{
6416 inputs: []inputInfo{
6417 {1, 255},
6418 {0, 65791},
6419 },
6420 },
6421 },
6422 {
6423 name: "DUFFZERO",
6424 auxType: auxInt64,
6425 argLen: 3,
6426 faultOnNilArg0: true,
6427 reg: regInfo{
6428 inputs: []inputInfo{
6429 {0, 128},
6430 {1, 1},
6431 },
6432 clobbers: 130,
6433 },
6434 },
6435 {
6436 name: "REPSTOSL",
6437 argLen: 4,
6438 faultOnNilArg0: true,
6439 reg: regInfo{
6440 inputs: []inputInfo{
6441 {0, 128},
6442 {1, 2},
6443 {2, 1},
6444 },
6445 clobbers: 130,
6446 },
6447 },
6448 {
6449 name: "CALLstatic",
6450 auxType: auxCallOff,
6451 argLen: 1,
6452 clobberFlags: true,
6453 call: true,
6454 reg: regInfo{
6455 clobbers: 65519,
6456 },
6457 },
6458 {
6459 name: "CALLtail",
6460 auxType: auxCallOff,
6461 argLen: 1,
6462 clobberFlags: true,
6463 call: true,
6464 tailCall: true,
6465 reg: regInfo{
6466 clobbers: 65519,
6467 },
6468 },
6469 {
6470 name: "CALLclosure",
6471 auxType: auxCallOff,
6472 argLen: 3,
6473 clobberFlags: true,
6474 call: true,
6475 reg: regInfo{
6476 inputs: []inputInfo{
6477 {1, 4},
6478 {0, 255},
6479 },
6480 clobbers: 65519,
6481 },
6482 },
6483 {
6484 name: "CALLinter",
6485 auxType: auxCallOff,
6486 argLen: 2,
6487 clobberFlags: true,
6488 call: true,
6489 reg: regInfo{
6490 inputs: []inputInfo{
6491 {0, 239},
6492 },
6493 clobbers: 65519,
6494 },
6495 },
6496 {
6497 name: "DUFFCOPY",
6498 auxType: auxInt64,
6499 argLen: 3,
6500 clobberFlags: true,
6501 faultOnNilArg0: true,
6502 faultOnNilArg1: true,
6503 reg: regInfo{
6504 inputs: []inputInfo{
6505 {0, 128},
6506 {1, 64},
6507 },
6508 clobbers: 194,
6509 },
6510 },
6511 {
6512 name: "REPMOVSL",
6513 argLen: 4,
6514 faultOnNilArg0: true,
6515 faultOnNilArg1: true,
6516 reg: regInfo{
6517 inputs: []inputInfo{
6518 {0, 128},
6519 {1, 64},
6520 {2, 2},
6521 },
6522 clobbers: 194,
6523 },
6524 },
6525 {
6526 name: "InvertFlags",
6527 argLen: 1,
6528 reg: regInfo{},
6529 },
6530 {
6531 name: "LoweredGetG",
6532 argLen: 1,
6533 reg: regInfo{
6534 outputs: []outputInfo{
6535 {0, 239},
6536 },
6537 },
6538 },
6539 {
6540 name: "LoweredGetClosurePtr",
6541 argLen: 0,
6542 zeroWidth: true,
6543 reg: regInfo{
6544 outputs: []outputInfo{
6545 {0, 4},
6546 },
6547 },
6548 },
6549 {
6550 name: "LoweredGetCallerPC",
6551 argLen: 0,
6552 rematerializeable: true,
6553 reg: regInfo{
6554 outputs: []outputInfo{
6555 {0, 239},
6556 },
6557 },
6558 },
6559 {
6560 name: "LoweredGetCallerSP",
6561 argLen: 1,
6562 rematerializeable: true,
6563 reg: regInfo{
6564 outputs: []outputInfo{
6565 {0, 239},
6566 },
6567 },
6568 },
6569 {
6570 name: "LoweredNilCheck",
6571 argLen: 2,
6572 clobberFlags: true,
6573 nilCheck: true,
6574 faultOnNilArg0: true,
6575 reg: regInfo{
6576 inputs: []inputInfo{
6577 {0, 255},
6578 },
6579 },
6580 },
6581 {
6582 name: "LoweredWB",
6583 auxType: auxInt64,
6584 argLen: 1,
6585 clobberFlags: true,
6586 reg: regInfo{
6587 clobbers: 65280,
6588 outputs: []outputInfo{
6589 {0, 128},
6590 },
6591 },
6592 },
6593 {
6594 name: "LoweredPanicBoundsRR",
6595 auxType: auxInt64,
6596 argLen: 3,
6597 call: true,
6598 reg: regInfo{
6599 inputs: []inputInfo{
6600 {0, 239},
6601 {1, 239},
6602 },
6603 },
6604 },
6605 {
6606 name: "LoweredPanicBoundsRC",
6607 auxType: auxPanicBoundsC,
6608 argLen: 2,
6609 call: true,
6610 reg: regInfo{
6611 inputs: []inputInfo{
6612 {0, 239},
6613 },
6614 },
6615 },
6616 {
6617 name: "LoweredPanicBoundsCR",
6618 auxType: auxPanicBoundsC,
6619 argLen: 2,
6620 call: true,
6621 reg: regInfo{
6622 inputs: []inputInfo{
6623 {0, 239},
6624 },
6625 },
6626 },
6627 {
6628 name: "LoweredPanicBoundsCC",
6629 auxType: auxPanicBoundsCC,
6630 argLen: 1,
6631 call: true,
6632 reg: regInfo{},
6633 },
6634 {
6635 name: "LoweredPanicExtendRR",
6636 auxType: auxInt64,
6637 argLen: 4,
6638 call: true,
6639 reg: regInfo{
6640 inputs: []inputInfo{
6641 {0, 15},
6642 {1, 15},
6643 {2, 239},
6644 },
6645 },
6646 },
6647 {
6648 name: "LoweredPanicExtendRC",
6649 auxType: auxPanicBoundsC,
6650 argLen: 3,
6651 call: true,
6652 reg: regInfo{
6653 inputs: []inputInfo{
6654 {0, 15},
6655 {1, 15},
6656 },
6657 },
6658 },
6659 {
6660 name: "FlagEQ",
6661 argLen: 0,
6662 reg: regInfo{},
6663 },
6664 {
6665 name: "FlagLT_ULT",
6666 argLen: 0,
6667 reg: regInfo{},
6668 },
6669 {
6670 name: "FlagLT_UGT",
6671 argLen: 0,
6672 reg: regInfo{},
6673 },
6674 {
6675 name: "FlagGT_UGT",
6676 argLen: 0,
6677 reg: regInfo{},
6678 },
6679 {
6680 name: "FlagGT_ULT",
6681 argLen: 0,
6682 reg: regInfo{},
6683 },
6684 {
6685 name: "MOVSSconst1",
6686 auxType: auxFloat32,
6687 argLen: 0,
6688 reg: regInfo{
6689 outputs: []outputInfo{
6690 {0, 239},
6691 },
6692 },
6693 },
6694 {
6695 name: "MOVSDconst1",
6696 auxType: auxFloat64,
6697 argLen: 0,
6698 reg: regInfo{
6699 outputs: []outputInfo{
6700 {0, 239},
6701 },
6702 },
6703 },
6704 {
6705 name: "MOVSSconst2",
6706 argLen: 1,
6707 asm: x86.AMOVSS,
6708 reg: regInfo{
6709 inputs: []inputInfo{
6710 {0, 239},
6711 },
6712 outputs: []outputInfo{
6713 {0, 65280},
6714 },
6715 },
6716 },
6717 {
6718 name: "MOVSDconst2",
6719 argLen: 1,
6720 asm: x86.AMOVSD,
6721 reg: regInfo{
6722 inputs: []inputInfo{
6723 {0, 239},
6724 },
6725 outputs: []outputInfo{
6726 {0, 65280},
6727 },
6728 },
6729 },
6730
6731 {
6732 name: "ADDSS",
6733 argLen: 2,
6734 commutative: true,
6735 resultInArg0: true,
6736 asm: x86.AADDSS,
6737 reg: regInfo{
6738 inputs: []inputInfo{
6739 {0, 2147418112},
6740 {1, 2147418112},
6741 },
6742 outputs: []outputInfo{
6743 {0, 2147418112},
6744 },
6745 },
6746 },
6747 {
6748 name: "ADDSD",
6749 argLen: 2,
6750 commutative: true,
6751 resultInArg0: true,
6752 asm: x86.AADDSD,
6753 reg: regInfo{
6754 inputs: []inputInfo{
6755 {0, 2147418112},
6756 {1, 2147418112},
6757 },
6758 outputs: []outputInfo{
6759 {0, 2147418112},
6760 },
6761 },
6762 },
6763 {
6764 name: "SUBSS",
6765 argLen: 2,
6766 resultInArg0: true,
6767 asm: x86.ASUBSS,
6768 reg: regInfo{
6769 inputs: []inputInfo{
6770 {0, 2147418112},
6771 {1, 2147418112},
6772 },
6773 outputs: []outputInfo{
6774 {0, 2147418112},
6775 },
6776 },
6777 },
6778 {
6779 name: "SUBSD",
6780 argLen: 2,
6781 resultInArg0: true,
6782 asm: x86.ASUBSD,
6783 reg: regInfo{
6784 inputs: []inputInfo{
6785 {0, 2147418112},
6786 {1, 2147418112},
6787 },
6788 outputs: []outputInfo{
6789 {0, 2147418112},
6790 },
6791 },
6792 },
6793 {
6794 name: "MULSS",
6795 argLen: 2,
6796 commutative: true,
6797 resultInArg0: true,
6798 asm: x86.AMULSS,
6799 reg: regInfo{
6800 inputs: []inputInfo{
6801 {0, 2147418112},
6802 {1, 2147418112},
6803 },
6804 outputs: []outputInfo{
6805 {0, 2147418112},
6806 },
6807 },
6808 },
6809 {
6810 name: "MULSD",
6811 argLen: 2,
6812 commutative: true,
6813 resultInArg0: true,
6814 asm: x86.AMULSD,
6815 reg: regInfo{
6816 inputs: []inputInfo{
6817 {0, 2147418112},
6818 {1, 2147418112},
6819 },
6820 outputs: []outputInfo{
6821 {0, 2147418112},
6822 },
6823 },
6824 },
6825 {
6826 name: "DIVSS",
6827 argLen: 2,
6828 resultInArg0: true,
6829 asm: x86.ADIVSS,
6830 reg: regInfo{
6831 inputs: []inputInfo{
6832 {0, 2147418112},
6833 {1, 2147418112},
6834 },
6835 outputs: []outputInfo{
6836 {0, 2147418112},
6837 },
6838 },
6839 },
6840 {
6841 name: "DIVSD",
6842 argLen: 2,
6843 resultInArg0: true,
6844 asm: x86.ADIVSD,
6845 reg: regInfo{
6846 inputs: []inputInfo{
6847 {0, 2147418112},
6848 {1, 2147418112},
6849 },
6850 outputs: []outputInfo{
6851 {0, 2147418112},
6852 },
6853 },
6854 },
6855 {
6856 name: "MOVSSload",
6857 auxType: auxSymOff,
6858 argLen: 2,
6859 faultOnNilArg0: true,
6860 symEffect: SymRead,
6861 asm: x86.AMOVSS,
6862 reg: regInfo{
6863 inputs: []inputInfo{
6864 {0, 4295016447},
6865 },
6866 outputs: []outputInfo{
6867 {0, 2147418112},
6868 },
6869 },
6870 },
6871 {
6872 name: "MOVSDload",
6873 auxType: auxSymOff,
6874 argLen: 2,
6875 faultOnNilArg0: true,
6876 symEffect: SymRead,
6877 asm: x86.AMOVSD,
6878 reg: regInfo{
6879 inputs: []inputInfo{
6880 {0, 4295016447},
6881 },
6882 outputs: []outputInfo{
6883 {0, 2147418112},
6884 },
6885 },
6886 },
6887 {
6888 name: "MOVSSconst",
6889 auxType: auxFloat32,
6890 argLen: 0,
6891 rematerializeable: true,
6892 asm: x86.AMOVSS,
6893 reg: regInfo{
6894 outputs: []outputInfo{
6895 {0, 2147418112},
6896 },
6897 },
6898 },
6899 {
6900 name: "MOVSDconst",
6901 auxType: auxFloat64,
6902 argLen: 0,
6903 rematerializeable: true,
6904 asm: x86.AMOVSD,
6905 reg: regInfo{
6906 outputs: []outputInfo{
6907 {0, 2147418112},
6908 },
6909 },
6910 },
6911 {
6912 name: "MOVSSloadidx1",
6913 auxType: auxSymOff,
6914 argLen: 3,
6915 symEffect: SymRead,
6916 asm: x86.AMOVSS,
6917 scale: 1,
6918 reg: regInfo{
6919 inputs: []inputInfo{
6920 {1, 49151},
6921 {0, 4295016447},
6922 },
6923 outputs: []outputInfo{
6924 {0, 2147418112},
6925 },
6926 },
6927 },
6928 {
6929 name: "MOVSSloadidx4",
6930 auxType: auxSymOff,
6931 argLen: 3,
6932 symEffect: SymRead,
6933 asm: x86.AMOVSS,
6934 scale: 4,
6935 reg: regInfo{
6936 inputs: []inputInfo{
6937 {1, 49151},
6938 {0, 4295016447},
6939 },
6940 outputs: []outputInfo{
6941 {0, 2147418112},
6942 },
6943 },
6944 },
6945 {
6946 name: "MOVSDloadidx1",
6947 auxType: auxSymOff,
6948 argLen: 3,
6949 symEffect: SymRead,
6950 asm: x86.AMOVSD,
6951 scale: 1,
6952 reg: regInfo{
6953 inputs: []inputInfo{
6954 {1, 49151},
6955 {0, 4295016447},
6956 },
6957 outputs: []outputInfo{
6958 {0, 2147418112},
6959 },
6960 },
6961 },
6962 {
6963 name: "MOVSDloadidx8",
6964 auxType: auxSymOff,
6965 argLen: 3,
6966 symEffect: SymRead,
6967 asm: x86.AMOVSD,
6968 scale: 8,
6969 reg: regInfo{
6970 inputs: []inputInfo{
6971 {1, 49151},
6972 {0, 4295016447},
6973 },
6974 outputs: []outputInfo{
6975 {0, 2147418112},
6976 },
6977 },
6978 },
6979 {
6980 name: "MOVSSstore",
6981 auxType: auxSymOff,
6982 argLen: 3,
6983 faultOnNilArg0: true,
6984 symEffect: SymWrite,
6985 asm: x86.AMOVSS,
6986 reg: regInfo{
6987 inputs: []inputInfo{
6988 {1, 2147418112},
6989 {0, 4295016447},
6990 },
6991 },
6992 },
6993 {
6994 name: "MOVSDstore",
6995 auxType: auxSymOff,
6996 argLen: 3,
6997 faultOnNilArg0: true,
6998 symEffect: SymWrite,
6999 asm: x86.AMOVSD,
7000 reg: regInfo{
7001 inputs: []inputInfo{
7002 {1, 2147418112},
7003 {0, 4295016447},
7004 },
7005 },
7006 },
7007 {
7008 name: "MOVSSstoreidx1",
7009 auxType: auxSymOff,
7010 argLen: 4,
7011 symEffect: SymWrite,
7012 asm: x86.AMOVSS,
7013 scale: 1,
7014 reg: regInfo{
7015 inputs: []inputInfo{
7016 {1, 49151},
7017 {2, 2147418112},
7018 {0, 4295016447},
7019 },
7020 },
7021 },
7022 {
7023 name: "MOVSSstoreidx4",
7024 auxType: auxSymOff,
7025 argLen: 4,
7026 symEffect: SymWrite,
7027 asm: x86.AMOVSS,
7028 scale: 4,
7029 reg: regInfo{
7030 inputs: []inputInfo{
7031 {1, 49151},
7032 {2, 2147418112},
7033 {0, 4295016447},
7034 },
7035 },
7036 },
7037 {
7038 name: "MOVSDstoreidx1",
7039 auxType: auxSymOff,
7040 argLen: 4,
7041 symEffect: SymWrite,
7042 asm: x86.AMOVSD,
7043 scale: 1,
7044 reg: regInfo{
7045 inputs: []inputInfo{
7046 {1, 49151},
7047 {2, 2147418112},
7048 {0, 4295016447},
7049 },
7050 },
7051 },
7052 {
7053 name: "MOVSDstoreidx8",
7054 auxType: auxSymOff,
7055 argLen: 4,
7056 symEffect: SymWrite,
7057 asm: x86.AMOVSD,
7058 scale: 8,
7059 reg: regInfo{
7060 inputs: []inputInfo{
7061 {1, 49151},
7062 {2, 2147418112},
7063 {0, 4295016447},
7064 },
7065 },
7066 },
7067 {
7068 name: "ADDSSload",
7069 auxType: auxSymOff,
7070 argLen: 3,
7071 resultInArg0: true,
7072 faultOnNilArg1: true,
7073 symEffect: SymRead,
7074 asm: x86.AADDSS,
7075 reg: regInfo{
7076 inputs: []inputInfo{
7077 {0, 2147418112},
7078 {1, 4295032831},
7079 },
7080 outputs: []outputInfo{
7081 {0, 2147418112},
7082 },
7083 },
7084 },
7085 {
7086 name: "ADDSDload",
7087 auxType: auxSymOff,
7088 argLen: 3,
7089 resultInArg0: true,
7090 faultOnNilArg1: true,
7091 symEffect: SymRead,
7092 asm: x86.AADDSD,
7093 reg: regInfo{
7094 inputs: []inputInfo{
7095 {0, 2147418112},
7096 {1, 4295032831},
7097 },
7098 outputs: []outputInfo{
7099 {0, 2147418112},
7100 },
7101 },
7102 },
7103 {
7104 name: "SUBSSload",
7105 auxType: auxSymOff,
7106 argLen: 3,
7107 resultInArg0: true,
7108 faultOnNilArg1: true,
7109 symEffect: SymRead,
7110 asm: x86.ASUBSS,
7111 reg: regInfo{
7112 inputs: []inputInfo{
7113 {0, 2147418112},
7114 {1, 4295032831},
7115 },
7116 outputs: []outputInfo{
7117 {0, 2147418112},
7118 },
7119 },
7120 },
7121 {
7122 name: "SUBSDload",
7123 auxType: auxSymOff,
7124 argLen: 3,
7125 resultInArg0: true,
7126 faultOnNilArg1: true,
7127 symEffect: SymRead,
7128 asm: x86.ASUBSD,
7129 reg: regInfo{
7130 inputs: []inputInfo{
7131 {0, 2147418112},
7132 {1, 4295032831},
7133 },
7134 outputs: []outputInfo{
7135 {0, 2147418112},
7136 },
7137 },
7138 },
7139 {
7140 name: "MULSSload",
7141 auxType: auxSymOff,
7142 argLen: 3,
7143 resultInArg0: true,
7144 faultOnNilArg1: true,
7145 symEffect: SymRead,
7146 asm: x86.AMULSS,
7147 reg: regInfo{
7148 inputs: []inputInfo{
7149 {0, 2147418112},
7150 {1, 4295032831},
7151 },
7152 outputs: []outputInfo{
7153 {0, 2147418112},
7154 },
7155 },
7156 },
7157 {
7158 name: "MULSDload",
7159 auxType: auxSymOff,
7160 argLen: 3,
7161 resultInArg0: true,
7162 faultOnNilArg1: true,
7163 symEffect: SymRead,
7164 asm: x86.AMULSD,
7165 reg: regInfo{
7166 inputs: []inputInfo{
7167 {0, 2147418112},
7168 {1, 4295032831},
7169 },
7170 outputs: []outputInfo{
7171 {0, 2147418112},
7172 },
7173 },
7174 },
7175 {
7176 name: "DIVSSload",
7177 auxType: auxSymOff,
7178 argLen: 3,
7179 resultInArg0: true,
7180 faultOnNilArg1: true,
7181 symEffect: SymRead,
7182 asm: x86.ADIVSS,
7183 reg: regInfo{
7184 inputs: []inputInfo{
7185 {0, 2147418112},
7186 {1, 4295032831},
7187 },
7188 outputs: []outputInfo{
7189 {0, 2147418112},
7190 },
7191 },
7192 },
7193 {
7194 name: "DIVSDload",
7195 auxType: auxSymOff,
7196 argLen: 3,
7197 resultInArg0: true,
7198 faultOnNilArg1: true,
7199 symEffect: SymRead,
7200 asm: x86.ADIVSD,
7201 reg: regInfo{
7202 inputs: []inputInfo{
7203 {0, 2147418112},
7204 {1, 4295032831},
7205 },
7206 outputs: []outputInfo{
7207 {0, 2147418112},
7208 },
7209 },
7210 },
7211 {
7212 name: "ADDSSloadidx1",
7213 auxType: auxSymOff,
7214 argLen: 4,
7215 resultInArg0: true,
7216 symEffect: SymRead,
7217 asm: x86.AADDSS,
7218 scale: 1,
7219 reg: regInfo{
7220 inputs: []inputInfo{
7221 {0, 2147418112},
7222 {2, 4295016447},
7223 {1, 4295032831},
7224 },
7225 outputs: []outputInfo{
7226 {0, 2147418112},
7227 },
7228 },
7229 },
7230 {
7231 name: "ADDSSloadidx4",
7232 auxType: auxSymOff,
7233 argLen: 4,
7234 resultInArg0: true,
7235 symEffect: SymRead,
7236 asm: x86.AADDSS,
7237 scale: 4,
7238 reg: regInfo{
7239 inputs: []inputInfo{
7240 {0, 2147418112},
7241 {2, 4295016447},
7242 {1, 4295032831},
7243 },
7244 outputs: []outputInfo{
7245 {0, 2147418112},
7246 },
7247 },
7248 },
7249 {
7250 name: "ADDSDloadidx1",
7251 auxType: auxSymOff,
7252 argLen: 4,
7253 resultInArg0: true,
7254 symEffect: SymRead,
7255 asm: x86.AADDSD,
7256 scale: 1,
7257 reg: regInfo{
7258 inputs: []inputInfo{
7259 {0, 2147418112},
7260 {2, 4295016447},
7261 {1, 4295032831},
7262 },
7263 outputs: []outputInfo{
7264 {0, 2147418112},
7265 },
7266 },
7267 },
7268 {
7269 name: "ADDSDloadidx8",
7270 auxType: auxSymOff,
7271 argLen: 4,
7272 resultInArg0: true,
7273 symEffect: SymRead,
7274 asm: x86.AADDSD,
7275 scale: 8,
7276 reg: regInfo{
7277 inputs: []inputInfo{
7278 {0, 2147418112},
7279 {2, 4295016447},
7280 {1, 4295032831},
7281 },
7282 outputs: []outputInfo{
7283 {0, 2147418112},
7284 },
7285 },
7286 },
7287 {
7288 name: "SUBSSloadidx1",
7289 auxType: auxSymOff,
7290 argLen: 4,
7291 resultInArg0: true,
7292 symEffect: SymRead,
7293 asm: x86.ASUBSS,
7294 scale: 1,
7295 reg: regInfo{
7296 inputs: []inputInfo{
7297 {0, 2147418112},
7298 {2, 4295016447},
7299 {1, 4295032831},
7300 },
7301 outputs: []outputInfo{
7302 {0, 2147418112},
7303 },
7304 },
7305 },
7306 {
7307 name: "SUBSSloadidx4",
7308 auxType: auxSymOff,
7309 argLen: 4,
7310 resultInArg0: true,
7311 symEffect: SymRead,
7312 asm: x86.ASUBSS,
7313 scale: 4,
7314 reg: regInfo{
7315 inputs: []inputInfo{
7316 {0, 2147418112},
7317 {2, 4295016447},
7318 {1, 4295032831},
7319 },
7320 outputs: []outputInfo{
7321 {0, 2147418112},
7322 },
7323 },
7324 },
7325 {
7326 name: "SUBSDloadidx1",
7327 auxType: auxSymOff,
7328 argLen: 4,
7329 resultInArg0: true,
7330 symEffect: SymRead,
7331 asm: x86.ASUBSD,
7332 scale: 1,
7333 reg: regInfo{
7334 inputs: []inputInfo{
7335 {0, 2147418112},
7336 {2, 4295016447},
7337 {1, 4295032831},
7338 },
7339 outputs: []outputInfo{
7340 {0, 2147418112},
7341 },
7342 },
7343 },
7344 {
7345 name: "SUBSDloadidx8",
7346 auxType: auxSymOff,
7347 argLen: 4,
7348 resultInArg0: true,
7349 symEffect: SymRead,
7350 asm: x86.ASUBSD,
7351 scale: 8,
7352 reg: regInfo{
7353 inputs: []inputInfo{
7354 {0, 2147418112},
7355 {2, 4295016447},
7356 {1, 4295032831},
7357 },
7358 outputs: []outputInfo{
7359 {0, 2147418112},
7360 },
7361 },
7362 },
7363 {
7364 name: "MULSSloadidx1",
7365 auxType: auxSymOff,
7366 argLen: 4,
7367 resultInArg0: true,
7368 symEffect: SymRead,
7369 asm: x86.AMULSS,
7370 scale: 1,
7371 reg: regInfo{
7372 inputs: []inputInfo{
7373 {0, 2147418112},
7374 {2, 4295016447},
7375 {1, 4295032831},
7376 },
7377 outputs: []outputInfo{
7378 {0, 2147418112},
7379 },
7380 },
7381 },
7382 {
7383 name: "MULSSloadidx4",
7384 auxType: auxSymOff,
7385 argLen: 4,
7386 resultInArg0: true,
7387 symEffect: SymRead,
7388 asm: x86.AMULSS,
7389 scale: 4,
7390 reg: regInfo{
7391 inputs: []inputInfo{
7392 {0, 2147418112},
7393 {2, 4295016447},
7394 {1, 4295032831},
7395 },
7396 outputs: []outputInfo{
7397 {0, 2147418112},
7398 },
7399 },
7400 },
7401 {
7402 name: "MULSDloadidx1",
7403 auxType: auxSymOff,
7404 argLen: 4,
7405 resultInArg0: true,
7406 symEffect: SymRead,
7407 asm: x86.AMULSD,
7408 scale: 1,
7409 reg: regInfo{
7410 inputs: []inputInfo{
7411 {0, 2147418112},
7412 {2, 4295016447},
7413 {1, 4295032831},
7414 },
7415 outputs: []outputInfo{
7416 {0, 2147418112},
7417 },
7418 },
7419 },
7420 {
7421 name: "MULSDloadidx8",
7422 auxType: auxSymOff,
7423 argLen: 4,
7424 resultInArg0: true,
7425 symEffect: SymRead,
7426 asm: x86.AMULSD,
7427 scale: 8,
7428 reg: regInfo{
7429 inputs: []inputInfo{
7430 {0, 2147418112},
7431 {2, 4295016447},
7432 {1, 4295032831},
7433 },
7434 outputs: []outputInfo{
7435 {0, 2147418112},
7436 },
7437 },
7438 },
7439 {
7440 name: "DIVSSloadidx1",
7441 auxType: auxSymOff,
7442 argLen: 4,
7443 resultInArg0: true,
7444 symEffect: SymRead,
7445 asm: x86.ADIVSS,
7446 scale: 1,
7447 reg: regInfo{
7448 inputs: []inputInfo{
7449 {0, 2147418112},
7450 {2, 4295016447},
7451 {1, 4295032831},
7452 },
7453 outputs: []outputInfo{
7454 {0, 2147418112},
7455 },
7456 },
7457 },
7458 {
7459 name: "DIVSSloadidx4",
7460 auxType: auxSymOff,
7461 argLen: 4,
7462 resultInArg0: true,
7463 symEffect: SymRead,
7464 asm: x86.ADIVSS,
7465 scale: 4,
7466 reg: regInfo{
7467 inputs: []inputInfo{
7468 {0, 2147418112},
7469 {2, 4295016447},
7470 {1, 4295032831},
7471 },
7472 outputs: []outputInfo{
7473 {0, 2147418112},
7474 },
7475 },
7476 },
7477 {
7478 name: "DIVSDloadidx1",
7479 auxType: auxSymOff,
7480 argLen: 4,
7481 resultInArg0: true,
7482 symEffect: SymRead,
7483 asm: x86.ADIVSD,
7484 scale: 1,
7485 reg: regInfo{
7486 inputs: []inputInfo{
7487 {0, 2147418112},
7488 {2, 4295016447},
7489 {1, 4295032831},
7490 },
7491 outputs: []outputInfo{
7492 {0, 2147418112},
7493 },
7494 },
7495 },
7496 {
7497 name: "DIVSDloadidx8",
7498 auxType: auxSymOff,
7499 argLen: 4,
7500 resultInArg0: true,
7501 symEffect: SymRead,
7502 asm: x86.ADIVSD,
7503 scale: 8,
7504 reg: regInfo{
7505 inputs: []inputInfo{
7506 {0, 2147418112},
7507 {2, 4295016447},
7508 {1, 4295032831},
7509 },
7510 outputs: []outputInfo{
7511 {0, 2147418112},
7512 },
7513 },
7514 },
7515 {
7516 name: "ADDQ",
7517 argLen: 2,
7518 commutative: true,
7519 clobberFlags: true,
7520 asm: x86.AADDQ,
7521 reg: regInfo{
7522 inputs: []inputInfo{
7523 {1, 49135},
7524 {0, 49151},
7525 },
7526 outputs: []outputInfo{
7527 {0, 49135},
7528 },
7529 },
7530 },
7531 {
7532 name: "ADDL",
7533 argLen: 2,
7534 commutative: true,
7535 clobberFlags: true,
7536 asm: x86.AADDL,
7537 reg: regInfo{
7538 inputs: []inputInfo{
7539 {1, 49135},
7540 {0, 49151},
7541 },
7542 outputs: []outputInfo{
7543 {0, 49135},
7544 },
7545 },
7546 },
7547 {
7548 name: "ADDQconst",
7549 auxType: auxInt32,
7550 argLen: 1,
7551 clobberFlags: true,
7552 asm: x86.AADDQ,
7553 reg: regInfo{
7554 inputs: []inputInfo{
7555 {0, 49151},
7556 },
7557 outputs: []outputInfo{
7558 {0, 49135},
7559 },
7560 },
7561 },
7562 {
7563 name: "ADDLconst",
7564 auxType: auxInt32,
7565 argLen: 1,
7566 clobberFlags: true,
7567 asm: x86.AADDL,
7568 reg: regInfo{
7569 inputs: []inputInfo{
7570 {0, 49151},
7571 },
7572 outputs: []outputInfo{
7573 {0, 49135},
7574 },
7575 },
7576 },
7577 {
7578 name: "ADDQconstmodify",
7579 auxType: auxSymValAndOff,
7580 argLen: 2,
7581 clobberFlags: true,
7582 faultOnNilArg0: true,
7583 symEffect: SymRead | SymWrite,
7584 asm: x86.AADDQ,
7585 reg: regInfo{
7586 inputs: []inputInfo{
7587 {0, 4295032831},
7588 },
7589 },
7590 },
7591 {
7592 name: "ADDLconstmodify",
7593 auxType: auxSymValAndOff,
7594 argLen: 2,
7595 clobberFlags: true,
7596 faultOnNilArg0: true,
7597 symEffect: SymRead | SymWrite,
7598 asm: x86.AADDL,
7599 reg: regInfo{
7600 inputs: []inputInfo{
7601 {0, 4295032831},
7602 },
7603 },
7604 },
7605 {
7606 name: "SUBQ",
7607 argLen: 2,
7608 resultInArg0: true,
7609 clobberFlags: true,
7610 asm: x86.ASUBQ,
7611 reg: regInfo{
7612 inputs: []inputInfo{
7613 {0, 49135},
7614 {1, 49135},
7615 },
7616 outputs: []outputInfo{
7617 {0, 49135},
7618 },
7619 },
7620 },
7621 {
7622 name: "SUBL",
7623 argLen: 2,
7624 resultInArg0: true,
7625 clobberFlags: true,
7626 asm: x86.ASUBL,
7627 reg: regInfo{
7628 inputs: []inputInfo{
7629 {0, 49135},
7630 {1, 49135},
7631 },
7632 outputs: []outputInfo{
7633 {0, 49135},
7634 },
7635 },
7636 },
7637 {
7638 name: "SUBQconst",
7639 auxType: auxInt32,
7640 argLen: 1,
7641 resultInArg0: true,
7642 clobberFlags: true,
7643 asm: x86.ASUBQ,
7644 reg: regInfo{
7645 inputs: []inputInfo{
7646 {0, 49135},
7647 },
7648 outputs: []outputInfo{
7649 {0, 49135},
7650 },
7651 },
7652 },
7653 {
7654 name: "SUBLconst",
7655 auxType: auxInt32,
7656 argLen: 1,
7657 resultInArg0: true,
7658 clobberFlags: true,
7659 asm: x86.ASUBL,
7660 reg: regInfo{
7661 inputs: []inputInfo{
7662 {0, 49135},
7663 },
7664 outputs: []outputInfo{
7665 {0, 49135},
7666 },
7667 },
7668 },
7669 {
7670 name: "MULQ",
7671 argLen: 2,
7672 commutative: true,
7673 resultInArg0: true,
7674 clobberFlags: true,
7675 asm: x86.AIMULQ,
7676 reg: regInfo{
7677 inputs: []inputInfo{
7678 {0, 49135},
7679 {1, 49135},
7680 },
7681 outputs: []outputInfo{
7682 {0, 49135},
7683 },
7684 },
7685 },
7686 {
7687 name: "MULL",
7688 argLen: 2,
7689 commutative: true,
7690 resultInArg0: true,
7691 clobberFlags: true,
7692 asm: x86.AIMULL,
7693 reg: regInfo{
7694 inputs: []inputInfo{
7695 {0, 49135},
7696 {1, 49135},
7697 },
7698 outputs: []outputInfo{
7699 {0, 49135},
7700 },
7701 },
7702 },
7703 {
7704 name: "MULQconst",
7705 auxType: auxInt32,
7706 argLen: 1,
7707 clobberFlags: true,
7708 asm: x86.AIMUL3Q,
7709 reg: regInfo{
7710 inputs: []inputInfo{
7711 {0, 49135},
7712 },
7713 outputs: []outputInfo{
7714 {0, 49135},
7715 },
7716 },
7717 },
7718 {
7719 name: "MULLconst",
7720 auxType: auxInt32,
7721 argLen: 1,
7722 clobberFlags: true,
7723 asm: x86.AIMUL3L,
7724 reg: regInfo{
7725 inputs: []inputInfo{
7726 {0, 49135},
7727 },
7728 outputs: []outputInfo{
7729 {0, 49135},
7730 },
7731 },
7732 },
7733 {
7734 name: "MULLU",
7735 argLen: 2,
7736 commutative: true,
7737 clobberFlags: true,
7738 asm: x86.AMULL,
7739 reg: regInfo{
7740 inputs: []inputInfo{
7741 {0, 1},
7742 {1, 49151},
7743 },
7744 clobbers: 4,
7745 outputs: []outputInfo{
7746 {1, 0},
7747 {0, 1},
7748 },
7749 },
7750 },
7751 {
7752 name: "MULQU",
7753 argLen: 2,
7754 commutative: true,
7755 clobberFlags: true,
7756 asm: x86.AMULQ,
7757 reg: regInfo{
7758 inputs: []inputInfo{
7759 {0, 1},
7760 {1, 49151},
7761 },
7762 clobbers: 4,
7763 outputs: []outputInfo{
7764 {1, 0},
7765 {0, 1},
7766 },
7767 },
7768 },
7769 {
7770 name: "HMULQ",
7771 argLen: 2,
7772 clobberFlags: true,
7773 asm: x86.AIMULQ,
7774 reg: regInfo{
7775 inputs: []inputInfo{
7776 {0, 1},
7777 {1, 49151},
7778 },
7779 clobbers: 1,
7780 outputs: []outputInfo{
7781 {0, 4},
7782 },
7783 },
7784 },
7785 {
7786 name: "HMULL",
7787 argLen: 2,
7788 clobberFlags: true,
7789 asm: x86.AIMULL,
7790 reg: regInfo{
7791 inputs: []inputInfo{
7792 {0, 1},
7793 {1, 49151},
7794 },
7795 clobbers: 1,
7796 outputs: []outputInfo{
7797 {0, 4},
7798 },
7799 },
7800 },
7801 {
7802 name: "HMULQU",
7803 argLen: 2,
7804 clobberFlags: true,
7805 asm: x86.AMULQ,
7806 reg: regInfo{
7807 inputs: []inputInfo{
7808 {0, 1},
7809 {1, 49151},
7810 },
7811 clobbers: 1,
7812 outputs: []outputInfo{
7813 {0, 4},
7814 },
7815 },
7816 },
7817 {
7818 name: "HMULLU",
7819 argLen: 2,
7820 clobberFlags: true,
7821 asm: x86.AMULL,
7822 reg: regInfo{
7823 inputs: []inputInfo{
7824 {0, 1},
7825 {1, 49151},
7826 },
7827 clobbers: 1,
7828 outputs: []outputInfo{
7829 {0, 4},
7830 },
7831 },
7832 },
7833 {
7834 name: "AVGQU",
7835 argLen: 2,
7836 commutative: true,
7837 resultInArg0: true,
7838 clobberFlags: true,
7839 reg: regInfo{
7840 inputs: []inputInfo{
7841 {0, 49135},
7842 {1, 49135},
7843 },
7844 outputs: []outputInfo{
7845 {0, 49135},
7846 },
7847 },
7848 },
7849 {
7850 name: "DIVQ",
7851 auxType: auxBool,
7852 argLen: 2,
7853 clobberFlags: true,
7854 asm: x86.AIDIVQ,
7855 reg: regInfo{
7856 inputs: []inputInfo{
7857 {0, 1},
7858 {1, 49147},
7859 },
7860 outputs: []outputInfo{
7861 {0, 1},
7862 {1, 4},
7863 },
7864 },
7865 },
7866 {
7867 name: "DIVL",
7868 auxType: auxBool,
7869 argLen: 2,
7870 clobberFlags: true,
7871 asm: x86.AIDIVL,
7872 reg: regInfo{
7873 inputs: []inputInfo{
7874 {0, 1},
7875 {1, 49147},
7876 },
7877 outputs: []outputInfo{
7878 {0, 1},
7879 {1, 4},
7880 },
7881 },
7882 },
7883 {
7884 name: "DIVW",
7885 auxType: auxBool,
7886 argLen: 2,
7887 clobberFlags: true,
7888 asm: x86.AIDIVW,
7889 reg: regInfo{
7890 inputs: []inputInfo{
7891 {0, 1},
7892 {1, 49147},
7893 },
7894 outputs: []outputInfo{
7895 {0, 1},
7896 {1, 4},
7897 },
7898 },
7899 },
7900 {
7901 name: "DIVQU",
7902 argLen: 2,
7903 clobberFlags: true,
7904 asm: x86.ADIVQ,
7905 reg: regInfo{
7906 inputs: []inputInfo{
7907 {0, 1},
7908 {1, 49147},
7909 },
7910 outputs: []outputInfo{
7911 {0, 1},
7912 {1, 4},
7913 },
7914 },
7915 },
7916 {
7917 name: "DIVLU",
7918 argLen: 2,
7919 clobberFlags: true,
7920 asm: x86.ADIVL,
7921 reg: regInfo{
7922 inputs: []inputInfo{
7923 {0, 1},
7924 {1, 49147},
7925 },
7926 outputs: []outputInfo{
7927 {0, 1},
7928 {1, 4},
7929 },
7930 },
7931 },
7932 {
7933 name: "DIVWU",
7934 argLen: 2,
7935 clobberFlags: true,
7936 asm: x86.ADIVW,
7937 reg: regInfo{
7938 inputs: []inputInfo{
7939 {0, 1},
7940 {1, 49147},
7941 },
7942 outputs: []outputInfo{
7943 {0, 1},
7944 {1, 4},
7945 },
7946 },
7947 },
7948 {
7949 name: "NEGLflags",
7950 argLen: 1,
7951 resultInArg0: true,
7952 asm: x86.ANEGL,
7953 reg: regInfo{
7954 inputs: []inputInfo{
7955 {0, 49135},
7956 },
7957 outputs: []outputInfo{
7958 {1, 0},
7959 {0, 49135},
7960 },
7961 },
7962 },
7963 {
7964 name: "ADDQconstflags",
7965 auxType: auxInt32,
7966 argLen: 1,
7967 resultInArg0: true,
7968 asm: x86.AADDQ,
7969 reg: regInfo{
7970 inputs: []inputInfo{
7971 {0, 49135},
7972 },
7973 outputs: []outputInfo{
7974 {1, 0},
7975 {0, 49135},
7976 },
7977 },
7978 },
7979 {
7980 name: "ADDLconstflags",
7981 auxType: auxInt32,
7982 argLen: 1,
7983 resultInArg0: true,
7984 asm: x86.AADDL,
7985 reg: regInfo{
7986 inputs: []inputInfo{
7987 {0, 49135},
7988 },
7989 outputs: []outputInfo{
7990 {1, 0},
7991 {0, 49135},
7992 },
7993 },
7994 },
7995 {
7996 name: "ADDQcarry",
7997 argLen: 2,
7998 commutative: true,
7999 resultInArg0: true,
8000 asm: x86.AADDQ,
8001 reg: regInfo{
8002 inputs: []inputInfo{
8003 {0, 49135},
8004 {1, 49135},
8005 },
8006 outputs: []outputInfo{
8007 {1, 0},
8008 {0, 49135},
8009 },
8010 },
8011 },
8012 {
8013 name: "ADCQ",
8014 argLen: 3,
8015 commutative: true,
8016 resultInArg0: true,
8017 asm: x86.AADCQ,
8018 reg: regInfo{
8019 inputs: []inputInfo{
8020 {0, 49135},
8021 {1, 49135},
8022 },
8023 outputs: []outputInfo{
8024 {1, 0},
8025 {0, 49135},
8026 },
8027 },
8028 },
8029 {
8030 name: "ADDQconstcarry",
8031 auxType: auxInt32,
8032 argLen: 1,
8033 resultInArg0: true,
8034 asm: x86.AADDQ,
8035 reg: regInfo{
8036 inputs: []inputInfo{
8037 {0, 49135},
8038 },
8039 outputs: []outputInfo{
8040 {1, 0},
8041 {0, 49135},
8042 },
8043 },
8044 },
8045 {
8046 name: "ADCQconst",
8047 auxType: auxInt32,
8048 argLen: 2,
8049 resultInArg0: true,
8050 asm: x86.AADCQ,
8051 reg: regInfo{
8052 inputs: []inputInfo{
8053 {0, 49135},
8054 },
8055 outputs: []outputInfo{
8056 {1, 0},
8057 {0, 49135},
8058 },
8059 },
8060 },
8061 {
8062 name: "SUBQborrow",
8063 argLen: 2,
8064 resultInArg0: true,
8065 asm: x86.ASUBQ,
8066 reg: regInfo{
8067 inputs: []inputInfo{
8068 {0, 49135},
8069 {1, 49135},
8070 },
8071 outputs: []outputInfo{
8072 {1, 0},
8073 {0, 49135},
8074 },
8075 },
8076 },
8077 {
8078 name: "SBBQ",
8079 argLen: 3,
8080 resultInArg0: true,
8081 asm: x86.ASBBQ,
8082 reg: regInfo{
8083 inputs: []inputInfo{
8084 {0, 49135},
8085 {1, 49135},
8086 },
8087 outputs: []outputInfo{
8088 {1, 0},
8089 {0, 49135},
8090 },
8091 },
8092 },
8093 {
8094 name: "SUBQconstborrow",
8095 auxType: auxInt32,
8096 argLen: 1,
8097 resultInArg0: true,
8098 asm: x86.ASUBQ,
8099 reg: regInfo{
8100 inputs: []inputInfo{
8101 {0, 49135},
8102 },
8103 outputs: []outputInfo{
8104 {1, 0},
8105 {0, 49135},
8106 },
8107 },
8108 },
8109 {
8110 name: "SBBQconst",
8111 auxType: auxInt32,
8112 argLen: 2,
8113 resultInArg0: true,
8114 asm: x86.ASBBQ,
8115 reg: regInfo{
8116 inputs: []inputInfo{
8117 {0, 49135},
8118 },
8119 outputs: []outputInfo{
8120 {1, 0},
8121 {0, 49135},
8122 },
8123 },
8124 },
8125 {
8126 name: "MULQU2",
8127 argLen: 2,
8128 commutative: true,
8129 clobberFlags: true,
8130 asm: x86.AMULQ,
8131 reg: regInfo{
8132 inputs: []inputInfo{
8133 {0, 1},
8134 {1, 49151},
8135 },
8136 outputs: []outputInfo{
8137 {0, 4},
8138 {1, 1},
8139 },
8140 },
8141 },
8142 {
8143 name: "DIVQU2",
8144 argLen: 3,
8145 clobberFlags: true,
8146 asm: x86.ADIVQ,
8147 reg: regInfo{
8148 inputs: []inputInfo{
8149 {0, 4},
8150 {1, 1},
8151 {2, 49151},
8152 },
8153 outputs: []outputInfo{
8154 {0, 1},
8155 {1, 4},
8156 },
8157 },
8158 },
8159 {
8160 name: "ANDQ",
8161 argLen: 2,
8162 commutative: true,
8163 resultInArg0: true,
8164 clobberFlags: true,
8165 asm: x86.AANDQ,
8166 reg: regInfo{
8167 inputs: []inputInfo{
8168 {0, 49135},
8169 {1, 49135},
8170 },
8171 outputs: []outputInfo{
8172 {0, 49135},
8173 },
8174 },
8175 },
8176 {
8177 name: "ANDL",
8178 argLen: 2,
8179 commutative: true,
8180 resultInArg0: true,
8181 clobberFlags: true,
8182 asm: x86.AANDL,
8183 reg: regInfo{
8184 inputs: []inputInfo{
8185 {0, 49135},
8186 {1, 49135},
8187 },
8188 outputs: []outputInfo{
8189 {0, 49135},
8190 },
8191 },
8192 },
8193 {
8194 name: "ANDQconst",
8195 auxType: auxInt32,
8196 argLen: 1,
8197 resultInArg0: true,
8198 clobberFlags: true,
8199 asm: x86.AANDQ,
8200 reg: regInfo{
8201 inputs: []inputInfo{
8202 {0, 49135},
8203 },
8204 outputs: []outputInfo{
8205 {0, 49135},
8206 },
8207 },
8208 },
8209 {
8210 name: "ANDLconst",
8211 auxType: auxInt32,
8212 argLen: 1,
8213 resultInArg0: true,
8214 clobberFlags: true,
8215 asm: x86.AANDL,
8216 reg: regInfo{
8217 inputs: []inputInfo{
8218 {0, 49135},
8219 },
8220 outputs: []outputInfo{
8221 {0, 49135},
8222 },
8223 },
8224 },
8225 {
8226 name: "ANDQconstmodify",
8227 auxType: auxSymValAndOff,
8228 argLen: 2,
8229 clobberFlags: true,
8230 faultOnNilArg0: true,
8231 symEffect: SymRead | SymWrite,
8232 asm: x86.AANDQ,
8233 reg: regInfo{
8234 inputs: []inputInfo{
8235 {0, 4295032831},
8236 },
8237 },
8238 },
8239 {
8240 name: "ANDLconstmodify",
8241 auxType: auxSymValAndOff,
8242 argLen: 2,
8243 clobberFlags: true,
8244 faultOnNilArg0: true,
8245 symEffect: SymRead | SymWrite,
8246 asm: x86.AANDL,
8247 reg: regInfo{
8248 inputs: []inputInfo{
8249 {0, 4295032831},
8250 },
8251 },
8252 },
8253 {
8254 name: "ORQ",
8255 argLen: 2,
8256 commutative: true,
8257 resultInArg0: true,
8258 clobberFlags: true,
8259 asm: x86.AORQ,
8260 reg: regInfo{
8261 inputs: []inputInfo{
8262 {0, 49135},
8263 {1, 49135},
8264 },
8265 outputs: []outputInfo{
8266 {0, 49135},
8267 },
8268 },
8269 },
8270 {
8271 name: "ORL",
8272 argLen: 2,
8273 commutative: true,
8274 resultInArg0: true,
8275 clobberFlags: true,
8276 asm: x86.AORL,
8277 reg: regInfo{
8278 inputs: []inputInfo{
8279 {0, 49135},
8280 {1, 49135},
8281 },
8282 outputs: []outputInfo{
8283 {0, 49135},
8284 },
8285 },
8286 },
8287 {
8288 name: "ORQconst",
8289 auxType: auxInt32,
8290 argLen: 1,
8291 resultInArg0: true,
8292 clobberFlags: true,
8293 asm: x86.AORQ,
8294 reg: regInfo{
8295 inputs: []inputInfo{
8296 {0, 49135},
8297 },
8298 outputs: []outputInfo{
8299 {0, 49135},
8300 },
8301 },
8302 },
8303 {
8304 name: "ORLconst",
8305 auxType: auxInt32,
8306 argLen: 1,
8307 resultInArg0: true,
8308 clobberFlags: true,
8309 asm: x86.AORL,
8310 reg: regInfo{
8311 inputs: []inputInfo{
8312 {0, 49135},
8313 },
8314 outputs: []outputInfo{
8315 {0, 49135},
8316 },
8317 },
8318 },
8319 {
8320 name: "ORQconstmodify",
8321 auxType: auxSymValAndOff,
8322 argLen: 2,
8323 clobberFlags: true,
8324 faultOnNilArg0: true,
8325 symEffect: SymRead | SymWrite,
8326 asm: x86.AORQ,
8327 reg: regInfo{
8328 inputs: []inputInfo{
8329 {0, 4295032831},
8330 },
8331 },
8332 },
8333 {
8334 name: "ORLconstmodify",
8335 auxType: auxSymValAndOff,
8336 argLen: 2,
8337 clobberFlags: true,
8338 faultOnNilArg0: true,
8339 symEffect: SymRead | SymWrite,
8340 asm: x86.AORL,
8341 reg: regInfo{
8342 inputs: []inputInfo{
8343 {0, 4295032831},
8344 },
8345 },
8346 },
8347 {
8348 name: "XORQ",
8349 argLen: 2,
8350 commutative: true,
8351 resultInArg0: true,
8352 clobberFlags: true,
8353 asm: x86.AXORQ,
8354 reg: regInfo{
8355 inputs: []inputInfo{
8356 {0, 49135},
8357 {1, 49135},
8358 },
8359 outputs: []outputInfo{
8360 {0, 49135},
8361 },
8362 },
8363 },
8364 {
8365 name: "XORL",
8366 argLen: 2,
8367 commutative: true,
8368 resultInArg0: true,
8369 clobberFlags: true,
8370 asm: x86.AXORL,
8371 reg: regInfo{
8372 inputs: []inputInfo{
8373 {0, 49135},
8374 {1, 49135},
8375 },
8376 outputs: []outputInfo{
8377 {0, 49135},
8378 },
8379 },
8380 },
8381 {
8382 name: "XORQconst",
8383 auxType: auxInt32,
8384 argLen: 1,
8385 resultInArg0: true,
8386 clobberFlags: true,
8387 asm: x86.AXORQ,
8388 reg: regInfo{
8389 inputs: []inputInfo{
8390 {0, 49135},
8391 },
8392 outputs: []outputInfo{
8393 {0, 49135},
8394 },
8395 },
8396 },
8397 {
8398 name: "XORLconst",
8399 auxType: auxInt32,
8400 argLen: 1,
8401 resultInArg0: true,
8402 clobberFlags: true,
8403 asm: x86.AXORL,
8404 reg: regInfo{
8405 inputs: []inputInfo{
8406 {0, 49135},
8407 },
8408 outputs: []outputInfo{
8409 {0, 49135},
8410 },
8411 },
8412 },
8413 {
8414 name: "XORQconstmodify",
8415 auxType: auxSymValAndOff,
8416 argLen: 2,
8417 clobberFlags: true,
8418 faultOnNilArg0: true,
8419 symEffect: SymRead | SymWrite,
8420 asm: x86.AXORQ,
8421 reg: regInfo{
8422 inputs: []inputInfo{
8423 {0, 4295032831},
8424 },
8425 },
8426 },
8427 {
8428 name: "XORLconstmodify",
8429 auxType: auxSymValAndOff,
8430 argLen: 2,
8431 clobberFlags: true,
8432 faultOnNilArg0: true,
8433 symEffect: SymRead | SymWrite,
8434 asm: x86.AXORL,
8435 reg: regInfo{
8436 inputs: []inputInfo{
8437 {0, 4295032831},
8438 },
8439 },
8440 },
8441 {
8442 name: "CMPQ",
8443 argLen: 2,
8444 asm: x86.ACMPQ,
8445 reg: regInfo{
8446 inputs: []inputInfo{
8447 {0, 49151},
8448 {1, 49151},
8449 },
8450 },
8451 },
8452 {
8453 name: "CMPL",
8454 argLen: 2,
8455 asm: x86.ACMPL,
8456 reg: regInfo{
8457 inputs: []inputInfo{
8458 {0, 49151},
8459 {1, 49151},
8460 },
8461 },
8462 },
8463 {
8464 name: "CMPW",
8465 argLen: 2,
8466 asm: x86.ACMPW,
8467 reg: regInfo{
8468 inputs: []inputInfo{
8469 {0, 49151},
8470 {1, 49151},
8471 },
8472 },
8473 },
8474 {
8475 name: "CMPB",
8476 argLen: 2,
8477 asm: x86.ACMPB,
8478 reg: regInfo{
8479 inputs: []inputInfo{
8480 {0, 49151},
8481 {1, 49151},
8482 },
8483 },
8484 },
8485 {
8486 name: "CMPQconst",
8487 auxType: auxInt32,
8488 argLen: 1,
8489 asm: x86.ACMPQ,
8490 reg: regInfo{
8491 inputs: []inputInfo{
8492 {0, 49151},
8493 },
8494 },
8495 },
8496 {
8497 name: "CMPLconst",
8498 auxType: auxInt32,
8499 argLen: 1,
8500 asm: x86.ACMPL,
8501 reg: regInfo{
8502 inputs: []inputInfo{
8503 {0, 49151},
8504 },
8505 },
8506 },
8507 {
8508 name: "CMPWconst",
8509 auxType: auxInt16,
8510 argLen: 1,
8511 asm: x86.ACMPW,
8512 reg: regInfo{
8513 inputs: []inputInfo{
8514 {0, 49151},
8515 },
8516 },
8517 },
8518 {
8519 name: "CMPBconst",
8520 auxType: auxInt8,
8521 argLen: 1,
8522 asm: x86.ACMPB,
8523 reg: regInfo{
8524 inputs: []inputInfo{
8525 {0, 49151},
8526 },
8527 },
8528 },
8529 {
8530 name: "CMPQload",
8531 auxType: auxSymOff,
8532 argLen: 3,
8533 faultOnNilArg0: true,
8534 symEffect: SymRead,
8535 asm: x86.ACMPQ,
8536 reg: regInfo{
8537 inputs: []inputInfo{
8538 {1, 49151},
8539 {0, 4295032831},
8540 },
8541 },
8542 },
8543 {
8544 name: "CMPLload",
8545 auxType: auxSymOff,
8546 argLen: 3,
8547 faultOnNilArg0: true,
8548 symEffect: SymRead,
8549 asm: x86.ACMPL,
8550 reg: regInfo{
8551 inputs: []inputInfo{
8552 {1, 49151},
8553 {0, 4295032831},
8554 },
8555 },
8556 },
8557 {
8558 name: "CMPWload",
8559 auxType: auxSymOff,
8560 argLen: 3,
8561 faultOnNilArg0: true,
8562 symEffect: SymRead,
8563 asm: x86.ACMPW,
8564 reg: regInfo{
8565 inputs: []inputInfo{
8566 {1, 49151},
8567 {0, 4295032831},
8568 },
8569 },
8570 },
8571 {
8572 name: "CMPBload",
8573 auxType: auxSymOff,
8574 argLen: 3,
8575 faultOnNilArg0: true,
8576 symEffect: SymRead,
8577 asm: x86.ACMPB,
8578 reg: regInfo{
8579 inputs: []inputInfo{
8580 {1, 49151},
8581 {0, 4295032831},
8582 },
8583 },
8584 },
8585 {
8586 name: "CMPQconstload",
8587 auxType: auxSymValAndOff,
8588 argLen: 2,
8589 faultOnNilArg0: true,
8590 symEffect: SymRead,
8591 asm: x86.ACMPQ,
8592 reg: regInfo{
8593 inputs: []inputInfo{
8594 {0, 4295032831},
8595 },
8596 },
8597 },
8598 {
8599 name: "CMPLconstload",
8600 auxType: auxSymValAndOff,
8601 argLen: 2,
8602 faultOnNilArg0: true,
8603 symEffect: SymRead,
8604 asm: x86.ACMPL,
8605 reg: regInfo{
8606 inputs: []inputInfo{
8607 {0, 4295032831},
8608 },
8609 },
8610 },
8611 {
8612 name: "CMPWconstload",
8613 auxType: auxSymValAndOff,
8614 argLen: 2,
8615 faultOnNilArg0: true,
8616 symEffect: SymRead,
8617 asm: x86.ACMPW,
8618 reg: regInfo{
8619 inputs: []inputInfo{
8620 {0, 4295032831},
8621 },
8622 },
8623 },
8624 {
8625 name: "CMPBconstload",
8626 auxType: auxSymValAndOff,
8627 argLen: 2,
8628 faultOnNilArg0: true,
8629 symEffect: SymRead,
8630 asm: x86.ACMPB,
8631 reg: regInfo{
8632 inputs: []inputInfo{
8633 {0, 4295032831},
8634 },
8635 },
8636 },
8637 {
8638 name: "CMPQloadidx8",
8639 auxType: auxSymOff,
8640 argLen: 4,
8641 symEffect: SymRead,
8642 asm: x86.ACMPQ,
8643 scale: 8,
8644 reg: regInfo{
8645 inputs: []inputInfo{
8646 {1, 49151},
8647 {2, 49151},
8648 {0, 4295032831},
8649 },
8650 },
8651 },
8652 {
8653 name: "CMPQloadidx1",
8654 auxType: auxSymOff,
8655 argLen: 4,
8656 commutative: true,
8657 symEffect: SymRead,
8658 asm: x86.ACMPQ,
8659 scale: 1,
8660 reg: regInfo{
8661 inputs: []inputInfo{
8662 {1, 49151},
8663 {2, 49151},
8664 {0, 4295032831},
8665 },
8666 },
8667 },
8668 {
8669 name: "CMPLloadidx4",
8670 auxType: auxSymOff,
8671 argLen: 4,
8672 symEffect: SymRead,
8673 asm: x86.ACMPL,
8674 scale: 4,
8675 reg: regInfo{
8676 inputs: []inputInfo{
8677 {1, 49151},
8678 {2, 49151},
8679 {0, 4295032831},
8680 },
8681 },
8682 },
8683 {
8684 name: "CMPLloadidx1",
8685 auxType: auxSymOff,
8686 argLen: 4,
8687 commutative: true,
8688 symEffect: SymRead,
8689 asm: x86.ACMPL,
8690 scale: 1,
8691 reg: regInfo{
8692 inputs: []inputInfo{
8693 {1, 49151},
8694 {2, 49151},
8695 {0, 4295032831},
8696 },
8697 },
8698 },
8699 {
8700 name: "CMPWloadidx2",
8701 auxType: auxSymOff,
8702 argLen: 4,
8703 symEffect: SymRead,
8704 asm: x86.ACMPW,
8705 scale: 2,
8706 reg: regInfo{
8707 inputs: []inputInfo{
8708 {1, 49151},
8709 {2, 49151},
8710 {0, 4295032831},
8711 },
8712 },
8713 },
8714 {
8715 name: "CMPWloadidx1",
8716 auxType: auxSymOff,
8717 argLen: 4,
8718 commutative: true,
8719 symEffect: SymRead,
8720 asm: x86.ACMPW,
8721 scale: 1,
8722 reg: regInfo{
8723 inputs: []inputInfo{
8724 {1, 49151},
8725 {2, 49151},
8726 {0, 4295032831},
8727 },
8728 },
8729 },
8730 {
8731 name: "CMPBloadidx1",
8732 auxType: auxSymOff,
8733 argLen: 4,
8734 commutative: true,
8735 symEffect: SymRead,
8736 asm: x86.ACMPB,
8737 scale: 1,
8738 reg: regInfo{
8739 inputs: []inputInfo{
8740 {1, 49151},
8741 {2, 49151},
8742 {0, 4295032831},
8743 },
8744 },
8745 },
8746 {
8747 name: "CMPQconstloadidx8",
8748 auxType: auxSymValAndOff,
8749 argLen: 3,
8750 symEffect: SymRead,
8751 asm: x86.ACMPQ,
8752 scale: 8,
8753 reg: regInfo{
8754 inputs: []inputInfo{
8755 {1, 49151},
8756 {0, 4295032831},
8757 },
8758 },
8759 },
8760 {
8761 name: "CMPQconstloadidx1",
8762 auxType: auxSymValAndOff,
8763 argLen: 3,
8764 commutative: true,
8765 symEffect: SymRead,
8766 asm: x86.ACMPQ,
8767 scale: 1,
8768 reg: regInfo{
8769 inputs: []inputInfo{
8770 {1, 49151},
8771 {0, 4295032831},
8772 },
8773 },
8774 },
8775 {
8776 name: "CMPLconstloadidx4",
8777 auxType: auxSymValAndOff,
8778 argLen: 3,
8779 symEffect: SymRead,
8780 asm: x86.ACMPL,
8781 scale: 4,
8782 reg: regInfo{
8783 inputs: []inputInfo{
8784 {1, 49151},
8785 {0, 4295032831},
8786 },
8787 },
8788 },
8789 {
8790 name: "CMPLconstloadidx1",
8791 auxType: auxSymValAndOff,
8792 argLen: 3,
8793 commutative: true,
8794 symEffect: SymRead,
8795 asm: x86.ACMPL,
8796 scale: 1,
8797 reg: regInfo{
8798 inputs: []inputInfo{
8799 {1, 49151},
8800 {0, 4295032831},
8801 },
8802 },
8803 },
8804 {
8805 name: "CMPWconstloadidx2",
8806 auxType: auxSymValAndOff,
8807 argLen: 3,
8808 symEffect: SymRead,
8809 asm: x86.ACMPW,
8810 scale: 2,
8811 reg: regInfo{
8812 inputs: []inputInfo{
8813 {1, 49151},
8814 {0, 4295032831},
8815 },
8816 },
8817 },
8818 {
8819 name: "CMPWconstloadidx1",
8820 auxType: auxSymValAndOff,
8821 argLen: 3,
8822 commutative: true,
8823 symEffect: SymRead,
8824 asm: x86.ACMPW,
8825 scale: 1,
8826 reg: regInfo{
8827 inputs: []inputInfo{
8828 {1, 49151},
8829 {0, 4295032831},
8830 },
8831 },
8832 },
8833 {
8834 name: "CMPBconstloadidx1",
8835 auxType: auxSymValAndOff,
8836 argLen: 3,
8837 commutative: true,
8838 symEffect: SymRead,
8839 asm: x86.ACMPB,
8840 scale: 1,
8841 reg: regInfo{
8842 inputs: []inputInfo{
8843 {1, 49151},
8844 {0, 4295032831},
8845 },
8846 },
8847 },
8848 {
8849 name: "UCOMISS",
8850 argLen: 2,
8851 asm: x86.AUCOMISS,
8852 reg: regInfo{
8853 inputs: []inputInfo{
8854 {0, 2147418112},
8855 {1, 2147418112},
8856 },
8857 },
8858 },
8859 {
8860 name: "UCOMISD",
8861 argLen: 2,
8862 asm: x86.AUCOMISD,
8863 reg: regInfo{
8864 inputs: []inputInfo{
8865 {0, 2147418112},
8866 {1, 2147418112},
8867 },
8868 },
8869 },
8870 {
8871 name: "BTL",
8872 argLen: 2,
8873 asm: x86.ABTL,
8874 reg: regInfo{
8875 inputs: []inputInfo{
8876 {0, 49151},
8877 {1, 49151},
8878 },
8879 },
8880 },
8881 {
8882 name: "BTQ",
8883 argLen: 2,
8884 asm: x86.ABTQ,
8885 reg: regInfo{
8886 inputs: []inputInfo{
8887 {0, 49151},
8888 {1, 49151},
8889 },
8890 },
8891 },
8892 {
8893 name: "BTCL",
8894 argLen: 2,
8895 resultInArg0: true,
8896 clobberFlags: true,
8897 asm: x86.ABTCL,
8898 reg: regInfo{
8899 inputs: []inputInfo{
8900 {0, 49135},
8901 {1, 49135},
8902 },
8903 outputs: []outputInfo{
8904 {0, 49135},
8905 },
8906 },
8907 },
8908 {
8909 name: "BTCQ",
8910 argLen: 2,
8911 resultInArg0: true,
8912 clobberFlags: true,
8913 asm: x86.ABTCQ,
8914 reg: regInfo{
8915 inputs: []inputInfo{
8916 {0, 49135},
8917 {1, 49135},
8918 },
8919 outputs: []outputInfo{
8920 {0, 49135},
8921 },
8922 },
8923 },
8924 {
8925 name: "BTRL",
8926 argLen: 2,
8927 resultInArg0: true,
8928 clobberFlags: true,
8929 asm: x86.ABTRL,
8930 reg: regInfo{
8931 inputs: []inputInfo{
8932 {0, 49135},
8933 {1, 49135},
8934 },
8935 outputs: []outputInfo{
8936 {0, 49135},
8937 },
8938 },
8939 },
8940 {
8941 name: "BTRQ",
8942 argLen: 2,
8943 resultInArg0: true,
8944 clobberFlags: true,
8945 asm: x86.ABTRQ,
8946 reg: regInfo{
8947 inputs: []inputInfo{
8948 {0, 49135},
8949 {1, 49135},
8950 },
8951 outputs: []outputInfo{
8952 {0, 49135},
8953 },
8954 },
8955 },
8956 {
8957 name: "BTSL",
8958 argLen: 2,
8959 resultInArg0: true,
8960 clobberFlags: true,
8961 asm: x86.ABTSL,
8962 reg: regInfo{
8963 inputs: []inputInfo{
8964 {0, 49135},
8965 {1, 49135},
8966 },
8967 outputs: []outputInfo{
8968 {0, 49135},
8969 },
8970 },
8971 },
8972 {
8973 name: "BTSQ",
8974 argLen: 2,
8975 resultInArg0: true,
8976 clobberFlags: true,
8977 asm: x86.ABTSQ,
8978 reg: regInfo{
8979 inputs: []inputInfo{
8980 {0, 49135},
8981 {1, 49135},
8982 },
8983 outputs: []outputInfo{
8984 {0, 49135},
8985 },
8986 },
8987 },
8988 {
8989 name: "BTLconst",
8990 auxType: auxInt8,
8991 argLen: 1,
8992 asm: x86.ABTL,
8993 reg: regInfo{
8994 inputs: []inputInfo{
8995 {0, 49151},
8996 },
8997 },
8998 },
8999 {
9000 name: "BTQconst",
9001 auxType: auxInt8,
9002 argLen: 1,
9003 asm: x86.ABTQ,
9004 reg: regInfo{
9005 inputs: []inputInfo{
9006 {0, 49151},
9007 },
9008 },
9009 },
9010 {
9011 name: "BTCQconst",
9012 auxType: auxInt8,
9013 argLen: 1,
9014 resultInArg0: true,
9015 clobberFlags: true,
9016 asm: x86.ABTCQ,
9017 reg: regInfo{
9018 inputs: []inputInfo{
9019 {0, 49135},
9020 },
9021 outputs: []outputInfo{
9022 {0, 49135},
9023 },
9024 },
9025 },
9026 {
9027 name: "BTRQconst",
9028 auxType: auxInt8,
9029 argLen: 1,
9030 resultInArg0: true,
9031 clobberFlags: true,
9032 asm: x86.ABTRQ,
9033 reg: regInfo{
9034 inputs: []inputInfo{
9035 {0, 49135},
9036 },
9037 outputs: []outputInfo{
9038 {0, 49135},
9039 },
9040 },
9041 },
9042 {
9043 name: "BTSQconst",
9044 auxType: auxInt8,
9045 argLen: 1,
9046 resultInArg0: true,
9047 clobberFlags: true,
9048 asm: x86.ABTSQ,
9049 reg: regInfo{
9050 inputs: []inputInfo{
9051 {0, 49135},
9052 },
9053 outputs: []outputInfo{
9054 {0, 49135},
9055 },
9056 },
9057 },
9058 {
9059 name: "BTSQconstmodify",
9060 auxType: auxSymValAndOff,
9061 argLen: 2,
9062 clobberFlags: true,
9063 faultOnNilArg0: true,
9064 symEffect: SymRead | SymWrite,
9065 asm: x86.ABTSQ,
9066 reg: regInfo{
9067 inputs: []inputInfo{
9068 {0, 4295032831},
9069 },
9070 },
9071 },
9072 {
9073 name: "BTRQconstmodify",
9074 auxType: auxSymValAndOff,
9075 argLen: 2,
9076 clobberFlags: true,
9077 faultOnNilArg0: true,
9078 symEffect: SymRead | SymWrite,
9079 asm: x86.ABTRQ,
9080 reg: regInfo{
9081 inputs: []inputInfo{
9082 {0, 4295032831},
9083 },
9084 },
9085 },
9086 {
9087 name: "BTCQconstmodify",
9088 auxType: auxSymValAndOff,
9089 argLen: 2,
9090 clobberFlags: true,
9091 faultOnNilArg0: true,
9092 symEffect: SymRead | SymWrite,
9093 asm: x86.ABTCQ,
9094 reg: regInfo{
9095 inputs: []inputInfo{
9096 {0, 4295032831},
9097 },
9098 },
9099 },
9100 {
9101 name: "TESTQ",
9102 argLen: 2,
9103 commutative: true,
9104 asm: x86.ATESTQ,
9105 reg: regInfo{
9106 inputs: []inputInfo{
9107 {0, 49151},
9108 {1, 49151},
9109 },
9110 },
9111 },
9112 {
9113 name: "TESTL",
9114 argLen: 2,
9115 commutative: true,
9116 asm: x86.ATESTL,
9117 reg: regInfo{
9118 inputs: []inputInfo{
9119 {0, 49151},
9120 {1, 49151},
9121 },
9122 },
9123 },
9124 {
9125 name: "TESTW",
9126 argLen: 2,
9127 commutative: true,
9128 asm: x86.ATESTW,
9129 reg: regInfo{
9130 inputs: []inputInfo{
9131 {0, 49151},
9132 {1, 49151},
9133 },
9134 },
9135 },
9136 {
9137 name: "TESTB",
9138 argLen: 2,
9139 commutative: true,
9140 asm: x86.ATESTB,
9141 reg: regInfo{
9142 inputs: []inputInfo{
9143 {0, 49151},
9144 {1, 49151},
9145 },
9146 },
9147 },
9148 {
9149 name: "TESTQconst",
9150 auxType: auxInt32,
9151 argLen: 1,
9152 asm: x86.ATESTQ,
9153 reg: regInfo{
9154 inputs: []inputInfo{
9155 {0, 49151},
9156 },
9157 },
9158 },
9159 {
9160 name: "TESTLconst",
9161 auxType: auxInt32,
9162 argLen: 1,
9163 asm: x86.ATESTL,
9164 reg: regInfo{
9165 inputs: []inputInfo{
9166 {0, 49151},
9167 },
9168 },
9169 },
9170 {
9171 name: "TESTWconst",
9172 auxType: auxInt16,
9173 argLen: 1,
9174 asm: x86.ATESTW,
9175 reg: regInfo{
9176 inputs: []inputInfo{
9177 {0, 49151},
9178 },
9179 },
9180 },
9181 {
9182 name: "TESTBconst",
9183 auxType: auxInt8,
9184 argLen: 1,
9185 asm: x86.ATESTB,
9186 reg: regInfo{
9187 inputs: []inputInfo{
9188 {0, 49151},
9189 },
9190 },
9191 },
9192 {
9193 name: "SHLQ",
9194 argLen: 2,
9195 resultInArg0: true,
9196 clobberFlags: true,
9197 asm: x86.ASHLQ,
9198 reg: regInfo{
9199 inputs: []inputInfo{
9200 {1, 2},
9201 {0, 49135},
9202 },
9203 outputs: []outputInfo{
9204 {0, 49135},
9205 },
9206 },
9207 },
9208 {
9209 name: "SHLL",
9210 argLen: 2,
9211 resultInArg0: true,
9212 clobberFlags: true,
9213 asm: x86.ASHLL,
9214 reg: regInfo{
9215 inputs: []inputInfo{
9216 {1, 2},
9217 {0, 49135},
9218 },
9219 outputs: []outputInfo{
9220 {0, 49135},
9221 },
9222 },
9223 },
9224 {
9225 name: "SHLQconst",
9226 auxType: auxInt8,
9227 argLen: 1,
9228 resultInArg0: true,
9229 clobberFlags: true,
9230 asm: x86.ASHLQ,
9231 reg: regInfo{
9232 inputs: []inputInfo{
9233 {0, 49135},
9234 },
9235 outputs: []outputInfo{
9236 {0, 49135},
9237 },
9238 },
9239 },
9240 {
9241 name: "SHLLconst",
9242 auxType: auxInt8,
9243 argLen: 1,
9244 resultInArg0: true,
9245 clobberFlags: true,
9246 asm: x86.ASHLL,
9247 reg: regInfo{
9248 inputs: []inputInfo{
9249 {0, 49135},
9250 },
9251 outputs: []outputInfo{
9252 {0, 49135},
9253 },
9254 },
9255 },
9256 {
9257 name: "SHRQ",
9258 argLen: 2,
9259 resultInArg0: true,
9260 clobberFlags: true,
9261 asm: x86.ASHRQ,
9262 reg: regInfo{
9263 inputs: []inputInfo{
9264 {1, 2},
9265 {0, 49135},
9266 },
9267 outputs: []outputInfo{
9268 {0, 49135},
9269 },
9270 },
9271 },
9272 {
9273 name: "SHRL",
9274 argLen: 2,
9275 resultInArg0: true,
9276 clobberFlags: true,
9277 asm: x86.ASHRL,
9278 reg: regInfo{
9279 inputs: []inputInfo{
9280 {1, 2},
9281 {0, 49135},
9282 },
9283 outputs: []outputInfo{
9284 {0, 49135},
9285 },
9286 },
9287 },
9288 {
9289 name: "SHRW",
9290 argLen: 2,
9291 resultInArg0: true,
9292 clobberFlags: true,
9293 asm: x86.ASHRW,
9294 reg: regInfo{
9295 inputs: []inputInfo{
9296 {1, 2},
9297 {0, 49135},
9298 },
9299 outputs: []outputInfo{
9300 {0, 49135},
9301 },
9302 },
9303 },
9304 {
9305 name: "SHRB",
9306 argLen: 2,
9307 resultInArg0: true,
9308 clobberFlags: true,
9309 asm: x86.ASHRB,
9310 reg: regInfo{
9311 inputs: []inputInfo{
9312 {1, 2},
9313 {0, 49135},
9314 },
9315 outputs: []outputInfo{
9316 {0, 49135},
9317 },
9318 },
9319 },
9320 {
9321 name: "SHRQconst",
9322 auxType: auxInt8,
9323 argLen: 1,
9324 resultInArg0: true,
9325 clobberFlags: true,
9326 asm: x86.ASHRQ,
9327 reg: regInfo{
9328 inputs: []inputInfo{
9329 {0, 49135},
9330 },
9331 outputs: []outputInfo{
9332 {0, 49135},
9333 },
9334 },
9335 },
9336 {
9337 name: "SHRLconst",
9338 auxType: auxInt8,
9339 argLen: 1,
9340 resultInArg0: true,
9341 clobberFlags: true,
9342 asm: x86.ASHRL,
9343 reg: regInfo{
9344 inputs: []inputInfo{
9345 {0, 49135},
9346 },
9347 outputs: []outputInfo{
9348 {0, 49135},
9349 },
9350 },
9351 },
9352 {
9353 name: "SHRWconst",
9354 auxType: auxInt8,
9355 argLen: 1,
9356 resultInArg0: true,
9357 clobberFlags: true,
9358 asm: x86.ASHRW,
9359 reg: regInfo{
9360 inputs: []inputInfo{
9361 {0, 49135},
9362 },
9363 outputs: []outputInfo{
9364 {0, 49135},
9365 },
9366 },
9367 },
9368 {
9369 name: "SHRBconst",
9370 auxType: auxInt8,
9371 argLen: 1,
9372 resultInArg0: true,
9373 clobberFlags: true,
9374 asm: x86.ASHRB,
9375 reg: regInfo{
9376 inputs: []inputInfo{
9377 {0, 49135},
9378 },
9379 outputs: []outputInfo{
9380 {0, 49135},
9381 },
9382 },
9383 },
9384 {
9385 name: "SARQ",
9386 argLen: 2,
9387 resultInArg0: true,
9388 clobberFlags: true,
9389 asm: x86.ASARQ,
9390 reg: regInfo{
9391 inputs: []inputInfo{
9392 {1, 2},
9393 {0, 49135},
9394 },
9395 outputs: []outputInfo{
9396 {0, 49135},
9397 },
9398 },
9399 },
9400 {
9401 name: "SARL",
9402 argLen: 2,
9403 resultInArg0: true,
9404 clobberFlags: true,
9405 asm: x86.ASARL,
9406 reg: regInfo{
9407 inputs: []inputInfo{
9408 {1, 2},
9409 {0, 49135},
9410 },
9411 outputs: []outputInfo{
9412 {0, 49135},
9413 },
9414 },
9415 },
9416 {
9417 name: "SARW",
9418 argLen: 2,
9419 resultInArg0: true,
9420 clobberFlags: true,
9421 asm: x86.ASARW,
9422 reg: regInfo{
9423 inputs: []inputInfo{
9424 {1, 2},
9425 {0, 49135},
9426 },
9427 outputs: []outputInfo{
9428 {0, 49135},
9429 },
9430 },
9431 },
9432 {
9433 name: "SARB",
9434 argLen: 2,
9435 resultInArg0: true,
9436 clobberFlags: true,
9437 asm: x86.ASARB,
9438 reg: regInfo{
9439 inputs: []inputInfo{
9440 {1, 2},
9441 {0, 49135},
9442 },
9443 outputs: []outputInfo{
9444 {0, 49135},
9445 },
9446 },
9447 },
9448 {
9449 name: "SARQconst",
9450 auxType: auxInt8,
9451 argLen: 1,
9452 resultInArg0: true,
9453 clobberFlags: true,
9454 asm: x86.ASARQ,
9455 reg: regInfo{
9456 inputs: []inputInfo{
9457 {0, 49135},
9458 },
9459 outputs: []outputInfo{
9460 {0, 49135},
9461 },
9462 },
9463 },
9464 {
9465 name: "SARLconst",
9466 auxType: auxInt8,
9467 argLen: 1,
9468 resultInArg0: true,
9469 clobberFlags: true,
9470 asm: x86.ASARL,
9471 reg: regInfo{
9472 inputs: []inputInfo{
9473 {0, 49135},
9474 },
9475 outputs: []outputInfo{
9476 {0, 49135},
9477 },
9478 },
9479 },
9480 {
9481 name: "SARWconst",
9482 auxType: auxInt8,
9483 argLen: 1,
9484 resultInArg0: true,
9485 clobberFlags: true,
9486 asm: x86.ASARW,
9487 reg: regInfo{
9488 inputs: []inputInfo{
9489 {0, 49135},
9490 },
9491 outputs: []outputInfo{
9492 {0, 49135},
9493 },
9494 },
9495 },
9496 {
9497 name: "SARBconst",
9498 auxType: auxInt8,
9499 argLen: 1,
9500 resultInArg0: true,
9501 clobberFlags: true,
9502 asm: x86.ASARB,
9503 reg: regInfo{
9504 inputs: []inputInfo{
9505 {0, 49135},
9506 },
9507 outputs: []outputInfo{
9508 {0, 49135},
9509 },
9510 },
9511 },
9512 {
9513 name: "SHRDQ",
9514 argLen: 3,
9515 resultInArg0: true,
9516 clobberFlags: true,
9517 asm: x86.ASHRQ,
9518 reg: regInfo{
9519 inputs: []inputInfo{
9520 {2, 2},
9521 {0, 49135},
9522 {1, 49135},
9523 },
9524 outputs: []outputInfo{
9525 {0, 49135},
9526 },
9527 },
9528 },
9529 {
9530 name: "SHLDQ",
9531 argLen: 3,
9532 resultInArg0: true,
9533 clobberFlags: true,
9534 asm: x86.ASHLQ,
9535 reg: regInfo{
9536 inputs: []inputInfo{
9537 {2, 2},
9538 {0, 49135},
9539 {1, 49135},
9540 },
9541 outputs: []outputInfo{
9542 {0, 49135},
9543 },
9544 },
9545 },
9546 {
9547 name: "ROLQ",
9548 argLen: 2,
9549 resultInArg0: true,
9550 clobberFlags: true,
9551 asm: x86.AROLQ,
9552 reg: regInfo{
9553 inputs: []inputInfo{
9554 {1, 2},
9555 {0, 49135},
9556 },
9557 outputs: []outputInfo{
9558 {0, 49135},
9559 },
9560 },
9561 },
9562 {
9563 name: "ROLL",
9564 argLen: 2,
9565 resultInArg0: true,
9566 clobberFlags: true,
9567 asm: x86.AROLL,
9568 reg: regInfo{
9569 inputs: []inputInfo{
9570 {1, 2},
9571 {0, 49135},
9572 },
9573 outputs: []outputInfo{
9574 {0, 49135},
9575 },
9576 },
9577 },
9578 {
9579 name: "ROLW",
9580 argLen: 2,
9581 resultInArg0: true,
9582 clobberFlags: true,
9583 asm: x86.AROLW,
9584 reg: regInfo{
9585 inputs: []inputInfo{
9586 {1, 2},
9587 {0, 49135},
9588 },
9589 outputs: []outputInfo{
9590 {0, 49135},
9591 },
9592 },
9593 },
9594 {
9595 name: "ROLB",
9596 argLen: 2,
9597 resultInArg0: true,
9598 clobberFlags: true,
9599 asm: x86.AROLB,
9600 reg: regInfo{
9601 inputs: []inputInfo{
9602 {1, 2},
9603 {0, 49135},
9604 },
9605 outputs: []outputInfo{
9606 {0, 49135},
9607 },
9608 },
9609 },
9610 {
9611 name: "RORQ",
9612 argLen: 2,
9613 resultInArg0: true,
9614 clobberFlags: true,
9615 asm: x86.ARORQ,
9616 reg: regInfo{
9617 inputs: []inputInfo{
9618 {1, 2},
9619 {0, 49135},
9620 },
9621 outputs: []outputInfo{
9622 {0, 49135},
9623 },
9624 },
9625 },
9626 {
9627 name: "RORL",
9628 argLen: 2,
9629 resultInArg0: true,
9630 clobberFlags: true,
9631 asm: x86.ARORL,
9632 reg: regInfo{
9633 inputs: []inputInfo{
9634 {1, 2},
9635 {0, 49135},
9636 },
9637 outputs: []outputInfo{
9638 {0, 49135},
9639 },
9640 },
9641 },
9642 {
9643 name: "RORW",
9644 argLen: 2,
9645 resultInArg0: true,
9646 clobberFlags: true,
9647 asm: x86.ARORW,
9648 reg: regInfo{
9649 inputs: []inputInfo{
9650 {1, 2},
9651 {0, 49135},
9652 },
9653 outputs: []outputInfo{
9654 {0, 49135},
9655 },
9656 },
9657 },
9658 {
9659 name: "RORB",
9660 argLen: 2,
9661 resultInArg0: true,
9662 clobberFlags: true,
9663 asm: x86.ARORB,
9664 reg: regInfo{
9665 inputs: []inputInfo{
9666 {1, 2},
9667 {0, 49135},
9668 },
9669 outputs: []outputInfo{
9670 {0, 49135},
9671 },
9672 },
9673 },
9674 {
9675 name: "ROLQconst",
9676 auxType: auxInt8,
9677 argLen: 1,
9678 resultInArg0: true,
9679 clobberFlags: true,
9680 asm: x86.AROLQ,
9681 reg: regInfo{
9682 inputs: []inputInfo{
9683 {0, 49135},
9684 },
9685 outputs: []outputInfo{
9686 {0, 49135},
9687 },
9688 },
9689 },
9690 {
9691 name: "ROLLconst",
9692 auxType: auxInt8,
9693 argLen: 1,
9694 resultInArg0: true,
9695 clobberFlags: true,
9696 asm: x86.AROLL,
9697 reg: regInfo{
9698 inputs: []inputInfo{
9699 {0, 49135},
9700 },
9701 outputs: []outputInfo{
9702 {0, 49135},
9703 },
9704 },
9705 },
9706 {
9707 name: "ROLWconst",
9708 auxType: auxInt8,
9709 argLen: 1,
9710 resultInArg0: true,
9711 clobberFlags: true,
9712 asm: x86.AROLW,
9713 reg: regInfo{
9714 inputs: []inputInfo{
9715 {0, 49135},
9716 },
9717 outputs: []outputInfo{
9718 {0, 49135},
9719 },
9720 },
9721 },
9722 {
9723 name: "ROLBconst",
9724 auxType: auxInt8,
9725 argLen: 1,
9726 resultInArg0: true,
9727 clobberFlags: true,
9728 asm: x86.AROLB,
9729 reg: regInfo{
9730 inputs: []inputInfo{
9731 {0, 49135},
9732 },
9733 outputs: []outputInfo{
9734 {0, 49135},
9735 },
9736 },
9737 },
9738 {
9739 name: "ADDLload",
9740 auxType: auxSymOff,
9741 argLen: 3,
9742 resultInArg0: true,
9743 clobberFlags: true,
9744 faultOnNilArg1: true,
9745 symEffect: SymRead,
9746 asm: x86.AADDL,
9747 reg: regInfo{
9748 inputs: []inputInfo{
9749 {0, 49135},
9750 {1, 4295032831},
9751 },
9752 outputs: []outputInfo{
9753 {0, 49135},
9754 },
9755 },
9756 },
9757 {
9758 name: "ADDQload",
9759 auxType: auxSymOff,
9760 argLen: 3,
9761 resultInArg0: true,
9762 clobberFlags: true,
9763 faultOnNilArg1: true,
9764 symEffect: SymRead,
9765 asm: x86.AADDQ,
9766 reg: regInfo{
9767 inputs: []inputInfo{
9768 {0, 49135},
9769 {1, 4295032831},
9770 },
9771 outputs: []outputInfo{
9772 {0, 49135},
9773 },
9774 },
9775 },
9776 {
9777 name: "SUBQload",
9778 auxType: auxSymOff,
9779 argLen: 3,
9780 resultInArg0: true,
9781 clobberFlags: true,
9782 faultOnNilArg1: true,
9783 symEffect: SymRead,
9784 asm: x86.ASUBQ,
9785 reg: regInfo{
9786 inputs: []inputInfo{
9787 {0, 49135},
9788 {1, 4295032831},
9789 },
9790 outputs: []outputInfo{
9791 {0, 49135},
9792 },
9793 },
9794 },
9795 {
9796 name: "SUBLload",
9797 auxType: auxSymOff,
9798 argLen: 3,
9799 resultInArg0: true,
9800 clobberFlags: true,
9801 faultOnNilArg1: true,
9802 symEffect: SymRead,
9803 asm: x86.ASUBL,
9804 reg: regInfo{
9805 inputs: []inputInfo{
9806 {0, 49135},
9807 {1, 4295032831},
9808 },
9809 outputs: []outputInfo{
9810 {0, 49135},
9811 },
9812 },
9813 },
9814 {
9815 name: "ANDLload",
9816 auxType: auxSymOff,
9817 argLen: 3,
9818 resultInArg0: true,
9819 clobberFlags: true,
9820 faultOnNilArg1: true,
9821 symEffect: SymRead,
9822 asm: x86.AANDL,
9823 reg: regInfo{
9824 inputs: []inputInfo{
9825 {0, 49135},
9826 {1, 4295032831},
9827 },
9828 outputs: []outputInfo{
9829 {0, 49135},
9830 },
9831 },
9832 },
9833 {
9834 name: "ANDQload",
9835 auxType: auxSymOff,
9836 argLen: 3,
9837 resultInArg0: true,
9838 clobberFlags: true,
9839 faultOnNilArg1: true,
9840 symEffect: SymRead,
9841 asm: x86.AANDQ,
9842 reg: regInfo{
9843 inputs: []inputInfo{
9844 {0, 49135},
9845 {1, 4295032831},
9846 },
9847 outputs: []outputInfo{
9848 {0, 49135},
9849 },
9850 },
9851 },
9852 {
9853 name: "ORQload",
9854 auxType: auxSymOff,
9855 argLen: 3,
9856 resultInArg0: true,
9857 clobberFlags: true,
9858 faultOnNilArg1: true,
9859 symEffect: SymRead,
9860 asm: x86.AORQ,
9861 reg: regInfo{
9862 inputs: []inputInfo{
9863 {0, 49135},
9864 {1, 4295032831},
9865 },
9866 outputs: []outputInfo{
9867 {0, 49135},
9868 },
9869 },
9870 },
9871 {
9872 name: "ORLload",
9873 auxType: auxSymOff,
9874 argLen: 3,
9875 resultInArg0: true,
9876 clobberFlags: true,
9877 faultOnNilArg1: true,
9878 symEffect: SymRead,
9879 asm: x86.AORL,
9880 reg: regInfo{
9881 inputs: []inputInfo{
9882 {0, 49135},
9883 {1, 4295032831},
9884 },
9885 outputs: []outputInfo{
9886 {0, 49135},
9887 },
9888 },
9889 },
9890 {
9891 name: "XORQload",
9892 auxType: auxSymOff,
9893 argLen: 3,
9894 resultInArg0: true,
9895 clobberFlags: true,
9896 faultOnNilArg1: true,
9897 symEffect: SymRead,
9898 asm: x86.AXORQ,
9899 reg: regInfo{
9900 inputs: []inputInfo{
9901 {0, 49135},
9902 {1, 4295032831},
9903 },
9904 outputs: []outputInfo{
9905 {0, 49135},
9906 },
9907 },
9908 },
9909 {
9910 name: "XORLload",
9911 auxType: auxSymOff,
9912 argLen: 3,
9913 resultInArg0: true,
9914 clobberFlags: true,
9915 faultOnNilArg1: true,
9916 symEffect: SymRead,
9917 asm: x86.AXORL,
9918 reg: regInfo{
9919 inputs: []inputInfo{
9920 {0, 49135},
9921 {1, 4295032831},
9922 },
9923 outputs: []outputInfo{
9924 {0, 49135},
9925 },
9926 },
9927 },
9928 {
9929 name: "ADDLloadidx1",
9930 auxType: auxSymOff,
9931 argLen: 4,
9932 resultInArg0: true,
9933 clobberFlags: true,
9934 symEffect: SymRead,
9935 asm: x86.AADDL,
9936 scale: 1,
9937 reg: regInfo{
9938 inputs: []inputInfo{
9939 {0, 49135},
9940 {2, 49151},
9941 {1, 4295032831},
9942 },
9943 outputs: []outputInfo{
9944 {0, 49135},
9945 },
9946 },
9947 },
9948 {
9949 name: "ADDLloadidx4",
9950 auxType: auxSymOff,
9951 argLen: 4,
9952 resultInArg0: true,
9953 clobberFlags: true,
9954 symEffect: SymRead,
9955 asm: x86.AADDL,
9956 scale: 4,
9957 reg: regInfo{
9958 inputs: []inputInfo{
9959 {0, 49135},
9960 {2, 49151},
9961 {1, 4295032831},
9962 },
9963 outputs: []outputInfo{
9964 {0, 49135},
9965 },
9966 },
9967 },
9968 {
9969 name: "ADDLloadidx8",
9970 auxType: auxSymOff,
9971 argLen: 4,
9972 resultInArg0: true,
9973 clobberFlags: true,
9974 symEffect: SymRead,
9975 asm: x86.AADDL,
9976 scale: 8,
9977 reg: regInfo{
9978 inputs: []inputInfo{
9979 {0, 49135},
9980 {2, 49151},
9981 {1, 4295032831},
9982 },
9983 outputs: []outputInfo{
9984 {0, 49135},
9985 },
9986 },
9987 },
9988 {
9989 name: "ADDQloadidx1",
9990 auxType: auxSymOff,
9991 argLen: 4,
9992 resultInArg0: true,
9993 clobberFlags: true,
9994 symEffect: SymRead,
9995 asm: x86.AADDQ,
9996 scale: 1,
9997 reg: regInfo{
9998 inputs: []inputInfo{
9999 {0, 49135},
10000 {2, 49151},
10001 {1, 4295032831},
10002 },
10003 outputs: []outputInfo{
10004 {0, 49135},
10005 },
10006 },
10007 },
10008 {
10009 name: "ADDQloadidx8",
10010 auxType: auxSymOff,
10011 argLen: 4,
10012 resultInArg0: true,
10013 clobberFlags: true,
10014 symEffect: SymRead,
10015 asm: x86.AADDQ,
10016 scale: 8,
10017 reg: regInfo{
10018 inputs: []inputInfo{
10019 {0, 49135},
10020 {2, 49151},
10021 {1, 4295032831},
10022 },
10023 outputs: []outputInfo{
10024 {0, 49135},
10025 },
10026 },
10027 },
10028 {
10029 name: "SUBLloadidx1",
10030 auxType: auxSymOff,
10031 argLen: 4,
10032 resultInArg0: true,
10033 clobberFlags: true,
10034 symEffect: SymRead,
10035 asm: x86.ASUBL,
10036 scale: 1,
10037 reg: regInfo{
10038 inputs: []inputInfo{
10039 {0, 49135},
10040 {2, 49151},
10041 {1, 4295032831},
10042 },
10043 outputs: []outputInfo{
10044 {0, 49135},
10045 },
10046 },
10047 },
10048 {
10049 name: "SUBLloadidx4",
10050 auxType: auxSymOff,
10051 argLen: 4,
10052 resultInArg0: true,
10053 clobberFlags: true,
10054 symEffect: SymRead,
10055 asm: x86.ASUBL,
10056 scale: 4,
10057 reg: regInfo{
10058 inputs: []inputInfo{
10059 {0, 49135},
10060 {2, 49151},
10061 {1, 4295032831},
10062 },
10063 outputs: []outputInfo{
10064 {0, 49135},
10065 },
10066 },
10067 },
10068 {
10069 name: "SUBLloadidx8",
10070 auxType: auxSymOff,
10071 argLen: 4,
10072 resultInArg0: true,
10073 clobberFlags: true,
10074 symEffect: SymRead,
10075 asm: x86.ASUBL,
10076 scale: 8,
10077 reg: regInfo{
10078 inputs: []inputInfo{
10079 {0, 49135},
10080 {2, 49151},
10081 {1, 4295032831},
10082 },
10083 outputs: []outputInfo{
10084 {0, 49135},
10085 },
10086 },
10087 },
10088 {
10089 name: "SUBQloadidx1",
10090 auxType: auxSymOff,
10091 argLen: 4,
10092 resultInArg0: true,
10093 clobberFlags: true,
10094 symEffect: SymRead,
10095 asm: x86.ASUBQ,
10096 scale: 1,
10097 reg: regInfo{
10098 inputs: []inputInfo{
10099 {0, 49135},
10100 {2, 49151},
10101 {1, 4295032831},
10102 },
10103 outputs: []outputInfo{
10104 {0, 49135},
10105 },
10106 },
10107 },
10108 {
10109 name: "SUBQloadidx8",
10110 auxType: auxSymOff,
10111 argLen: 4,
10112 resultInArg0: true,
10113 clobberFlags: true,
10114 symEffect: SymRead,
10115 asm: x86.ASUBQ,
10116 scale: 8,
10117 reg: regInfo{
10118 inputs: []inputInfo{
10119 {0, 49135},
10120 {2, 49151},
10121 {1, 4295032831},
10122 },
10123 outputs: []outputInfo{
10124 {0, 49135},
10125 },
10126 },
10127 },
10128 {
10129 name: "ANDLloadidx1",
10130 auxType: auxSymOff,
10131 argLen: 4,
10132 resultInArg0: true,
10133 clobberFlags: true,
10134 symEffect: SymRead,
10135 asm: x86.AANDL,
10136 scale: 1,
10137 reg: regInfo{
10138 inputs: []inputInfo{
10139 {0, 49135},
10140 {2, 49151},
10141 {1, 4295032831},
10142 },
10143 outputs: []outputInfo{
10144 {0, 49135},
10145 },
10146 },
10147 },
10148 {
10149 name: "ANDLloadidx4",
10150 auxType: auxSymOff,
10151 argLen: 4,
10152 resultInArg0: true,
10153 clobberFlags: true,
10154 symEffect: SymRead,
10155 asm: x86.AANDL,
10156 scale: 4,
10157 reg: regInfo{
10158 inputs: []inputInfo{
10159 {0, 49135},
10160 {2, 49151},
10161 {1, 4295032831},
10162 },
10163 outputs: []outputInfo{
10164 {0, 49135},
10165 },
10166 },
10167 },
10168 {
10169 name: "ANDLloadidx8",
10170 auxType: auxSymOff,
10171 argLen: 4,
10172 resultInArg0: true,
10173 clobberFlags: true,
10174 symEffect: SymRead,
10175 asm: x86.AANDL,
10176 scale: 8,
10177 reg: regInfo{
10178 inputs: []inputInfo{
10179 {0, 49135},
10180 {2, 49151},
10181 {1, 4295032831},
10182 },
10183 outputs: []outputInfo{
10184 {0, 49135},
10185 },
10186 },
10187 },
10188 {
10189 name: "ANDQloadidx1",
10190 auxType: auxSymOff,
10191 argLen: 4,
10192 resultInArg0: true,
10193 clobberFlags: true,
10194 symEffect: SymRead,
10195 asm: x86.AANDQ,
10196 scale: 1,
10197 reg: regInfo{
10198 inputs: []inputInfo{
10199 {0, 49135},
10200 {2, 49151},
10201 {1, 4295032831},
10202 },
10203 outputs: []outputInfo{
10204 {0, 49135},
10205 },
10206 },
10207 },
10208 {
10209 name: "ANDQloadidx8",
10210 auxType: auxSymOff,
10211 argLen: 4,
10212 resultInArg0: true,
10213 clobberFlags: true,
10214 symEffect: SymRead,
10215 asm: x86.AANDQ,
10216 scale: 8,
10217 reg: regInfo{
10218 inputs: []inputInfo{
10219 {0, 49135},
10220 {2, 49151},
10221 {1, 4295032831},
10222 },
10223 outputs: []outputInfo{
10224 {0, 49135},
10225 },
10226 },
10227 },
10228 {
10229 name: "ORLloadidx1",
10230 auxType: auxSymOff,
10231 argLen: 4,
10232 resultInArg0: true,
10233 clobberFlags: true,
10234 symEffect: SymRead,
10235 asm: x86.AORL,
10236 scale: 1,
10237 reg: regInfo{
10238 inputs: []inputInfo{
10239 {0, 49135},
10240 {2, 49151},
10241 {1, 4295032831},
10242 },
10243 outputs: []outputInfo{
10244 {0, 49135},
10245 },
10246 },
10247 },
10248 {
10249 name: "ORLloadidx4",
10250 auxType: auxSymOff,
10251 argLen: 4,
10252 resultInArg0: true,
10253 clobberFlags: true,
10254 symEffect: SymRead,
10255 asm: x86.AORL,
10256 scale: 4,
10257 reg: regInfo{
10258 inputs: []inputInfo{
10259 {0, 49135},
10260 {2, 49151},
10261 {1, 4295032831},
10262 },
10263 outputs: []outputInfo{
10264 {0, 49135},
10265 },
10266 },
10267 },
10268 {
10269 name: "ORLloadidx8",
10270 auxType: auxSymOff,
10271 argLen: 4,
10272 resultInArg0: true,
10273 clobberFlags: true,
10274 symEffect: SymRead,
10275 asm: x86.AORL,
10276 scale: 8,
10277 reg: regInfo{
10278 inputs: []inputInfo{
10279 {0, 49135},
10280 {2, 49151},
10281 {1, 4295032831},
10282 },
10283 outputs: []outputInfo{
10284 {0, 49135},
10285 },
10286 },
10287 },
10288 {
10289 name: "ORQloadidx1",
10290 auxType: auxSymOff,
10291 argLen: 4,
10292 resultInArg0: true,
10293 clobberFlags: true,
10294 symEffect: SymRead,
10295 asm: x86.AORQ,
10296 scale: 1,
10297 reg: regInfo{
10298 inputs: []inputInfo{
10299 {0, 49135},
10300 {2, 49151},
10301 {1, 4295032831},
10302 },
10303 outputs: []outputInfo{
10304 {0, 49135},
10305 },
10306 },
10307 },
10308 {
10309 name: "ORQloadidx8",
10310 auxType: auxSymOff,
10311 argLen: 4,
10312 resultInArg0: true,
10313 clobberFlags: true,
10314 symEffect: SymRead,
10315 asm: x86.AORQ,
10316 scale: 8,
10317 reg: regInfo{
10318 inputs: []inputInfo{
10319 {0, 49135},
10320 {2, 49151},
10321 {1, 4295032831},
10322 },
10323 outputs: []outputInfo{
10324 {0, 49135},
10325 },
10326 },
10327 },
10328 {
10329 name: "XORLloadidx1",
10330 auxType: auxSymOff,
10331 argLen: 4,
10332 resultInArg0: true,
10333 clobberFlags: true,
10334 symEffect: SymRead,
10335 asm: x86.AXORL,
10336 scale: 1,
10337 reg: regInfo{
10338 inputs: []inputInfo{
10339 {0, 49135},
10340 {2, 49151},
10341 {1, 4295032831},
10342 },
10343 outputs: []outputInfo{
10344 {0, 49135},
10345 },
10346 },
10347 },
10348 {
10349 name: "XORLloadidx4",
10350 auxType: auxSymOff,
10351 argLen: 4,
10352 resultInArg0: true,
10353 clobberFlags: true,
10354 symEffect: SymRead,
10355 asm: x86.AXORL,
10356 scale: 4,
10357 reg: regInfo{
10358 inputs: []inputInfo{
10359 {0, 49135},
10360 {2, 49151},
10361 {1, 4295032831},
10362 },
10363 outputs: []outputInfo{
10364 {0, 49135},
10365 },
10366 },
10367 },
10368 {
10369 name: "XORLloadidx8",
10370 auxType: auxSymOff,
10371 argLen: 4,
10372 resultInArg0: true,
10373 clobberFlags: true,
10374 symEffect: SymRead,
10375 asm: x86.AXORL,
10376 scale: 8,
10377 reg: regInfo{
10378 inputs: []inputInfo{
10379 {0, 49135},
10380 {2, 49151},
10381 {1, 4295032831},
10382 },
10383 outputs: []outputInfo{
10384 {0, 49135},
10385 },
10386 },
10387 },
10388 {
10389 name: "XORQloadidx1",
10390 auxType: auxSymOff,
10391 argLen: 4,
10392 resultInArg0: true,
10393 clobberFlags: true,
10394 symEffect: SymRead,
10395 asm: x86.AXORQ,
10396 scale: 1,
10397 reg: regInfo{
10398 inputs: []inputInfo{
10399 {0, 49135},
10400 {2, 49151},
10401 {1, 4295032831},
10402 },
10403 outputs: []outputInfo{
10404 {0, 49135},
10405 },
10406 },
10407 },
10408 {
10409 name: "XORQloadidx8",
10410 auxType: auxSymOff,
10411 argLen: 4,
10412 resultInArg0: true,
10413 clobberFlags: true,
10414 symEffect: SymRead,
10415 asm: x86.AXORQ,
10416 scale: 8,
10417 reg: regInfo{
10418 inputs: []inputInfo{
10419 {0, 49135},
10420 {2, 49151},
10421 {1, 4295032831},
10422 },
10423 outputs: []outputInfo{
10424 {0, 49135},
10425 },
10426 },
10427 },
10428 {
10429 name: "ADDQmodify",
10430 auxType: auxSymOff,
10431 argLen: 3,
10432 clobberFlags: true,
10433 faultOnNilArg0: true,
10434 symEffect: SymRead | SymWrite,
10435 asm: x86.AADDQ,
10436 reg: regInfo{
10437 inputs: []inputInfo{
10438 {1, 49151},
10439 {0, 4295032831},
10440 },
10441 },
10442 },
10443 {
10444 name: "SUBQmodify",
10445 auxType: auxSymOff,
10446 argLen: 3,
10447 clobberFlags: true,
10448 faultOnNilArg0: true,
10449 symEffect: SymRead | SymWrite,
10450 asm: x86.ASUBQ,
10451 reg: regInfo{
10452 inputs: []inputInfo{
10453 {1, 49151},
10454 {0, 4295032831},
10455 },
10456 },
10457 },
10458 {
10459 name: "ANDQmodify",
10460 auxType: auxSymOff,
10461 argLen: 3,
10462 clobberFlags: true,
10463 faultOnNilArg0: true,
10464 symEffect: SymRead | SymWrite,
10465 asm: x86.AANDQ,
10466 reg: regInfo{
10467 inputs: []inputInfo{
10468 {1, 49151},
10469 {0, 4295032831},
10470 },
10471 },
10472 },
10473 {
10474 name: "ORQmodify",
10475 auxType: auxSymOff,
10476 argLen: 3,
10477 clobberFlags: true,
10478 faultOnNilArg0: true,
10479 symEffect: SymRead | SymWrite,
10480 asm: x86.AORQ,
10481 reg: regInfo{
10482 inputs: []inputInfo{
10483 {1, 49151},
10484 {0, 4295032831},
10485 },
10486 },
10487 },
10488 {
10489 name: "XORQmodify",
10490 auxType: auxSymOff,
10491 argLen: 3,
10492 clobberFlags: true,
10493 faultOnNilArg0: true,
10494 symEffect: SymRead | SymWrite,
10495 asm: x86.AXORQ,
10496 reg: regInfo{
10497 inputs: []inputInfo{
10498 {1, 49151},
10499 {0, 4295032831},
10500 },
10501 },
10502 },
10503 {
10504 name: "ADDLmodify",
10505 auxType: auxSymOff,
10506 argLen: 3,
10507 clobberFlags: true,
10508 faultOnNilArg0: true,
10509 symEffect: SymRead | SymWrite,
10510 asm: x86.AADDL,
10511 reg: regInfo{
10512 inputs: []inputInfo{
10513 {1, 49151},
10514 {0, 4295032831},
10515 },
10516 },
10517 },
10518 {
10519 name: "SUBLmodify",
10520 auxType: auxSymOff,
10521 argLen: 3,
10522 clobberFlags: true,
10523 faultOnNilArg0: true,
10524 symEffect: SymRead | SymWrite,
10525 asm: x86.ASUBL,
10526 reg: regInfo{
10527 inputs: []inputInfo{
10528 {1, 49151},
10529 {0, 4295032831},
10530 },
10531 },
10532 },
10533 {
10534 name: "ANDLmodify",
10535 auxType: auxSymOff,
10536 argLen: 3,
10537 clobberFlags: true,
10538 faultOnNilArg0: true,
10539 symEffect: SymRead | SymWrite,
10540 asm: x86.AANDL,
10541 reg: regInfo{
10542 inputs: []inputInfo{
10543 {1, 49151},
10544 {0, 4295032831},
10545 },
10546 },
10547 },
10548 {
10549 name: "ORLmodify",
10550 auxType: auxSymOff,
10551 argLen: 3,
10552 clobberFlags: true,
10553 faultOnNilArg0: true,
10554 symEffect: SymRead | SymWrite,
10555 asm: x86.AORL,
10556 reg: regInfo{
10557 inputs: []inputInfo{
10558 {1, 49151},
10559 {0, 4295032831},
10560 },
10561 },
10562 },
10563 {
10564 name: "XORLmodify",
10565 auxType: auxSymOff,
10566 argLen: 3,
10567 clobberFlags: true,
10568 faultOnNilArg0: true,
10569 symEffect: SymRead | SymWrite,
10570 asm: x86.AXORL,
10571 reg: regInfo{
10572 inputs: []inputInfo{
10573 {1, 49151},
10574 {0, 4295032831},
10575 },
10576 },
10577 },
10578 {
10579 name: "ADDQmodifyidx1",
10580 auxType: auxSymOff,
10581 argLen: 4,
10582 clobberFlags: true,
10583 symEffect: SymRead | SymWrite,
10584 asm: x86.AADDQ,
10585 scale: 1,
10586 reg: regInfo{
10587 inputs: []inputInfo{
10588 {1, 49151},
10589 {2, 49151},
10590 {0, 4295032831},
10591 },
10592 },
10593 },
10594 {
10595 name: "ADDQmodifyidx8",
10596 auxType: auxSymOff,
10597 argLen: 4,
10598 clobberFlags: true,
10599 symEffect: SymRead | SymWrite,
10600 asm: x86.AADDQ,
10601 scale: 8,
10602 reg: regInfo{
10603 inputs: []inputInfo{
10604 {1, 49151},
10605 {2, 49151},
10606 {0, 4295032831},
10607 },
10608 },
10609 },
10610 {
10611 name: "SUBQmodifyidx1",
10612 auxType: auxSymOff,
10613 argLen: 4,
10614 clobberFlags: true,
10615 symEffect: SymRead | SymWrite,
10616 asm: x86.ASUBQ,
10617 scale: 1,
10618 reg: regInfo{
10619 inputs: []inputInfo{
10620 {1, 49151},
10621 {2, 49151},
10622 {0, 4295032831},
10623 },
10624 },
10625 },
10626 {
10627 name: "SUBQmodifyidx8",
10628 auxType: auxSymOff,
10629 argLen: 4,
10630 clobberFlags: true,
10631 symEffect: SymRead | SymWrite,
10632 asm: x86.ASUBQ,
10633 scale: 8,
10634 reg: regInfo{
10635 inputs: []inputInfo{
10636 {1, 49151},
10637 {2, 49151},
10638 {0, 4295032831},
10639 },
10640 },
10641 },
10642 {
10643 name: "ANDQmodifyidx1",
10644 auxType: auxSymOff,
10645 argLen: 4,
10646 clobberFlags: true,
10647 symEffect: SymRead | SymWrite,
10648 asm: x86.AANDQ,
10649 scale: 1,
10650 reg: regInfo{
10651 inputs: []inputInfo{
10652 {1, 49151},
10653 {2, 49151},
10654 {0, 4295032831},
10655 },
10656 },
10657 },
10658 {
10659 name: "ANDQmodifyidx8",
10660 auxType: auxSymOff,
10661 argLen: 4,
10662 clobberFlags: true,
10663 symEffect: SymRead | SymWrite,
10664 asm: x86.AANDQ,
10665 scale: 8,
10666 reg: regInfo{
10667 inputs: []inputInfo{
10668 {1, 49151},
10669 {2, 49151},
10670 {0, 4295032831},
10671 },
10672 },
10673 },
10674 {
10675 name: "ORQmodifyidx1",
10676 auxType: auxSymOff,
10677 argLen: 4,
10678 clobberFlags: true,
10679 symEffect: SymRead | SymWrite,
10680 asm: x86.AORQ,
10681 scale: 1,
10682 reg: regInfo{
10683 inputs: []inputInfo{
10684 {1, 49151},
10685 {2, 49151},
10686 {0, 4295032831},
10687 },
10688 },
10689 },
10690 {
10691 name: "ORQmodifyidx8",
10692 auxType: auxSymOff,
10693 argLen: 4,
10694 clobberFlags: true,
10695 symEffect: SymRead | SymWrite,
10696 asm: x86.AORQ,
10697 scale: 8,
10698 reg: regInfo{
10699 inputs: []inputInfo{
10700 {1, 49151},
10701 {2, 49151},
10702 {0, 4295032831},
10703 },
10704 },
10705 },
10706 {
10707 name: "XORQmodifyidx1",
10708 auxType: auxSymOff,
10709 argLen: 4,
10710 clobberFlags: true,
10711 symEffect: SymRead | SymWrite,
10712 asm: x86.AXORQ,
10713 scale: 1,
10714 reg: regInfo{
10715 inputs: []inputInfo{
10716 {1, 49151},
10717 {2, 49151},
10718 {0, 4295032831},
10719 },
10720 },
10721 },
10722 {
10723 name: "XORQmodifyidx8",
10724 auxType: auxSymOff,
10725 argLen: 4,
10726 clobberFlags: true,
10727 symEffect: SymRead | SymWrite,
10728 asm: x86.AXORQ,
10729 scale: 8,
10730 reg: regInfo{
10731 inputs: []inputInfo{
10732 {1, 49151},
10733 {2, 49151},
10734 {0, 4295032831},
10735 },
10736 },
10737 },
10738 {
10739 name: "ADDLmodifyidx1",
10740 auxType: auxSymOff,
10741 argLen: 4,
10742 clobberFlags: true,
10743 symEffect: SymRead | SymWrite,
10744 asm: x86.AADDL,
10745 scale: 1,
10746 reg: regInfo{
10747 inputs: []inputInfo{
10748 {1, 49151},
10749 {2, 49151},
10750 {0, 4295032831},
10751 },
10752 },
10753 },
10754 {
10755 name: "ADDLmodifyidx4",
10756 auxType: auxSymOff,
10757 argLen: 4,
10758 clobberFlags: true,
10759 symEffect: SymRead | SymWrite,
10760 asm: x86.AADDL,
10761 scale: 4,
10762 reg: regInfo{
10763 inputs: []inputInfo{
10764 {1, 49151},
10765 {2, 49151},
10766 {0, 4295032831},
10767 },
10768 },
10769 },
10770 {
10771 name: "ADDLmodifyidx8",
10772 auxType: auxSymOff,
10773 argLen: 4,
10774 clobberFlags: true,
10775 symEffect: SymRead | SymWrite,
10776 asm: x86.AADDL,
10777 scale: 8,
10778 reg: regInfo{
10779 inputs: []inputInfo{
10780 {1, 49151},
10781 {2, 49151},
10782 {0, 4295032831},
10783 },
10784 },
10785 },
10786 {
10787 name: "SUBLmodifyidx1",
10788 auxType: auxSymOff,
10789 argLen: 4,
10790 clobberFlags: true,
10791 symEffect: SymRead | SymWrite,
10792 asm: x86.ASUBL,
10793 scale: 1,
10794 reg: regInfo{
10795 inputs: []inputInfo{
10796 {1, 49151},
10797 {2, 49151},
10798 {0, 4295032831},
10799 },
10800 },
10801 },
10802 {
10803 name: "SUBLmodifyidx4",
10804 auxType: auxSymOff,
10805 argLen: 4,
10806 clobberFlags: true,
10807 symEffect: SymRead | SymWrite,
10808 asm: x86.ASUBL,
10809 scale: 4,
10810 reg: regInfo{
10811 inputs: []inputInfo{
10812 {1, 49151},
10813 {2, 49151},
10814 {0, 4295032831},
10815 },
10816 },
10817 },
10818 {
10819 name: "SUBLmodifyidx8",
10820 auxType: auxSymOff,
10821 argLen: 4,
10822 clobberFlags: true,
10823 symEffect: SymRead | SymWrite,
10824 asm: x86.ASUBL,
10825 scale: 8,
10826 reg: regInfo{
10827 inputs: []inputInfo{
10828 {1, 49151},
10829 {2, 49151},
10830 {0, 4295032831},
10831 },
10832 },
10833 },
10834 {
10835 name: "ANDLmodifyidx1",
10836 auxType: auxSymOff,
10837 argLen: 4,
10838 clobberFlags: true,
10839 symEffect: SymRead | SymWrite,
10840 asm: x86.AANDL,
10841 scale: 1,
10842 reg: regInfo{
10843 inputs: []inputInfo{
10844 {1, 49151},
10845 {2, 49151},
10846 {0, 4295032831},
10847 },
10848 },
10849 },
10850 {
10851 name: "ANDLmodifyidx4",
10852 auxType: auxSymOff,
10853 argLen: 4,
10854 clobberFlags: true,
10855 symEffect: SymRead | SymWrite,
10856 asm: x86.AANDL,
10857 scale: 4,
10858 reg: regInfo{
10859 inputs: []inputInfo{
10860 {1, 49151},
10861 {2, 49151},
10862 {0, 4295032831},
10863 },
10864 },
10865 },
10866 {
10867 name: "ANDLmodifyidx8",
10868 auxType: auxSymOff,
10869 argLen: 4,
10870 clobberFlags: true,
10871 symEffect: SymRead | SymWrite,
10872 asm: x86.AANDL,
10873 scale: 8,
10874 reg: regInfo{
10875 inputs: []inputInfo{
10876 {1, 49151},
10877 {2, 49151},
10878 {0, 4295032831},
10879 },
10880 },
10881 },
10882 {
10883 name: "ORLmodifyidx1",
10884 auxType: auxSymOff,
10885 argLen: 4,
10886 clobberFlags: true,
10887 symEffect: SymRead | SymWrite,
10888 asm: x86.AORL,
10889 scale: 1,
10890 reg: regInfo{
10891 inputs: []inputInfo{
10892 {1, 49151},
10893 {2, 49151},
10894 {0, 4295032831},
10895 },
10896 },
10897 },
10898 {
10899 name: "ORLmodifyidx4",
10900 auxType: auxSymOff,
10901 argLen: 4,
10902 clobberFlags: true,
10903 symEffect: SymRead | SymWrite,
10904 asm: x86.AORL,
10905 scale: 4,
10906 reg: regInfo{
10907 inputs: []inputInfo{
10908 {1, 49151},
10909 {2, 49151},
10910 {0, 4295032831},
10911 },
10912 },
10913 },
10914 {
10915 name: "ORLmodifyidx8",
10916 auxType: auxSymOff,
10917 argLen: 4,
10918 clobberFlags: true,
10919 symEffect: SymRead | SymWrite,
10920 asm: x86.AORL,
10921 scale: 8,
10922 reg: regInfo{
10923 inputs: []inputInfo{
10924 {1, 49151},
10925 {2, 49151},
10926 {0, 4295032831},
10927 },
10928 },
10929 },
10930 {
10931 name: "XORLmodifyidx1",
10932 auxType: auxSymOff,
10933 argLen: 4,
10934 clobberFlags: true,
10935 symEffect: SymRead | SymWrite,
10936 asm: x86.AXORL,
10937 scale: 1,
10938 reg: regInfo{
10939 inputs: []inputInfo{
10940 {1, 49151},
10941 {2, 49151},
10942 {0, 4295032831},
10943 },
10944 },
10945 },
10946 {
10947 name: "XORLmodifyidx4",
10948 auxType: auxSymOff,
10949 argLen: 4,
10950 clobberFlags: true,
10951 symEffect: SymRead | SymWrite,
10952 asm: x86.AXORL,
10953 scale: 4,
10954 reg: regInfo{
10955 inputs: []inputInfo{
10956 {1, 49151},
10957 {2, 49151},
10958 {0, 4295032831},
10959 },
10960 },
10961 },
10962 {
10963 name: "XORLmodifyidx8",
10964 auxType: auxSymOff,
10965 argLen: 4,
10966 clobberFlags: true,
10967 symEffect: SymRead | SymWrite,
10968 asm: x86.AXORL,
10969 scale: 8,
10970 reg: regInfo{
10971 inputs: []inputInfo{
10972 {1, 49151},
10973 {2, 49151},
10974 {0, 4295032831},
10975 },
10976 },
10977 },
10978 {
10979 name: "ADDQconstmodifyidx1",
10980 auxType: auxSymValAndOff,
10981 argLen: 3,
10982 clobberFlags: true,
10983 symEffect: SymRead | SymWrite,
10984 asm: x86.AADDQ,
10985 scale: 1,
10986 reg: regInfo{
10987 inputs: []inputInfo{
10988 {1, 49151},
10989 {0, 4295032831},
10990 },
10991 },
10992 },
10993 {
10994 name: "ADDQconstmodifyidx8",
10995 auxType: auxSymValAndOff,
10996 argLen: 3,
10997 clobberFlags: true,
10998 symEffect: SymRead | SymWrite,
10999 asm: x86.AADDQ,
11000 scale: 8,
11001 reg: regInfo{
11002 inputs: []inputInfo{
11003 {1, 49151},
11004 {0, 4295032831},
11005 },
11006 },
11007 },
11008 {
11009 name: "ANDQconstmodifyidx1",
11010 auxType: auxSymValAndOff,
11011 argLen: 3,
11012 clobberFlags: true,
11013 symEffect: SymRead | SymWrite,
11014 asm: x86.AANDQ,
11015 scale: 1,
11016 reg: regInfo{
11017 inputs: []inputInfo{
11018 {1, 49151},
11019 {0, 4295032831},
11020 },
11021 },
11022 },
11023 {
11024 name: "ANDQconstmodifyidx8",
11025 auxType: auxSymValAndOff,
11026 argLen: 3,
11027 clobberFlags: true,
11028 symEffect: SymRead | SymWrite,
11029 asm: x86.AANDQ,
11030 scale: 8,
11031 reg: regInfo{
11032 inputs: []inputInfo{
11033 {1, 49151},
11034 {0, 4295032831},
11035 },
11036 },
11037 },
11038 {
11039 name: "ORQconstmodifyidx1",
11040 auxType: auxSymValAndOff,
11041 argLen: 3,
11042 clobberFlags: true,
11043 symEffect: SymRead | SymWrite,
11044 asm: x86.AORQ,
11045 scale: 1,
11046 reg: regInfo{
11047 inputs: []inputInfo{
11048 {1, 49151},
11049 {0, 4295032831},
11050 },
11051 },
11052 },
11053 {
11054 name: "ORQconstmodifyidx8",
11055 auxType: auxSymValAndOff,
11056 argLen: 3,
11057 clobberFlags: true,
11058 symEffect: SymRead | SymWrite,
11059 asm: x86.AORQ,
11060 scale: 8,
11061 reg: regInfo{
11062 inputs: []inputInfo{
11063 {1, 49151},
11064 {0, 4295032831},
11065 },
11066 },
11067 },
11068 {
11069 name: "XORQconstmodifyidx1",
11070 auxType: auxSymValAndOff,
11071 argLen: 3,
11072 clobberFlags: true,
11073 symEffect: SymRead | SymWrite,
11074 asm: x86.AXORQ,
11075 scale: 1,
11076 reg: regInfo{
11077 inputs: []inputInfo{
11078 {1, 49151},
11079 {0, 4295032831},
11080 },
11081 },
11082 },
11083 {
11084 name: "XORQconstmodifyidx8",
11085 auxType: auxSymValAndOff,
11086 argLen: 3,
11087 clobberFlags: true,
11088 symEffect: SymRead | SymWrite,
11089 asm: x86.AXORQ,
11090 scale: 8,
11091 reg: regInfo{
11092 inputs: []inputInfo{
11093 {1, 49151},
11094 {0, 4295032831},
11095 },
11096 },
11097 },
11098 {
11099 name: "ADDLconstmodifyidx1",
11100 auxType: auxSymValAndOff,
11101 argLen: 3,
11102 clobberFlags: true,
11103 symEffect: SymRead | SymWrite,
11104 asm: x86.AADDL,
11105 scale: 1,
11106 reg: regInfo{
11107 inputs: []inputInfo{
11108 {1, 49151},
11109 {0, 4295032831},
11110 },
11111 },
11112 },
11113 {
11114 name: "ADDLconstmodifyidx4",
11115 auxType: auxSymValAndOff,
11116 argLen: 3,
11117 clobberFlags: true,
11118 symEffect: SymRead | SymWrite,
11119 asm: x86.AADDL,
11120 scale: 4,
11121 reg: regInfo{
11122 inputs: []inputInfo{
11123 {1, 49151},
11124 {0, 4295032831},
11125 },
11126 },
11127 },
11128 {
11129 name: "ADDLconstmodifyidx8",
11130 auxType: auxSymValAndOff,
11131 argLen: 3,
11132 clobberFlags: true,
11133 symEffect: SymRead | SymWrite,
11134 asm: x86.AADDL,
11135 scale: 8,
11136 reg: regInfo{
11137 inputs: []inputInfo{
11138 {1, 49151},
11139 {0, 4295032831},
11140 },
11141 },
11142 },
11143 {
11144 name: "ANDLconstmodifyidx1",
11145 auxType: auxSymValAndOff,
11146 argLen: 3,
11147 clobberFlags: true,
11148 symEffect: SymRead | SymWrite,
11149 asm: x86.AANDL,
11150 scale: 1,
11151 reg: regInfo{
11152 inputs: []inputInfo{
11153 {1, 49151},
11154 {0, 4295032831},
11155 },
11156 },
11157 },
11158 {
11159 name: "ANDLconstmodifyidx4",
11160 auxType: auxSymValAndOff,
11161 argLen: 3,
11162 clobberFlags: true,
11163 symEffect: SymRead | SymWrite,
11164 asm: x86.AANDL,
11165 scale: 4,
11166 reg: regInfo{
11167 inputs: []inputInfo{
11168 {1, 49151},
11169 {0, 4295032831},
11170 },
11171 },
11172 },
11173 {
11174 name: "ANDLconstmodifyidx8",
11175 auxType: auxSymValAndOff,
11176 argLen: 3,
11177 clobberFlags: true,
11178 symEffect: SymRead | SymWrite,
11179 asm: x86.AANDL,
11180 scale: 8,
11181 reg: regInfo{
11182 inputs: []inputInfo{
11183 {1, 49151},
11184 {0, 4295032831},
11185 },
11186 },
11187 },
11188 {
11189 name: "ORLconstmodifyidx1",
11190 auxType: auxSymValAndOff,
11191 argLen: 3,
11192 clobberFlags: true,
11193 symEffect: SymRead | SymWrite,
11194 asm: x86.AORL,
11195 scale: 1,
11196 reg: regInfo{
11197 inputs: []inputInfo{
11198 {1, 49151},
11199 {0, 4295032831},
11200 },
11201 },
11202 },
11203 {
11204 name: "ORLconstmodifyidx4",
11205 auxType: auxSymValAndOff,
11206 argLen: 3,
11207 clobberFlags: true,
11208 symEffect: SymRead | SymWrite,
11209 asm: x86.AORL,
11210 scale: 4,
11211 reg: regInfo{
11212 inputs: []inputInfo{
11213 {1, 49151},
11214 {0, 4295032831},
11215 },
11216 },
11217 },
11218 {
11219 name: "ORLconstmodifyidx8",
11220 auxType: auxSymValAndOff,
11221 argLen: 3,
11222 clobberFlags: true,
11223 symEffect: SymRead | SymWrite,
11224 asm: x86.AORL,
11225 scale: 8,
11226 reg: regInfo{
11227 inputs: []inputInfo{
11228 {1, 49151},
11229 {0, 4295032831},
11230 },
11231 },
11232 },
11233 {
11234 name: "XORLconstmodifyidx1",
11235 auxType: auxSymValAndOff,
11236 argLen: 3,
11237 clobberFlags: true,
11238 symEffect: SymRead | SymWrite,
11239 asm: x86.AXORL,
11240 scale: 1,
11241 reg: regInfo{
11242 inputs: []inputInfo{
11243 {1, 49151},
11244 {0, 4295032831},
11245 },
11246 },
11247 },
11248 {
11249 name: "XORLconstmodifyidx4",
11250 auxType: auxSymValAndOff,
11251 argLen: 3,
11252 clobberFlags: true,
11253 symEffect: SymRead | SymWrite,
11254 asm: x86.AXORL,
11255 scale: 4,
11256 reg: regInfo{
11257 inputs: []inputInfo{
11258 {1, 49151},
11259 {0, 4295032831},
11260 },
11261 },
11262 },
11263 {
11264 name: "XORLconstmodifyidx8",
11265 auxType: auxSymValAndOff,
11266 argLen: 3,
11267 clobberFlags: true,
11268 symEffect: SymRead | SymWrite,
11269 asm: x86.AXORL,
11270 scale: 8,
11271 reg: regInfo{
11272 inputs: []inputInfo{
11273 {1, 49151},
11274 {0, 4295032831},
11275 },
11276 },
11277 },
11278 {
11279 name: "NEGQ",
11280 argLen: 1,
11281 resultInArg0: true,
11282 clobberFlags: true,
11283 asm: x86.ANEGQ,
11284 reg: regInfo{
11285 inputs: []inputInfo{
11286 {0, 49135},
11287 },
11288 outputs: []outputInfo{
11289 {0, 49135},
11290 },
11291 },
11292 },
11293 {
11294 name: "NEGL",
11295 argLen: 1,
11296 resultInArg0: true,
11297 clobberFlags: true,
11298 asm: x86.ANEGL,
11299 reg: regInfo{
11300 inputs: []inputInfo{
11301 {0, 49135},
11302 },
11303 outputs: []outputInfo{
11304 {0, 49135},
11305 },
11306 },
11307 },
11308 {
11309 name: "NOTQ",
11310 argLen: 1,
11311 resultInArg0: true,
11312 asm: x86.ANOTQ,
11313 reg: regInfo{
11314 inputs: []inputInfo{
11315 {0, 49135},
11316 },
11317 outputs: []outputInfo{
11318 {0, 49135},
11319 },
11320 },
11321 },
11322 {
11323 name: "NOTL",
11324 argLen: 1,
11325 resultInArg0: true,
11326 asm: x86.ANOTL,
11327 reg: regInfo{
11328 inputs: []inputInfo{
11329 {0, 49135},
11330 },
11331 outputs: []outputInfo{
11332 {0, 49135},
11333 },
11334 },
11335 },
11336 {
11337 name: "BSFQ",
11338 argLen: 1,
11339 asm: x86.ABSFQ,
11340 reg: regInfo{
11341 inputs: []inputInfo{
11342 {0, 49135},
11343 },
11344 outputs: []outputInfo{
11345 {1, 0},
11346 {0, 49135},
11347 },
11348 },
11349 },
11350 {
11351 name: "BSFL",
11352 argLen: 1,
11353 clobberFlags: true,
11354 asm: x86.ABSFL,
11355 reg: regInfo{
11356 inputs: []inputInfo{
11357 {0, 49135},
11358 },
11359 outputs: []outputInfo{
11360 {0, 49135},
11361 },
11362 },
11363 },
11364 {
11365 name: "BSRQ",
11366 argLen: 1,
11367 asm: x86.ABSRQ,
11368 reg: regInfo{
11369 inputs: []inputInfo{
11370 {0, 49135},
11371 },
11372 outputs: []outputInfo{
11373 {1, 0},
11374 {0, 49135},
11375 },
11376 },
11377 },
11378 {
11379 name: "BSRL",
11380 argLen: 1,
11381 clobberFlags: true,
11382 asm: x86.ABSRL,
11383 reg: regInfo{
11384 inputs: []inputInfo{
11385 {0, 49135},
11386 },
11387 outputs: []outputInfo{
11388 {0, 49135},
11389 },
11390 },
11391 },
11392 {
11393 name: "CMOVQEQ",
11394 argLen: 3,
11395 resultInArg0: true,
11396 asm: x86.ACMOVQEQ,
11397 reg: regInfo{
11398 inputs: []inputInfo{
11399 {0, 49135},
11400 {1, 49135},
11401 },
11402 outputs: []outputInfo{
11403 {0, 49135},
11404 },
11405 },
11406 },
11407 {
11408 name: "CMOVQNE",
11409 argLen: 3,
11410 resultInArg0: true,
11411 asm: x86.ACMOVQNE,
11412 reg: regInfo{
11413 inputs: []inputInfo{
11414 {0, 49135},
11415 {1, 49135},
11416 },
11417 outputs: []outputInfo{
11418 {0, 49135},
11419 },
11420 },
11421 },
11422 {
11423 name: "CMOVQLT",
11424 argLen: 3,
11425 resultInArg0: true,
11426 asm: x86.ACMOVQLT,
11427 reg: regInfo{
11428 inputs: []inputInfo{
11429 {0, 49135},
11430 {1, 49135},
11431 },
11432 outputs: []outputInfo{
11433 {0, 49135},
11434 },
11435 },
11436 },
11437 {
11438 name: "CMOVQGT",
11439 argLen: 3,
11440 resultInArg0: true,
11441 asm: x86.ACMOVQGT,
11442 reg: regInfo{
11443 inputs: []inputInfo{
11444 {0, 49135},
11445 {1, 49135},
11446 },
11447 outputs: []outputInfo{
11448 {0, 49135},
11449 },
11450 },
11451 },
11452 {
11453 name: "CMOVQLE",
11454 argLen: 3,
11455 resultInArg0: true,
11456 asm: x86.ACMOVQLE,
11457 reg: regInfo{
11458 inputs: []inputInfo{
11459 {0, 49135},
11460 {1, 49135},
11461 },
11462 outputs: []outputInfo{
11463 {0, 49135},
11464 },
11465 },
11466 },
11467 {
11468 name: "CMOVQGE",
11469 argLen: 3,
11470 resultInArg0: true,
11471 asm: x86.ACMOVQGE,
11472 reg: regInfo{
11473 inputs: []inputInfo{
11474 {0, 49135},
11475 {1, 49135},
11476 },
11477 outputs: []outputInfo{
11478 {0, 49135},
11479 },
11480 },
11481 },
11482 {
11483 name: "CMOVQLS",
11484 argLen: 3,
11485 resultInArg0: true,
11486 asm: x86.ACMOVQLS,
11487 reg: regInfo{
11488 inputs: []inputInfo{
11489 {0, 49135},
11490 {1, 49135},
11491 },
11492 outputs: []outputInfo{
11493 {0, 49135},
11494 },
11495 },
11496 },
11497 {
11498 name: "CMOVQHI",
11499 argLen: 3,
11500 resultInArg0: true,
11501 asm: x86.ACMOVQHI,
11502 reg: regInfo{
11503 inputs: []inputInfo{
11504 {0, 49135},
11505 {1, 49135},
11506 },
11507 outputs: []outputInfo{
11508 {0, 49135},
11509 },
11510 },
11511 },
11512 {
11513 name: "CMOVQCC",
11514 argLen: 3,
11515 resultInArg0: true,
11516 asm: x86.ACMOVQCC,
11517 reg: regInfo{
11518 inputs: []inputInfo{
11519 {0, 49135},
11520 {1, 49135},
11521 },
11522 outputs: []outputInfo{
11523 {0, 49135},
11524 },
11525 },
11526 },
11527 {
11528 name: "CMOVQCS",
11529 argLen: 3,
11530 resultInArg0: true,
11531 asm: x86.ACMOVQCS,
11532 reg: regInfo{
11533 inputs: []inputInfo{
11534 {0, 49135},
11535 {1, 49135},
11536 },
11537 outputs: []outputInfo{
11538 {0, 49135},
11539 },
11540 },
11541 },
11542 {
11543 name: "CMOVLEQ",
11544 argLen: 3,
11545 resultInArg0: true,
11546 asm: x86.ACMOVLEQ,
11547 reg: regInfo{
11548 inputs: []inputInfo{
11549 {0, 49135},
11550 {1, 49135},
11551 },
11552 outputs: []outputInfo{
11553 {0, 49135},
11554 },
11555 },
11556 },
11557 {
11558 name: "CMOVLNE",
11559 argLen: 3,
11560 resultInArg0: true,
11561 asm: x86.ACMOVLNE,
11562 reg: regInfo{
11563 inputs: []inputInfo{
11564 {0, 49135},
11565 {1, 49135},
11566 },
11567 outputs: []outputInfo{
11568 {0, 49135},
11569 },
11570 },
11571 },
11572 {
11573 name: "CMOVLLT",
11574 argLen: 3,
11575 resultInArg0: true,
11576 asm: x86.ACMOVLLT,
11577 reg: regInfo{
11578 inputs: []inputInfo{
11579 {0, 49135},
11580 {1, 49135},
11581 },
11582 outputs: []outputInfo{
11583 {0, 49135},
11584 },
11585 },
11586 },
11587 {
11588 name: "CMOVLGT",
11589 argLen: 3,
11590 resultInArg0: true,
11591 asm: x86.ACMOVLGT,
11592 reg: regInfo{
11593 inputs: []inputInfo{
11594 {0, 49135},
11595 {1, 49135},
11596 },
11597 outputs: []outputInfo{
11598 {0, 49135},
11599 },
11600 },
11601 },
11602 {
11603 name: "CMOVLLE",
11604 argLen: 3,
11605 resultInArg0: true,
11606 asm: x86.ACMOVLLE,
11607 reg: regInfo{
11608 inputs: []inputInfo{
11609 {0, 49135},
11610 {1, 49135},
11611 },
11612 outputs: []outputInfo{
11613 {0, 49135},
11614 },
11615 },
11616 },
11617 {
11618 name: "CMOVLGE",
11619 argLen: 3,
11620 resultInArg0: true,
11621 asm: x86.ACMOVLGE,
11622 reg: regInfo{
11623 inputs: []inputInfo{
11624 {0, 49135},
11625 {1, 49135},
11626 },
11627 outputs: []outputInfo{
11628 {0, 49135},
11629 },
11630 },
11631 },
11632 {
11633 name: "CMOVLLS",
11634 argLen: 3,
11635 resultInArg0: true,
11636 asm: x86.ACMOVLLS,
11637 reg: regInfo{
11638 inputs: []inputInfo{
11639 {0, 49135},
11640 {1, 49135},
11641 },
11642 outputs: []outputInfo{
11643 {0, 49135},
11644 },
11645 },
11646 },
11647 {
11648 name: "CMOVLHI",
11649 argLen: 3,
11650 resultInArg0: true,
11651 asm: x86.ACMOVLHI,
11652 reg: regInfo{
11653 inputs: []inputInfo{
11654 {0, 49135},
11655 {1, 49135},
11656 },
11657 outputs: []outputInfo{
11658 {0, 49135},
11659 },
11660 },
11661 },
11662 {
11663 name: "CMOVLCC",
11664 argLen: 3,
11665 resultInArg0: true,
11666 asm: x86.ACMOVLCC,
11667 reg: regInfo{
11668 inputs: []inputInfo{
11669 {0, 49135},
11670 {1, 49135},
11671 },
11672 outputs: []outputInfo{
11673 {0, 49135},
11674 },
11675 },
11676 },
11677 {
11678 name: "CMOVLCS",
11679 argLen: 3,
11680 resultInArg0: true,
11681 asm: x86.ACMOVLCS,
11682 reg: regInfo{
11683 inputs: []inputInfo{
11684 {0, 49135},
11685 {1, 49135},
11686 },
11687 outputs: []outputInfo{
11688 {0, 49135},
11689 },
11690 },
11691 },
11692 {
11693 name: "CMOVWEQ",
11694 argLen: 3,
11695 resultInArg0: true,
11696 asm: x86.ACMOVWEQ,
11697 reg: regInfo{
11698 inputs: []inputInfo{
11699 {0, 49135},
11700 {1, 49135},
11701 },
11702 outputs: []outputInfo{
11703 {0, 49135},
11704 },
11705 },
11706 },
11707 {
11708 name: "CMOVWNE",
11709 argLen: 3,
11710 resultInArg0: true,
11711 asm: x86.ACMOVWNE,
11712 reg: regInfo{
11713 inputs: []inputInfo{
11714 {0, 49135},
11715 {1, 49135},
11716 },
11717 outputs: []outputInfo{
11718 {0, 49135},
11719 },
11720 },
11721 },
11722 {
11723 name: "CMOVWLT",
11724 argLen: 3,
11725 resultInArg0: true,
11726 asm: x86.ACMOVWLT,
11727 reg: regInfo{
11728 inputs: []inputInfo{
11729 {0, 49135},
11730 {1, 49135},
11731 },
11732 outputs: []outputInfo{
11733 {0, 49135},
11734 },
11735 },
11736 },
11737 {
11738 name: "CMOVWGT",
11739 argLen: 3,
11740 resultInArg0: true,
11741 asm: x86.ACMOVWGT,
11742 reg: regInfo{
11743 inputs: []inputInfo{
11744 {0, 49135},
11745 {1, 49135},
11746 },
11747 outputs: []outputInfo{
11748 {0, 49135},
11749 },
11750 },
11751 },
11752 {
11753 name: "CMOVWLE",
11754 argLen: 3,
11755 resultInArg0: true,
11756 asm: x86.ACMOVWLE,
11757 reg: regInfo{
11758 inputs: []inputInfo{
11759 {0, 49135},
11760 {1, 49135},
11761 },
11762 outputs: []outputInfo{
11763 {0, 49135},
11764 },
11765 },
11766 },
11767 {
11768 name: "CMOVWGE",
11769 argLen: 3,
11770 resultInArg0: true,
11771 asm: x86.ACMOVWGE,
11772 reg: regInfo{
11773 inputs: []inputInfo{
11774 {0, 49135},
11775 {1, 49135},
11776 },
11777 outputs: []outputInfo{
11778 {0, 49135},
11779 },
11780 },
11781 },
11782 {
11783 name: "CMOVWLS",
11784 argLen: 3,
11785 resultInArg0: true,
11786 asm: x86.ACMOVWLS,
11787 reg: regInfo{
11788 inputs: []inputInfo{
11789 {0, 49135},
11790 {1, 49135},
11791 },
11792 outputs: []outputInfo{
11793 {0, 49135},
11794 },
11795 },
11796 },
11797 {
11798 name: "CMOVWHI",
11799 argLen: 3,
11800 resultInArg0: true,
11801 asm: x86.ACMOVWHI,
11802 reg: regInfo{
11803 inputs: []inputInfo{
11804 {0, 49135},
11805 {1, 49135},
11806 },
11807 outputs: []outputInfo{
11808 {0, 49135},
11809 },
11810 },
11811 },
11812 {
11813 name: "CMOVWCC",
11814 argLen: 3,
11815 resultInArg0: true,
11816 asm: x86.ACMOVWCC,
11817 reg: regInfo{
11818 inputs: []inputInfo{
11819 {0, 49135},
11820 {1, 49135},
11821 },
11822 outputs: []outputInfo{
11823 {0, 49135},
11824 },
11825 },
11826 },
11827 {
11828 name: "CMOVWCS",
11829 argLen: 3,
11830 resultInArg0: true,
11831 asm: x86.ACMOVWCS,
11832 reg: regInfo{
11833 inputs: []inputInfo{
11834 {0, 49135},
11835 {1, 49135},
11836 },
11837 outputs: []outputInfo{
11838 {0, 49135},
11839 },
11840 },
11841 },
11842 {
11843 name: "CMOVQEQF",
11844 argLen: 3,
11845 resultInArg0: true,
11846 needIntTemp: true,
11847 asm: x86.ACMOVQNE,
11848 reg: regInfo{
11849 inputs: []inputInfo{
11850 {0, 49135},
11851 {1, 49135},
11852 },
11853 outputs: []outputInfo{
11854 {0, 49135},
11855 },
11856 },
11857 },
11858 {
11859 name: "CMOVQNEF",
11860 argLen: 3,
11861 resultInArg0: true,
11862 asm: x86.ACMOVQNE,
11863 reg: regInfo{
11864 inputs: []inputInfo{
11865 {0, 49135},
11866 {1, 49135},
11867 },
11868 outputs: []outputInfo{
11869 {0, 49135},
11870 },
11871 },
11872 },
11873 {
11874 name: "CMOVQGTF",
11875 argLen: 3,
11876 resultInArg0: true,
11877 asm: x86.ACMOVQHI,
11878 reg: regInfo{
11879 inputs: []inputInfo{
11880 {0, 49135},
11881 {1, 49135},
11882 },
11883 outputs: []outputInfo{
11884 {0, 49135},
11885 },
11886 },
11887 },
11888 {
11889 name: "CMOVQGEF",
11890 argLen: 3,
11891 resultInArg0: true,
11892 asm: x86.ACMOVQCC,
11893 reg: regInfo{
11894 inputs: []inputInfo{
11895 {0, 49135},
11896 {1, 49135},
11897 },
11898 outputs: []outputInfo{
11899 {0, 49135},
11900 },
11901 },
11902 },
11903 {
11904 name: "CMOVLEQF",
11905 argLen: 3,
11906 resultInArg0: true,
11907 needIntTemp: true,
11908 asm: x86.ACMOVLNE,
11909 reg: regInfo{
11910 inputs: []inputInfo{
11911 {0, 49135},
11912 {1, 49135},
11913 },
11914 outputs: []outputInfo{
11915 {0, 49135},
11916 },
11917 },
11918 },
11919 {
11920 name: "CMOVLNEF",
11921 argLen: 3,
11922 resultInArg0: true,
11923 asm: x86.ACMOVLNE,
11924 reg: regInfo{
11925 inputs: []inputInfo{
11926 {0, 49135},
11927 {1, 49135},
11928 },
11929 outputs: []outputInfo{
11930 {0, 49135},
11931 },
11932 },
11933 },
11934 {
11935 name: "CMOVLGTF",
11936 argLen: 3,
11937 resultInArg0: true,
11938 asm: x86.ACMOVLHI,
11939 reg: regInfo{
11940 inputs: []inputInfo{
11941 {0, 49135},
11942 {1, 49135},
11943 },
11944 outputs: []outputInfo{
11945 {0, 49135},
11946 },
11947 },
11948 },
11949 {
11950 name: "CMOVLGEF",
11951 argLen: 3,
11952 resultInArg0: true,
11953 asm: x86.ACMOVLCC,
11954 reg: regInfo{
11955 inputs: []inputInfo{
11956 {0, 49135},
11957 {1, 49135},
11958 },
11959 outputs: []outputInfo{
11960 {0, 49135},
11961 },
11962 },
11963 },
11964 {
11965 name: "CMOVWEQF",
11966 argLen: 3,
11967 resultInArg0: true,
11968 needIntTemp: true,
11969 asm: x86.ACMOVWNE,
11970 reg: regInfo{
11971 inputs: []inputInfo{
11972 {0, 49135},
11973 {1, 49135},
11974 },
11975 outputs: []outputInfo{
11976 {0, 49135},
11977 },
11978 },
11979 },
11980 {
11981 name: "CMOVWNEF",
11982 argLen: 3,
11983 resultInArg0: true,
11984 asm: x86.ACMOVWNE,
11985 reg: regInfo{
11986 inputs: []inputInfo{
11987 {0, 49135},
11988 {1, 49135},
11989 },
11990 outputs: []outputInfo{
11991 {0, 49135},
11992 },
11993 },
11994 },
11995 {
11996 name: "CMOVWGTF",
11997 argLen: 3,
11998 resultInArg0: true,
11999 asm: x86.ACMOVWHI,
12000 reg: regInfo{
12001 inputs: []inputInfo{
12002 {0, 49135},
12003 {1, 49135},
12004 },
12005 outputs: []outputInfo{
12006 {0, 49135},
12007 },
12008 },
12009 },
12010 {
12011 name: "CMOVWGEF",
12012 argLen: 3,
12013 resultInArg0: true,
12014 asm: x86.ACMOVWCC,
12015 reg: regInfo{
12016 inputs: []inputInfo{
12017 {0, 49135},
12018 {1, 49135},
12019 },
12020 outputs: []outputInfo{
12021 {0, 49135},
12022 },
12023 },
12024 },
12025 {
12026 name: "BSWAPQ",
12027 argLen: 1,
12028 resultInArg0: true,
12029 asm: x86.ABSWAPQ,
12030 reg: regInfo{
12031 inputs: []inputInfo{
12032 {0, 49135},
12033 },
12034 outputs: []outputInfo{
12035 {0, 49135},
12036 },
12037 },
12038 },
12039 {
12040 name: "BSWAPL",
12041 argLen: 1,
12042 resultInArg0: true,
12043 asm: x86.ABSWAPL,
12044 reg: regInfo{
12045 inputs: []inputInfo{
12046 {0, 49135},
12047 },
12048 outputs: []outputInfo{
12049 {0, 49135},
12050 },
12051 },
12052 },
12053 {
12054 name: "POPCNTQ",
12055 argLen: 1,
12056 clobberFlags: true,
12057 asm: x86.APOPCNTQ,
12058 reg: regInfo{
12059 inputs: []inputInfo{
12060 {0, 49135},
12061 },
12062 outputs: []outputInfo{
12063 {0, 49135},
12064 },
12065 },
12066 },
12067 {
12068 name: "POPCNTL",
12069 argLen: 1,
12070 clobberFlags: true,
12071 asm: x86.APOPCNTL,
12072 reg: regInfo{
12073 inputs: []inputInfo{
12074 {0, 49135},
12075 },
12076 outputs: []outputInfo{
12077 {0, 49135},
12078 },
12079 },
12080 },
12081 {
12082 name: "SQRTSD",
12083 argLen: 1,
12084 asm: x86.ASQRTSD,
12085 reg: regInfo{
12086 inputs: []inputInfo{
12087 {0, 2147418112},
12088 },
12089 outputs: []outputInfo{
12090 {0, 2147418112},
12091 },
12092 },
12093 },
12094 {
12095 name: "SQRTSS",
12096 argLen: 1,
12097 asm: x86.ASQRTSS,
12098 reg: regInfo{
12099 inputs: []inputInfo{
12100 {0, 2147418112},
12101 },
12102 outputs: []outputInfo{
12103 {0, 2147418112},
12104 },
12105 },
12106 },
12107 {
12108 name: "ROUNDSD",
12109 auxType: auxInt8,
12110 argLen: 1,
12111 asm: x86.AROUNDSD,
12112 reg: regInfo{
12113 inputs: []inputInfo{
12114 {0, 2147418112},
12115 },
12116 outputs: []outputInfo{
12117 {0, 2147418112},
12118 },
12119 },
12120 },
12121 {
12122 name: "LoweredRound32F",
12123 argLen: 1,
12124 resultInArg0: true,
12125 zeroWidth: true,
12126 reg: regInfo{
12127 inputs: []inputInfo{
12128 {0, 2147418112},
12129 },
12130 outputs: []outputInfo{
12131 {0, 2147418112},
12132 },
12133 },
12134 },
12135 {
12136 name: "LoweredRound64F",
12137 argLen: 1,
12138 resultInArg0: true,
12139 zeroWidth: true,
12140 reg: regInfo{
12141 inputs: []inputInfo{
12142 {0, 2147418112},
12143 },
12144 outputs: []outputInfo{
12145 {0, 2147418112},
12146 },
12147 },
12148 },
12149 {
12150 name: "VFMADD231SS",
12151 argLen: 3,
12152 resultInArg0: true,
12153 asm: x86.AVFMADD231SS,
12154 reg: regInfo{
12155 inputs: []inputInfo{
12156 {0, 2147418112},
12157 {1, 2147418112},
12158 {2, 2147418112},
12159 },
12160 outputs: []outputInfo{
12161 {0, 2147418112},
12162 },
12163 },
12164 },
12165 {
12166 name: "VFMADD231SD",
12167 argLen: 3,
12168 resultInArg0: true,
12169 asm: x86.AVFMADD231SD,
12170 reg: regInfo{
12171 inputs: []inputInfo{
12172 {0, 2147418112},
12173 {1, 2147418112},
12174 {2, 2147418112},
12175 },
12176 outputs: []outputInfo{
12177 {0, 2147418112},
12178 },
12179 },
12180 },
12181 {
12182 name: "MINSD",
12183 argLen: 2,
12184 resultInArg0: true,
12185 asm: x86.AMINSD,
12186 reg: regInfo{
12187 inputs: []inputInfo{
12188 {0, 2147418112},
12189 {1, 2147418112},
12190 },
12191 outputs: []outputInfo{
12192 {0, 2147418112},
12193 },
12194 },
12195 },
12196 {
12197 name: "MINSS",
12198 argLen: 2,
12199 resultInArg0: true,
12200 asm: x86.AMINSS,
12201 reg: regInfo{
12202 inputs: []inputInfo{
12203 {0, 2147418112},
12204 {1, 2147418112},
12205 },
12206 outputs: []outputInfo{
12207 {0, 2147418112},
12208 },
12209 },
12210 },
12211 {
12212 name: "SBBQcarrymask",
12213 argLen: 1,
12214 asm: x86.ASBBQ,
12215 reg: regInfo{
12216 outputs: []outputInfo{
12217 {0, 49135},
12218 },
12219 },
12220 },
12221 {
12222 name: "SBBLcarrymask",
12223 argLen: 1,
12224 asm: x86.ASBBL,
12225 reg: regInfo{
12226 outputs: []outputInfo{
12227 {0, 49135},
12228 },
12229 },
12230 },
12231 {
12232 name: "SETEQ",
12233 argLen: 1,
12234 asm: x86.ASETEQ,
12235 reg: regInfo{
12236 outputs: []outputInfo{
12237 {0, 49135},
12238 },
12239 },
12240 },
12241 {
12242 name: "SETNE",
12243 argLen: 1,
12244 asm: x86.ASETNE,
12245 reg: regInfo{
12246 outputs: []outputInfo{
12247 {0, 49135},
12248 },
12249 },
12250 },
12251 {
12252 name: "SETL",
12253 argLen: 1,
12254 asm: x86.ASETLT,
12255 reg: regInfo{
12256 outputs: []outputInfo{
12257 {0, 49135},
12258 },
12259 },
12260 },
12261 {
12262 name: "SETLE",
12263 argLen: 1,
12264 asm: x86.ASETLE,
12265 reg: regInfo{
12266 outputs: []outputInfo{
12267 {0, 49135},
12268 },
12269 },
12270 },
12271 {
12272 name: "SETG",
12273 argLen: 1,
12274 asm: x86.ASETGT,
12275 reg: regInfo{
12276 outputs: []outputInfo{
12277 {0, 49135},
12278 },
12279 },
12280 },
12281 {
12282 name: "SETGE",
12283 argLen: 1,
12284 asm: x86.ASETGE,
12285 reg: regInfo{
12286 outputs: []outputInfo{
12287 {0, 49135},
12288 },
12289 },
12290 },
12291 {
12292 name: "SETB",
12293 argLen: 1,
12294 asm: x86.ASETCS,
12295 reg: regInfo{
12296 outputs: []outputInfo{
12297 {0, 49135},
12298 },
12299 },
12300 },
12301 {
12302 name: "SETBE",
12303 argLen: 1,
12304 asm: x86.ASETLS,
12305 reg: regInfo{
12306 outputs: []outputInfo{
12307 {0, 49135},
12308 },
12309 },
12310 },
12311 {
12312 name: "SETA",
12313 argLen: 1,
12314 asm: x86.ASETHI,
12315 reg: regInfo{
12316 outputs: []outputInfo{
12317 {0, 49135},
12318 },
12319 },
12320 },
12321 {
12322 name: "SETAE",
12323 argLen: 1,
12324 asm: x86.ASETCC,
12325 reg: regInfo{
12326 outputs: []outputInfo{
12327 {0, 49135},
12328 },
12329 },
12330 },
12331 {
12332 name: "SETO",
12333 argLen: 1,
12334 asm: x86.ASETOS,
12335 reg: regInfo{
12336 outputs: []outputInfo{
12337 {0, 49135},
12338 },
12339 },
12340 },
12341 {
12342 name: "SETEQstore",
12343 auxType: auxSymOff,
12344 argLen: 3,
12345 faultOnNilArg0: true,
12346 symEffect: SymWrite,
12347 asm: x86.ASETEQ,
12348 reg: regInfo{
12349 inputs: []inputInfo{
12350 {0, 4295032831},
12351 },
12352 },
12353 },
12354 {
12355 name: "SETNEstore",
12356 auxType: auxSymOff,
12357 argLen: 3,
12358 faultOnNilArg0: true,
12359 symEffect: SymWrite,
12360 asm: x86.ASETNE,
12361 reg: regInfo{
12362 inputs: []inputInfo{
12363 {0, 4295032831},
12364 },
12365 },
12366 },
12367 {
12368 name: "SETLstore",
12369 auxType: auxSymOff,
12370 argLen: 3,
12371 faultOnNilArg0: true,
12372 symEffect: SymWrite,
12373 asm: x86.ASETLT,
12374 reg: regInfo{
12375 inputs: []inputInfo{
12376 {0, 4295032831},
12377 },
12378 },
12379 },
12380 {
12381 name: "SETLEstore",
12382 auxType: auxSymOff,
12383 argLen: 3,
12384 faultOnNilArg0: true,
12385 symEffect: SymWrite,
12386 asm: x86.ASETLE,
12387 reg: regInfo{
12388 inputs: []inputInfo{
12389 {0, 4295032831},
12390 },
12391 },
12392 },
12393 {
12394 name: "SETGstore",
12395 auxType: auxSymOff,
12396 argLen: 3,
12397 faultOnNilArg0: true,
12398 symEffect: SymWrite,
12399 asm: x86.ASETGT,
12400 reg: regInfo{
12401 inputs: []inputInfo{
12402 {0, 4295032831},
12403 },
12404 },
12405 },
12406 {
12407 name: "SETGEstore",
12408 auxType: auxSymOff,
12409 argLen: 3,
12410 faultOnNilArg0: true,
12411 symEffect: SymWrite,
12412 asm: x86.ASETGE,
12413 reg: regInfo{
12414 inputs: []inputInfo{
12415 {0, 4295032831},
12416 },
12417 },
12418 },
12419 {
12420 name: "SETBstore",
12421 auxType: auxSymOff,
12422 argLen: 3,
12423 faultOnNilArg0: true,
12424 symEffect: SymWrite,
12425 asm: x86.ASETCS,
12426 reg: regInfo{
12427 inputs: []inputInfo{
12428 {0, 4295032831},
12429 },
12430 },
12431 },
12432 {
12433 name: "SETBEstore",
12434 auxType: auxSymOff,
12435 argLen: 3,
12436 faultOnNilArg0: true,
12437 symEffect: SymWrite,
12438 asm: x86.ASETLS,
12439 reg: regInfo{
12440 inputs: []inputInfo{
12441 {0, 4295032831},
12442 },
12443 },
12444 },
12445 {
12446 name: "SETAstore",
12447 auxType: auxSymOff,
12448 argLen: 3,
12449 faultOnNilArg0: true,
12450 symEffect: SymWrite,
12451 asm: x86.ASETHI,
12452 reg: regInfo{
12453 inputs: []inputInfo{
12454 {0, 4295032831},
12455 },
12456 },
12457 },
12458 {
12459 name: "SETAEstore",
12460 auxType: auxSymOff,
12461 argLen: 3,
12462 faultOnNilArg0: true,
12463 symEffect: SymWrite,
12464 asm: x86.ASETCC,
12465 reg: regInfo{
12466 inputs: []inputInfo{
12467 {0, 4295032831},
12468 },
12469 },
12470 },
12471 {
12472 name: "SETEQstoreidx1",
12473 auxType: auxSymOff,
12474 argLen: 4,
12475 commutative: true,
12476 symEffect: SymWrite,
12477 asm: x86.ASETEQ,
12478 scale: 1,
12479 reg: regInfo{
12480 inputs: []inputInfo{
12481 {1, 49151},
12482 {0, 4295032831},
12483 },
12484 },
12485 },
12486 {
12487 name: "SETNEstoreidx1",
12488 auxType: auxSymOff,
12489 argLen: 4,
12490 commutative: true,
12491 symEffect: SymWrite,
12492 asm: x86.ASETNE,
12493 scale: 1,
12494 reg: regInfo{
12495 inputs: []inputInfo{
12496 {1, 49151},
12497 {0, 4295032831},
12498 },
12499 },
12500 },
12501 {
12502 name: "SETLstoreidx1",
12503 auxType: auxSymOff,
12504 argLen: 4,
12505 commutative: true,
12506 symEffect: SymWrite,
12507 asm: x86.ASETLT,
12508 scale: 1,
12509 reg: regInfo{
12510 inputs: []inputInfo{
12511 {1, 49151},
12512 {0, 4295032831},
12513 },
12514 },
12515 },
12516 {
12517 name: "SETLEstoreidx1",
12518 auxType: auxSymOff,
12519 argLen: 4,
12520 commutative: true,
12521 symEffect: SymWrite,
12522 asm: x86.ASETLE,
12523 scale: 1,
12524 reg: regInfo{
12525 inputs: []inputInfo{
12526 {1, 49151},
12527 {0, 4295032831},
12528 },
12529 },
12530 },
12531 {
12532 name: "SETGstoreidx1",
12533 auxType: auxSymOff,
12534 argLen: 4,
12535 commutative: true,
12536 symEffect: SymWrite,
12537 asm: x86.ASETGT,
12538 scale: 1,
12539 reg: regInfo{
12540 inputs: []inputInfo{
12541 {1, 49151},
12542 {0, 4295032831},
12543 },
12544 },
12545 },
12546 {
12547 name: "SETGEstoreidx1",
12548 auxType: auxSymOff,
12549 argLen: 4,
12550 commutative: true,
12551 symEffect: SymWrite,
12552 asm: x86.ASETGE,
12553 scale: 1,
12554 reg: regInfo{
12555 inputs: []inputInfo{
12556 {1, 49151},
12557 {0, 4295032831},
12558 },
12559 },
12560 },
12561 {
12562 name: "SETBstoreidx1",
12563 auxType: auxSymOff,
12564 argLen: 4,
12565 commutative: true,
12566 symEffect: SymWrite,
12567 asm: x86.ASETCS,
12568 scale: 1,
12569 reg: regInfo{
12570 inputs: []inputInfo{
12571 {1, 49151},
12572 {0, 4295032831},
12573 },
12574 },
12575 },
12576 {
12577 name: "SETBEstoreidx1",
12578 auxType: auxSymOff,
12579 argLen: 4,
12580 commutative: true,
12581 symEffect: SymWrite,
12582 asm: x86.ASETLS,
12583 scale: 1,
12584 reg: regInfo{
12585 inputs: []inputInfo{
12586 {1, 49151},
12587 {0, 4295032831},
12588 },
12589 },
12590 },
12591 {
12592 name: "SETAstoreidx1",
12593 auxType: auxSymOff,
12594 argLen: 4,
12595 commutative: true,
12596 symEffect: SymWrite,
12597 asm: x86.ASETHI,
12598 scale: 1,
12599 reg: regInfo{
12600 inputs: []inputInfo{
12601 {1, 49151},
12602 {0, 4295032831},
12603 },
12604 },
12605 },
12606 {
12607 name: "SETAEstoreidx1",
12608 auxType: auxSymOff,
12609 argLen: 4,
12610 commutative: true,
12611 symEffect: SymWrite,
12612 asm: x86.ASETCC,
12613 scale: 1,
12614 reg: regInfo{
12615 inputs: []inputInfo{
12616 {1, 49151},
12617 {0, 4295032831},
12618 },
12619 },
12620 },
12621 {
12622 name: "SETEQF",
12623 argLen: 1,
12624 clobberFlags: true,
12625 needIntTemp: true,
12626 asm: x86.ASETEQ,
12627 reg: regInfo{
12628 outputs: []outputInfo{
12629 {0, 49135},
12630 },
12631 },
12632 },
12633 {
12634 name: "SETNEF",
12635 argLen: 1,
12636 clobberFlags: true,
12637 needIntTemp: true,
12638 asm: x86.ASETNE,
12639 reg: regInfo{
12640 outputs: []outputInfo{
12641 {0, 49135},
12642 },
12643 },
12644 },
12645 {
12646 name: "SETORD",
12647 argLen: 1,
12648 asm: x86.ASETPC,
12649 reg: regInfo{
12650 outputs: []outputInfo{
12651 {0, 49135},
12652 },
12653 },
12654 },
12655 {
12656 name: "SETNAN",
12657 argLen: 1,
12658 asm: x86.ASETPS,
12659 reg: regInfo{
12660 outputs: []outputInfo{
12661 {0, 49135},
12662 },
12663 },
12664 },
12665 {
12666 name: "SETGF",
12667 argLen: 1,
12668 asm: x86.ASETHI,
12669 reg: regInfo{
12670 outputs: []outputInfo{
12671 {0, 49135},
12672 },
12673 },
12674 },
12675 {
12676 name: "SETGEF",
12677 argLen: 1,
12678 asm: x86.ASETCC,
12679 reg: regInfo{
12680 outputs: []outputInfo{
12681 {0, 49135},
12682 },
12683 },
12684 },
12685 {
12686 name: "MOVBQSX",
12687 argLen: 1,
12688 asm: x86.AMOVBQSX,
12689 reg: regInfo{
12690 inputs: []inputInfo{
12691 {0, 49135},
12692 },
12693 outputs: []outputInfo{
12694 {0, 49135},
12695 },
12696 },
12697 },
12698 {
12699 name: "MOVBQZX",
12700 argLen: 1,
12701 asm: x86.AMOVBLZX,
12702 reg: regInfo{
12703 inputs: []inputInfo{
12704 {0, 49135},
12705 },
12706 outputs: []outputInfo{
12707 {0, 49135},
12708 },
12709 },
12710 },
12711 {
12712 name: "MOVWQSX",
12713 argLen: 1,
12714 asm: x86.AMOVWQSX,
12715 reg: regInfo{
12716 inputs: []inputInfo{
12717 {0, 49135},
12718 },
12719 outputs: []outputInfo{
12720 {0, 49135},
12721 },
12722 },
12723 },
12724 {
12725 name: "MOVWQZX",
12726 argLen: 1,
12727 asm: x86.AMOVWLZX,
12728 reg: regInfo{
12729 inputs: []inputInfo{
12730 {0, 49135},
12731 },
12732 outputs: []outputInfo{
12733 {0, 49135},
12734 },
12735 },
12736 },
12737 {
12738 name: "MOVLQSX",
12739 argLen: 1,
12740 asm: x86.AMOVLQSX,
12741 reg: regInfo{
12742 inputs: []inputInfo{
12743 {0, 49135},
12744 },
12745 outputs: []outputInfo{
12746 {0, 49135},
12747 },
12748 },
12749 },
12750 {
12751 name: "MOVLQZX",
12752 argLen: 1,
12753 asm: x86.AMOVL,
12754 reg: regInfo{
12755 inputs: []inputInfo{
12756 {0, 49135},
12757 },
12758 outputs: []outputInfo{
12759 {0, 49135},
12760 },
12761 },
12762 },
12763 {
12764 name: "MOVLconst",
12765 auxType: auxInt32,
12766 argLen: 0,
12767 rematerializeable: true,
12768 asm: x86.AMOVL,
12769 reg: regInfo{
12770 outputs: []outputInfo{
12771 {0, 49135},
12772 },
12773 },
12774 },
12775 {
12776 name: "MOVQconst",
12777 auxType: auxInt64,
12778 argLen: 0,
12779 rematerializeable: true,
12780 asm: x86.AMOVQ,
12781 reg: regInfo{
12782 outputs: []outputInfo{
12783 {0, 49135},
12784 },
12785 },
12786 },
12787 {
12788 name: "CVTTSD2SL",
12789 argLen: 1,
12790 asm: x86.ACVTTSD2SL,
12791 reg: regInfo{
12792 inputs: []inputInfo{
12793 {0, 2147418112},
12794 },
12795 outputs: []outputInfo{
12796 {0, 49135},
12797 },
12798 },
12799 },
12800 {
12801 name: "CVTTSD2SQ",
12802 argLen: 1,
12803 asm: x86.ACVTTSD2SQ,
12804 reg: regInfo{
12805 inputs: []inputInfo{
12806 {0, 2147418112},
12807 },
12808 outputs: []outputInfo{
12809 {0, 49135},
12810 },
12811 },
12812 },
12813 {
12814 name: "CVTTSS2SL",
12815 argLen: 1,
12816 asm: x86.ACVTTSS2SL,
12817 reg: regInfo{
12818 inputs: []inputInfo{
12819 {0, 2147418112},
12820 },
12821 outputs: []outputInfo{
12822 {0, 49135},
12823 },
12824 },
12825 },
12826 {
12827 name: "CVTTSS2SQ",
12828 argLen: 1,
12829 asm: x86.ACVTTSS2SQ,
12830 reg: regInfo{
12831 inputs: []inputInfo{
12832 {0, 2147418112},
12833 },
12834 outputs: []outputInfo{
12835 {0, 49135},
12836 },
12837 },
12838 },
12839 {
12840 name: "CVTSL2SS",
12841 argLen: 1,
12842 asm: x86.ACVTSL2SS,
12843 reg: regInfo{
12844 inputs: []inputInfo{
12845 {0, 49135},
12846 },
12847 outputs: []outputInfo{
12848 {0, 2147418112},
12849 },
12850 },
12851 },
12852 {
12853 name: "CVTSL2SD",
12854 argLen: 1,
12855 asm: x86.ACVTSL2SD,
12856 reg: regInfo{
12857 inputs: []inputInfo{
12858 {0, 49135},
12859 },
12860 outputs: []outputInfo{
12861 {0, 2147418112},
12862 },
12863 },
12864 },
12865 {
12866 name: "CVTSQ2SS",
12867 argLen: 1,
12868 asm: x86.ACVTSQ2SS,
12869 reg: regInfo{
12870 inputs: []inputInfo{
12871 {0, 49135},
12872 },
12873 outputs: []outputInfo{
12874 {0, 2147418112},
12875 },
12876 },
12877 },
12878 {
12879 name: "CVTSQ2SD",
12880 argLen: 1,
12881 asm: x86.ACVTSQ2SD,
12882 reg: regInfo{
12883 inputs: []inputInfo{
12884 {0, 49135},
12885 },
12886 outputs: []outputInfo{
12887 {0, 2147418112},
12888 },
12889 },
12890 },
12891 {
12892 name: "CVTSD2SS",
12893 argLen: 1,
12894 asm: x86.ACVTSD2SS,
12895 reg: regInfo{
12896 inputs: []inputInfo{
12897 {0, 2147418112},
12898 },
12899 outputs: []outputInfo{
12900 {0, 2147418112},
12901 },
12902 },
12903 },
12904 {
12905 name: "CVTSS2SD",
12906 argLen: 1,
12907 asm: x86.ACVTSS2SD,
12908 reg: regInfo{
12909 inputs: []inputInfo{
12910 {0, 2147418112},
12911 },
12912 outputs: []outputInfo{
12913 {0, 2147418112},
12914 },
12915 },
12916 },
12917 {
12918 name: "MOVQi2f",
12919 argLen: 1,
12920 reg: regInfo{
12921 inputs: []inputInfo{
12922 {0, 49135},
12923 },
12924 outputs: []outputInfo{
12925 {0, 2147418112},
12926 },
12927 },
12928 },
12929 {
12930 name: "MOVQf2i",
12931 argLen: 1,
12932 reg: regInfo{
12933 inputs: []inputInfo{
12934 {0, 2147418112},
12935 },
12936 outputs: []outputInfo{
12937 {0, 49135},
12938 },
12939 },
12940 },
12941 {
12942 name: "MOVLi2f",
12943 argLen: 1,
12944 reg: regInfo{
12945 inputs: []inputInfo{
12946 {0, 49135},
12947 },
12948 outputs: []outputInfo{
12949 {0, 2147418112},
12950 },
12951 },
12952 },
12953 {
12954 name: "MOVLf2i",
12955 argLen: 1,
12956 reg: regInfo{
12957 inputs: []inputInfo{
12958 {0, 2147418112},
12959 },
12960 outputs: []outputInfo{
12961 {0, 49135},
12962 },
12963 },
12964 },
12965 {
12966 name: "PXOR",
12967 argLen: 2,
12968 commutative: true,
12969 resultInArg0: true,
12970 asm: x86.APXOR,
12971 reg: regInfo{
12972 inputs: []inputInfo{
12973 {0, 2147418112},
12974 {1, 2147418112},
12975 },
12976 outputs: []outputInfo{
12977 {0, 2147418112},
12978 },
12979 },
12980 },
12981 {
12982 name: "POR",
12983 argLen: 2,
12984 commutative: true,
12985 resultInArg0: true,
12986 asm: x86.APOR,
12987 reg: regInfo{
12988 inputs: []inputInfo{
12989 {0, 2147418112},
12990 {1, 2147418112},
12991 },
12992 outputs: []outputInfo{
12993 {0, 2147418112},
12994 },
12995 },
12996 },
12997 {
12998 name: "LEAQ",
12999 auxType: auxSymOff,
13000 argLen: 1,
13001 rematerializeable: true,
13002 symEffect: SymAddr,
13003 asm: x86.ALEAQ,
13004 reg: regInfo{
13005 inputs: []inputInfo{
13006 {0, 4295032831},
13007 },
13008 outputs: []outputInfo{
13009 {0, 49135},
13010 },
13011 },
13012 },
13013 {
13014 name: "LEAL",
13015 auxType: auxSymOff,
13016 argLen: 1,
13017 rematerializeable: true,
13018 symEffect: SymAddr,
13019 asm: x86.ALEAL,
13020 reg: regInfo{
13021 inputs: []inputInfo{
13022 {0, 4295032831},
13023 },
13024 outputs: []outputInfo{
13025 {0, 49135},
13026 },
13027 },
13028 },
13029 {
13030 name: "LEAW",
13031 auxType: auxSymOff,
13032 argLen: 1,
13033 rematerializeable: true,
13034 symEffect: SymAddr,
13035 asm: x86.ALEAW,
13036 reg: regInfo{
13037 inputs: []inputInfo{
13038 {0, 4295032831},
13039 },
13040 outputs: []outputInfo{
13041 {0, 49135},
13042 },
13043 },
13044 },
13045 {
13046 name: "LEAQ1",
13047 auxType: auxSymOff,
13048 argLen: 2,
13049 commutative: true,
13050 symEffect: SymAddr,
13051 asm: x86.ALEAQ,
13052 scale: 1,
13053 reg: regInfo{
13054 inputs: []inputInfo{
13055 {1, 49151},
13056 {0, 4295032831},
13057 },
13058 outputs: []outputInfo{
13059 {0, 49135},
13060 },
13061 },
13062 },
13063 {
13064 name: "LEAL1",
13065 auxType: auxSymOff,
13066 argLen: 2,
13067 commutative: true,
13068 symEffect: SymAddr,
13069 asm: x86.ALEAL,
13070 scale: 1,
13071 reg: regInfo{
13072 inputs: []inputInfo{
13073 {1, 49151},
13074 {0, 4295032831},
13075 },
13076 outputs: []outputInfo{
13077 {0, 49135},
13078 },
13079 },
13080 },
13081 {
13082 name: "LEAW1",
13083 auxType: auxSymOff,
13084 argLen: 2,
13085 commutative: true,
13086 symEffect: SymAddr,
13087 asm: x86.ALEAW,
13088 scale: 1,
13089 reg: regInfo{
13090 inputs: []inputInfo{
13091 {1, 49151},
13092 {0, 4295032831},
13093 },
13094 outputs: []outputInfo{
13095 {0, 49135},
13096 },
13097 },
13098 },
13099 {
13100 name: "LEAQ2",
13101 auxType: auxSymOff,
13102 argLen: 2,
13103 symEffect: SymAddr,
13104 asm: x86.ALEAQ,
13105 scale: 2,
13106 reg: regInfo{
13107 inputs: []inputInfo{
13108 {1, 49151},
13109 {0, 4295032831},
13110 },
13111 outputs: []outputInfo{
13112 {0, 49135},
13113 },
13114 },
13115 },
13116 {
13117 name: "LEAL2",
13118 auxType: auxSymOff,
13119 argLen: 2,
13120 symEffect: SymAddr,
13121 asm: x86.ALEAL,
13122 scale: 2,
13123 reg: regInfo{
13124 inputs: []inputInfo{
13125 {1, 49151},
13126 {0, 4295032831},
13127 },
13128 outputs: []outputInfo{
13129 {0, 49135},
13130 },
13131 },
13132 },
13133 {
13134 name: "LEAW2",
13135 auxType: auxSymOff,
13136 argLen: 2,
13137 symEffect: SymAddr,
13138 asm: x86.ALEAW,
13139 scale: 2,
13140 reg: regInfo{
13141 inputs: []inputInfo{
13142 {1, 49151},
13143 {0, 4295032831},
13144 },
13145 outputs: []outputInfo{
13146 {0, 49135},
13147 },
13148 },
13149 },
13150 {
13151 name: "LEAQ4",
13152 auxType: auxSymOff,
13153 argLen: 2,
13154 symEffect: SymAddr,
13155 asm: x86.ALEAQ,
13156 scale: 4,
13157 reg: regInfo{
13158 inputs: []inputInfo{
13159 {1, 49151},
13160 {0, 4295032831},
13161 },
13162 outputs: []outputInfo{
13163 {0, 49135},
13164 },
13165 },
13166 },
13167 {
13168 name: "LEAL4",
13169 auxType: auxSymOff,
13170 argLen: 2,
13171 symEffect: SymAddr,
13172 asm: x86.ALEAL,
13173 scale: 4,
13174 reg: regInfo{
13175 inputs: []inputInfo{
13176 {1, 49151},
13177 {0, 4295032831},
13178 },
13179 outputs: []outputInfo{
13180 {0, 49135},
13181 },
13182 },
13183 },
13184 {
13185 name: "LEAW4",
13186 auxType: auxSymOff,
13187 argLen: 2,
13188 symEffect: SymAddr,
13189 asm: x86.ALEAW,
13190 scale: 4,
13191 reg: regInfo{
13192 inputs: []inputInfo{
13193 {1, 49151},
13194 {0, 4295032831},
13195 },
13196 outputs: []outputInfo{
13197 {0, 49135},
13198 },
13199 },
13200 },
13201 {
13202 name: "LEAQ8",
13203 auxType: auxSymOff,
13204 argLen: 2,
13205 symEffect: SymAddr,
13206 asm: x86.ALEAQ,
13207 scale: 8,
13208 reg: regInfo{
13209 inputs: []inputInfo{
13210 {1, 49151},
13211 {0, 4295032831},
13212 },
13213 outputs: []outputInfo{
13214 {0, 49135},
13215 },
13216 },
13217 },
13218 {
13219 name: "LEAL8",
13220 auxType: auxSymOff,
13221 argLen: 2,
13222 symEffect: SymAddr,
13223 asm: x86.ALEAL,
13224 scale: 8,
13225 reg: regInfo{
13226 inputs: []inputInfo{
13227 {1, 49151},
13228 {0, 4295032831},
13229 },
13230 outputs: []outputInfo{
13231 {0, 49135},
13232 },
13233 },
13234 },
13235 {
13236 name: "LEAW8",
13237 auxType: auxSymOff,
13238 argLen: 2,
13239 symEffect: SymAddr,
13240 asm: x86.ALEAW,
13241 scale: 8,
13242 reg: regInfo{
13243 inputs: []inputInfo{
13244 {1, 49151},
13245 {0, 4295032831},
13246 },
13247 outputs: []outputInfo{
13248 {0, 49135},
13249 },
13250 },
13251 },
13252 {
13253 name: "MOVBload",
13254 auxType: auxSymOff,
13255 argLen: 2,
13256 faultOnNilArg0: true,
13257 symEffect: SymRead,
13258 asm: x86.AMOVBLZX,
13259 reg: regInfo{
13260 inputs: []inputInfo{
13261 {0, 4295032831},
13262 },
13263 outputs: []outputInfo{
13264 {0, 49135},
13265 },
13266 },
13267 },
13268 {
13269 name: "MOVBQSXload",
13270 auxType: auxSymOff,
13271 argLen: 2,
13272 faultOnNilArg0: true,
13273 symEffect: SymRead,
13274 asm: x86.AMOVBQSX,
13275 reg: regInfo{
13276 inputs: []inputInfo{
13277 {0, 4295032831},
13278 },
13279 outputs: []outputInfo{
13280 {0, 49135},
13281 },
13282 },
13283 },
13284 {
13285 name: "MOVWload",
13286 auxType: auxSymOff,
13287 argLen: 2,
13288 faultOnNilArg0: true,
13289 symEffect: SymRead,
13290 asm: x86.AMOVWLZX,
13291 reg: regInfo{
13292 inputs: []inputInfo{
13293 {0, 4295032831},
13294 },
13295 outputs: []outputInfo{
13296 {0, 49135},
13297 },
13298 },
13299 },
13300 {
13301 name: "MOVWQSXload",
13302 auxType: auxSymOff,
13303 argLen: 2,
13304 faultOnNilArg0: true,
13305 symEffect: SymRead,
13306 asm: x86.AMOVWQSX,
13307 reg: regInfo{
13308 inputs: []inputInfo{
13309 {0, 4295032831},
13310 },
13311 outputs: []outputInfo{
13312 {0, 49135},
13313 },
13314 },
13315 },
13316 {
13317 name: "MOVLload",
13318 auxType: auxSymOff,
13319 argLen: 2,
13320 faultOnNilArg0: true,
13321 symEffect: SymRead,
13322 asm: x86.AMOVL,
13323 reg: regInfo{
13324 inputs: []inputInfo{
13325 {0, 4295032831},
13326 },
13327 outputs: []outputInfo{
13328 {0, 49135},
13329 },
13330 },
13331 },
13332 {
13333 name: "MOVLQSXload",
13334 auxType: auxSymOff,
13335 argLen: 2,
13336 faultOnNilArg0: true,
13337 symEffect: SymRead,
13338 asm: x86.AMOVLQSX,
13339 reg: regInfo{
13340 inputs: []inputInfo{
13341 {0, 4295032831},
13342 },
13343 outputs: []outputInfo{
13344 {0, 49135},
13345 },
13346 },
13347 },
13348 {
13349 name: "MOVQload",
13350 auxType: auxSymOff,
13351 argLen: 2,
13352 faultOnNilArg0: true,
13353 symEffect: SymRead,
13354 asm: x86.AMOVQ,
13355 reg: regInfo{
13356 inputs: []inputInfo{
13357 {0, 4295032831},
13358 },
13359 outputs: []outputInfo{
13360 {0, 49135},
13361 },
13362 },
13363 },
13364 {
13365 name: "MOVBstore",
13366 auxType: auxSymOff,
13367 argLen: 3,
13368 faultOnNilArg0: true,
13369 symEffect: SymWrite,
13370 asm: x86.AMOVB,
13371 reg: regInfo{
13372 inputs: []inputInfo{
13373 {1, 49151},
13374 {0, 4295032831},
13375 },
13376 },
13377 },
13378 {
13379 name: "MOVWstore",
13380 auxType: auxSymOff,
13381 argLen: 3,
13382 faultOnNilArg0: true,
13383 symEffect: SymWrite,
13384 asm: x86.AMOVW,
13385 reg: regInfo{
13386 inputs: []inputInfo{
13387 {1, 49151},
13388 {0, 4295032831},
13389 },
13390 },
13391 },
13392 {
13393 name: "MOVLstore",
13394 auxType: auxSymOff,
13395 argLen: 3,
13396 faultOnNilArg0: true,
13397 symEffect: SymWrite,
13398 asm: x86.AMOVL,
13399 reg: regInfo{
13400 inputs: []inputInfo{
13401 {1, 49151},
13402 {0, 4295032831},
13403 },
13404 },
13405 },
13406 {
13407 name: "MOVQstore",
13408 auxType: auxSymOff,
13409 argLen: 3,
13410 faultOnNilArg0: true,
13411 symEffect: SymWrite,
13412 asm: x86.AMOVQ,
13413 reg: regInfo{
13414 inputs: []inputInfo{
13415 {1, 49151},
13416 {0, 4295032831},
13417 },
13418 },
13419 },
13420 {
13421 name: "MOVOload",
13422 auxType: auxSymOff,
13423 argLen: 2,
13424 faultOnNilArg0: true,
13425 symEffect: SymRead,
13426 asm: x86.AMOVUPS,
13427 reg: regInfo{
13428 inputs: []inputInfo{
13429 {0, 4295016447},
13430 },
13431 outputs: []outputInfo{
13432 {0, 2147418112},
13433 },
13434 },
13435 },
13436 {
13437 name: "MOVOstore",
13438 auxType: auxSymOff,
13439 argLen: 3,
13440 faultOnNilArg0: true,
13441 symEffect: SymWrite,
13442 asm: x86.AMOVUPS,
13443 reg: regInfo{
13444 inputs: []inputInfo{
13445 {1, 2147418112},
13446 {0, 4295016447},
13447 },
13448 },
13449 },
13450 {
13451 name: "MOVBloadidx1",
13452 auxType: auxSymOff,
13453 argLen: 3,
13454 commutative: true,
13455 symEffect: SymRead,
13456 asm: x86.AMOVBLZX,
13457 scale: 1,
13458 reg: regInfo{
13459 inputs: []inputInfo{
13460 {1, 49151},
13461 {0, 4295032831},
13462 },
13463 outputs: []outputInfo{
13464 {0, 49135},
13465 },
13466 },
13467 },
13468 {
13469 name: "MOVWloadidx1",
13470 auxType: auxSymOff,
13471 argLen: 3,
13472 commutative: true,
13473 symEffect: SymRead,
13474 asm: x86.AMOVWLZX,
13475 scale: 1,
13476 reg: regInfo{
13477 inputs: []inputInfo{
13478 {1, 49151},
13479 {0, 4295032831},
13480 },
13481 outputs: []outputInfo{
13482 {0, 49135},
13483 },
13484 },
13485 },
13486 {
13487 name: "MOVWloadidx2",
13488 auxType: auxSymOff,
13489 argLen: 3,
13490 symEffect: SymRead,
13491 asm: x86.AMOVWLZX,
13492 scale: 2,
13493 reg: regInfo{
13494 inputs: []inputInfo{
13495 {1, 49151},
13496 {0, 4295032831},
13497 },
13498 outputs: []outputInfo{
13499 {0, 49135},
13500 },
13501 },
13502 },
13503 {
13504 name: "MOVLloadidx1",
13505 auxType: auxSymOff,
13506 argLen: 3,
13507 commutative: true,
13508 symEffect: SymRead,
13509 asm: x86.AMOVL,
13510 scale: 1,
13511 reg: regInfo{
13512 inputs: []inputInfo{
13513 {1, 49151},
13514 {0, 4295032831},
13515 },
13516 outputs: []outputInfo{
13517 {0, 49135},
13518 },
13519 },
13520 },
13521 {
13522 name: "MOVLloadidx4",
13523 auxType: auxSymOff,
13524 argLen: 3,
13525 symEffect: SymRead,
13526 asm: x86.AMOVL,
13527 scale: 4,
13528 reg: regInfo{
13529 inputs: []inputInfo{
13530 {1, 49151},
13531 {0, 4295032831},
13532 },
13533 outputs: []outputInfo{
13534 {0, 49135},
13535 },
13536 },
13537 },
13538 {
13539 name: "MOVLloadidx8",
13540 auxType: auxSymOff,
13541 argLen: 3,
13542 symEffect: SymRead,
13543 asm: x86.AMOVL,
13544 scale: 8,
13545 reg: regInfo{
13546 inputs: []inputInfo{
13547 {1, 49151},
13548 {0, 4295032831},
13549 },
13550 outputs: []outputInfo{
13551 {0, 49135},
13552 },
13553 },
13554 },
13555 {
13556 name: "MOVQloadidx1",
13557 auxType: auxSymOff,
13558 argLen: 3,
13559 commutative: true,
13560 symEffect: SymRead,
13561 asm: x86.AMOVQ,
13562 scale: 1,
13563 reg: regInfo{
13564 inputs: []inputInfo{
13565 {1, 49151},
13566 {0, 4295032831},
13567 },
13568 outputs: []outputInfo{
13569 {0, 49135},
13570 },
13571 },
13572 },
13573 {
13574 name: "MOVQloadidx8",
13575 auxType: auxSymOff,
13576 argLen: 3,
13577 symEffect: SymRead,
13578 asm: x86.AMOVQ,
13579 scale: 8,
13580 reg: regInfo{
13581 inputs: []inputInfo{
13582 {1, 49151},
13583 {0, 4295032831},
13584 },
13585 outputs: []outputInfo{
13586 {0, 49135},
13587 },
13588 },
13589 },
13590 {
13591 name: "MOVBstoreidx1",
13592 auxType: auxSymOff,
13593 argLen: 4,
13594 commutative: true,
13595 symEffect: SymWrite,
13596 asm: x86.AMOVB,
13597 scale: 1,
13598 reg: regInfo{
13599 inputs: []inputInfo{
13600 {1, 49151},
13601 {2, 49151},
13602 {0, 4295032831},
13603 },
13604 },
13605 },
13606 {
13607 name: "MOVWstoreidx1",
13608 auxType: auxSymOff,
13609 argLen: 4,
13610 commutative: true,
13611 symEffect: SymWrite,
13612 asm: x86.AMOVW,
13613 scale: 1,
13614 reg: regInfo{
13615 inputs: []inputInfo{
13616 {1, 49151},
13617 {2, 49151},
13618 {0, 4295032831},
13619 },
13620 },
13621 },
13622 {
13623 name: "MOVWstoreidx2",
13624 auxType: auxSymOff,
13625 argLen: 4,
13626 symEffect: SymWrite,
13627 asm: x86.AMOVW,
13628 scale: 2,
13629 reg: regInfo{
13630 inputs: []inputInfo{
13631 {1, 49151},
13632 {2, 49151},
13633 {0, 4295032831},
13634 },
13635 },
13636 },
13637 {
13638 name: "MOVLstoreidx1",
13639 auxType: auxSymOff,
13640 argLen: 4,
13641 commutative: true,
13642 symEffect: SymWrite,
13643 asm: x86.AMOVL,
13644 scale: 1,
13645 reg: regInfo{
13646 inputs: []inputInfo{
13647 {1, 49151},
13648 {2, 49151},
13649 {0, 4295032831},
13650 },
13651 },
13652 },
13653 {
13654 name: "MOVLstoreidx4",
13655 auxType: auxSymOff,
13656 argLen: 4,
13657 symEffect: SymWrite,
13658 asm: x86.AMOVL,
13659 scale: 4,
13660 reg: regInfo{
13661 inputs: []inputInfo{
13662 {1, 49151},
13663 {2, 49151},
13664 {0, 4295032831},
13665 },
13666 },
13667 },
13668 {
13669 name: "MOVLstoreidx8",
13670 auxType: auxSymOff,
13671 argLen: 4,
13672 symEffect: SymWrite,
13673 asm: x86.AMOVL,
13674 scale: 8,
13675 reg: regInfo{
13676 inputs: []inputInfo{
13677 {1, 49151},
13678 {2, 49151},
13679 {0, 4295032831},
13680 },
13681 },
13682 },
13683 {
13684 name: "MOVQstoreidx1",
13685 auxType: auxSymOff,
13686 argLen: 4,
13687 commutative: true,
13688 symEffect: SymWrite,
13689 asm: x86.AMOVQ,
13690 scale: 1,
13691 reg: regInfo{
13692 inputs: []inputInfo{
13693 {1, 49151},
13694 {2, 49151},
13695 {0, 4295032831},
13696 },
13697 },
13698 },
13699 {
13700 name: "MOVQstoreidx8",
13701 auxType: auxSymOff,
13702 argLen: 4,
13703 symEffect: SymWrite,
13704 asm: x86.AMOVQ,
13705 scale: 8,
13706 reg: regInfo{
13707 inputs: []inputInfo{
13708 {1, 49151},
13709 {2, 49151},
13710 {0, 4295032831},
13711 },
13712 },
13713 },
13714 {
13715 name: "MOVBstoreconst",
13716 auxType: auxSymValAndOff,
13717 argLen: 2,
13718 faultOnNilArg0: true,
13719 symEffect: SymWrite,
13720 asm: x86.AMOVB,
13721 reg: regInfo{
13722 inputs: []inputInfo{
13723 {0, 4295032831},
13724 },
13725 },
13726 },
13727 {
13728 name: "MOVWstoreconst",
13729 auxType: auxSymValAndOff,
13730 argLen: 2,
13731 faultOnNilArg0: true,
13732 symEffect: SymWrite,
13733 asm: x86.AMOVW,
13734 reg: regInfo{
13735 inputs: []inputInfo{
13736 {0, 4295032831},
13737 },
13738 },
13739 },
13740 {
13741 name: "MOVLstoreconst",
13742 auxType: auxSymValAndOff,
13743 argLen: 2,
13744 faultOnNilArg0: true,
13745 symEffect: SymWrite,
13746 asm: x86.AMOVL,
13747 reg: regInfo{
13748 inputs: []inputInfo{
13749 {0, 4295032831},
13750 },
13751 },
13752 },
13753 {
13754 name: "MOVQstoreconst",
13755 auxType: auxSymValAndOff,
13756 argLen: 2,
13757 faultOnNilArg0: true,
13758 symEffect: SymWrite,
13759 asm: x86.AMOVQ,
13760 reg: regInfo{
13761 inputs: []inputInfo{
13762 {0, 4295032831},
13763 },
13764 },
13765 },
13766 {
13767 name: "MOVOstoreconst",
13768 auxType: auxSymValAndOff,
13769 argLen: 2,
13770 faultOnNilArg0: true,
13771 symEffect: SymWrite,
13772 asm: x86.AMOVUPS,
13773 reg: regInfo{
13774 inputs: []inputInfo{
13775 {0, 4295032831},
13776 },
13777 },
13778 },
13779 {
13780 name: "MOVBstoreconstidx1",
13781 auxType: auxSymValAndOff,
13782 argLen: 3,
13783 commutative: true,
13784 symEffect: SymWrite,
13785 asm: x86.AMOVB,
13786 scale: 1,
13787 reg: regInfo{
13788 inputs: []inputInfo{
13789 {1, 49151},
13790 {0, 4295032831},
13791 },
13792 },
13793 },
13794 {
13795 name: "MOVWstoreconstidx1",
13796 auxType: auxSymValAndOff,
13797 argLen: 3,
13798 commutative: true,
13799 symEffect: SymWrite,
13800 asm: x86.AMOVW,
13801 scale: 1,
13802 reg: regInfo{
13803 inputs: []inputInfo{
13804 {1, 49151},
13805 {0, 4295032831},
13806 },
13807 },
13808 },
13809 {
13810 name: "MOVWstoreconstidx2",
13811 auxType: auxSymValAndOff,
13812 argLen: 3,
13813 symEffect: SymWrite,
13814 asm: x86.AMOVW,
13815 scale: 2,
13816 reg: regInfo{
13817 inputs: []inputInfo{
13818 {1, 49151},
13819 {0, 4295032831},
13820 },
13821 },
13822 },
13823 {
13824 name: "MOVLstoreconstidx1",
13825 auxType: auxSymValAndOff,
13826 argLen: 3,
13827 commutative: true,
13828 symEffect: SymWrite,
13829 asm: x86.AMOVL,
13830 scale: 1,
13831 reg: regInfo{
13832 inputs: []inputInfo{
13833 {1, 49151},
13834 {0, 4295032831},
13835 },
13836 },
13837 },
13838 {
13839 name: "MOVLstoreconstidx4",
13840 auxType: auxSymValAndOff,
13841 argLen: 3,
13842 symEffect: SymWrite,
13843 asm: x86.AMOVL,
13844 scale: 4,
13845 reg: regInfo{
13846 inputs: []inputInfo{
13847 {1, 49151},
13848 {0, 4295032831},
13849 },
13850 },
13851 },
13852 {
13853 name: "MOVQstoreconstidx1",
13854 auxType: auxSymValAndOff,
13855 argLen: 3,
13856 commutative: true,
13857 symEffect: SymWrite,
13858 asm: x86.AMOVQ,
13859 scale: 1,
13860 reg: regInfo{
13861 inputs: []inputInfo{
13862 {1, 49151},
13863 {0, 4295032831},
13864 },
13865 },
13866 },
13867 {
13868 name: "MOVQstoreconstidx8",
13869 auxType: auxSymValAndOff,
13870 argLen: 3,
13871 symEffect: SymWrite,
13872 asm: x86.AMOVQ,
13873 scale: 8,
13874 reg: regInfo{
13875 inputs: []inputInfo{
13876 {1, 49151},
13877 {0, 4295032831},
13878 },
13879 },
13880 },
13881 {
13882 name: "LoweredZero",
13883 auxType: auxInt64,
13884 argLen: 2,
13885 faultOnNilArg0: true,
13886 reg: regInfo{
13887 inputs: []inputInfo{
13888 {0, 49135},
13889 },
13890 },
13891 },
13892 {
13893 name: "LoweredZeroLoop",
13894 auxType: auxInt64,
13895 argLen: 2,
13896 clobberFlags: true,
13897 needIntTemp: true,
13898 faultOnNilArg0: true,
13899 reg: regInfo{
13900 inputs: []inputInfo{
13901 {0, 49135},
13902 },
13903 clobbersArg0: true,
13904 },
13905 },
13906 {
13907 name: "REPSTOSQ",
13908 argLen: 4,
13909 faultOnNilArg0: true,
13910 reg: regInfo{
13911 inputs: []inputInfo{
13912 {0, 128},
13913 {1, 2},
13914 {2, 1},
13915 },
13916 clobbers: 130,
13917 },
13918 },
13919 {
13920 name: "CALLstatic",
13921 auxType: auxCallOff,
13922 argLen: -1,
13923 clobberFlags: true,
13924 call: true,
13925 reg: regInfo{
13926 clobbers: 2147483631,
13927 },
13928 },
13929 {
13930 name: "CALLtail",
13931 auxType: auxCallOff,
13932 argLen: -1,
13933 clobberFlags: true,
13934 call: true,
13935 tailCall: true,
13936 reg: regInfo{
13937 clobbers: 2147483631,
13938 },
13939 },
13940 {
13941 name: "CALLclosure",
13942 auxType: auxCallOff,
13943 argLen: -1,
13944 clobberFlags: true,
13945 call: true,
13946 reg: regInfo{
13947 inputs: []inputInfo{
13948 {1, 4},
13949 {0, 49151},
13950 },
13951 clobbers: 2147483631,
13952 },
13953 },
13954 {
13955 name: "CALLinter",
13956 auxType: auxCallOff,
13957 argLen: -1,
13958 clobberFlags: true,
13959 call: true,
13960 reg: regInfo{
13961 inputs: []inputInfo{
13962 {0, 49135},
13963 },
13964 clobbers: 2147483631,
13965 },
13966 },
13967 {
13968 name: "DUFFCOPY",
13969 auxType: auxInt64,
13970 argLen: 3,
13971 clobberFlags: true,
13972 unsafePoint: true,
13973 reg: regInfo{
13974 inputs: []inputInfo{
13975 {0, 128},
13976 {1, 64},
13977 },
13978 clobbers: 65728,
13979 },
13980 },
13981 {
13982 name: "REPMOVSQ",
13983 argLen: 4,
13984 faultOnNilArg0: true,
13985 faultOnNilArg1: true,
13986 reg: regInfo{
13987 inputs: []inputInfo{
13988 {0, 128},
13989 {1, 64},
13990 {2, 2},
13991 },
13992 clobbers: 194,
13993 },
13994 },
13995 {
13996 name: "InvertFlags",
13997 argLen: 1,
13998 reg: regInfo{},
13999 },
14000 {
14001 name: "LoweredGetG",
14002 argLen: 1,
14003 reg: regInfo{
14004 outputs: []outputInfo{
14005 {0, 49135},
14006 },
14007 },
14008 },
14009 {
14010 name: "LoweredGetClosurePtr",
14011 argLen: 0,
14012 zeroWidth: true,
14013 reg: regInfo{
14014 outputs: []outputInfo{
14015 {0, 4},
14016 },
14017 },
14018 },
14019 {
14020 name: "LoweredGetCallerPC",
14021 argLen: 0,
14022 rematerializeable: true,
14023 reg: regInfo{
14024 outputs: []outputInfo{
14025 {0, 49135},
14026 },
14027 },
14028 },
14029 {
14030 name: "LoweredGetCallerSP",
14031 argLen: 1,
14032 rematerializeable: true,
14033 reg: regInfo{
14034 outputs: []outputInfo{
14035 {0, 49135},
14036 },
14037 },
14038 },
14039 {
14040 name: "LoweredNilCheck",
14041 argLen: 2,
14042 clobberFlags: true,
14043 nilCheck: true,
14044 faultOnNilArg0: true,
14045 reg: regInfo{
14046 inputs: []inputInfo{
14047 {0, 49151},
14048 },
14049 },
14050 },
14051 {
14052 name: "LoweredWB",
14053 auxType: auxInt64,
14054 argLen: 1,
14055 clobberFlags: true,
14056 reg: regInfo{
14057 clobbers: 2147418112,
14058 outputs: []outputInfo{
14059 {0, 2048},
14060 },
14061 },
14062 },
14063 {
14064 name: "LoweredHasCPUFeature",
14065 auxType: auxSym,
14066 argLen: 0,
14067 rematerializeable: true,
14068 symEffect: SymNone,
14069 reg: regInfo{
14070 outputs: []outputInfo{
14071 {0, 49135},
14072 },
14073 },
14074 },
14075 {
14076 name: "LoweredPanicBoundsRR",
14077 auxType: auxInt64,
14078 argLen: 3,
14079 call: true,
14080 reg: regInfo{
14081 inputs: []inputInfo{
14082 {0, 49135},
14083 {1, 49135},
14084 },
14085 },
14086 },
14087 {
14088 name: "LoweredPanicBoundsRC",
14089 auxType: auxPanicBoundsC,
14090 argLen: 2,
14091 call: true,
14092 reg: regInfo{
14093 inputs: []inputInfo{
14094 {0, 49135},
14095 },
14096 },
14097 },
14098 {
14099 name: "LoweredPanicBoundsCR",
14100 auxType: auxPanicBoundsC,
14101 argLen: 2,
14102 call: true,
14103 reg: regInfo{
14104 inputs: []inputInfo{
14105 {0, 49135},
14106 },
14107 },
14108 },
14109 {
14110 name: "LoweredPanicBoundsCC",
14111 auxType: auxPanicBoundsCC,
14112 argLen: 1,
14113 call: true,
14114 reg: regInfo{},
14115 },
14116 {
14117 name: "FlagEQ",
14118 argLen: 0,
14119 reg: regInfo{},
14120 },
14121 {
14122 name: "FlagLT_ULT",
14123 argLen: 0,
14124 reg: regInfo{},
14125 },
14126 {
14127 name: "FlagLT_UGT",
14128 argLen: 0,
14129 reg: regInfo{},
14130 },
14131 {
14132 name: "FlagGT_UGT",
14133 argLen: 0,
14134 reg: regInfo{},
14135 },
14136 {
14137 name: "FlagGT_ULT",
14138 argLen: 0,
14139 reg: regInfo{},
14140 },
14141 {
14142 name: "MOVBatomicload",
14143 auxType: auxSymOff,
14144 argLen: 2,
14145 faultOnNilArg0: true,
14146 symEffect: SymRead,
14147 asm: x86.AMOVB,
14148 reg: regInfo{
14149 inputs: []inputInfo{
14150 {0, 4295032831},
14151 },
14152 outputs: []outputInfo{
14153 {0, 49135},
14154 },
14155 },
14156 },
14157 {
14158 name: "MOVLatomicload",
14159 auxType: auxSymOff,
14160 argLen: 2,
14161 faultOnNilArg0: true,
14162 symEffect: SymRead,
14163 asm: x86.AMOVL,
14164 reg: regInfo{
14165 inputs: []inputInfo{
14166 {0, 4295032831},
14167 },
14168 outputs: []outputInfo{
14169 {0, 49135},
14170 },
14171 },
14172 },
14173 {
14174 name: "MOVQatomicload",
14175 auxType: auxSymOff,
14176 argLen: 2,
14177 faultOnNilArg0: true,
14178 symEffect: SymRead,
14179 asm: x86.AMOVQ,
14180 reg: regInfo{
14181 inputs: []inputInfo{
14182 {0, 4295032831},
14183 },
14184 outputs: []outputInfo{
14185 {0, 49135},
14186 },
14187 },
14188 },
14189 {
14190 name: "XCHGB",
14191 auxType: auxSymOff,
14192 argLen: 3,
14193 resultInArg0: true,
14194 faultOnNilArg1: true,
14195 hasSideEffects: true,
14196 symEffect: SymRdWr,
14197 asm: x86.AXCHGB,
14198 reg: regInfo{
14199 inputs: []inputInfo{
14200 {0, 49135},
14201 {1, 4295032831},
14202 },
14203 outputs: []outputInfo{
14204 {0, 49135},
14205 },
14206 },
14207 },
14208 {
14209 name: "XCHGL",
14210 auxType: auxSymOff,
14211 argLen: 3,
14212 resultInArg0: true,
14213 faultOnNilArg1: true,
14214 hasSideEffects: true,
14215 symEffect: SymRdWr,
14216 asm: x86.AXCHGL,
14217 reg: regInfo{
14218 inputs: []inputInfo{
14219 {0, 49135},
14220 {1, 4295032831},
14221 },
14222 outputs: []outputInfo{
14223 {0, 49135},
14224 },
14225 },
14226 },
14227 {
14228 name: "XCHGQ",
14229 auxType: auxSymOff,
14230 argLen: 3,
14231 resultInArg0: true,
14232 faultOnNilArg1: true,
14233 hasSideEffects: true,
14234 symEffect: SymRdWr,
14235 asm: x86.AXCHGQ,
14236 reg: regInfo{
14237 inputs: []inputInfo{
14238 {0, 49135},
14239 {1, 4295032831},
14240 },
14241 outputs: []outputInfo{
14242 {0, 49135},
14243 },
14244 },
14245 },
14246 {
14247 name: "XADDLlock",
14248 auxType: auxSymOff,
14249 argLen: 3,
14250 resultInArg0: true,
14251 clobberFlags: true,
14252 faultOnNilArg1: true,
14253 hasSideEffects: true,
14254 symEffect: SymRdWr,
14255 asm: x86.AXADDL,
14256 reg: regInfo{
14257 inputs: []inputInfo{
14258 {0, 49135},
14259 {1, 4295032831},
14260 },
14261 outputs: []outputInfo{
14262 {0, 49135},
14263 },
14264 },
14265 },
14266 {
14267 name: "XADDQlock",
14268 auxType: auxSymOff,
14269 argLen: 3,
14270 resultInArg0: true,
14271 clobberFlags: true,
14272 faultOnNilArg1: true,
14273 hasSideEffects: true,
14274 symEffect: SymRdWr,
14275 asm: x86.AXADDQ,
14276 reg: regInfo{
14277 inputs: []inputInfo{
14278 {0, 49135},
14279 {1, 4295032831},
14280 },
14281 outputs: []outputInfo{
14282 {0, 49135},
14283 },
14284 },
14285 },
14286 {
14287 name: "AddTupleFirst32",
14288 argLen: 2,
14289 reg: regInfo{},
14290 },
14291 {
14292 name: "AddTupleFirst64",
14293 argLen: 2,
14294 reg: regInfo{},
14295 },
14296 {
14297 name: "CMPXCHGLlock",
14298 auxType: auxSymOff,
14299 argLen: 4,
14300 clobberFlags: true,
14301 faultOnNilArg0: true,
14302 hasSideEffects: true,
14303 symEffect: SymRdWr,
14304 asm: x86.ACMPXCHGL,
14305 reg: regInfo{
14306 inputs: []inputInfo{
14307 {1, 1},
14308 {0, 49135},
14309 {2, 49135},
14310 },
14311 clobbers: 1,
14312 outputs: []outputInfo{
14313 {1, 0},
14314 {0, 49135},
14315 },
14316 },
14317 },
14318 {
14319 name: "CMPXCHGQlock",
14320 auxType: auxSymOff,
14321 argLen: 4,
14322 clobberFlags: true,
14323 faultOnNilArg0: true,
14324 hasSideEffects: true,
14325 symEffect: SymRdWr,
14326 asm: x86.ACMPXCHGQ,
14327 reg: regInfo{
14328 inputs: []inputInfo{
14329 {1, 1},
14330 {0, 49135},
14331 {2, 49135},
14332 },
14333 clobbers: 1,
14334 outputs: []outputInfo{
14335 {1, 0},
14336 {0, 49135},
14337 },
14338 },
14339 },
14340 {
14341 name: "ANDBlock",
14342 auxType: auxSymOff,
14343 argLen: 3,
14344 clobberFlags: true,
14345 faultOnNilArg0: true,
14346 hasSideEffects: true,
14347 symEffect: SymRdWr,
14348 asm: x86.AANDB,
14349 reg: regInfo{
14350 inputs: []inputInfo{
14351 {1, 49151},
14352 {0, 4295032831},
14353 },
14354 },
14355 },
14356 {
14357 name: "ANDLlock",
14358 auxType: auxSymOff,
14359 argLen: 3,
14360 clobberFlags: true,
14361 faultOnNilArg0: true,
14362 hasSideEffects: true,
14363 symEffect: SymRdWr,
14364 asm: x86.AANDL,
14365 reg: regInfo{
14366 inputs: []inputInfo{
14367 {1, 49151},
14368 {0, 4295032831},
14369 },
14370 },
14371 },
14372 {
14373 name: "ANDQlock",
14374 auxType: auxSymOff,
14375 argLen: 3,
14376 clobberFlags: true,
14377 faultOnNilArg0: true,
14378 hasSideEffects: true,
14379 symEffect: SymRdWr,
14380 asm: x86.AANDQ,
14381 reg: regInfo{
14382 inputs: []inputInfo{
14383 {1, 49151},
14384 {0, 4295032831},
14385 },
14386 },
14387 },
14388 {
14389 name: "ORBlock",
14390 auxType: auxSymOff,
14391 argLen: 3,
14392 clobberFlags: true,
14393 faultOnNilArg0: true,
14394 hasSideEffects: true,
14395 symEffect: SymRdWr,
14396 asm: x86.AORB,
14397 reg: regInfo{
14398 inputs: []inputInfo{
14399 {1, 49151},
14400 {0, 4295032831},
14401 },
14402 },
14403 },
14404 {
14405 name: "ORLlock",
14406 auxType: auxSymOff,
14407 argLen: 3,
14408 clobberFlags: true,
14409 faultOnNilArg0: true,
14410 hasSideEffects: true,
14411 symEffect: SymRdWr,
14412 asm: x86.AORL,
14413 reg: regInfo{
14414 inputs: []inputInfo{
14415 {1, 49151},
14416 {0, 4295032831},
14417 },
14418 },
14419 },
14420 {
14421 name: "ORQlock",
14422 auxType: auxSymOff,
14423 argLen: 3,
14424 clobberFlags: true,
14425 faultOnNilArg0: true,
14426 hasSideEffects: true,
14427 symEffect: SymRdWr,
14428 asm: x86.AORQ,
14429 reg: regInfo{
14430 inputs: []inputInfo{
14431 {1, 49151},
14432 {0, 4295032831},
14433 },
14434 },
14435 },
14436 {
14437 name: "LoweredAtomicAnd64",
14438 auxType: auxSymOff,
14439 argLen: 3,
14440 resultNotInArgs: true,
14441 clobberFlags: true,
14442 needIntTemp: true,
14443 faultOnNilArg0: true,
14444 hasSideEffects: true,
14445 unsafePoint: true,
14446 symEffect: SymRdWr,
14447 asm: x86.AANDQ,
14448 reg: regInfo{
14449 inputs: []inputInfo{
14450 {0, 49134},
14451 {1, 49134},
14452 },
14453 outputs: []outputInfo{
14454 {1, 0},
14455 {0, 1},
14456 },
14457 },
14458 },
14459 {
14460 name: "LoweredAtomicAnd32",
14461 auxType: auxSymOff,
14462 argLen: 3,
14463 resultNotInArgs: true,
14464 clobberFlags: true,
14465 needIntTemp: true,
14466 faultOnNilArg0: true,
14467 hasSideEffects: true,
14468 unsafePoint: true,
14469 symEffect: SymRdWr,
14470 asm: x86.AANDL,
14471 reg: regInfo{
14472 inputs: []inputInfo{
14473 {0, 49134},
14474 {1, 49134},
14475 },
14476 outputs: []outputInfo{
14477 {1, 0},
14478 {0, 1},
14479 },
14480 },
14481 },
14482 {
14483 name: "LoweredAtomicOr64",
14484 auxType: auxSymOff,
14485 argLen: 3,
14486 resultNotInArgs: true,
14487 clobberFlags: true,
14488 needIntTemp: true,
14489 faultOnNilArg0: true,
14490 hasSideEffects: true,
14491 unsafePoint: true,
14492 symEffect: SymRdWr,
14493 asm: x86.AORQ,
14494 reg: regInfo{
14495 inputs: []inputInfo{
14496 {0, 49134},
14497 {1, 49134},
14498 },
14499 outputs: []outputInfo{
14500 {1, 0},
14501 {0, 1},
14502 },
14503 },
14504 },
14505 {
14506 name: "LoweredAtomicOr32",
14507 auxType: auxSymOff,
14508 argLen: 3,
14509 resultNotInArgs: true,
14510 clobberFlags: true,
14511 needIntTemp: true,
14512 faultOnNilArg0: true,
14513 hasSideEffects: true,
14514 unsafePoint: true,
14515 symEffect: SymRdWr,
14516 asm: x86.AORL,
14517 reg: regInfo{
14518 inputs: []inputInfo{
14519 {0, 49134},
14520 {1, 49134},
14521 },
14522 outputs: []outputInfo{
14523 {1, 0},
14524 {0, 1},
14525 },
14526 },
14527 },
14528 {
14529 name: "PrefetchT0",
14530 argLen: 2,
14531 hasSideEffects: true,
14532 asm: x86.APREFETCHT0,
14533 reg: regInfo{
14534 inputs: []inputInfo{
14535 {0, 4295032831},
14536 },
14537 },
14538 },
14539 {
14540 name: "PrefetchNTA",
14541 argLen: 2,
14542 hasSideEffects: true,
14543 asm: x86.APREFETCHNTA,
14544 reg: regInfo{
14545 inputs: []inputInfo{
14546 {0, 4295032831},
14547 },
14548 },
14549 },
14550 {
14551 name: "ANDNQ",
14552 argLen: 2,
14553 clobberFlags: true,
14554 asm: x86.AANDNQ,
14555 reg: regInfo{
14556 inputs: []inputInfo{
14557 {0, 49135},
14558 {1, 49135},
14559 },
14560 outputs: []outputInfo{
14561 {0, 49135},
14562 },
14563 },
14564 },
14565 {
14566 name: "ANDNL",
14567 argLen: 2,
14568 clobberFlags: true,
14569 asm: x86.AANDNL,
14570 reg: regInfo{
14571 inputs: []inputInfo{
14572 {0, 49135},
14573 {1, 49135},
14574 },
14575 outputs: []outputInfo{
14576 {0, 49135},
14577 },
14578 },
14579 },
14580 {
14581 name: "BLSIQ",
14582 argLen: 1,
14583 clobberFlags: true,
14584 asm: x86.ABLSIQ,
14585 reg: regInfo{
14586 inputs: []inputInfo{
14587 {0, 49135},
14588 },
14589 outputs: []outputInfo{
14590 {0, 49135},
14591 },
14592 },
14593 },
14594 {
14595 name: "BLSIL",
14596 argLen: 1,
14597 clobberFlags: true,
14598 asm: x86.ABLSIL,
14599 reg: regInfo{
14600 inputs: []inputInfo{
14601 {0, 49135},
14602 },
14603 outputs: []outputInfo{
14604 {0, 49135},
14605 },
14606 },
14607 },
14608 {
14609 name: "BLSMSKQ",
14610 argLen: 1,
14611 clobberFlags: true,
14612 asm: x86.ABLSMSKQ,
14613 reg: regInfo{
14614 inputs: []inputInfo{
14615 {0, 49135},
14616 },
14617 outputs: []outputInfo{
14618 {0, 49135},
14619 },
14620 },
14621 },
14622 {
14623 name: "BLSMSKL",
14624 argLen: 1,
14625 clobberFlags: true,
14626 asm: x86.ABLSMSKL,
14627 reg: regInfo{
14628 inputs: []inputInfo{
14629 {0, 49135},
14630 },
14631 outputs: []outputInfo{
14632 {0, 49135},
14633 },
14634 },
14635 },
14636 {
14637 name: "BLSRQ",
14638 argLen: 1,
14639 asm: x86.ABLSRQ,
14640 reg: regInfo{
14641 inputs: []inputInfo{
14642 {0, 49135},
14643 },
14644 outputs: []outputInfo{
14645 {1, 0},
14646 {0, 49135},
14647 },
14648 },
14649 },
14650 {
14651 name: "BLSRL",
14652 argLen: 1,
14653 asm: x86.ABLSRL,
14654 reg: regInfo{
14655 inputs: []inputInfo{
14656 {0, 49135},
14657 },
14658 outputs: []outputInfo{
14659 {1, 0},
14660 {0, 49135},
14661 },
14662 },
14663 },
14664 {
14665 name: "TZCNTQ",
14666 argLen: 1,
14667 clobberFlags: true,
14668 asm: x86.ATZCNTQ,
14669 reg: regInfo{
14670 inputs: []inputInfo{
14671 {0, 49135},
14672 },
14673 outputs: []outputInfo{
14674 {0, 49135},
14675 },
14676 },
14677 },
14678 {
14679 name: "TZCNTL",
14680 argLen: 1,
14681 clobberFlags: true,
14682 asm: x86.ATZCNTL,
14683 reg: regInfo{
14684 inputs: []inputInfo{
14685 {0, 49135},
14686 },
14687 outputs: []outputInfo{
14688 {0, 49135},
14689 },
14690 },
14691 },
14692 {
14693 name: "LZCNTQ",
14694 argLen: 1,
14695 clobberFlags: true,
14696 asm: x86.ALZCNTQ,
14697 reg: regInfo{
14698 inputs: []inputInfo{
14699 {0, 49135},
14700 },
14701 outputs: []outputInfo{
14702 {0, 49135},
14703 },
14704 },
14705 },
14706 {
14707 name: "LZCNTL",
14708 argLen: 1,
14709 clobberFlags: true,
14710 asm: x86.ALZCNTL,
14711 reg: regInfo{
14712 inputs: []inputInfo{
14713 {0, 49135},
14714 },
14715 outputs: []outputInfo{
14716 {0, 49135},
14717 },
14718 },
14719 },
14720 {
14721 name: "MOVBEWstore",
14722 auxType: auxSymOff,
14723 argLen: 3,
14724 faultOnNilArg0: true,
14725 symEffect: SymWrite,
14726 asm: x86.AMOVBEW,
14727 reg: regInfo{
14728 inputs: []inputInfo{
14729 {1, 49151},
14730 {0, 4295032831},
14731 },
14732 },
14733 },
14734 {
14735 name: "MOVBELload",
14736 auxType: auxSymOff,
14737 argLen: 2,
14738 faultOnNilArg0: true,
14739 symEffect: SymRead,
14740 asm: x86.AMOVBEL,
14741 reg: regInfo{
14742 inputs: []inputInfo{
14743 {0, 4295032831},
14744 },
14745 outputs: []outputInfo{
14746 {0, 49135},
14747 },
14748 },
14749 },
14750 {
14751 name: "MOVBELstore",
14752 auxType: auxSymOff,
14753 argLen: 3,
14754 faultOnNilArg0: true,
14755 symEffect: SymWrite,
14756 asm: x86.AMOVBEL,
14757 reg: regInfo{
14758 inputs: []inputInfo{
14759 {1, 49151},
14760 {0, 4295032831},
14761 },
14762 },
14763 },
14764 {
14765 name: "MOVBEQload",
14766 auxType: auxSymOff,
14767 argLen: 2,
14768 faultOnNilArg0: true,
14769 symEffect: SymRead,
14770 asm: x86.AMOVBEQ,
14771 reg: regInfo{
14772 inputs: []inputInfo{
14773 {0, 4295032831},
14774 },
14775 outputs: []outputInfo{
14776 {0, 49135},
14777 },
14778 },
14779 },
14780 {
14781 name: "MOVBEQstore",
14782 auxType: auxSymOff,
14783 argLen: 3,
14784 faultOnNilArg0: true,
14785 symEffect: SymWrite,
14786 asm: x86.AMOVBEQ,
14787 reg: regInfo{
14788 inputs: []inputInfo{
14789 {1, 49151},
14790 {0, 4295032831},
14791 },
14792 },
14793 },
14794 {
14795 name: "MOVBELloadidx1",
14796 auxType: auxSymOff,
14797 argLen: 3,
14798 commutative: true,
14799 symEffect: SymRead,
14800 asm: x86.AMOVBEL,
14801 scale: 1,
14802 reg: regInfo{
14803 inputs: []inputInfo{
14804 {1, 49151},
14805 {0, 4295032831},
14806 },
14807 outputs: []outputInfo{
14808 {0, 49135},
14809 },
14810 },
14811 },
14812 {
14813 name: "MOVBELloadidx4",
14814 auxType: auxSymOff,
14815 argLen: 3,
14816 symEffect: SymRead,
14817 asm: x86.AMOVBEL,
14818 scale: 4,
14819 reg: regInfo{
14820 inputs: []inputInfo{
14821 {1, 49151},
14822 {0, 4295032831},
14823 },
14824 outputs: []outputInfo{
14825 {0, 49135},
14826 },
14827 },
14828 },
14829 {
14830 name: "MOVBELloadidx8",
14831 auxType: auxSymOff,
14832 argLen: 3,
14833 symEffect: SymRead,
14834 asm: x86.AMOVBEL,
14835 scale: 8,
14836 reg: regInfo{
14837 inputs: []inputInfo{
14838 {1, 49151},
14839 {0, 4295032831},
14840 },
14841 outputs: []outputInfo{
14842 {0, 49135},
14843 },
14844 },
14845 },
14846 {
14847 name: "MOVBEQloadidx1",
14848 auxType: auxSymOff,
14849 argLen: 3,
14850 commutative: true,
14851 symEffect: SymRead,
14852 asm: x86.AMOVBEQ,
14853 scale: 1,
14854 reg: regInfo{
14855 inputs: []inputInfo{
14856 {1, 49151},
14857 {0, 4295032831},
14858 },
14859 outputs: []outputInfo{
14860 {0, 49135},
14861 },
14862 },
14863 },
14864 {
14865 name: "MOVBEQloadidx8",
14866 auxType: auxSymOff,
14867 argLen: 3,
14868 symEffect: SymRead,
14869 asm: x86.AMOVBEQ,
14870 scale: 8,
14871 reg: regInfo{
14872 inputs: []inputInfo{
14873 {1, 49151},
14874 {0, 4295032831},
14875 },
14876 outputs: []outputInfo{
14877 {0, 49135},
14878 },
14879 },
14880 },
14881 {
14882 name: "MOVBEWstoreidx1",
14883 auxType: auxSymOff,
14884 argLen: 4,
14885 commutative: true,
14886 symEffect: SymWrite,
14887 asm: x86.AMOVBEW,
14888 scale: 1,
14889 reg: regInfo{
14890 inputs: []inputInfo{
14891 {1, 49151},
14892 {2, 49151},
14893 {0, 4295032831},
14894 },
14895 },
14896 },
14897 {
14898 name: "MOVBEWstoreidx2",
14899 auxType: auxSymOff,
14900 argLen: 4,
14901 symEffect: SymWrite,
14902 asm: x86.AMOVBEW,
14903 scale: 2,
14904 reg: regInfo{
14905 inputs: []inputInfo{
14906 {1, 49151},
14907 {2, 49151},
14908 {0, 4295032831},
14909 },
14910 },
14911 },
14912 {
14913 name: "MOVBELstoreidx1",
14914 auxType: auxSymOff,
14915 argLen: 4,
14916 commutative: true,
14917 symEffect: SymWrite,
14918 asm: x86.AMOVBEL,
14919 scale: 1,
14920 reg: regInfo{
14921 inputs: []inputInfo{
14922 {1, 49151},
14923 {2, 49151},
14924 {0, 4295032831},
14925 },
14926 },
14927 },
14928 {
14929 name: "MOVBELstoreidx4",
14930 auxType: auxSymOff,
14931 argLen: 4,
14932 symEffect: SymWrite,
14933 asm: x86.AMOVBEL,
14934 scale: 4,
14935 reg: regInfo{
14936 inputs: []inputInfo{
14937 {1, 49151},
14938 {2, 49151},
14939 {0, 4295032831},
14940 },
14941 },
14942 },
14943 {
14944 name: "MOVBELstoreidx8",
14945 auxType: auxSymOff,
14946 argLen: 4,
14947 symEffect: SymWrite,
14948 asm: x86.AMOVBEL,
14949 scale: 8,
14950 reg: regInfo{
14951 inputs: []inputInfo{
14952 {1, 49151},
14953 {2, 49151},
14954 {0, 4295032831},
14955 },
14956 },
14957 },
14958 {
14959 name: "MOVBEQstoreidx1",
14960 auxType: auxSymOff,
14961 argLen: 4,
14962 commutative: true,
14963 symEffect: SymWrite,
14964 asm: x86.AMOVBEQ,
14965 scale: 1,
14966 reg: regInfo{
14967 inputs: []inputInfo{
14968 {1, 49151},
14969 {2, 49151},
14970 {0, 4295032831},
14971 },
14972 },
14973 },
14974 {
14975 name: "MOVBEQstoreidx8",
14976 auxType: auxSymOff,
14977 argLen: 4,
14978 symEffect: SymWrite,
14979 asm: x86.AMOVBEQ,
14980 scale: 8,
14981 reg: regInfo{
14982 inputs: []inputInfo{
14983 {1, 49151},
14984 {2, 49151},
14985 {0, 4295032831},
14986 },
14987 },
14988 },
14989 {
14990 name: "SARXQ",
14991 argLen: 2,
14992 asm: x86.ASARXQ,
14993 reg: regInfo{
14994 inputs: []inputInfo{
14995 {0, 49135},
14996 {1, 49135},
14997 },
14998 outputs: []outputInfo{
14999 {0, 49135},
15000 },
15001 },
15002 },
15003 {
15004 name: "SARXL",
15005 argLen: 2,
15006 asm: x86.ASARXL,
15007 reg: regInfo{
15008 inputs: []inputInfo{
15009 {0, 49135},
15010 {1, 49135},
15011 },
15012 outputs: []outputInfo{
15013 {0, 49135},
15014 },
15015 },
15016 },
15017 {
15018 name: "SHLXQ",
15019 argLen: 2,
15020 asm: x86.ASHLXQ,
15021 reg: regInfo{
15022 inputs: []inputInfo{
15023 {0, 49135},
15024 {1, 49135},
15025 },
15026 outputs: []outputInfo{
15027 {0, 49135},
15028 },
15029 },
15030 },
15031 {
15032 name: "SHLXL",
15033 argLen: 2,
15034 asm: x86.ASHLXL,
15035 reg: regInfo{
15036 inputs: []inputInfo{
15037 {0, 49135},
15038 {1, 49135},
15039 },
15040 outputs: []outputInfo{
15041 {0, 49135},
15042 },
15043 },
15044 },
15045 {
15046 name: "SHRXQ",
15047 argLen: 2,
15048 asm: x86.ASHRXQ,
15049 reg: regInfo{
15050 inputs: []inputInfo{
15051 {0, 49135},
15052 {1, 49135},
15053 },
15054 outputs: []outputInfo{
15055 {0, 49135},
15056 },
15057 },
15058 },
15059 {
15060 name: "SHRXL",
15061 argLen: 2,
15062 asm: x86.ASHRXL,
15063 reg: regInfo{
15064 inputs: []inputInfo{
15065 {0, 49135},
15066 {1, 49135},
15067 },
15068 outputs: []outputInfo{
15069 {0, 49135},
15070 },
15071 },
15072 },
15073 {
15074 name: "SARXLload",
15075 auxType: auxSymOff,
15076 argLen: 3,
15077 faultOnNilArg0: true,
15078 symEffect: SymRead,
15079 asm: x86.ASARXL,
15080 reg: regInfo{
15081 inputs: []inputInfo{
15082 {1, 49135},
15083 {0, 4295032831},
15084 },
15085 outputs: []outputInfo{
15086 {0, 49135},
15087 },
15088 },
15089 },
15090 {
15091 name: "SARXQload",
15092 auxType: auxSymOff,
15093 argLen: 3,
15094 faultOnNilArg0: true,
15095 symEffect: SymRead,
15096 asm: x86.ASARXQ,
15097 reg: regInfo{
15098 inputs: []inputInfo{
15099 {1, 49135},
15100 {0, 4295032831},
15101 },
15102 outputs: []outputInfo{
15103 {0, 49135},
15104 },
15105 },
15106 },
15107 {
15108 name: "SHLXLload",
15109 auxType: auxSymOff,
15110 argLen: 3,
15111 faultOnNilArg0: true,
15112 symEffect: SymRead,
15113 asm: x86.ASHLXL,
15114 reg: regInfo{
15115 inputs: []inputInfo{
15116 {1, 49135},
15117 {0, 4295032831},
15118 },
15119 outputs: []outputInfo{
15120 {0, 49135},
15121 },
15122 },
15123 },
15124 {
15125 name: "SHLXQload",
15126 auxType: auxSymOff,
15127 argLen: 3,
15128 faultOnNilArg0: true,
15129 symEffect: SymRead,
15130 asm: x86.ASHLXQ,
15131 reg: regInfo{
15132 inputs: []inputInfo{
15133 {1, 49135},
15134 {0, 4295032831},
15135 },
15136 outputs: []outputInfo{
15137 {0, 49135},
15138 },
15139 },
15140 },
15141 {
15142 name: "SHRXLload",
15143 auxType: auxSymOff,
15144 argLen: 3,
15145 faultOnNilArg0: true,
15146 symEffect: SymRead,
15147 asm: x86.ASHRXL,
15148 reg: regInfo{
15149 inputs: []inputInfo{
15150 {1, 49135},
15151 {0, 4295032831},
15152 },
15153 outputs: []outputInfo{
15154 {0, 49135},
15155 },
15156 },
15157 },
15158 {
15159 name: "SHRXQload",
15160 auxType: auxSymOff,
15161 argLen: 3,
15162 faultOnNilArg0: true,
15163 symEffect: SymRead,
15164 asm: x86.ASHRXQ,
15165 reg: regInfo{
15166 inputs: []inputInfo{
15167 {1, 49135},
15168 {0, 4295032831},
15169 },
15170 outputs: []outputInfo{
15171 {0, 49135},
15172 },
15173 },
15174 },
15175 {
15176 name: "SARXLloadidx1",
15177 auxType: auxSymOff,
15178 argLen: 4,
15179 faultOnNilArg0: true,
15180 symEffect: SymRead,
15181 asm: x86.ASARXL,
15182 scale: 1,
15183 reg: regInfo{
15184 inputs: []inputInfo{
15185 {2, 49135},
15186 {1, 49151},
15187 {0, 4295032831},
15188 },
15189 outputs: []outputInfo{
15190 {0, 49135},
15191 },
15192 },
15193 },
15194 {
15195 name: "SARXLloadidx4",
15196 auxType: auxSymOff,
15197 argLen: 4,
15198 faultOnNilArg0: true,
15199 symEffect: SymRead,
15200 asm: x86.ASARXL,
15201 scale: 4,
15202 reg: regInfo{
15203 inputs: []inputInfo{
15204 {2, 49135},
15205 {1, 49151},
15206 {0, 4295032831},
15207 },
15208 outputs: []outputInfo{
15209 {0, 49135},
15210 },
15211 },
15212 },
15213 {
15214 name: "SARXLloadidx8",
15215 auxType: auxSymOff,
15216 argLen: 4,
15217 faultOnNilArg0: true,
15218 symEffect: SymRead,
15219 asm: x86.ASARXL,
15220 scale: 8,
15221 reg: regInfo{
15222 inputs: []inputInfo{
15223 {2, 49135},
15224 {1, 49151},
15225 {0, 4295032831},
15226 },
15227 outputs: []outputInfo{
15228 {0, 49135},
15229 },
15230 },
15231 },
15232 {
15233 name: "SARXQloadidx1",
15234 auxType: auxSymOff,
15235 argLen: 4,
15236 faultOnNilArg0: true,
15237 symEffect: SymRead,
15238 asm: x86.ASARXQ,
15239 scale: 1,
15240 reg: regInfo{
15241 inputs: []inputInfo{
15242 {2, 49135},
15243 {1, 49151},
15244 {0, 4295032831},
15245 },
15246 outputs: []outputInfo{
15247 {0, 49135},
15248 },
15249 },
15250 },
15251 {
15252 name: "SARXQloadidx8",
15253 auxType: auxSymOff,
15254 argLen: 4,
15255 faultOnNilArg0: true,
15256 symEffect: SymRead,
15257 asm: x86.ASARXQ,
15258 scale: 8,
15259 reg: regInfo{
15260 inputs: []inputInfo{
15261 {2, 49135},
15262 {1, 49151},
15263 {0, 4295032831},
15264 },
15265 outputs: []outputInfo{
15266 {0, 49135},
15267 },
15268 },
15269 },
15270 {
15271 name: "SHLXLloadidx1",
15272 auxType: auxSymOff,
15273 argLen: 4,
15274 faultOnNilArg0: true,
15275 symEffect: SymRead,
15276 asm: x86.ASHLXL,
15277 scale: 1,
15278 reg: regInfo{
15279 inputs: []inputInfo{
15280 {2, 49135},
15281 {1, 49151},
15282 {0, 4295032831},
15283 },
15284 outputs: []outputInfo{
15285 {0, 49135},
15286 },
15287 },
15288 },
15289 {
15290 name: "SHLXLloadidx4",
15291 auxType: auxSymOff,
15292 argLen: 4,
15293 faultOnNilArg0: true,
15294 symEffect: SymRead,
15295 asm: x86.ASHLXL,
15296 scale: 4,
15297 reg: regInfo{
15298 inputs: []inputInfo{
15299 {2, 49135},
15300 {1, 49151},
15301 {0, 4295032831},
15302 },
15303 outputs: []outputInfo{
15304 {0, 49135},
15305 },
15306 },
15307 },
15308 {
15309 name: "SHLXLloadidx8",
15310 auxType: auxSymOff,
15311 argLen: 4,
15312 faultOnNilArg0: true,
15313 symEffect: SymRead,
15314 asm: x86.ASHLXL,
15315 scale: 8,
15316 reg: regInfo{
15317 inputs: []inputInfo{
15318 {2, 49135},
15319 {1, 49151},
15320 {0, 4295032831},
15321 },
15322 outputs: []outputInfo{
15323 {0, 49135},
15324 },
15325 },
15326 },
15327 {
15328 name: "SHLXQloadidx1",
15329 auxType: auxSymOff,
15330 argLen: 4,
15331 faultOnNilArg0: true,
15332 symEffect: SymRead,
15333 asm: x86.ASHLXQ,
15334 scale: 1,
15335 reg: regInfo{
15336 inputs: []inputInfo{
15337 {2, 49135},
15338 {1, 49151},
15339 {0, 4295032831},
15340 },
15341 outputs: []outputInfo{
15342 {0, 49135},
15343 },
15344 },
15345 },
15346 {
15347 name: "SHLXQloadidx8",
15348 auxType: auxSymOff,
15349 argLen: 4,
15350 faultOnNilArg0: true,
15351 symEffect: SymRead,
15352 asm: x86.ASHLXQ,
15353 scale: 8,
15354 reg: regInfo{
15355 inputs: []inputInfo{
15356 {2, 49135},
15357 {1, 49151},
15358 {0, 4295032831},
15359 },
15360 outputs: []outputInfo{
15361 {0, 49135},
15362 },
15363 },
15364 },
15365 {
15366 name: "SHRXLloadidx1",
15367 auxType: auxSymOff,
15368 argLen: 4,
15369 faultOnNilArg0: true,
15370 symEffect: SymRead,
15371 asm: x86.ASHRXL,
15372 scale: 1,
15373 reg: regInfo{
15374 inputs: []inputInfo{
15375 {2, 49135},
15376 {1, 49151},
15377 {0, 4295032831},
15378 },
15379 outputs: []outputInfo{
15380 {0, 49135},
15381 },
15382 },
15383 },
15384 {
15385 name: "SHRXLloadidx4",
15386 auxType: auxSymOff,
15387 argLen: 4,
15388 faultOnNilArg0: true,
15389 symEffect: SymRead,
15390 asm: x86.ASHRXL,
15391 scale: 4,
15392 reg: regInfo{
15393 inputs: []inputInfo{
15394 {2, 49135},
15395 {1, 49151},
15396 {0, 4295032831},
15397 },
15398 outputs: []outputInfo{
15399 {0, 49135},
15400 },
15401 },
15402 },
15403 {
15404 name: "SHRXLloadidx8",
15405 auxType: auxSymOff,
15406 argLen: 4,
15407 faultOnNilArg0: true,
15408 symEffect: SymRead,
15409 asm: x86.ASHRXL,
15410 scale: 8,
15411 reg: regInfo{
15412 inputs: []inputInfo{
15413 {2, 49135},
15414 {1, 49151},
15415 {0, 4295032831},
15416 },
15417 outputs: []outputInfo{
15418 {0, 49135},
15419 },
15420 },
15421 },
15422 {
15423 name: "SHRXQloadidx1",
15424 auxType: auxSymOff,
15425 argLen: 4,
15426 faultOnNilArg0: true,
15427 symEffect: SymRead,
15428 asm: x86.ASHRXQ,
15429 scale: 1,
15430 reg: regInfo{
15431 inputs: []inputInfo{
15432 {2, 49135},
15433 {1, 49151},
15434 {0, 4295032831},
15435 },
15436 outputs: []outputInfo{
15437 {0, 49135},
15438 },
15439 },
15440 },
15441 {
15442 name: "SHRXQloadidx8",
15443 auxType: auxSymOff,
15444 argLen: 4,
15445 faultOnNilArg0: true,
15446 symEffect: SymRead,
15447 asm: x86.ASHRXQ,
15448 scale: 8,
15449 reg: regInfo{
15450 inputs: []inputInfo{
15451 {2, 49135},
15452 {1, 49151},
15453 {0, 4295032831},
15454 },
15455 outputs: []outputInfo{
15456 {0, 49135},
15457 },
15458 },
15459 },
15460 {
15461 name: "PUNPCKLBW",
15462 argLen: 2,
15463 resultInArg0: true,
15464 asm: x86.APUNPCKLBW,
15465 reg: regInfo{
15466 inputs: []inputInfo{
15467 {0, 2147418112},
15468 {1, 2147418112},
15469 },
15470 outputs: []outputInfo{
15471 {0, 2147418112},
15472 },
15473 },
15474 },
15475 {
15476 name: "PSHUFLW",
15477 auxType: auxInt8,
15478 argLen: 1,
15479 asm: x86.APSHUFLW,
15480 reg: regInfo{
15481 inputs: []inputInfo{
15482 {0, 2147418112},
15483 },
15484 outputs: []outputInfo{
15485 {0, 2147418112},
15486 },
15487 },
15488 },
15489 {
15490 name: "PSHUFBbroadcast",
15491 argLen: 1,
15492 resultInArg0: true,
15493 asm: x86.APSHUFB,
15494 reg: regInfo{
15495 inputs: []inputInfo{
15496 {0, 2147418112},
15497 },
15498 outputs: []outputInfo{
15499 {0, 2147418112},
15500 },
15501 },
15502 },
15503 {
15504 name: "VPBROADCASTB",
15505 argLen: 1,
15506 asm: x86.AVPBROADCASTB,
15507 reg: regInfo{
15508 inputs: []inputInfo{
15509 {0, 49135},
15510 },
15511 outputs: []outputInfo{
15512 {0, 2147418112},
15513 },
15514 },
15515 },
15516 {
15517 name: "PSIGNB",
15518 argLen: 2,
15519 resultInArg0: true,
15520 asm: x86.APSIGNB,
15521 reg: regInfo{
15522 inputs: []inputInfo{
15523 {0, 2147418112},
15524 {1, 2147418112},
15525 },
15526 outputs: []outputInfo{
15527 {0, 2147418112},
15528 },
15529 },
15530 },
15531 {
15532 name: "PCMPEQB",
15533 argLen: 2,
15534 commutative: true,
15535 resultInArg0: true,
15536 asm: x86.APCMPEQB,
15537 reg: regInfo{
15538 inputs: []inputInfo{
15539 {0, 2147418112},
15540 {1, 2147418112},
15541 },
15542 outputs: []outputInfo{
15543 {0, 2147418112},
15544 },
15545 },
15546 },
15547 {
15548 name: "PMOVMSKB",
15549 argLen: 1,
15550 asm: x86.APMOVMSKB,
15551 reg: regInfo{
15552 inputs: []inputInfo{
15553 {0, 2147418112},
15554 },
15555 outputs: []outputInfo{
15556 {0, 49135},
15557 },
15558 },
15559 },
15560
15561 {
15562 name: "ADD",
15563 argLen: 2,
15564 commutative: true,
15565 asm: arm.AADD,
15566 reg: regInfo{
15567 inputs: []inputInfo{
15568 {0, 22527},
15569 {1, 22527},
15570 },
15571 outputs: []outputInfo{
15572 {0, 21503},
15573 },
15574 },
15575 },
15576 {
15577 name: "ADDconst",
15578 auxType: auxInt32,
15579 argLen: 1,
15580 asm: arm.AADD,
15581 reg: regInfo{
15582 inputs: []inputInfo{
15583 {0, 30719},
15584 },
15585 outputs: []outputInfo{
15586 {0, 21503},
15587 },
15588 },
15589 },
15590 {
15591 name: "SUB",
15592 argLen: 2,
15593 asm: arm.ASUB,
15594 reg: regInfo{
15595 inputs: []inputInfo{
15596 {0, 22527},
15597 {1, 22527},
15598 },
15599 outputs: []outputInfo{
15600 {0, 21503},
15601 },
15602 },
15603 },
15604 {
15605 name: "SUBconst",
15606 auxType: auxInt32,
15607 argLen: 1,
15608 asm: arm.ASUB,
15609 reg: regInfo{
15610 inputs: []inputInfo{
15611 {0, 22527},
15612 },
15613 outputs: []outputInfo{
15614 {0, 21503},
15615 },
15616 },
15617 },
15618 {
15619 name: "RSB",
15620 argLen: 2,
15621 asm: arm.ARSB,
15622 reg: regInfo{
15623 inputs: []inputInfo{
15624 {0, 22527},
15625 {1, 22527},
15626 },
15627 outputs: []outputInfo{
15628 {0, 21503},
15629 },
15630 },
15631 },
15632 {
15633 name: "RSBconst",
15634 auxType: auxInt32,
15635 argLen: 1,
15636 asm: arm.ARSB,
15637 reg: regInfo{
15638 inputs: []inputInfo{
15639 {0, 22527},
15640 },
15641 outputs: []outputInfo{
15642 {0, 21503},
15643 },
15644 },
15645 },
15646 {
15647 name: "MUL",
15648 argLen: 2,
15649 commutative: true,
15650 asm: arm.AMUL,
15651 reg: regInfo{
15652 inputs: []inputInfo{
15653 {0, 22527},
15654 {1, 22527},
15655 },
15656 outputs: []outputInfo{
15657 {0, 21503},
15658 },
15659 },
15660 },
15661 {
15662 name: "HMUL",
15663 argLen: 2,
15664 commutative: true,
15665 asm: arm.AMULL,
15666 reg: regInfo{
15667 inputs: []inputInfo{
15668 {0, 22527},
15669 {1, 22527},
15670 },
15671 outputs: []outputInfo{
15672 {0, 21503},
15673 },
15674 },
15675 },
15676 {
15677 name: "HMULU",
15678 argLen: 2,
15679 commutative: true,
15680 asm: arm.AMULLU,
15681 reg: regInfo{
15682 inputs: []inputInfo{
15683 {0, 22527},
15684 {1, 22527},
15685 },
15686 outputs: []outputInfo{
15687 {0, 21503},
15688 },
15689 },
15690 },
15691 {
15692 name: "CALLudiv",
15693 argLen: 2,
15694 clobberFlags: true,
15695 reg: regInfo{
15696 inputs: []inputInfo{
15697 {0, 2},
15698 {1, 1},
15699 },
15700 clobbers: 20492,
15701 outputs: []outputInfo{
15702 {0, 1},
15703 {1, 2},
15704 },
15705 },
15706 },
15707 {
15708 name: "ADDS",
15709 argLen: 2,
15710 commutative: true,
15711 asm: arm.AADD,
15712 reg: regInfo{
15713 inputs: []inputInfo{
15714 {0, 22527},
15715 {1, 22527},
15716 },
15717 outputs: []outputInfo{
15718 {1, 0},
15719 {0, 21503},
15720 },
15721 },
15722 },
15723 {
15724 name: "ADDSconst",
15725 auxType: auxInt32,
15726 argLen: 1,
15727 asm: arm.AADD,
15728 reg: regInfo{
15729 inputs: []inputInfo{
15730 {0, 22527},
15731 },
15732 outputs: []outputInfo{
15733 {1, 0},
15734 {0, 21503},
15735 },
15736 },
15737 },
15738 {
15739 name: "ADC",
15740 argLen: 3,
15741 commutative: true,
15742 asm: arm.AADC,
15743 reg: regInfo{
15744 inputs: []inputInfo{
15745 {0, 21503},
15746 {1, 21503},
15747 },
15748 outputs: []outputInfo{
15749 {0, 21503},
15750 },
15751 },
15752 },
15753 {
15754 name: "ADCconst",
15755 auxType: auxInt32,
15756 argLen: 2,
15757 asm: arm.AADC,
15758 reg: regInfo{
15759 inputs: []inputInfo{
15760 {0, 21503},
15761 },
15762 outputs: []outputInfo{
15763 {0, 21503},
15764 },
15765 },
15766 },
15767 {
15768 name: "SUBS",
15769 argLen: 2,
15770 asm: arm.ASUB,
15771 reg: regInfo{
15772 inputs: []inputInfo{
15773 {0, 22527},
15774 {1, 22527},
15775 },
15776 outputs: []outputInfo{
15777 {1, 0},
15778 {0, 21503},
15779 },
15780 },
15781 },
15782 {
15783 name: "SUBSconst",
15784 auxType: auxInt32,
15785 argLen: 1,
15786 asm: arm.ASUB,
15787 reg: regInfo{
15788 inputs: []inputInfo{
15789 {0, 22527},
15790 },
15791 outputs: []outputInfo{
15792 {1, 0},
15793 {0, 21503},
15794 },
15795 },
15796 },
15797 {
15798 name: "RSBSconst",
15799 auxType: auxInt32,
15800 argLen: 1,
15801 asm: arm.ARSB,
15802 reg: regInfo{
15803 inputs: []inputInfo{
15804 {0, 22527},
15805 },
15806 outputs: []outputInfo{
15807 {1, 0},
15808 {0, 21503},
15809 },
15810 },
15811 },
15812 {
15813 name: "SBC",
15814 argLen: 3,
15815 asm: arm.ASBC,
15816 reg: regInfo{
15817 inputs: []inputInfo{
15818 {0, 21503},
15819 {1, 21503},
15820 },
15821 outputs: []outputInfo{
15822 {0, 21503},
15823 },
15824 },
15825 },
15826 {
15827 name: "SBCconst",
15828 auxType: auxInt32,
15829 argLen: 2,
15830 asm: arm.ASBC,
15831 reg: regInfo{
15832 inputs: []inputInfo{
15833 {0, 21503},
15834 },
15835 outputs: []outputInfo{
15836 {0, 21503},
15837 },
15838 },
15839 },
15840 {
15841 name: "RSCconst",
15842 auxType: auxInt32,
15843 argLen: 2,
15844 asm: arm.ARSC,
15845 reg: regInfo{
15846 inputs: []inputInfo{
15847 {0, 21503},
15848 },
15849 outputs: []outputInfo{
15850 {0, 21503},
15851 },
15852 },
15853 },
15854 {
15855 name: "MULLU",
15856 argLen: 2,
15857 commutative: true,
15858 asm: arm.AMULLU,
15859 reg: regInfo{
15860 inputs: []inputInfo{
15861 {0, 22527},
15862 {1, 22527},
15863 },
15864 outputs: []outputInfo{
15865 {0, 21503},
15866 {1, 21503},
15867 },
15868 },
15869 },
15870 {
15871 name: "MULA",
15872 argLen: 3,
15873 asm: arm.AMULA,
15874 reg: regInfo{
15875 inputs: []inputInfo{
15876 {0, 21503},
15877 {1, 21503},
15878 {2, 21503},
15879 },
15880 outputs: []outputInfo{
15881 {0, 21503},
15882 },
15883 },
15884 },
15885 {
15886 name: "MULS",
15887 argLen: 3,
15888 asm: arm.AMULS,
15889 reg: regInfo{
15890 inputs: []inputInfo{
15891 {0, 21503},
15892 {1, 21503},
15893 {2, 21503},
15894 },
15895 outputs: []outputInfo{
15896 {0, 21503},
15897 },
15898 },
15899 },
15900 {
15901 name: "ADDF",
15902 argLen: 2,
15903 commutative: true,
15904 asm: arm.AADDF,
15905 reg: regInfo{
15906 inputs: []inputInfo{
15907 {0, 4294901760},
15908 {1, 4294901760},
15909 },
15910 outputs: []outputInfo{
15911 {0, 4294901760},
15912 },
15913 },
15914 },
15915 {
15916 name: "ADDD",
15917 argLen: 2,
15918 commutative: true,
15919 asm: arm.AADDD,
15920 reg: regInfo{
15921 inputs: []inputInfo{
15922 {0, 4294901760},
15923 {1, 4294901760},
15924 },
15925 outputs: []outputInfo{
15926 {0, 4294901760},
15927 },
15928 },
15929 },
15930 {
15931 name: "SUBF",
15932 argLen: 2,
15933 asm: arm.ASUBF,
15934 reg: regInfo{
15935 inputs: []inputInfo{
15936 {0, 4294901760},
15937 {1, 4294901760},
15938 },
15939 outputs: []outputInfo{
15940 {0, 4294901760},
15941 },
15942 },
15943 },
15944 {
15945 name: "SUBD",
15946 argLen: 2,
15947 asm: arm.ASUBD,
15948 reg: regInfo{
15949 inputs: []inputInfo{
15950 {0, 4294901760},
15951 {1, 4294901760},
15952 },
15953 outputs: []outputInfo{
15954 {0, 4294901760},
15955 },
15956 },
15957 },
15958 {
15959 name: "MULF",
15960 argLen: 2,
15961 commutative: true,
15962 asm: arm.AMULF,
15963 reg: regInfo{
15964 inputs: []inputInfo{
15965 {0, 4294901760},
15966 {1, 4294901760},
15967 },
15968 outputs: []outputInfo{
15969 {0, 4294901760},
15970 },
15971 },
15972 },
15973 {
15974 name: "MULD",
15975 argLen: 2,
15976 commutative: true,
15977 asm: arm.AMULD,
15978 reg: regInfo{
15979 inputs: []inputInfo{
15980 {0, 4294901760},
15981 {1, 4294901760},
15982 },
15983 outputs: []outputInfo{
15984 {0, 4294901760},
15985 },
15986 },
15987 },
15988 {
15989 name: "NMULF",
15990 argLen: 2,
15991 commutative: true,
15992 asm: arm.ANMULF,
15993 reg: regInfo{
15994 inputs: []inputInfo{
15995 {0, 4294901760},
15996 {1, 4294901760},
15997 },
15998 outputs: []outputInfo{
15999 {0, 4294901760},
16000 },
16001 },
16002 },
16003 {
16004 name: "NMULD",
16005 argLen: 2,
16006 commutative: true,
16007 asm: arm.ANMULD,
16008 reg: regInfo{
16009 inputs: []inputInfo{
16010 {0, 4294901760},
16011 {1, 4294901760},
16012 },
16013 outputs: []outputInfo{
16014 {0, 4294901760},
16015 },
16016 },
16017 },
16018 {
16019 name: "DIVF",
16020 argLen: 2,
16021 asm: arm.ADIVF,
16022 reg: regInfo{
16023 inputs: []inputInfo{
16024 {0, 4294901760},
16025 {1, 4294901760},
16026 },
16027 outputs: []outputInfo{
16028 {0, 4294901760},
16029 },
16030 },
16031 },
16032 {
16033 name: "DIVD",
16034 argLen: 2,
16035 asm: arm.ADIVD,
16036 reg: regInfo{
16037 inputs: []inputInfo{
16038 {0, 4294901760},
16039 {1, 4294901760},
16040 },
16041 outputs: []outputInfo{
16042 {0, 4294901760},
16043 },
16044 },
16045 },
16046 {
16047 name: "MULAF",
16048 argLen: 3,
16049 resultInArg0: true,
16050 asm: arm.AMULAF,
16051 reg: regInfo{
16052 inputs: []inputInfo{
16053 {0, 4294901760},
16054 {1, 4294901760},
16055 {2, 4294901760},
16056 },
16057 outputs: []outputInfo{
16058 {0, 4294901760},
16059 },
16060 },
16061 },
16062 {
16063 name: "MULAD",
16064 argLen: 3,
16065 resultInArg0: true,
16066 asm: arm.AMULAD,
16067 reg: regInfo{
16068 inputs: []inputInfo{
16069 {0, 4294901760},
16070 {1, 4294901760},
16071 {2, 4294901760},
16072 },
16073 outputs: []outputInfo{
16074 {0, 4294901760},
16075 },
16076 },
16077 },
16078 {
16079 name: "MULSF",
16080 argLen: 3,
16081 resultInArg0: true,
16082 asm: arm.AMULSF,
16083 reg: regInfo{
16084 inputs: []inputInfo{
16085 {0, 4294901760},
16086 {1, 4294901760},
16087 {2, 4294901760},
16088 },
16089 outputs: []outputInfo{
16090 {0, 4294901760},
16091 },
16092 },
16093 },
16094 {
16095 name: "MULSD",
16096 argLen: 3,
16097 resultInArg0: true,
16098 asm: arm.AMULSD,
16099 reg: regInfo{
16100 inputs: []inputInfo{
16101 {0, 4294901760},
16102 {1, 4294901760},
16103 {2, 4294901760},
16104 },
16105 outputs: []outputInfo{
16106 {0, 4294901760},
16107 },
16108 },
16109 },
16110 {
16111 name: "FMULAD",
16112 argLen: 3,
16113 resultInArg0: true,
16114 asm: arm.AFMULAD,
16115 reg: regInfo{
16116 inputs: []inputInfo{
16117 {0, 4294901760},
16118 {1, 4294901760},
16119 {2, 4294901760},
16120 },
16121 outputs: []outputInfo{
16122 {0, 4294901760},
16123 },
16124 },
16125 },
16126 {
16127 name: "AND",
16128 argLen: 2,
16129 commutative: true,
16130 asm: arm.AAND,
16131 reg: regInfo{
16132 inputs: []inputInfo{
16133 {0, 22527},
16134 {1, 22527},
16135 },
16136 outputs: []outputInfo{
16137 {0, 21503},
16138 },
16139 },
16140 },
16141 {
16142 name: "ANDconst",
16143 auxType: auxInt32,
16144 argLen: 1,
16145 asm: arm.AAND,
16146 reg: regInfo{
16147 inputs: []inputInfo{
16148 {0, 22527},
16149 },
16150 outputs: []outputInfo{
16151 {0, 21503},
16152 },
16153 },
16154 },
16155 {
16156 name: "OR",
16157 argLen: 2,
16158 commutative: true,
16159 asm: arm.AORR,
16160 reg: regInfo{
16161 inputs: []inputInfo{
16162 {0, 22527},
16163 {1, 22527},
16164 },
16165 outputs: []outputInfo{
16166 {0, 21503},
16167 },
16168 },
16169 },
16170 {
16171 name: "ORconst",
16172 auxType: auxInt32,
16173 argLen: 1,
16174 asm: arm.AORR,
16175 reg: regInfo{
16176 inputs: []inputInfo{
16177 {0, 22527},
16178 },
16179 outputs: []outputInfo{
16180 {0, 21503},
16181 },
16182 },
16183 },
16184 {
16185 name: "XOR",
16186 argLen: 2,
16187 commutative: true,
16188 asm: arm.AEOR,
16189 reg: regInfo{
16190 inputs: []inputInfo{
16191 {0, 22527},
16192 {1, 22527},
16193 },
16194 outputs: []outputInfo{
16195 {0, 21503},
16196 },
16197 },
16198 },
16199 {
16200 name: "XORconst",
16201 auxType: auxInt32,
16202 argLen: 1,
16203 asm: arm.AEOR,
16204 reg: regInfo{
16205 inputs: []inputInfo{
16206 {0, 22527},
16207 },
16208 outputs: []outputInfo{
16209 {0, 21503},
16210 },
16211 },
16212 },
16213 {
16214 name: "BIC",
16215 argLen: 2,
16216 asm: arm.ABIC,
16217 reg: regInfo{
16218 inputs: []inputInfo{
16219 {0, 22527},
16220 {1, 22527},
16221 },
16222 outputs: []outputInfo{
16223 {0, 21503},
16224 },
16225 },
16226 },
16227 {
16228 name: "BICconst",
16229 auxType: auxInt32,
16230 argLen: 1,
16231 asm: arm.ABIC,
16232 reg: regInfo{
16233 inputs: []inputInfo{
16234 {0, 22527},
16235 },
16236 outputs: []outputInfo{
16237 {0, 21503},
16238 },
16239 },
16240 },
16241 {
16242 name: "BFX",
16243 auxType: auxInt32,
16244 argLen: 1,
16245 asm: arm.ABFX,
16246 reg: regInfo{
16247 inputs: []inputInfo{
16248 {0, 22527},
16249 },
16250 outputs: []outputInfo{
16251 {0, 21503},
16252 },
16253 },
16254 },
16255 {
16256 name: "BFXU",
16257 auxType: auxInt32,
16258 argLen: 1,
16259 asm: arm.ABFXU,
16260 reg: regInfo{
16261 inputs: []inputInfo{
16262 {0, 22527},
16263 },
16264 outputs: []outputInfo{
16265 {0, 21503},
16266 },
16267 },
16268 },
16269 {
16270 name: "MVN",
16271 argLen: 1,
16272 asm: arm.AMVN,
16273 reg: regInfo{
16274 inputs: []inputInfo{
16275 {0, 22527},
16276 },
16277 outputs: []outputInfo{
16278 {0, 21503},
16279 },
16280 },
16281 },
16282 {
16283 name: "NEGF",
16284 argLen: 1,
16285 asm: arm.ANEGF,
16286 reg: regInfo{
16287 inputs: []inputInfo{
16288 {0, 4294901760},
16289 },
16290 outputs: []outputInfo{
16291 {0, 4294901760},
16292 },
16293 },
16294 },
16295 {
16296 name: "NEGD",
16297 argLen: 1,
16298 asm: arm.ANEGD,
16299 reg: regInfo{
16300 inputs: []inputInfo{
16301 {0, 4294901760},
16302 },
16303 outputs: []outputInfo{
16304 {0, 4294901760},
16305 },
16306 },
16307 },
16308 {
16309 name: "SQRTD",
16310 argLen: 1,
16311 asm: arm.ASQRTD,
16312 reg: regInfo{
16313 inputs: []inputInfo{
16314 {0, 4294901760},
16315 },
16316 outputs: []outputInfo{
16317 {0, 4294901760},
16318 },
16319 },
16320 },
16321 {
16322 name: "SQRTF",
16323 argLen: 1,
16324 asm: arm.ASQRTF,
16325 reg: regInfo{
16326 inputs: []inputInfo{
16327 {0, 4294901760},
16328 },
16329 outputs: []outputInfo{
16330 {0, 4294901760},
16331 },
16332 },
16333 },
16334 {
16335 name: "ABSD",
16336 argLen: 1,
16337 asm: arm.AABSD,
16338 reg: regInfo{
16339 inputs: []inputInfo{
16340 {0, 4294901760},
16341 },
16342 outputs: []outputInfo{
16343 {0, 4294901760},
16344 },
16345 },
16346 },
16347 {
16348 name: "CLZ",
16349 argLen: 1,
16350 asm: arm.ACLZ,
16351 reg: regInfo{
16352 inputs: []inputInfo{
16353 {0, 22527},
16354 },
16355 outputs: []outputInfo{
16356 {0, 21503},
16357 },
16358 },
16359 },
16360 {
16361 name: "REV",
16362 argLen: 1,
16363 asm: arm.AREV,
16364 reg: regInfo{
16365 inputs: []inputInfo{
16366 {0, 22527},
16367 },
16368 outputs: []outputInfo{
16369 {0, 21503},
16370 },
16371 },
16372 },
16373 {
16374 name: "REV16",
16375 argLen: 1,
16376 asm: arm.AREV16,
16377 reg: regInfo{
16378 inputs: []inputInfo{
16379 {0, 22527},
16380 },
16381 outputs: []outputInfo{
16382 {0, 21503},
16383 },
16384 },
16385 },
16386 {
16387 name: "RBIT",
16388 argLen: 1,
16389 asm: arm.ARBIT,
16390 reg: regInfo{
16391 inputs: []inputInfo{
16392 {0, 22527},
16393 },
16394 outputs: []outputInfo{
16395 {0, 21503},
16396 },
16397 },
16398 },
16399 {
16400 name: "SLL",
16401 argLen: 2,
16402 asm: arm.ASLL,
16403 reg: regInfo{
16404 inputs: []inputInfo{
16405 {0, 22527},
16406 {1, 22527},
16407 },
16408 outputs: []outputInfo{
16409 {0, 21503},
16410 },
16411 },
16412 },
16413 {
16414 name: "SLLconst",
16415 auxType: auxInt32,
16416 argLen: 1,
16417 asm: arm.ASLL,
16418 reg: regInfo{
16419 inputs: []inputInfo{
16420 {0, 22527},
16421 },
16422 outputs: []outputInfo{
16423 {0, 21503},
16424 },
16425 },
16426 },
16427 {
16428 name: "SRL",
16429 argLen: 2,
16430 asm: arm.ASRL,
16431 reg: regInfo{
16432 inputs: []inputInfo{
16433 {0, 22527},
16434 {1, 22527},
16435 },
16436 outputs: []outputInfo{
16437 {0, 21503},
16438 },
16439 },
16440 },
16441 {
16442 name: "SRLconst",
16443 auxType: auxInt32,
16444 argLen: 1,
16445 asm: arm.ASRL,
16446 reg: regInfo{
16447 inputs: []inputInfo{
16448 {0, 22527},
16449 },
16450 outputs: []outputInfo{
16451 {0, 21503},
16452 },
16453 },
16454 },
16455 {
16456 name: "SRA",
16457 argLen: 2,
16458 asm: arm.ASRA,
16459 reg: regInfo{
16460 inputs: []inputInfo{
16461 {0, 22527},
16462 {1, 22527},
16463 },
16464 outputs: []outputInfo{
16465 {0, 21503},
16466 },
16467 },
16468 },
16469 {
16470 name: "SRAconst",
16471 auxType: auxInt32,
16472 argLen: 1,
16473 asm: arm.ASRA,
16474 reg: regInfo{
16475 inputs: []inputInfo{
16476 {0, 22527},
16477 },
16478 outputs: []outputInfo{
16479 {0, 21503},
16480 },
16481 },
16482 },
16483 {
16484 name: "SRR",
16485 argLen: 2,
16486 reg: regInfo{
16487 inputs: []inputInfo{
16488 {0, 22527},
16489 {1, 22527},
16490 },
16491 outputs: []outputInfo{
16492 {0, 21503},
16493 },
16494 },
16495 },
16496 {
16497 name: "SRRconst",
16498 auxType: auxInt32,
16499 argLen: 1,
16500 reg: regInfo{
16501 inputs: []inputInfo{
16502 {0, 22527},
16503 },
16504 outputs: []outputInfo{
16505 {0, 21503},
16506 },
16507 },
16508 },
16509 {
16510 name: "ADDshiftLL",
16511 auxType: auxInt32,
16512 argLen: 2,
16513 asm: arm.AADD,
16514 reg: regInfo{
16515 inputs: []inputInfo{
16516 {0, 22527},
16517 {1, 22527},
16518 },
16519 outputs: []outputInfo{
16520 {0, 21503},
16521 },
16522 },
16523 },
16524 {
16525 name: "ADDshiftRL",
16526 auxType: auxInt32,
16527 argLen: 2,
16528 asm: arm.AADD,
16529 reg: regInfo{
16530 inputs: []inputInfo{
16531 {0, 22527},
16532 {1, 22527},
16533 },
16534 outputs: []outputInfo{
16535 {0, 21503},
16536 },
16537 },
16538 },
16539 {
16540 name: "ADDshiftRA",
16541 auxType: auxInt32,
16542 argLen: 2,
16543 asm: arm.AADD,
16544 reg: regInfo{
16545 inputs: []inputInfo{
16546 {0, 22527},
16547 {1, 22527},
16548 },
16549 outputs: []outputInfo{
16550 {0, 21503},
16551 },
16552 },
16553 },
16554 {
16555 name: "SUBshiftLL",
16556 auxType: auxInt32,
16557 argLen: 2,
16558 asm: arm.ASUB,
16559 reg: regInfo{
16560 inputs: []inputInfo{
16561 {0, 22527},
16562 {1, 22527},
16563 },
16564 outputs: []outputInfo{
16565 {0, 21503},
16566 },
16567 },
16568 },
16569 {
16570 name: "SUBshiftRL",
16571 auxType: auxInt32,
16572 argLen: 2,
16573 asm: arm.ASUB,
16574 reg: regInfo{
16575 inputs: []inputInfo{
16576 {0, 22527},
16577 {1, 22527},
16578 },
16579 outputs: []outputInfo{
16580 {0, 21503},
16581 },
16582 },
16583 },
16584 {
16585 name: "SUBshiftRA",
16586 auxType: auxInt32,
16587 argLen: 2,
16588 asm: arm.ASUB,
16589 reg: regInfo{
16590 inputs: []inputInfo{
16591 {0, 22527},
16592 {1, 22527},
16593 },
16594 outputs: []outputInfo{
16595 {0, 21503},
16596 },
16597 },
16598 },
16599 {
16600 name: "RSBshiftLL",
16601 auxType: auxInt32,
16602 argLen: 2,
16603 asm: arm.ARSB,
16604 reg: regInfo{
16605 inputs: []inputInfo{
16606 {0, 22527},
16607 {1, 22527},
16608 },
16609 outputs: []outputInfo{
16610 {0, 21503},
16611 },
16612 },
16613 },
16614 {
16615 name: "RSBshiftRL",
16616 auxType: auxInt32,
16617 argLen: 2,
16618 asm: arm.ARSB,
16619 reg: regInfo{
16620 inputs: []inputInfo{
16621 {0, 22527},
16622 {1, 22527},
16623 },
16624 outputs: []outputInfo{
16625 {0, 21503},
16626 },
16627 },
16628 },
16629 {
16630 name: "RSBshiftRA",
16631 auxType: auxInt32,
16632 argLen: 2,
16633 asm: arm.ARSB,
16634 reg: regInfo{
16635 inputs: []inputInfo{
16636 {0, 22527},
16637 {1, 22527},
16638 },
16639 outputs: []outputInfo{
16640 {0, 21503},
16641 },
16642 },
16643 },
16644 {
16645 name: "ANDshiftLL",
16646 auxType: auxInt32,
16647 argLen: 2,
16648 asm: arm.AAND,
16649 reg: regInfo{
16650 inputs: []inputInfo{
16651 {0, 22527},
16652 {1, 22527},
16653 },
16654 outputs: []outputInfo{
16655 {0, 21503},
16656 },
16657 },
16658 },
16659 {
16660 name: "ANDshiftRL",
16661 auxType: auxInt32,
16662 argLen: 2,
16663 asm: arm.AAND,
16664 reg: regInfo{
16665 inputs: []inputInfo{
16666 {0, 22527},
16667 {1, 22527},
16668 },
16669 outputs: []outputInfo{
16670 {0, 21503},
16671 },
16672 },
16673 },
16674 {
16675 name: "ANDshiftRA",
16676 auxType: auxInt32,
16677 argLen: 2,
16678 asm: arm.AAND,
16679 reg: regInfo{
16680 inputs: []inputInfo{
16681 {0, 22527},
16682 {1, 22527},
16683 },
16684 outputs: []outputInfo{
16685 {0, 21503},
16686 },
16687 },
16688 },
16689 {
16690 name: "ORshiftLL",
16691 auxType: auxInt32,
16692 argLen: 2,
16693 asm: arm.AORR,
16694 reg: regInfo{
16695 inputs: []inputInfo{
16696 {0, 22527},
16697 {1, 22527},
16698 },
16699 outputs: []outputInfo{
16700 {0, 21503},
16701 },
16702 },
16703 },
16704 {
16705 name: "ORshiftRL",
16706 auxType: auxInt32,
16707 argLen: 2,
16708 asm: arm.AORR,
16709 reg: regInfo{
16710 inputs: []inputInfo{
16711 {0, 22527},
16712 {1, 22527},
16713 },
16714 outputs: []outputInfo{
16715 {0, 21503},
16716 },
16717 },
16718 },
16719 {
16720 name: "ORshiftRA",
16721 auxType: auxInt32,
16722 argLen: 2,
16723 asm: arm.AORR,
16724 reg: regInfo{
16725 inputs: []inputInfo{
16726 {0, 22527},
16727 {1, 22527},
16728 },
16729 outputs: []outputInfo{
16730 {0, 21503},
16731 },
16732 },
16733 },
16734 {
16735 name: "XORshiftLL",
16736 auxType: auxInt32,
16737 argLen: 2,
16738 asm: arm.AEOR,
16739 reg: regInfo{
16740 inputs: []inputInfo{
16741 {0, 22527},
16742 {1, 22527},
16743 },
16744 outputs: []outputInfo{
16745 {0, 21503},
16746 },
16747 },
16748 },
16749 {
16750 name: "XORshiftRL",
16751 auxType: auxInt32,
16752 argLen: 2,
16753 asm: arm.AEOR,
16754 reg: regInfo{
16755 inputs: []inputInfo{
16756 {0, 22527},
16757 {1, 22527},
16758 },
16759 outputs: []outputInfo{
16760 {0, 21503},
16761 },
16762 },
16763 },
16764 {
16765 name: "XORshiftRA",
16766 auxType: auxInt32,
16767 argLen: 2,
16768 asm: arm.AEOR,
16769 reg: regInfo{
16770 inputs: []inputInfo{
16771 {0, 22527},
16772 {1, 22527},
16773 },
16774 outputs: []outputInfo{
16775 {0, 21503},
16776 },
16777 },
16778 },
16779 {
16780 name: "XORshiftRR",
16781 auxType: auxInt32,
16782 argLen: 2,
16783 asm: arm.AEOR,
16784 reg: regInfo{
16785 inputs: []inputInfo{
16786 {0, 22527},
16787 {1, 22527},
16788 },
16789 outputs: []outputInfo{
16790 {0, 21503},
16791 },
16792 },
16793 },
16794 {
16795 name: "BICshiftLL",
16796 auxType: auxInt32,
16797 argLen: 2,
16798 asm: arm.ABIC,
16799 reg: regInfo{
16800 inputs: []inputInfo{
16801 {0, 22527},
16802 {1, 22527},
16803 },
16804 outputs: []outputInfo{
16805 {0, 21503},
16806 },
16807 },
16808 },
16809 {
16810 name: "BICshiftRL",
16811 auxType: auxInt32,
16812 argLen: 2,
16813 asm: arm.ABIC,
16814 reg: regInfo{
16815 inputs: []inputInfo{
16816 {0, 22527},
16817 {1, 22527},
16818 },
16819 outputs: []outputInfo{
16820 {0, 21503},
16821 },
16822 },
16823 },
16824 {
16825 name: "BICshiftRA",
16826 auxType: auxInt32,
16827 argLen: 2,
16828 asm: arm.ABIC,
16829 reg: regInfo{
16830 inputs: []inputInfo{
16831 {0, 22527},
16832 {1, 22527},
16833 },
16834 outputs: []outputInfo{
16835 {0, 21503},
16836 },
16837 },
16838 },
16839 {
16840 name: "MVNshiftLL",
16841 auxType: auxInt32,
16842 argLen: 1,
16843 asm: arm.AMVN,
16844 reg: regInfo{
16845 inputs: []inputInfo{
16846 {0, 22527},
16847 },
16848 outputs: []outputInfo{
16849 {0, 21503},
16850 },
16851 },
16852 },
16853 {
16854 name: "MVNshiftRL",
16855 auxType: auxInt32,
16856 argLen: 1,
16857 asm: arm.AMVN,
16858 reg: regInfo{
16859 inputs: []inputInfo{
16860 {0, 22527},
16861 },
16862 outputs: []outputInfo{
16863 {0, 21503},
16864 },
16865 },
16866 },
16867 {
16868 name: "MVNshiftRA",
16869 auxType: auxInt32,
16870 argLen: 1,
16871 asm: arm.AMVN,
16872 reg: regInfo{
16873 inputs: []inputInfo{
16874 {0, 22527},
16875 },
16876 outputs: []outputInfo{
16877 {0, 21503},
16878 },
16879 },
16880 },
16881 {
16882 name: "ADCshiftLL",
16883 auxType: auxInt32,
16884 argLen: 3,
16885 asm: arm.AADC,
16886 reg: regInfo{
16887 inputs: []inputInfo{
16888 {0, 21503},
16889 {1, 21503},
16890 },
16891 outputs: []outputInfo{
16892 {0, 21503},
16893 },
16894 },
16895 },
16896 {
16897 name: "ADCshiftRL",
16898 auxType: auxInt32,
16899 argLen: 3,
16900 asm: arm.AADC,
16901 reg: regInfo{
16902 inputs: []inputInfo{
16903 {0, 21503},
16904 {1, 21503},
16905 },
16906 outputs: []outputInfo{
16907 {0, 21503},
16908 },
16909 },
16910 },
16911 {
16912 name: "ADCshiftRA",
16913 auxType: auxInt32,
16914 argLen: 3,
16915 asm: arm.AADC,
16916 reg: regInfo{
16917 inputs: []inputInfo{
16918 {0, 21503},
16919 {1, 21503},
16920 },
16921 outputs: []outputInfo{
16922 {0, 21503},
16923 },
16924 },
16925 },
16926 {
16927 name: "SBCshiftLL",
16928 auxType: auxInt32,
16929 argLen: 3,
16930 asm: arm.ASBC,
16931 reg: regInfo{
16932 inputs: []inputInfo{
16933 {0, 21503},
16934 {1, 21503},
16935 },
16936 outputs: []outputInfo{
16937 {0, 21503},
16938 },
16939 },
16940 },
16941 {
16942 name: "SBCshiftRL",
16943 auxType: auxInt32,
16944 argLen: 3,
16945 asm: arm.ASBC,
16946 reg: regInfo{
16947 inputs: []inputInfo{
16948 {0, 21503},
16949 {1, 21503},
16950 },
16951 outputs: []outputInfo{
16952 {0, 21503},
16953 },
16954 },
16955 },
16956 {
16957 name: "SBCshiftRA",
16958 auxType: auxInt32,
16959 argLen: 3,
16960 asm: arm.ASBC,
16961 reg: regInfo{
16962 inputs: []inputInfo{
16963 {0, 21503},
16964 {1, 21503},
16965 },
16966 outputs: []outputInfo{
16967 {0, 21503},
16968 },
16969 },
16970 },
16971 {
16972 name: "RSCshiftLL",
16973 auxType: auxInt32,
16974 argLen: 3,
16975 asm: arm.ARSC,
16976 reg: regInfo{
16977 inputs: []inputInfo{
16978 {0, 21503},
16979 {1, 21503},
16980 },
16981 outputs: []outputInfo{
16982 {0, 21503},
16983 },
16984 },
16985 },
16986 {
16987 name: "RSCshiftRL",
16988 auxType: auxInt32,
16989 argLen: 3,
16990 asm: arm.ARSC,
16991 reg: regInfo{
16992 inputs: []inputInfo{
16993 {0, 21503},
16994 {1, 21503},
16995 },
16996 outputs: []outputInfo{
16997 {0, 21503},
16998 },
16999 },
17000 },
17001 {
17002 name: "RSCshiftRA",
17003 auxType: auxInt32,
17004 argLen: 3,
17005 asm: arm.ARSC,
17006 reg: regInfo{
17007 inputs: []inputInfo{
17008 {0, 21503},
17009 {1, 21503},
17010 },
17011 outputs: []outputInfo{
17012 {0, 21503},
17013 },
17014 },
17015 },
17016 {
17017 name: "ADDSshiftLL",
17018 auxType: auxInt32,
17019 argLen: 2,
17020 asm: arm.AADD,
17021 reg: regInfo{
17022 inputs: []inputInfo{
17023 {0, 22527},
17024 {1, 22527},
17025 },
17026 outputs: []outputInfo{
17027 {1, 0},
17028 {0, 21503},
17029 },
17030 },
17031 },
17032 {
17033 name: "ADDSshiftRL",
17034 auxType: auxInt32,
17035 argLen: 2,
17036 asm: arm.AADD,
17037 reg: regInfo{
17038 inputs: []inputInfo{
17039 {0, 22527},
17040 {1, 22527},
17041 },
17042 outputs: []outputInfo{
17043 {1, 0},
17044 {0, 21503},
17045 },
17046 },
17047 },
17048 {
17049 name: "ADDSshiftRA",
17050 auxType: auxInt32,
17051 argLen: 2,
17052 asm: arm.AADD,
17053 reg: regInfo{
17054 inputs: []inputInfo{
17055 {0, 22527},
17056 {1, 22527},
17057 },
17058 outputs: []outputInfo{
17059 {1, 0},
17060 {0, 21503},
17061 },
17062 },
17063 },
17064 {
17065 name: "SUBSshiftLL",
17066 auxType: auxInt32,
17067 argLen: 2,
17068 asm: arm.ASUB,
17069 reg: regInfo{
17070 inputs: []inputInfo{
17071 {0, 22527},
17072 {1, 22527},
17073 },
17074 outputs: []outputInfo{
17075 {1, 0},
17076 {0, 21503},
17077 },
17078 },
17079 },
17080 {
17081 name: "SUBSshiftRL",
17082 auxType: auxInt32,
17083 argLen: 2,
17084 asm: arm.ASUB,
17085 reg: regInfo{
17086 inputs: []inputInfo{
17087 {0, 22527},
17088 {1, 22527},
17089 },
17090 outputs: []outputInfo{
17091 {1, 0},
17092 {0, 21503},
17093 },
17094 },
17095 },
17096 {
17097 name: "SUBSshiftRA",
17098 auxType: auxInt32,
17099 argLen: 2,
17100 asm: arm.ASUB,
17101 reg: regInfo{
17102 inputs: []inputInfo{
17103 {0, 22527},
17104 {1, 22527},
17105 },
17106 outputs: []outputInfo{
17107 {1, 0},
17108 {0, 21503},
17109 },
17110 },
17111 },
17112 {
17113 name: "RSBSshiftLL",
17114 auxType: auxInt32,
17115 argLen: 2,
17116 asm: arm.ARSB,
17117 reg: regInfo{
17118 inputs: []inputInfo{
17119 {0, 22527},
17120 {1, 22527},
17121 },
17122 outputs: []outputInfo{
17123 {1, 0},
17124 {0, 21503},
17125 },
17126 },
17127 },
17128 {
17129 name: "RSBSshiftRL",
17130 auxType: auxInt32,
17131 argLen: 2,
17132 asm: arm.ARSB,
17133 reg: regInfo{
17134 inputs: []inputInfo{
17135 {0, 22527},
17136 {1, 22527},
17137 },
17138 outputs: []outputInfo{
17139 {1, 0},
17140 {0, 21503},
17141 },
17142 },
17143 },
17144 {
17145 name: "RSBSshiftRA",
17146 auxType: auxInt32,
17147 argLen: 2,
17148 asm: arm.ARSB,
17149 reg: regInfo{
17150 inputs: []inputInfo{
17151 {0, 22527},
17152 {1, 22527},
17153 },
17154 outputs: []outputInfo{
17155 {1, 0},
17156 {0, 21503},
17157 },
17158 },
17159 },
17160 {
17161 name: "ADDshiftLLreg",
17162 argLen: 3,
17163 asm: arm.AADD,
17164 reg: regInfo{
17165 inputs: []inputInfo{
17166 {0, 21503},
17167 {1, 21503},
17168 {2, 21503},
17169 },
17170 outputs: []outputInfo{
17171 {0, 21503},
17172 },
17173 },
17174 },
17175 {
17176 name: "ADDshiftRLreg",
17177 argLen: 3,
17178 asm: arm.AADD,
17179 reg: regInfo{
17180 inputs: []inputInfo{
17181 {0, 21503},
17182 {1, 21503},
17183 {2, 21503},
17184 },
17185 outputs: []outputInfo{
17186 {0, 21503},
17187 },
17188 },
17189 },
17190 {
17191 name: "ADDshiftRAreg",
17192 argLen: 3,
17193 asm: arm.AADD,
17194 reg: regInfo{
17195 inputs: []inputInfo{
17196 {0, 21503},
17197 {1, 21503},
17198 {2, 21503},
17199 },
17200 outputs: []outputInfo{
17201 {0, 21503},
17202 },
17203 },
17204 },
17205 {
17206 name: "SUBshiftLLreg",
17207 argLen: 3,
17208 asm: arm.ASUB,
17209 reg: regInfo{
17210 inputs: []inputInfo{
17211 {0, 21503},
17212 {1, 21503},
17213 {2, 21503},
17214 },
17215 outputs: []outputInfo{
17216 {0, 21503},
17217 },
17218 },
17219 },
17220 {
17221 name: "SUBshiftRLreg",
17222 argLen: 3,
17223 asm: arm.ASUB,
17224 reg: regInfo{
17225 inputs: []inputInfo{
17226 {0, 21503},
17227 {1, 21503},
17228 {2, 21503},
17229 },
17230 outputs: []outputInfo{
17231 {0, 21503},
17232 },
17233 },
17234 },
17235 {
17236 name: "SUBshiftRAreg",
17237 argLen: 3,
17238 asm: arm.ASUB,
17239 reg: regInfo{
17240 inputs: []inputInfo{
17241 {0, 21503},
17242 {1, 21503},
17243 {2, 21503},
17244 },
17245 outputs: []outputInfo{
17246 {0, 21503},
17247 },
17248 },
17249 },
17250 {
17251 name: "RSBshiftLLreg",
17252 argLen: 3,
17253 asm: arm.ARSB,
17254 reg: regInfo{
17255 inputs: []inputInfo{
17256 {0, 21503},
17257 {1, 21503},
17258 {2, 21503},
17259 },
17260 outputs: []outputInfo{
17261 {0, 21503},
17262 },
17263 },
17264 },
17265 {
17266 name: "RSBshiftRLreg",
17267 argLen: 3,
17268 asm: arm.ARSB,
17269 reg: regInfo{
17270 inputs: []inputInfo{
17271 {0, 21503},
17272 {1, 21503},
17273 {2, 21503},
17274 },
17275 outputs: []outputInfo{
17276 {0, 21503},
17277 },
17278 },
17279 },
17280 {
17281 name: "RSBshiftRAreg",
17282 argLen: 3,
17283 asm: arm.ARSB,
17284 reg: regInfo{
17285 inputs: []inputInfo{
17286 {0, 21503},
17287 {1, 21503},
17288 {2, 21503},
17289 },
17290 outputs: []outputInfo{
17291 {0, 21503},
17292 },
17293 },
17294 },
17295 {
17296 name: "ANDshiftLLreg",
17297 argLen: 3,
17298 asm: arm.AAND,
17299 reg: regInfo{
17300 inputs: []inputInfo{
17301 {0, 21503},
17302 {1, 21503},
17303 {2, 21503},
17304 },
17305 outputs: []outputInfo{
17306 {0, 21503},
17307 },
17308 },
17309 },
17310 {
17311 name: "ANDshiftRLreg",
17312 argLen: 3,
17313 asm: arm.AAND,
17314 reg: regInfo{
17315 inputs: []inputInfo{
17316 {0, 21503},
17317 {1, 21503},
17318 {2, 21503},
17319 },
17320 outputs: []outputInfo{
17321 {0, 21503},
17322 },
17323 },
17324 },
17325 {
17326 name: "ANDshiftRAreg",
17327 argLen: 3,
17328 asm: arm.AAND,
17329 reg: regInfo{
17330 inputs: []inputInfo{
17331 {0, 21503},
17332 {1, 21503},
17333 {2, 21503},
17334 },
17335 outputs: []outputInfo{
17336 {0, 21503},
17337 },
17338 },
17339 },
17340 {
17341 name: "ORshiftLLreg",
17342 argLen: 3,
17343 asm: arm.AORR,
17344 reg: regInfo{
17345 inputs: []inputInfo{
17346 {0, 21503},
17347 {1, 21503},
17348 {2, 21503},
17349 },
17350 outputs: []outputInfo{
17351 {0, 21503},
17352 },
17353 },
17354 },
17355 {
17356 name: "ORshiftRLreg",
17357 argLen: 3,
17358 asm: arm.AORR,
17359 reg: regInfo{
17360 inputs: []inputInfo{
17361 {0, 21503},
17362 {1, 21503},
17363 {2, 21503},
17364 },
17365 outputs: []outputInfo{
17366 {0, 21503},
17367 },
17368 },
17369 },
17370 {
17371 name: "ORshiftRAreg",
17372 argLen: 3,
17373 asm: arm.AORR,
17374 reg: regInfo{
17375 inputs: []inputInfo{
17376 {0, 21503},
17377 {1, 21503},
17378 {2, 21503},
17379 },
17380 outputs: []outputInfo{
17381 {0, 21503},
17382 },
17383 },
17384 },
17385 {
17386 name: "XORshiftLLreg",
17387 argLen: 3,
17388 asm: arm.AEOR,
17389 reg: regInfo{
17390 inputs: []inputInfo{
17391 {0, 21503},
17392 {1, 21503},
17393 {2, 21503},
17394 },
17395 outputs: []outputInfo{
17396 {0, 21503},
17397 },
17398 },
17399 },
17400 {
17401 name: "XORshiftRLreg",
17402 argLen: 3,
17403 asm: arm.AEOR,
17404 reg: regInfo{
17405 inputs: []inputInfo{
17406 {0, 21503},
17407 {1, 21503},
17408 {2, 21503},
17409 },
17410 outputs: []outputInfo{
17411 {0, 21503},
17412 },
17413 },
17414 },
17415 {
17416 name: "XORshiftRAreg",
17417 argLen: 3,
17418 asm: arm.AEOR,
17419 reg: regInfo{
17420 inputs: []inputInfo{
17421 {0, 21503},
17422 {1, 21503},
17423 {2, 21503},
17424 },
17425 outputs: []outputInfo{
17426 {0, 21503},
17427 },
17428 },
17429 },
17430 {
17431 name: "BICshiftLLreg",
17432 argLen: 3,
17433 asm: arm.ABIC,
17434 reg: regInfo{
17435 inputs: []inputInfo{
17436 {0, 21503},
17437 {1, 21503},
17438 {2, 21503},
17439 },
17440 outputs: []outputInfo{
17441 {0, 21503},
17442 },
17443 },
17444 },
17445 {
17446 name: "BICshiftRLreg",
17447 argLen: 3,
17448 asm: arm.ABIC,
17449 reg: regInfo{
17450 inputs: []inputInfo{
17451 {0, 21503},
17452 {1, 21503},
17453 {2, 21503},
17454 },
17455 outputs: []outputInfo{
17456 {0, 21503},
17457 },
17458 },
17459 },
17460 {
17461 name: "BICshiftRAreg",
17462 argLen: 3,
17463 asm: arm.ABIC,
17464 reg: regInfo{
17465 inputs: []inputInfo{
17466 {0, 21503},
17467 {1, 21503},
17468 {2, 21503},
17469 },
17470 outputs: []outputInfo{
17471 {0, 21503},
17472 },
17473 },
17474 },
17475 {
17476 name: "MVNshiftLLreg",
17477 argLen: 2,
17478 asm: arm.AMVN,
17479 reg: regInfo{
17480 inputs: []inputInfo{
17481 {0, 22527},
17482 {1, 22527},
17483 },
17484 outputs: []outputInfo{
17485 {0, 21503},
17486 },
17487 },
17488 },
17489 {
17490 name: "MVNshiftRLreg",
17491 argLen: 2,
17492 asm: arm.AMVN,
17493 reg: regInfo{
17494 inputs: []inputInfo{
17495 {0, 22527},
17496 {1, 22527},
17497 },
17498 outputs: []outputInfo{
17499 {0, 21503},
17500 },
17501 },
17502 },
17503 {
17504 name: "MVNshiftRAreg",
17505 argLen: 2,
17506 asm: arm.AMVN,
17507 reg: regInfo{
17508 inputs: []inputInfo{
17509 {0, 22527},
17510 {1, 22527},
17511 },
17512 outputs: []outputInfo{
17513 {0, 21503},
17514 },
17515 },
17516 },
17517 {
17518 name: "ADCshiftLLreg",
17519 argLen: 4,
17520 asm: arm.AADC,
17521 reg: regInfo{
17522 inputs: []inputInfo{
17523 {0, 21503},
17524 {1, 21503},
17525 {2, 21503},
17526 },
17527 outputs: []outputInfo{
17528 {0, 21503},
17529 },
17530 },
17531 },
17532 {
17533 name: "ADCshiftRLreg",
17534 argLen: 4,
17535 asm: arm.AADC,
17536 reg: regInfo{
17537 inputs: []inputInfo{
17538 {0, 21503},
17539 {1, 21503},
17540 {2, 21503},
17541 },
17542 outputs: []outputInfo{
17543 {0, 21503},
17544 },
17545 },
17546 },
17547 {
17548 name: "ADCshiftRAreg",
17549 argLen: 4,
17550 asm: arm.AADC,
17551 reg: regInfo{
17552 inputs: []inputInfo{
17553 {0, 21503},
17554 {1, 21503},
17555 {2, 21503},
17556 },
17557 outputs: []outputInfo{
17558 {0, 21503},
17559 },
17560 },
17561 },
17562 {
17563 name: "SBCshiftLLreg",
17564 argLen: 4,
17565 asm: arm.ASBC,
17566 reg: regInfo{
17567 inputs: []inputInfo{
17568 {0, 21503},
17569 {1, 21503},
17570 {2, 21503},
17571 },
17572 outputs: []outputInfo{
17573 {0, 21503},
17574 },
17575 },
17576 },
17577 {
17578 name: "SBCshiftRLreg",
17579 argLen: 4,
17580 asm: arm.ASBC,
17581 reg: regInfo{
17582 inputs: []inputInfo{
17583 {0, 21503},
17584 {1, 21503},
17585 {2, 21503},
17586 },
17587 outputs: []outputInfo{
17588 {0, 21503},
17589 },
17590 },
17591 },
17592 {
17593 name: "SBCshiftRAreg",
17594 argLen: 4,
17595 asm: arm.ASBC,
17596 reg: regInfo{
17597 inputs: []inputInfo{
17598 {0, 21503},
17599 {1, 21503},
17600 {2, 21503},
17601 },
17602 outputs: []outputInfo{
17603 {0, 21503},
17604 },
17605 },
17606 },
17607 {
17608 name: "RSCshiftLLreg",
17609 argLen: 4,
17610 asm: arm.ARSC,
17611 reg: regInfo{
17612 inputs: []inputInfo{
17613 {0, 21503},
17614 {1, 21503},
17615 {2, 21503},
17616 },
17617 outputs: []outputInfo{
17618 {0, 21503},
17619 },
17620 },
17621 },
17622 {
17623 name: "RSCshiftRLreg",
17624 argLen: 4,
17625 asm: arm.ARSC,
17626 reg: regInfo{
17627 inputs: []inputInfo{
17628 {0, 21503},
17629 {1, 21503},
17630 {2, 21503},
17631 },
17632 outputs: []outputInfo{
17633 {0, 21503},
17634 },
17635 },
17636 },
17637 {
17638 name: "RSCshiftRAreg",
17639 argLen: 4,
17640 asm: arm.ARSC,
17641 reg: regInfo{
17642 inputs: []inputInfo{
17643 {0, 21503},
17644 {1, 21503},
17645 {2, 21503},
17646 },
17647 outputs: []outputInfo{
17648 {0, 21503},
17649 },
17650 },
17651 },
17652 {
17653 name: "ADDSshiftLLreg",
17654 argLen: 3,
17655 asm: arm.AADD,
17656 reg: regInfo{
17657 inputs: []inputInfo{
17658 {0, 21503},
17659 {1, 21503},
17660 {2, 21503},
17661 },
17662 outputs: []outputInfo{
17663 {1, 0},
17664 {0, 21503},
17665 },
17666 },
17667 },
17668 {
17669 name: "ADDSshiftRLreg",
17670 argLen: 3,
17671 asm: arm.AADD,
17672 reg: regInfo{
17673 inputs: []inputInfo{
17674 {0, 21503},
17675 {1, 21503},
17676 {2, 21503},
17677 },
17678 outputs: []outputInfo{
17679 {1, 0},
17680 {0, 21503},
17681 },
17682 },
17683 },
17684 {
17685 name: "ADDSshiftRAreg",
17686 argLen: 3,
17687 asm: arm.AADD,
17688 reg: regInfo{
17689 inputs: []inputInfo{
17690 {0, 21503},
17691 {1, 21503},
17692 {2, 21503},
17693 },
17694 outputs: []outputInfo{
17695 {1, 0},
17696 {0, 21503},
17697 },
17698 },
17699 },
17700 {
17701 name: "SUBSshiftLLreg",
17702 argLen: 3,
17703 asm: arm.ASUB,
17704 reg: regInfo{
17705 inputs: []inputInfo{
17706 {0, 21503},
17707 {1, 21503},
17708 {2, 21503},
17709 },
17710 outputs: []outputInfo{
17711 {1, 0},
17712 {0, 21503},
17713 },
17714 },
17715 },
17716 {
17717 name: "SUBSshiftRLreg",
17718 argLen: 3,
17719 asm: arm.ASUB,
17720 reg: regInfo{
17721 inputs: []inputInfo{
17722 {0, 21503},
17723 {1, 21503},
17724 {2, 21503},
17725 },
17726 outputs: []outputInfo{
17727 {1, 0},
17728 {0, 21503},
17729 },
17730 },
17731 },
17732 {
17733 name: "SUBSshiftRAreg",
17734 argLen: 3,
17735 asm: arm.ASUB,
17736 reg: regInfo{
17737 inputs: []inputInfo{
17738 {0, 21503},
17739 {1, 21503},
17740 {2, 21503},
17741 },
17742 outputs: []outputInfo{
17743 {1, 0},
17744 {0, 21503},
17745 },
17746 },
17747 },
17748 {
17749 name: "RSBSshiftLLreg",
17750 argLen: 3,
17751 asm: arm.ARSB,
17752 reg: regInfo{
17753 inputs: []inputInfo{
17754 {0, 21503},
17755 {1, 21503},
17756 {2, 21503},
17757 },
17758 outputs: []outputInfo{
17759 {1, 0},
17760 {0, 21503},
17761 },
17762 },
17763 },
17764 {
17765 name: "RSBSshiftRLreg",
17766 argLen: 3,
17767 asm: arm.ARSB,
17768 reg: regInfo{
17769 inputs: []inputInfo{
17770 {0, 21503},
17771 {1, 21503},
17772 {2, 21503},
17773 },
17774 outputs: []outputInfo{
17775 {1, 0},
17776 {0, 21503},
17777 },
17778 },
17779 },
17780 {
17781 name: "RSBSshiftRAreg",
17782 argLen: 3,
17783 asm: arm.ARSB,
17784 reg: regInfo{
17785 inputs: []inputInfo{
17786 {0, 21503},
17787 {1, 21503},
17788 {2, 21503},
17789 },
17790 outputs: []outputInfo{
17791 {1, 0},
17792 {0, 21503},
17793 },
17794 },
17795 },
17796 {
17797 name: "CMP",
17798 argLen: 2,
17799 asm: arm.ACMP,
17800 reg: regInfo{
17801 inputs: []inputInfo{
17802 {0, 22527},
17803 {1, 22527},
17804 },
17805 },
17806 },
17807 {
17808 name: "CMPconst",
17809 auxType: auxInt32,
17810 argLen: 1,
17811 asm: arm.ACMP,
17812 reg: regInfo{
17813 inputs: []inputInfo{
17814 {0, 22527},
17815 },
17816 },
17817 },
17818 {
17819 name: "CMN",
17820 argLen: 2,
17821 commutative: true,
17822 asm: arm.ACMN,
17823 reg: regInfo{
17824 inputs: []inputInfo{
17825 {0, 22527},
17826 {1, 22527},
17827 },
17828 },
17829 },
17830 {
17831 name: "CMNconst",
17832 auxType: auxInt32,
17833 argLen: 1,
17834 asm: arm.ACMN,
17835 reg: regInfo{
17836 inputs: []inputInfo{
17837 {0, 22527},
17838 },
17839 },
17840 },
17841 {
17842 name: "TST",
17843 argLen: 2,
17844 commutative: true,
17845 asm: arm.ATST,
17846 reg: regInfo{
17847 inputs: []inputInfo{
17848 {0, 22527},
17849 {1, 22527},
17850 },
17851 },
17852 },
17853 {
17854 name: "TSTconst",
17855 auxType: auxInt32,
17856 argLen: 1,
17857 asm: arm.ATST,
17858 reg: regInfo{
17859 inputs: []inputInfo{
17860 {0, 22527},
17861 },
17862 },
17863 },
17864 {
17865 name: "TEQ",
17866 argLen: 2,
17867 commutative: true,
17868 asm: arm.ATEQ,
17869 reg: regInfo{
17870 inputs: []inputInfo{
17871 {0, 22527},
17872 {1, 22527},
17873 },
17874 },
17875 },
17876 {
17877 name: "TEQconst",
17878 auxType: auxInt32,
17879 argLen: 1,
17880 asm: arm.ATEQ,
17881 reg: regInfo{
17882 inputs: []inputInfo{
17883 {0, 22527},
17884 },
17885 },
17886 },
17887 {
17888 name: "CMPF",
17889 argLen: 2,
17890 asm: arm.ACMPF,
17891 reg: regInfo{
17892 inputs: []inputInfo{
17893 {0, 4294901760},
17894 {1, 4294901760},
17895 },
17896 },
17897 },
17898 {
17899 name: "CMPD",
17900 argLen: 2,
17901 asm: arm.ACMPD,
17902 reg: regInfo{
17903 inputs: []inputInfo{
17904 {0, 4294901760},
17905 {1, 4294901760},
17906 },
17907 },
17908 },
17909 {
17910 name: "CMPshiftLL",
17911 auxType: auxInt32,
17912 argLen: 2,
17913 asm: arm.ACMP,
17914 reg: regInfo{
17915 inputs: []inputInfo{
17916 {0, 22527},
17917 {1, 22527},
17918 },
17919 },
17920 },
17921 {
17922 name: "CMPshiftRL",
17923 auxType: auxInt32,
17924 argLen: 2,
17925 asm: arm.ACMP,
17926 reg: regInfo{
17927 inputs: []inputInfo{
17928 {0, 22527},
17929 {1, 22527},
17930 },
17931 },
17932 },
17933 {
17934 name: "CMPshiftRA",
17935 auxType: auxInt32,
17936 argLen: 2,
17937 asm: arm.ACMP,
17938 reg: regInfo{
17939 inputs: []inputInfo{
17940 {0, 22527},
17941 {1, 22527},
17942 },
17943 },
17944 },
17945 {
17946 name: "CMNshiftLL",
17947 auxType: auxInt32,
17948 argLen: 2,
17949 asm: arm.ACMN,
17950 reg: regInfo{
17951 inputs: []inputInfo{
17952 {0, 22527},
17953 {1, 22527},
17954 },
17955 },
17956 },
17957 {
17958 name: "CMNshiftRL",
17959 auxType: auxInt32,
17960 argLen: 2,
17961 asm: arm.ACMN,
17962 reg: regInfo{
17963 inputs: []inputInfo{
17964 {0, 22527},
17965 {1, 22527},
17966 },
17967 },
17968 },
17969 {
17970 name: "CMNshiftRA",
17971 auxType: auxInt32,
17972 argLen: 2,
17973 asm: arm.ACMN,
17974 reg: regInfo{
17975 inputs: []inputInfo{
17976 {0, 22527},
17977 {1, 22527},
17978 },
17979 },
17980 },
17981 {
17982 name: "TSTshiftLL",
17983 auxType: auxInt32,
17984 argLen: 2,
17985 asm: arm.ATST,
17986 reg: regInfo{
17987 inputs: []inputInfo{
17988 {0, 22527},
17989 {1, 22527},
17990 },
17991 },
17992 },
17993 {
17994 name: "TSTshiftRL",
17995 auxType: auxInt32,
17996 argLen: 2,
17997 asm: arm.ATST,
17998 reg: regInfo{
17999 inputs: []inputInfo{
18000 {0, 22527},
18001 {1, 22527},
18002 },
18003 },
18004 },
18005 {
18006 name: "TSTshiftRA",
18007 auxType: auxInt32,
18008 argLen: 2,
18009 asm: arm.ATST,
18010 reg: regInfo{
18011 inputs: []inputInfo{
18012 {0, 22527},
18013 {1, 22527},
18014 },
18015 },
18016 },
18017 {
18018 name: "TEQshiftLL",
18019 auxType: auxInt32,
18020 argLen: 2,
18021 asm: arm.ATEQ,
18022 reg: regInfo{
18023 inputs: []inputInfo{
18024 {0, 22527},
18025 {1, 22527},
18026 },
18027 },
18028 },
18029 {
18030 name: "TEQshiftRL",
18031 auxType: auxInt32,
18032 argLen: 2,
18033 asm: arm.ATEQ,
18034 reg: regInfo{
18035 inputs: []inputInfo{
18036 {0, 22527},
18037 {1, 22527},
18038 },
18039 },
18040 },
18041 {
18042 name: "TEQshiftRA",
18043 auxType: auxInt32,
18044 argLen: 2,
18045 asm: arm.ATEQ,
18046 reg: regInfo{
18047 inputs: []inputInfo{
18048 {0, 22527},
18049 {1, 22527},
18050 },
18051 },
18052 },
18053 {
18054 name: "CMPshiftLLreg",
18055 argLen: 3,
18056 asm: arm.ACMP,
18057 reg: regInfo{
18058 inputs: []inputInfo{
18059 {0, 21503},
18060 {1, 21503},
18061 {2, 21503},
18062 },
18063 },
18064 },
18065 {
18066 name: "CMPshiftRLreg",
18067 argLen: 3,
18068 asm: arm.ACMP,
18069 reg: regInfo{
18070 inputs: []inputInfo{
18071 {0, 21503},
18072 {1, 21503},
18073 {2, 21503},
18074 },
18075 },
18076 },
18077 {
18078 name: "CMPshiftRAreg",
18079 argLen: 3,
18080 asm: arm.ACMP,
18081 reg: regInfo{
18082 inputs: []inputInfo{
18083 {0, 21503},
18084 {1, 21503},
18085 {2, 21503},
18086 },
18087 },
18088 },
18089 {
18090 name: "CMNshiftLLreg",
18091 argLen: 3,
18092 asm: arm.ACMN,
18093 reg: regInfo{
18094 inputs: []inputInfo{
18095 {0, 21503},
18096 {1, 21503},
18097 {2, 21503},
18098 },
18099 },
18100 },
18101 {
18102 name: "CMNshiftRLreg",
18103 argLen: 3,
18104 asm: arm.ACMN,
18105 reg: regInfo{
18106 inputs: []inputInfo{
18107 {0, 21503},
18108 {1, 21503},
18109 {2, 21503},
18110 },
18111 },
18112 },
18113 {
18114 name: "CMNshiftRAreg",
18115 argLen: 3,
18116 asm: arm.ACMN,
18117 reg: regInfo{
18118 inputs: []inputInfo{
18119 {0, 21503},
18120 {1, 21503},
18121 {2, 21503},
18122 },
18123 },
18124 },
18125 {
18126 name: "TSTshiftLLreg",
18127 argLen: 3,
18128 asm: arm.ATST,
18129 reg: regInfo{
18130 inputs: []inputInfo{
18131 {0, 21503},
18132 {1, 21503},
18133 {2, 21503},
18134 },
18135 },
18136 },
18137 {
18138 name: "TSTshiftRLreg",
18139 argLen: 3,
18140 asm: arm.ATST,
18141 reg: regInfo{
18142 inputs: []inputInfo{
18143 {0, 21503},
18144 {1, 21503},
18145 {2, 21503},
18146 },
18147 },
18148 },
18149 {
18150 name: "TSTshiftRAreg",
18151 argLen: 3,
18152 asm: arm.ATST,
18153 reg: regInfo{
18154 inputs: []inputInfo{
18155 {0, 21503},
18156 {1, 21503},
18157 {2, 21503},
18158 },
18159 },
18160 },
18161 {
18162 name: "TEQshiftLLreg",
18163 argLen: 3,
18164 asm: arm.ATEQ,
18165 reg: regInfo{
18166 inputs: []inputInfo{
18167 {0, 21503},
18168 {1, 21503},
18169 {2, 21503},
18170 },
18171 },
18172 },
18173 {
18174 name: "TEQshiftRLreg",
18175 argLen: 3,
18176 asm: arm.ATEQ,
18177 reg: regInfo{
18178 inputs: []inputInfo{
18179 {0, 21503},
18180 {1, 21503},
18181 {2, 21503},
18182 },
18183 },
18184 },
18185 {
18186 name: "TEQshiftRAreg",
18187 argLen: 3,
18188 asm: arm.ATEQ,
18189 reg: regInfo{
18190 inputs: []inputInfo{
18191 {0, 21503},
18192 {1, 21503},
18193 {2, 21503},
18194 },
18195 },
18196 },
18197 {
18198 name: "CMPF0",
18199 argLen: 1,
18200 asm: arm.ACMPF,
18201 reg: regInfo{
18202 inputs: []inputInfo{
18203 {0, 4294901760},
18204 },
18205 },
18206 },
18207 {
18208 name: "CMPD0",
18209 argLen: 1,
18210 asm: arm.ACMPD,
18211 reg: regInfo{
18212 inputs: []inputInfo{
18213 {0, 4294901760},
18214 },
18215 },
18216 },
18217 {
18218 name: "MOVWconst",
18219 auxType: auxInt32,
18220 argLen: 0,
18221 rematerializeable: true,
18222 asm: arm.AMOVW,
18223 reg: regInfo{
18224 outputs: []outputInfo{
18225 {0, 21503},
18226 },
18227 },
18228 },
18229 {
18230 name: "MOVFconst",
18231 auxType: auxFloat64,
18232 argLen: 0,
18233 rematerializeable: true,
18234 asm: arm.AMOVF,
18235 reg: regInfo{
18236 outputs: []outputInfo{
18237 {0, 4294901760},
18238 },
18239 },
18240 },
18241 {
18242 name: "MOVDconst",
18243 auxType: auxFloat64,
18244 argLen: 0,
18245 rematerializeable: true,
18246 asm: arm.AMOVD,
18247 reg: regInfo{
18248 outputs: []outputInfo{
18249 {0, 4294901760},
18250 },
18251 },
18252 },
18253 {
18254 name: "MOVWaddr",
18255 auxType: auxSymOff,
18256 argLen: 1,
18257 rematerializeable: true,
18258 symEffect: SymAddr,
18259 asm: arm.AMOVW,
18260 reg: regInfo{
18261 inputs: []inputInfo{
18262 {0, 4294975488},
18263 },
18264 outputs: []outputInfo{
18265 {0, 21503},
18266 },
18267 },
18268 },
18269 {
18270 name: "MOVBload",
18271 auxType: auxSymOff,
18272 argLen: 2,
18273 faultOnNilArg0: true,
18274 symEffect: SymRead,
18275 asm: arm.AMOVB,
18276 reg: regInfo{
18277 inputs: []inputInfo{
18278 {0, 4294998015},
18279 },
18280 outputs: []outputInfo{
18281 {0, 21503},
18282 },
18283 },
18284 },
18285 {
18286 name: "MOVBUload",
18287 auxType: auxSymOff,
18288 argLen: 2,
18289 faultOnNilArg0: true,
18290 symEffect: SymRead,
18291 asm: arm.AMOVBU,
18292 reg: regInfo{
18293 inputs: []inputInfo{
18294 {0, 4294998015},
18295 },
18296 outputs: []outputInfo{
18297 {0, 21503},
18298 },
18299 },
18300 },
18301 {
18302 name: "MOVHload",
18303 auxType: auxSymOff,
18304 argLen: 2,
18305 faultOnNilArg0: true,
18306 symEffect: SymRead,
18307 asm: arm.AMOVH,
18308 reg: regInfo{
18309 inputs: []inputInfo{
18310 {0, 4294998015},
18311 },
18312 outputs: []outputInfo{
18313 {0, 21503},
18314 },
18315 },
18316 },
18317 {
18318 name: "MOVHUload",
18319 auxType: auxSymOff,
18320 argLen: 2,
18321 faultOnNilArg0: true,
18322 symEffect: SymRead,
18323 asm: arm.AMOVHU,
18324 reg: regInfo{
18325 inputs: []inputInfo{
18326 {0, 4294998015},
18327 },
18328 outputs: []outputInfo{
18329 {0, 21503},
18330 },
18331 },
18332 },
18333 {
18334 name: "MOVWload",
18335 auxType: auxSymOff,
18336 argLen: 2,
18337 faultOnNilArg0: true,
18338 symEffect: SymRead,
18339 asm: arm.AMOVW,
18340 reg: regInfo{
18341 inputs: []inputInfo{
18342 {0, 4294998015},
18343 },
18344 outputs: []outputInfo{
18345 {0, 21503},
18346 },
18347 },
18348 },
18349 {
18350 name: "MOVFload",
18351 auxType: auxSymOff,
18352 argLen: 2,
18353 faultOnNilArg0: true,
18354 symEffect: SymRead,
18355 asm: arm.AMOVF,
18356 reg: regInfo{
18357 inputs: []inputInfo{
18358 {0, 4294998015},
18359 },
18360 outputs: []outputInfo{
18361 {0, 4294901760},
18362 },
18363 },
18364 },
18365 {
18366 name: "MOVDload",
18367 auxType: auxSymOff,
18368 argLen: 2,
18369 faultOnNilArg0: true,
18370 symEffect: SymRead,
18371 asm: arm.AMOVD,
18372 reg: regInfo{
18373 inputs: []inputInfo{
18374 {0, 4294998015},
18375 },
18376 outputs: []outputInfo{
18377 {0, 4294901760},
18378 },
18379 },
18380 },
18381 {
18382 name: "MOVBstore",
18383 auxType: auxSymOff,
18384 argLen: 3,
18385 faultOnNilArg0: true,
18386 symEffect: SymWrite,
18387 asm: arm.AMOVB,
18388 reg: regInfo{
18389 inputs: []inputInfo{
18390 {1, 22527},
18391 {0, 4294998015},
18392 },
18393 },
18394 },
18395 {
18396 name: "MOVHstore",
18397 auxType: auxSymOff,
18398 argLen: 3,
18399 faultOnNilArg0: true,
18400 symEffect: SymWrite,
18401 asm: arm.AMOVH,
18402 reg: regInfo{
18403 inputs: []inputInfo{
18404 {1, 22527},
18405 {0, 4294998015},
18406 },
18407 },
18408 },
18409 {
18410 name: "MOVWstore",
18411 auxType: auxSymOff,
18412 argLen: 3,
18413 faultOnNilArg0: true,
18414 symEffect: SymWrite,
18415 asm: arm.AMOVW,
18416 reg: regInfo{
18417 inputs: []inputInfo{
18418 {1, 22527},
18419 {0, 4294998015},
18420 },
18421 },
18422 },
18423 {
18424 name: "MOVFstore",
18425 auxType: auxSymOff,
18426 argLen: 3,
18427 faultOnNilArg0: true,
18428 symEffect: SymWrite,
18429 asm: arm.AMOVF,
18430 reg: regInfo{
18431 inputs: []inputInfo{
18432 {0, 4294998015},
18433 {1, 4294901760},
18434 },
18435 },
18436 },
18437 {
18438 name: "MOVDstore",
18439 auxType: auxSymOff,
18440 argLen: 3,
18441 faultOnNilArg0: true,
18442 symEffect: SymWrite,
18443 asm: arm.AMOVD,
18444 reg: regInfo{
18445 inputs: []inputInfo{
18446 {0, 4294998015},
18447 {1, 4294901760},
18448 },
18449 },
18450 },
18451 {
18452 name: "MOVWloadidx",
18453 argLen: 3,
18454 asm: arm.AMOVW,
18455 reg: regInfo{
18456 inputs: []inputInfo{
18457 {1, 22527},
18458 {0, 4294998015},
18459 },
18460 outputs: []outputInfo{
18461 {0, 21503},
18462 },
18463 },
18464 },
18465 {
18466 name: "MOVWloadshiftLL",
18467 auxType: auxInt32,
18468 argLen: 3,
18469 asm: arm.AMOVW,
18470 reg: regInfo{
18471 inputs: []inputInfo{
18472 {1, 22527},
18473 {0, 4294998015},
18474 },
18475 outputs: []outputInfo{
18476 {0, 21503},
18477 },
18478 },
18479 },
18480 {
18481 name: "MOVWloadshiftRL",
18482 auxType: auxInt32,
18483 argLen: 3,
18484 asm: arm.AMOVW,
18485 reg: regInfo{
18486 inputs: []inputInfo{
18487 {1, 22527},
18488 {0, 4294998015},
18489 },
18490 outputs: []outputInfo{
18491 {0, 21503},
18492 },
18493 },
18494 },
18495 {
18496 name: "MOVWloadshiftRA",
18497 auxType: auxInt32,
18498 argLen: 3,
18499 asm: arm.AMOVW,
18500 reg: regInfo{
18501 inputs: []inputInfo{
18502 {1, 22527},
18503 {0, 4294998015},
18504 },
18505 outputs: []outputInfo{
18506 {0, 21503},
18507 },
18508 },
18509 },
18510 {
18511 name: "MOVBUloadidx",
18512 argLen: 3,
18513 asm: arm.AMOVBU,
18514 reg: regInfo{
18515 inputs: []inputInfo{
18516 {1, 22527},
18517 {0, 4294998015},
18518 },
18519 outputs: []outputInfo{
18520 {0, 21503},
18521 },
18522 },
18523 },
18524 {
18525 name: "MOVBloadidx",
18526 argLen: 3,
18527 asm: arm.AMOVB,
18528 reg: regInfo{
18529 inputs: []inputInfo{
18530 {1, 22527},
18531 {0, 4294998015},
18532 },
18533 outputs: []outputInfo{
18534 {0, 21503},
18535 },
18536 },
18537 },
18538 {
18539 name: "MOVHUloadidx",
18540 argLen: 3,
18541 asm: arm.AMOVHU,
18542 reg: regInfo{
18543 inputs: []inputInfo{
18544 {1, 22527},
18545 {0, 4294998015},
18546 },
18547 outputs: []outputInfo{
18548 {0, 21503},
18549 },
18550 },
18551 },
18552 {
18553 name: "MOVHloadidx",
18554 argLen: 3,
18555 asm: arm.AMOVH,
18556 reg: regInfo{
18557 inputs: []inputInfo{
18558 {1, 22527},
18559 {0, 4294998015},
18560 },
18561 outputs: []outputInfo{
18562 {0, 21503},
18563 },
18564 },
18565 },
18566 {
18567 name: "MOVWstoreidx",
18568 argLen: 4,
18569 asm: arm.AMOVW,
18570 reg: regInfo{
18571 inputs: []inputInfo{
18572 {1, 22527},
18573 {2, 22527},
18574 {0, 4294998015},
18575 },
18576 },
18577 },
18578 {
18579 name: "MOVWstoreshiftLL",
18580 auxType: auxInt32,
18581 argLen: 4,
18582 asm: arm.AMOVW,
18583 reg: regInfo{
18584 inputs: []inputInfo{
18585 {1, 22527},
18586 {2, 22527},
18587 {0, 4294998015},
18588 },
18589 },
18590 },
18591 {
18592 name: "MOVWstoreshiftRL",
18593 auxType: auxInt32,
18594 argLen: 4,
18595 asm: arm.AMOVW,
18596 reg: regInfo{
18597 inputs: []inputInfo{
18598 {1, 22527},
18599 {2, 22527},
18600 {0, 4294998015},
18601 },
18602 },
18603 },
18604 {
18605 name: "MOVWstoreshiftRA",
18606 auxType: auxInt32,
18607 argLen: 4,
18608 asm: arm.AMOVW,
18609 reg: regInfo{
18610 inputs: []inputInfo{
18611 {1, 22527},
18612 {2, 22527},
18613 {0, 4294998015},
18614 },
18615 },
18616 },
18617 {
18618 name: "MOVBstoreidx",
18619 argLen: 4,
18620 asm: arm.AMOVB,
18621 reg: regInfo{
18622 inputs: []inputInfo{
18623 {1, 22527},
18624 {2, 22527},
18625 {0, 4294998015},
18626 },
18627 },
18628 },
18629 {
18630 name: "MOVHstoreidx",
18631 argLen: 4,
18632 asm: arm.AMOVH,
18633 reg: regInfo{
18634 inputs: []inputInfo{
18635 {1, 22527},
18636 {2, 22527},
18637 {0, 4294998015},
18638 },
18639 },
18640 },
18641 {
18642 name: "MOVBreg",
18643 argLen: 1,
18644 asm: arm.AMOVBS,
18645 reg: regInfo{
18646 inputs: []inputInfo{
18647 {0, 22527},
18648 },
18649 outputs: []outputInfo{
18650 {0, 21503},
18651 },
18652 },
18653 },
18654 {
18655 name: "MOVBUreg",
18656 argLen: 1,
18657 asm: arm.AMOVBU,
18658 reg: regInfo{
18659 inputs: []inputInfo{
18660 {0, 22527},
18661 },
18662 outputs: []outputInfo{
18663 {0, 21503},
18664 },
18665 },
18666 },
18667 {
18668 name: "MOVHreg",
18669 argLen: 1,
18670 asm: arm.AMOVHS,
18671 reg: regInfo{
18672 inputs: []inputInfo{
18673 {0, 22527},
18674 },
18675 outputs: []outputInfo{
18676 {0, 21503},
18677 },
18678 },
18679 },
18680 {
18681 name: "MOVHUreg",
18682 argLen: 1,
18683 asm: arm.AMOVHU,
18684 reg: regInfo{
18685 inputs: []inputInfo{
18686 {0, 22527},
18687 },
18688 outputs: []outputInfo{
18689 {0, 21503},
18690 },
18691 },
18692 },
18693 {
18694 name: "MOVWreg",
18695 argLen: 1,
18696 asm: arm.AMOVW,
18697 reg: regInfo{
18698 inputs: []inputInfo{
18699 {0, 22527},
18700 },
18701 outputs: []outputInfo{
18702 {0, 21503},
18703 },
18704 },
18705 },
18706 {
18707 name: "MOVWnop",
18708 argLen: 1,
18709 resultInArg0: true,
18710 reg: regInfo{
18711 inputs: []inputInfo{
18712 {0, 21503},
18713 },
18714 outputs: []outputInfo{
18715 {0, 21503},
18716 },
18717 },
18718 },
18719 {
18720 name: "MOVWF",
18721 argLen: 1,
18722 asm: arm.AMOVWF,
18723 reg: regInfo{
18724 inputs: []inputInfo{
18725 {0, 21503},
18726 },
18727 clobbers: 2147483648,
18728 outputs: []outputInfo{
18729 {0, 4294901760},
18730 },
18731 },
18732 },
18733 {
18734 name: "MOVWD",
18735 argLen: 1,
18736 asm: arm.AMOVWD,
18737 reg: regInfo{
18738 inputs: []inputInfo{
18739 {0, 21503},
18740 },
18741 clobbers: 2147483648,
18742 outputs: []outputInfo{
18743 {0, 4294901760},
18744 },
18745 },
18746 },
18747 {
18748 name: "MOVWUF",
18749 argLen: 1,
18750 asm: arm.AMOVWF,
18751 reg: regInfo{
18752 inputs: []inputInfo{
18753 {0, 21503},
18754 },
18755 clobbers: 2147483648,
18756 outputs: []outputInfo{
18757 {0, 4294901760},
18758 },
18759 },
18760 },
18761 {
18762 name: "MOVWUD",
18763 argLen: 1,
18764 asm: arm.AMOVWD,
18765 reg: regInfo{
18766 inputs: []inputInfo{
18767 {0, 21503},
18768 },
18769 clobbers: 2147483648,
18770 outputs: []outputInfo{
18771 {0, 4294901760},
18772 },
18773 },
18774 },
18775 {
18776 name: "MOVFW",
18777 argLen: 1,
18778 asm: arm.AMOVFW,
18779 reg: regInfo{
18780 inputs: []inputInfo{
18781 {0, 4294901760},
18782 },
18783 clobbers: 2147483648,
18784 outputs: []outputInfo{
18785 {0, 21503},
18786 },
18787 },
18788 },
18789 {
18790 name: "MOVDW",
18791 argLen: 1,
18792 asm: arm.AMOVDW,
18793 reg: regInfo{
18794 inputs: []inputInfo{
18795 {0, 4294901760},
18796 },
18797 clobbers: 2147483648,
18798 outputs: []outputInfo{
18799 {0, 21503},
18800 },
18801 },
18802 },
18803 {
18804 name: "MOVFWU",
18805 argLen: 1,
18806 asm: arm.AMOVFW,
18807 reg: regInfo{
18808 inputs: []inputInfo{
18809 {0, 4294901760},
18810 },
18811 clobbers: 2147483648,
18812 outputs: []outputInfo{
18813 {0, 21503},
18814 },
18815 },
18816 },
18817 {
18818 name: "MOVDWU",
18819 argLen: 1,
18820 asm: arm.AMOVDW,
18821 reg: regInfo{
18822 inputs: []inputInfo{
18823 {0, 4294901760},
18824 },
18825 clobbers: 2147483648,
18826 outputs: []outputInfo{
18827 {0, 21503},
18828 },
18829 },
18830 },
18831 {
18832 name: "MOVFD",
18833 argLen: 1,
18834 asm: arm.AMOVFD,
18835 reg: regInfo{
18836 inputs: []inputInfo{
18837 {0, 4294901760},
18838 },
18839 outputs: []outputInfo{
18840 {0, 4294901760},
18841 },
18842 },
18843 },
18844 {
18845 name: "MOVDF",
18846 argLen: 1,
18847 asm: arm.AMOVDF,
18848 reg: regInfo{
18849 inputs: []inputInfo{
18850 {0, 4294901760},
18851 },
18852 outputs: []outputInfo{
18853 {0, 4294901760},
18854 },
18855 },
18856 },
18857 {
18858 name: "CMOVWHSconst",
18859 auxType: auxInt32,
18860 argLen: 2,
18861 resultInArg0: true,
18862 asm: arm.AMOVW,
18863 reg: regInfo{
18864 inputs: []inputInfo{
18865 {0, 21503},
18866 },
18867 outputs: []outputInfo{
18868 {0, 21503},
18869 },
18870 },
18871 },
18872 {
18873 name: "CMOVWLSconst",
18874 auxType: auxInt32,
18875 argLen: 2,
18876 resultInArg0: true,
18877 asm: arm.AMOVW,
18878 reg: regInfo{
18879 inputs: []inputInfo{
18880 {0, 21503},
18881 },
18882 outputs: []outputInfo{
18883 {0, 21503},
18884 },
18885 },
18886 },
18887 {
18888 name: "SRAcond",
18889 argLen: 3,
18890 asm: arm.ASRA,
18891 reg: regInfo{
18892 inputs: []inputInfo{
18893 {0, 21503},
18894 {1, 21503},
18895 },
18896 outputs: []outputInfo{
18897 {0, 21503},
18898 },
18899 },
18900 },
18901 {
18902 name: "CALLstatic",
18903 auxType: auxCallOff,
18904 argLen: 1,
18905 clobberFlags: true,
18906 call: true,
18907 reg: regInfo{
18908 clobbers: 4294924287,
18909 },
18910 },
18911 {
18912 name: "CALLtail",
18913 auxType: auxCallOff,
18914 argLen: 1,
18915 clobberFlags: true,
18916 call: true,
18917 tailCall: true,
18918 reg: regInfo{
18919 clobbers: 4294924287,
18920 },
18921 },
18922 {
18923 name: "CALLclosure",
18924 auxType: auxCallOff,
18925 argLen: 3,
18926 clobberFlags: true,
18927 call: true,
18928 reg: regInfo{
18929 inputs: []inputInfo{
18930 {1, 128},
18931 {0, 29695},
18932 },
18933 clobbers: 4294924287,
18934 },
18935 },
18936 {
18937 name: "CALLinter",
18938 auxType: auxCallOff,
18939 argLen: 2,
18940 clobberFlags: true,
18941 call: true,
18942 reg: regInfo{
18943 inputs: []inputInfo{
18944 {0, 21503},
18945 },
18946 clobbers: 4294924287,
18947 },
18948 },
18949 {
18950 name: "LoweredNilCheck",
18951 argLen: 2,
18952 nilCheck: true,
18953 faultOnNilArg0: true,
18954 reg: regInfo{
18955 inputs: []inputInfo{
18956 {0, 22527},
18957 },
18958 },
18959 },
18960 {
18961 name: "Equal",
18962 argLen: 1,
18963 reg: regInfo{
18964 outputs: []outputInfo{
18965 {0, 21503},
18966 },
18967 },
18968 },
18969 {
18970 name: "NotEqual",
18971 argLen: 1,
18972 reg: regInfo{
18973 outputs: []outputInfo{
18974 {0, 21503},
18975 },
18976 },
18977 },
18978 {
18979 name: "LessThan",
18980 argLen: 1,
18981 reg: regInfo{
18982 outputs: []outputInfo{
18983 {0, 21503},
18984 },
18985 },
18986 },
18987 {
18988 name: "LessEqual",
18989 argLen: 1,
18990 reg: regInfo{
18991 outputs: []outputInfo{
18992 {0, 21503},
18993 },
18994 },
18995 },
18996 {
18997 name: "GreaterThan",
18998 argLen: 1,
18999 reg: regInfo{
19000 outputs: []outputInfo{
19001 {0, 21503},
19002 },
19003 },
19004 },
19005 {
19006 name: "GreaterEqual",
19007 argLen: 1,
19008 reg: regInfo{
19009 outputs: []outputInfo{
19010 {0, 21503},
19011 },
19012 },
19013 },
19014 {
19015 name: "LessThanU",
19016 argLen: 1,
19017 reg: regInfo{
19018 outputs: []outputInfo{
19019 {0, 21503},
19020 },
19021 },
19022 },
19023 {
19024 name: "LessEqualU",
19025 argLen: 1,
19026 reg: regInfo{
19027 outputs: []outputInfo{
19028 {0, 21503},
19029 },
19030 },
19031 },
19032 {
19033 name: "GreaterThanU",
19034 argLen: 1,
19035 reg: regInfo{
19036 outputs: []outputInfo{
19037 {0, 21503},
19038 },
19039 },
19040 },
19041 {
19042 name: "GreaterEqualU",
19043 argLen: 1,
19044 reg: regInfo{
19045 outputs: []outputInfo{
19046 {0, 21503},
19047 },
19048 },
19049 },
19050 {
19051 name: "DUFFZERO",
19052 auxType: auxInt64,
19053 argLen: 3,
19054 faultOnNilArg0: true,
19055 reg: regInfo{
19056 inputs: []inputInfo{
19057 {0, 2},
19058 {1, 1},
19059 },
19060 clobbers: 20482,
19061 },
19062 },
19063 {
19064 name: "DUFFCOPY",
19065 auxType: auxInt64,
19066 argLen: 3,
19067 faultOnNilArg0: true,
19068 faultOnNilArg1: true,
19069 reg: regInfo{
19070 inputs: []inputInfo{
19071 {0, 4},
19072 {1, 2},
19073 },
19074 clobbers: 20487,
19075 },
19076 },
19077 {
19078 name: "LoweredZero",
19079 auxType: auxInt64,
19080 argLen: 4,
19081 clobberFlags: true,
19082 faultOnNilArg0: true,
19083 reg: regInfo{
19084 inputs: []inputInfo{
19085 {0, 2},
19086 {1, 21503},
19087 {2, 21503},
19088 },
19089 clobbers: 2,
19090 },
19091 },
19092 {
19093 name: "LoweredMove",
19094 auxType: auxInt64,
19095 argLen: 4,
19096 clobberFlags: true,
19097 faultOnNilArg0: true,
19098 faultOnNilArg1: true,
19099 reg: regInfo{
19100 inputs: []inputInfo{
19101 {0, 4},
19102 {1, 2},
19103 {2, 21503},
19104 },
19105 clobbers: 6,
19106 },
19107 },
19108 {
19109 name: "LoweredGetClosurePtr",
19110 argLen: 0,
19111 zeroWidth: true,
19112 reg: regInfo{
19113 outputs: []outputInfo{
19114 {0, 128},
19115 },
19116 },
19117 },
19118 {
19119 name: "LoweredGetCallerSP",
19120 argLen: 1,
19121 rematerializeable: true,
19122 reg: regInfo{
19123 outputs: []outputInfo{
19124 {0, 21503},
19125 },
19126 },
19127 },
19128 {
19129 name: "LoweredGetCallerPC",
19130 argLen: 0,
19131 rematerializeable: true,
19132 reg: regInfo{
19133 outputs: []outputInfo{
19134 {0, 21503},
19135 },
19136 },
19137 },
19138 {
19139 name: "LoweredPanicBoundsRR",
19140 auxType: auxInt64,
19141 argLen: 3,
19142 call: true,
19143 reg: regInfo{
19144 inputs: []inputInfo{
19145 {0, 5119},
19146 {1, 5119},
19147 },
19148 },
19149 },
19150 {
19151 name: "LoweredPanicBoundsRC",
19152 auxType: auxPanicBoundsC,
19153 argLen: 2,
19154 call: true,
19155 reg: regInfo{
19156 inputs: []inputInfo{
19157 {0, 5119},
19158 },
19159 },
19160 },
19161 {
19162 name: "LoweredPanicBoundsCR",
19163 auxType: auxPanicBoundsC,
19164 argLen: 2,
19165 call: true,
19166 reg: regInfo{
19167 inputs: []inputInfo{
19168 {0, 5119},
19169 },
19170 },
19171 },
19172 {
19173 name: "LoweredPanicBoundsCC",
19174 auxType: auxPanicBoundsCC,
19175 argLen: 1,
19176 call: true,
19177 reg: regInfo{},
19178 },
19179 {
19180 name: "LoweredPanicExtendRR",
19181 auxType: auxInt64,
19182 argLen: 4,
19183 call: true,
19184 reg: regInfo{
19185 inputs: []inputInfo{
19186 {0, 15},
19187 {1, 15},
19188 {2, 21503},
19189 },
19190 },
19191 },
19192 {
19193 name: "LoweredPanicExtendRC",
19194 auxType: auxPanicBoundsC,
19195 argLen: 3,
19196 call: true,
19197 reg: regInfo{
19198 inputs: []inputInfo{
19199 {0, 15},
19200 {1, 15},
19201 },
19202 },
19203 },
19204 {
19205 name: "FlagConstant",
19206 auxType: auxFlagConstant,
19207 argLen: 0,
19208 reg: regInfo{},
19209 },
19210 {
19211 name: "InvertFlags",
19212 argLen: 1,
19213 reg: regInfo{},
19214 },
19215 {
19216 name: "LoweredWB",
19217 auxType: auxInt64,
19218 argLen: 1,
19219 clobberFlags: true,
19220 reg: regInfo{
19221 clobbers: 4294922240,
19222 outputs: []outputInfo{
19223 {0, 256},
19224 },
19225 },
19226 },
19227
19228 {
19229 name: "ADCSflags",
19230 argLen: 3,
19231 commutative: true,
19232 asm: arm64.AADCS,
19233 reg: regInfo{
19234 inputs: []inputInfo{
19235 {0, 335544319},
19236 {1, 335544319},
19237 },
19238 outputs: []outputInfo{
19239 {1, 0},
19240 {0, 335544319},
19241 },
19242 },
19243 },
19244 {
19245 name: "ADCzerocarry",
19246 argLen: 1,
19247 asm: arm64.AADC,
19248 reg: regInfo{
19249 outputs: []outputInfo{
19250 {0, 335544319},
19251 },
19252 },
19253 },
19254 {
19255 name: "ADD",
19256 argLen: 2,
19257 commutative: true,
19258 asm: arm64.AADD,
19259 reg: regInfo{
19260 inputs: []inputInfo{
19261 {0, 402653183},
19262 {1, 402653183},
19263 },
19264 outputs: []outputInfo{
19265 {0, 335544319},
19266 },
19267 },
19268 },
19269 {
19270 name: "ADDconst",
19271 auxType: auxInt64,
19272 argLen: 1,
19273 asm: arm64.AADD,
19274 reg: regInfo{
19275 inputs: []inputInfo{
19276 {0, 1476395007},
19277 },
19278 outputs: []outputInfo{
19279 {0, 335544319},
19280 },
19281 },
19282 },
19283 {
19284 name: "ADDSconstflags",
19285 auxType: auxInt64,
19286 argLen: 1,
19287 asm: arm64.AADDS,
19288 reg: regInfo{
19289 inputs: []inputInfo{
19290 {0, 402653183},
19291 },
19292 outputs: []outputInfo{
19293 {1, 0},
19294 {0, 335544319},
19295 },
19296 },
19297 },
19298 {
19299 name: "ADDSflags",
19300 argLen: 2,
19301 commutative: true,
19302 asm: arm64.AADDS,
19303 reg: regInfo{
19304 inputs: []inputInfo{
19305 {0, 335544319},
19306 {1, 335544319},
19307 },
19308 outputs: []outputInfo{
19309 {1, 0},
19310 {0, 335544319},
19311 },
19312 },
19313 },
19314 {
19315 name: "SUB",
19316 argLen: 2,
19317 asm: arm64.ASUB,
19318 reg: regInfo{
19319 inputs: []inputInfo{
19320 {0, 402653183},
19321 {1, 402653183},
19322 },
19323 outputs: []outputInfo{
19324 {0, 335544319},
19325 },
19326 },
19327 },
19328 {
19329 name: "SUBconst",
19330 auxType: auxInt64,
19331 argLen: 1,
19332 asm: arm64.ASUB,
19333 reg: regInfo{
19334 inputs: []inputInfo{
19335 {0, 402653183},
19336 },
19337 outputs: []outputInfo{
19338 {0, 335544319},
19339 },
19340 },
19341 },
19342 {
19343 name: "SBCSflags",
19344 argLen: 3,
19345 asm: arm64.ASBCS,
19346 reg: regInfo{
19347 inputs: []inputInfo{
19348 {0, 335544319},
19349 {1, 335544319},
19350 },
19351 outputs: []outputInfo{
19352 {1, 0},
19353 {0, 335544319},
19354 },
19355 },
19356 },
19357 {
19358 name: "SUBSflags",
19359 argLen: 2,
19360 asm: arm64.ASUBS,
19361 reg: regInfo{
19362 inputs: []inputInfo{
19363 {0, 335544319},
19364 {1, 335544319},
19365 },
19366 outputs: []outputInfo{
19367 {1, 0},
19368 {0, 335544319},
19369 },
19370 },
19371 },
19372 {
19373 name: "MUL",
19374 argLen: 2,
19375 commutative: true,
19376 asm: arm64.AMUL,
19377 reg: regInfo{
19378 inputs: []inputInfo{
19379 {0, 402653183},
19380 {1, 402653183},
19381 },
19382 outputs: []outputInfo{
19383 {0, 335544319},
19384 },
19385 },
19386 },
19387 {
19388 name: "MULW",
19389 argLen: 2,
19390 commutative: true,
19391 asm: arm64.AMULW,
19392 reg: regInfo{
19393 inputs: []inputInfo{
19394 {0, 402653183},
19395 {1, 402653183},
19396 },
19397 outputs: []outputInfo{
19398 {0, 335544319},
19399 },
19400 },
19401 },
19402 {
19403 name: "MNEG",
19404 argLen: 2,
19405 commutative: true,
19406 asm: arm64.AMNEG,
19407 reg: regInfo{
19408 inputs: []inputInfo{
19409 {0, 402653183},
19410 {1, 402653183},
19411 },
19412 outputs: []outputInfo{
19413 {0, 335544319},
19414 },
19415 },
19416 },
19417 {
19418 name: "MNEGW",
19419 argLen: 2,
19420 commutative: true,
19421 asm: arm64.AMNEGW,
19422 reg: regInfo{
19423 inputs: []inputInfo{
19424 {0, 402653183},
19425 {1, 402653183},
19426 },
19427 outputs: []outputInfo{
19428 {0, 335544319},
19429 },
19430 },
19431 },
19432 {
19433 name: "MULH",
19434 argLen: 2,
19435 commutative: true,
19436 asm: arm64.ASMULH,
19437 reg: regInfo{
19438 inputs: []inputInfo{
19439 {0, 402653183},
19440 {1, 402653183},
19441 },
19442 outputs: []outputInfo{
19443 {0, 335544319},
19444 },
19445 },
19446 },
19447 {
19448 name: "UMULH",
19449 argLen: 2,
19450 commutative: true,
19451 asm: arm64.AUMULH,
19452 reg: regInfo{
19453 inputs: []inputInfo{
19454 {0, 402653183},
19455 {1, 402653183},
19456 },
19457 outputs: []outputInfo{
19458 {0, 335544319},
19459 },
19460 },
19461 },
19462 {
19463 name: "MULL",
19464 argLen: 2,
19465 commutative: true,
19466 asm: arm64.ASMULL,
19467 reg: regInfo{
19468 inputs: []inputInfo{
19469 {0, 402653183},
19470 {1, 402653183},
19471 },
19472 outputs: []outputInfo{
19473 {0, 335544319},
19474 },
19475 },
19476 },
19477 {
19478 name: "UMULL",
19479 argLen: 2,
19480 commutative: true,
19481 asm: arm64.AUMULL,
19482 reg: regInfo{
19483 inputs: []inputInfo{
19484 {0, 402653183},
19485 {1, 402653183},
19486 },
19487 outputs: []outputInfo{
19488 {0, 335544319},
19489 },
19490 },
19491 },
19492 {
19493 name: "DIV",
19494 argLen: 2,
19495 asm: arm64.ASDIV,
19496 reg: regInfo{
19497 inputs: []inputInfo{
19498 {0, 402653183},
19499 {1, 402653183},
19500 },
19501 outputs: []outputInfo{
19502 {0, 335544319},
19503 },
19504 },
19505 },
19506 {
19507 name: "UDIV",
19508 argLen: 2,
19509 asm: arm64.AUDIV,
19510 reg: regInfo{
19511 inputs: []inputInfo{
19512 {0, 402653183},
19513 {1, 402653183},
19514 },
19515 outputs: []outputInfo{
19516 {0, 335544319},
19517 },
19518 },
19519 },
19520 {
19521 name: "DIVW",
19522 argLen: 2,
19523 asm: arm64.ASDIVW,
19524 reg: regInfo{
19525 inputs: []inputInfo{
19526 {0, 402653183},
19527 {1, 402653183},
19528 },
19529 outputs: []outputInfo{
19530 {0, 335544319},
19531 },
19532 },
19533 },
19534 {
19535 name: "UDIVW",
19536 argLen: 2,
19537 asm: arm64.AUDIVW,
19538 reg: regInfo{
19539 inputs: []inputInfo{
19540 {0, 402653183},
19541 {1, 402653183},
19542 },
19543 outputs: []outputInfo{
19544 {0, 335544319},
19545 },
19546 },
19547 },
19548 {
19549 name: "MOD",
19550 argLen: 2,
19551 asm: arm64.AREM,
19552 reg: regInfo{
19553 inputs: []inputInfo{
19554 {0, 402653183},
19555 {1, 402653183},
19556 },
19557 outputs: []outputInfo{
19558 {0, 335544319},
19559 },
19560 },
19561 },
19562 {
19563 name: "UMOD",
19564 argLen: 2,
19565 asm: arm64.AUREM,
19566 reg: regInfo{
19567 inputs: []inputInfo{
19568 {0, 402653183},
19569 {1, 402653183},
19570 },
19571 outputs: []outputInfo{
19572 {0, 335544319},
19573 },
19574 },
19575 },
19576 {
19577 name: "MODW",
19578 argLen: 2,
19579 asm: arm64.AREMW,
19580 reg: regInfo{
19581 inputs: []inputInfo{
19582 {0, 402653183},
19583 {1, 402653183},
19584 },
19585 outputs: []outputInfo{
19586 {0, 335544319},
19587 },
19588 },
19589 },
19590 {
19591 name: "UMODW",
19592 argLen: 2,
19593 asm: arm64.AUREMW,
19594 reg: regInfo{
19595 inputs: []inputInfo{
19596 {0, 402653183},
19597 {1, 402653183},
19598 },
19599 outputs: []outputInfo{
19600 {0, 335544319},
19601 },
19602 },
19603 },
19604 {
19605 name: "FADDS",
19606 argLen: 2,
19607 commutative: true,
19608 asm: arm64.AFADDS,
19609 reg: regInfo{
19610 inputs: []inputInfo{
19611 {0, 9223372034707292160},
19612 {1, 9223372034707292160},
19613 },
19614 outputs: []outputInfo{
19615 {0, 9223372034707292160},
19616 },
19617 },
19618 },
19619 {
19620 name: "FADDD",
19621 argLen: 2,
19622 commutative: true,
19623 asm: arm64.AFADDD,
19624 reg: regInfo{
19625 inputs: []inputInfo{
19626 {0, 9223372034707292160},
19627 {1, 9223372034707292160},
19628 },
19629 outputs: []outputInfo{
19630 {0, 9223372034707292160},
19631 },
19632 },
19633 },
19634 {
19635 name: "FSUBS",
19636 argLen: 2,
19637 asm: arm64.AFSUBS,
19638 reg: regInfo{
19639 inputs: []inputInfo{
19640 {0, 9223372034707292160},
19641 {1, 9223372034707292160},
19642 },
19643 outputs: []outputInfo{
19644 {0, 9223372034707292160},
19645 },
19646 },
19647 },
19648 {
19649 name: "FSUBD",
19650 argLen: 2,
19651 asm: arm64.AFSUBD,
19652 reg: regInfo{
19653 inputs: []inputInfo{
19654 {0, 9223372034707292160},
19655 {1, 9223372034707292160},
19656 },
19657 outputs: []outputInfo{
19658 {0, 9223372034707292160},
19659 },
19660 },
19661 },
19662 {
19663 name: "FMULS",
19664 argLen: 2,
19665 commutative: true,
19666 asm: arm64.AFMULS,
19667 reg: regInfo{
19668 inputs: []inputInfo{
19669 {0, 9223372034707292160},
19670 {1, 9223372034707292160},
19671 },
19672 outputs: []outputInfo{
19673 {0, 9223372034707292160},
19674 },
19675 },
19676 },
19677 {
19678 name: "FMULD",
19679 argLen: 2,
19680 commutative: true,
19681 asm: arm64.AFMULD,
19682 reg: regInfo{
19683 inputs: []inputInfo{
19684 {0, 9223372034707292160},
19685 {1, 9223372034707292160},
19686 },
19687 outputs: []outputInfo{
19688 {0, 9223372034707292160},
19689 },
19690 },
19691 },
19692 {
19693 name: "FNMULS",
19694 argLen: 2,
19695 commutative: true,
19696 asm: arm64.AFNMULS,
19697 reg: regInfo{
19698 inputs: []inputInfo{
19699 {0, 9223372034707292160},
19700 {1, 9223372034707292160},
19701 },
19702 outputs: []outputInfo{
19703 {0, 9223372034707292160},
19704 },
19705 },
19706 },
19707 {
19708 name: "FNMULD",
19709 argLen: 2,
19710 commutative: true,
19711 asm: arm64.AFNMULD,
19712 reg: regInfo{
19713 inputs: []inputInfo{
19714 {0, 9223372034707292160},
19715 {1, 9223372034707292160},
19716 },
19717 outputs: []outputInfo{
19718 {0, 9223372034707292160},
19719 },
19720 },
19721 },
19722 {
19723 name: "FDIVS",
19724 argLen: 2,
19725 asm: arm64.AFDIVS,
19726 reg: regInfo{
19727 inputs: []inputInfo{
19728 {0, 9223372034707292160},
19729 {1, 9223372034707292160},
19730 },
19731 outputs: []outputInfo{
19732 {0, 9223372034707292160},
19733 },
19734 },
19735 },
19736 {
19737 name: "FDIVD",
19738 argLen: 2,
19739 asm: arm64.AFDIVD,
19740 reg: regInfo{
19741 inputs: []inputInfo{
19742 {0, 9223372034707292160},
19743 {1, 9223372034707292160},
19744 },
19745 outputs: []outputInfo{
19746 {0, 9223372034707292160},
19747 },
19748 },
19749 },
19750 {
19751 name: "AND",
19752 argLen: 2,
19753 commutative: true,
19754 asm: arm64.AAND,
19755 reg: regInfo{
19756 inputs: []inputInfo{
19757 {0, 402653183},
19758 {1, 402653183},
19759 },
19760 outputs: []outputInfo{
19761 {0, 335544319},
19762 },
19763 },
19764 },
19765 {
19766 name: "ANDconst",
19767 auxType: auxInt64,
19768 argLen: 1,
19769 asm: arm64.AAND,
19770 reg: regInfo{
19771 inputs: []inputInfo{
19772 {0, 402653183},
19773 },
19774 outputs: []outputInfo{
19775 {0, 335544319},
19776 },
19777 },
19778 },
19779 {
19780 name: "OR",
19781 argLen: 2,
19782 commutative: true,
19783 asm: arm64.AORR,
19784 reg: regInfo{
19785 inputs: []inputInfo{
19786 {0, 402653183},
19787 {1, 402653183},
19788 },
19789 outputs: []outputInfo{
19790 {0, 335544319},
19791 },
19792 },
19793 },
19794 {
19795 name: "ORconst",
19796 auxType: auxInt64,
19797 argLen: 1,
19798 asm: arm64.AORR,
19799 reg: regInfo{
19800 inputs: []inputInfo{
19801 {0, 402653183},
19802 },
19803 outputs: []outputInfo{
19804 {0, 335544319},
19805 },
19806 },
19807 },
19808 {
19809 name: "XOR",
19810 argLen: 2,
19811 commutative: true,
19812 asm: arm64.AEOR,
19813 reg: regInfo{
19814 inputs: []inputInfo{
19815 {0, 402653183},
19816 {1, 402653183},
19817 },
19818 outputs: []outputInfo{
19819 {0, 335544319},
19820 },
19821 },
19822 },
19823 {
19824 name: "XORconst",
19825 auxType: auxInt64,
19826 argLen: 1,
19827 asm: arm64.AEOR,
19828 reg: regInfo{
19829 inputs: []inputInfo{
19830 {0, 402653183},
19831 },
19832 outputs: []outputInfo{
19833 {0, 335544319},
19834 },
19835 },
19836 },
19837 {
19838 name: "BIC",
19839 argLen: 2,
19840 asm: arm64.ABIC,
19841 reg: regInfo{
19842 inputs: []inputInfo{
19843 {0, 402653183},
19844 {1, 402653183},
19845 },
19846 outputs: []outputInfo{
19847 {0, 335544319},
19848 },
19849 },
19850 },
19851 {
19852 name: "EON",
19853 argLen: 2,
19854 asm: arm64.AEON,
19855 reg: regInfo{
19856 inputs: []inputInfo{
19857 {0, 402653183},
19858 {1, 402653183},
19859 },
19860 outputs: []outputInfo{
19861 {0, 335544319},
19862 },
19863 },
19864 },
19865 {
19866 name: "ORN",
19867 argLen: 2,
19868 asm: arm64.AORN,
19869 reg: regInfo{
19870 inputs: []inputInfo{
19871 {0, 402653183},
19872 {1, 402653183},
19873 },
19874 outputs: []outputInfo{
19875 {0, 335544319},
19876 },
19877 },
19878 },
19879 {
19880 name: "MVN",
19881 argLen: 1,
19882 asm: arm64.AMVN,
19883 reg: regInfo{
19884 inputs: []inputInfo{
19885 {0, 402653183},
19886 },
19887 outputs: []outputInfo{
19888 {0, 335544319},
19889 },
19890 },
19891 },
19892 {
19893 name: "NEG",
19894 argLen: 1,
19895 asm: arm64.ANEG,
19896 reg: regInfo{
19897 inputs: []inputInfo{
19898 {0, 402653183},
19899 },
19900 outputs: []outputInfo{
19901 {0, 335544319},
19902 },
19903 },
19904 },
19905 {
19906 name: "NEGSflags",
19907 argLen: 1,
19908 asm: arm64.ANEGS,
19909 reg: regInfo{
19910 inputs: []inputInfo{
19911 {0, 402653183},
19912 },
19913 outputs: []outputInfo{
19914 {1, 0},
19915 {0, 335544319},
19916 },
19917 },
19918 },
19919 {
19920 name: "NGCzerocarry",
19921 argLen: 1,
19922 asm: arm64.ANGC,
19923 reg: regInfo{
19924 outputs: []outputInfo{
19925 {0, 335544319},
19926 },
19927 },
19928 },
19929 {
19930 name: "FABSD",
19931 argLen: 1,
19932 asm: arm64.AFABSD,
19933 reg: regInfo{
19934 inputs: []inputInfo{
19935 {0, 9223372034707292160},
19936 },
19937 outputs: []outputInfo{
19938 {0, 9223372034707292160},
19939 },
19940 },
19941 },
19942 {
19943 name: "FNEGS",
19944 argLen: 1,
19945 asm: arm64.AFNEGS,
19946 reg: regInfo{
19947 inputs: []inputInfo{
19948 {0, 9223372034707292160},
19949 },
19950 outputs: []outputInfo{
19951 {0, 9223372034707292160},
19952 },
19953 },
19954 },
19955 {
19956 name: "FNEGD",
19957 argLen: 1,
19958 asm: arm64.AFNEGD,
19959 reg: regInfo{
19960 inputs: []inputInfo{
19961 {0, 9223372034707292160},
19962 },
19963 outputs: []outputInfo{
19964 {0, 9223372034707292160},
19965 },
19966 },
19967 },
19968 {
19969 name: "FSQRTD",
19970 argLen: 1,
19971 asm: arm64.AFSQRTD,
19972 reg: regInfo{
19973 inputs: []inputInfo{
19974 {0, 9223372034707292160},
19975 },
19976 outputs: []outputInfo{
19977 {0, 9223372034707292160},
19978 },
19979 },
19980 },
19981 {
19982 name: "FSQRTS",
19983 argLen: 1,
19984 asm: arm64.AFSQRTS,
19985 reg: regInfo{
19986 inputs: []inputInfo{
19987 {0, 9223372034707292160},
19988 },
19989 outputs: []outputInfo{
19990 {0, 9223372034707292160},
19991 },
19992 },
19993 },
19994 {
19995 name: "FMIND",
19996 argLen: 2,
19997 asm: arm64.AFMIND,
19998 reg: regInfo{
19999 inputs: []inputInfo{
20000 {0, 9223372034707292160},
20001 {1, 9223372034707292160},
20002 },
20003 outputs: []outputInfo{
20004 {0, 9223372034707292160},
20005 },
20006 },
20007 },
20008 {
20009 name: "FMINS",
20010 argLen: 2,
20011 asm: arm64.AFMINS,
20012 reg: regInfo{
20013 inputs: []inputInfo{
20014 {0, 9223372034707292160},
20015 {1, 9223372034707292160},
20016 },
20017 outputs: []outputInfo{
20018 {0, 9223372034707292160},
20019 },
20020 },
20021 },
20022 {
20023 name: "FMAXD",
20024 argLen: 2,
20025 asm: arm64.AFMAXD,
20026 reg: regInfo{
20027 inputs: []inputInfo{
20028 {0, 9223372034707292160},
20029 {1, 9223372034707292160},
20030 },
20031 outputs: []outputInfo{
20032 {0, 9223372034707292160},
20033 },
20034 },
20035 },
20036 {
20037 name: "FMAXS",
20038 argLen: 2,
20039 asm: arm64.AFMAXS,
20040 reg: regInfo{
20041 inputs: []inputInfo{
20042 {0, 9223372034707292160},
20043 {1, 9223372034707292160},
20044 },
20045 outputs: []outputInfo{
20046 {0, 9223372034707292160},
20047 },
20048 },
20049 },
20050 {
20051 name: "REV",
20052 argLen: 1,
20053 asm: arm64.AREV,
20054 reg: regInfo{
20055 inputs: []inputInfo{
20056 {0, 402653183},
20057 },
20058 outputs: []outputInfo{
20059 {0, 335544319},
20060 },
20061 },
20062 },
20063 {
20064 name: "REVW",
20065 argLen: 1,
20066 asm: arm64.AREVW,
20067 reg: regInfo{
20068 inputs: []inputInfo{
20069 {0, 402653183},
20070 },
20071 outputs: []outputInfo{
20072 {0, 335544319},
20073 },
20074 },
20075 },
20076 {
20077 name: "REV16",
20078 argLen: 1,
20079 asm: arm64.AREV16,
20080 reg: regInfo{
20081 inputs: []inputInfo{
20082 {0, 402653183},
20083 },
20084 outputs: []outputInfo{
20085 {0, 335544319},
20086 },
20087 },
20088 },
20089 {
20090 name: "REV16W",
20091 argLen: 1,
20092 asm: arm64.AREV16W,
20093 reg: regInfo{
20094 inputs: []inputInfo{
20095 {0, 402653183},
20096 },
20097 outputs: []outputInfo{
20098 {0, 335544319},
20099 },
20100 },
20101 },
20102 {
20103 name: "RBIT",
20104 argLen: 1,
20105 asm: arm64.ARBIT,
20106 reg: regInfo{
20107 inputs: []inputInfo{
20108 {0, 402653183},
20109 },
20110 outputs: []outputInfo{
20111 {0, 335544319},
20112 },
20113 },
20114 },
20115 {
20116 name: "RBITW",
20117 argLen: 1,
20118 asm: arm64.ARBITW,
20119 reg: regInfo{
20120 inputs: []inputInfo{
20121 {0, 402653183},
20122 },
20123 outputs: []outputInfo{
20124 {0, 335544319},
20125 },
20126 },
20127 },
20128 {
20129 name: "CLZ",
20130 argLen: 1,
20131 asm: arm64.ACLZ,
20132 reg: regInfo{
20133 inputs: []inputInfo{
20134 {0, 402653183},
20135 },
20136 outputs: []outputInfo{
20137 {0, 335544319},
20138 },
20139 },
20140 },
20141 {
20142 name: "CLZW",
20143 argLen: 1,
20144 asm: arm64.ACLZW,
20145 reg: regInfo{
20146 inputs: []inputInfo{
20147 {0, 402653183},
20148 },
20149 outputs: []outputInfo{
20150 {0, 335544319},
20151 },
20152 },
20153 },
20154 {
20155 name: "VCNT",
20156 argLen: 1,
20157 asm: arm64.AVCNT,
20158 reg: regInfo{
20159 inputs: []inputInfo{
20160 {0, 9223372034707292160},
20161 },
20162 outputs: []outputInfo{
20163 {0, 9223372034707292160},
20164 },
20165 },
20166 },
20167 {
20168 name: "VUADDLV",
20169 argLen: 1,
20170 asm: arm64.AVUADDLV,
20171 reg: regInfo{
20172 inputs: []inputInfo{
20173 {0, 9223372034707292160},
20174 },
20175 outputs: []outputInfo{
20176 {0, 9223372034707292160},
20177 },
20178 },
20179 },
20180 {
20181 name: "LoweredRound32F",
20182 argLen: 1,
20183 resultInArg0: true,
20184 zeroWidth: true,
20185 reg: regInfo{
20186 inputs: []inputInfo{
20187 {0, 9223372034707292160},
20188 },
20189 outputs: []outputInfo{
20190 {0, 9223372034707292160},
20191 },
20192 },
20193 },
20194 {
20195 name: "LoweredRound64F",
20196 argLen: 1,
20197 resultInArg0: true,
20198 zeroWidth: true,
20199 reg: regInfo{
20200 inputs: []inputInfo{
20201 {0, 9223372034707292160},
20202 },
20203 outputs: []outputInfo{
20204 {0, 9223372034707292160},
20205 },
20206 },
20207 },
20208 {
20209 name: "FMADDS",
20210 argLen: 3,
20211 asm: arm64.AFMADDS,
20212 reg: regInfo{
20213 inputs: []inputInfo{
20214 {0, 9223372034707292160},
20215 {1, 9223372034707292160},
20216 {2, 9223372034707292160},
20217 },
20218 outputs: []outputInfo{
20219 {0, 9223372034707292160},
20220 },
20221 },
20222 },
20223 {
20224 name: "FMADDD",
20225 argLen: 3,
20226 asm: arm64.AFMADDD,
20227 reg: regInfo{
20228 inputs: []inputInfo{
20229 {0, 9223372034707292160},
20230 {1, 9223372034707292160},
20231 {2, 9223372034707292160},
20232 },
20233 outputs: []outputInfo{
20234 {0, 9223372034707292160},
20235 },
20236 },
20237 },
20238 {
20239 name: "FNMADDS",
20240 argLen: 3,
20241 asm: arm64.AFNMADDS,
20242 reg: regInfo{
20243 inputs: []inputInfo{
20244 {0, 9223372034707292160},
20245 {1, 9223372034707292160},
20246 {2, 9223372034707292160},
20247 },
20248 outputs: []outputInfo{
20249 {0, 9223372034707292160},
20250 },
20251 },
20252 },
20253 {
20254 name: "FNMADDD",
20255 argLen: 3,
20256 asm: arm64.AFNMADDD,
20257 reg: regInfo{
20258 inputs: []inputInfo{
20259 {0, 9223372034707292160},
20260 {1, 9223372034707292160},
20261 {2, 9223372034707292160},
20262 },
20263 outputs: []outputInfo{
20264 {0, 9223372034707292160},
20265 },
20266 },
20267 },
20268 {
20269 name: "FMSUBS",
20270 argLen: 3,
20271 asm: arm64.AFMSUBS,
20272 reg: regInfo{
20273 inputs: []inputInfo{
20274 {0, 9223372034707292160},
20275 {1, 9223372034707292160},
20276 {2, 9223372034707292160},
20277 },
20278 outputs: []outputInfo{
20279 {0, 9223372034707292160},
20280 },
20281 },
20282 },
20283 {
20284 name: "FMSUBD",
20285 argLen: 3,
20286 asm: arm64.AFMSUBD,
20287 reg: regInfo{
20288 inputs: []inputInfo{
20289 {0, 9223372034707292160},
20290 {1, 9223372034707292160},
20291 {2, 9223372034707292160},
20292 },
20293 outputs: []outputInfo{
20294 {0, 9223372034707292160},
20295 },
20296 },
20297 },
20298 {
20299 name: "FNMSUBS",
20300 argLen: 3,
20301 asm: arm64.AFNMSUBS,
20302 reg: regInfo{
20303 inputs: []inputInfo{
20304 {0, 9223372034707292160},
20305 {1, 9223372034707292160},
20306 {2, 9223372034707292160},
20307 },
20308 outputs: []outputInfo{
20309 {0, 9223372034707292160},
20310 },
20311 },
20312 },
20313 {
20314 name: "FNMSUBD",
20315 argLen: 3,
20316 asm: arm64.AFNMSUBD,
20317 reg: regInfo{
20318 inputs: []inputInfo{
20319 {0, 9223372034707292160},
20320 {1, 9223372034707292160},
20321 {2, 9223372034707292160},
20322 },
20323 outputs: []outputInfo{
20324 {0, 9223372034707292160},
20325 },
20326 },
20327 },
20328 {
20329 name: "MADD",
20330 argLen: 3,
20331 asm: arm64.AMADD,
20332 reg: regInfo{
20333 inputs: []inputInfo{
20334 {0, 402653183},
20335 {1, 402653183},
20336 {2, 402653183},
20337 },
20338 outputs: []outputInfo{
20339 {0, 335544319},
20340 },
20341 },
20342 },
20343 {
20344 name: "MADDW",
20345 argLen: 3,
20346 asm: arm64.AMADDW,
20347 reg: regInfo{
20348 inputs: []inputInfo{
20349 {0, 402653183},
20350 {1, 402653183},
20351 {2, 402653183},
20352 },
20353 outputs: []outputInfo{
20354 {0, 335544319},
20355 },
20356 },
20357 },
20358 {
20359 name: "MSUB",
20360 argLen: 3,
20361 asm: arm64.AMSUB,
20362 reg: regInfo{
20363 inputs: []inputInfo{
20364 {0, 402653183},
20365 {1, 402653183},
20366 {2, 402653183},
20367 },
20368 outputs: []outputInfo{
20369 {0, 335544319},
20370 },
20371 },
20372 },
20373 {
20374 name: "MSUBW",
20375 argLen: 3,
20376 asm: arm64.AMSUBW,
20377 reg: regInfo{
20378 inputs: []inputInfo{
20379 {0, 402653183},
20380 {1, 402653183},
20381 {2, 402653183},
20382 },
20383 outputs: []outputInfo{
20384 {0, 335544319},
20385 },
20386 },
20387 },
20388 {
20389 name: "SLL",
20390 argLen: 2,
20391 asm: arm64.ALSL,
20392 reg: regInfo{
20393 inputs: []inputInfo{
20394 {0, 402653183},
20395 {1, 402653183},
20396 },
20397 outputs: []outputInfo{
20398 {0, 335544319},
20399 },
20400 },
20401 },
20402 {
20403 name: "SLLconst",
20404 auxType: auxInt64,
20405 argLen: 1,
20406 asm: arm64.ALSL,
20407 reg: regInfo{
20408 inputs: []inputInfo{
20409 {0, 402653183},
20410 },
20411 outputs: []outputInfo{
20412 {0, 335544319},
20413 },
20414 },
20415 },
20416 {
20417 name: "SRL",
20418 argLen: 2,
20419 asm: arm64.ALSR,
20420 reg: regInfo{
20421 inputs: []inputInfo{
20422 {0, 402653183},
20423 {1, 402653183},
20424 },
20425 outputs: []outputInfo{
20426 {0, 335544319},
20427 },
20428 },
20429 },
20430 {
20431 name: "SRLconst",
20432 auxType: auxInt64,
20433 argLen: 1,
20434 asm: arm64.ALSR,
20435 reg: regInfo{
20436 inputs: []inputInfo{
20437 {0, 402653183},
20438 },
20439 outputs: []outputInfo{
20440 {0, 335544319},
20441 },
20442 },
20443 },
20444 {
20445 name: "SRA",
20446 argLen: 2,
20447 asm: arm64.AASR,
20448 reg: regInfo{
20449 inputs: []inputInfo{
20450 {0, 402653183},
20451 {1, 402653183},
20452 },
20453 outputs: []outputInfo{
20454 {0, 335544319},
20455 },
20456 },
20457 },
20458 {
20459 name: "SRAconst",
20460 auxType: auxInt64,
20461 argLen: 1,
20462 asm: arm64.AASR,
20463 reg: regInfo{
20464 inputs: []inputInfo{
20465 {0, 402653183},
20466 },
20467 outputs: []outputInfo{
20468 {0, 335544319},
20469 },
20470 },
20471 },
20472 {
20473 name: "ROR",
20474 argLen: 2,
20475 asm: arm64.AROR,
20476 reg: regInfo{
20477 inputs: []inputInfo{
20478 {0, 402653183},
20479 {1, 402653183},
20480 },
20481 outputs: []outputInfo{
20482 {0, 335544319},
20483 },
20484 },
20485 },
20486 {
20487 name: "RORW",
20488 argLen: 2,
20489 asm: arm64.ARORW,
20490 reg: regInfo{
20491 inputs: []inputInfo{
20492 {0, 402653183},
20493 {1, 402653183},
20494 },
20495 outputs: []outputInfo{
20496 {0, 335544319},
20497 },
20498 },
20499 },
20500 {
20501 name: "RORconst",
20502 auxType: auxInt64,
20503 argLen: 1,
20504 asm: arm64.AROR,
20505 reg: regInfo{
20506 inputs: []inputInfo{
20507 {0, 402653183},
20508 },
20509 outputs: []outputInfo{
20510 {0, 335544319},
20511 },
20512 },
20513 },
20514 {
20515 name: "RORWconst",
20516 auxType: auxInt64,
20517 argLen: 1,
20518 asm: arm64.ARORW,
20519 reg: regInfo{
20520 inputs: []inputInfo{
20521 {0, 402653183},
20522 },
20523 outputs: []outputInfo{
20524 {0, 335544319},
20525 },
20526 },
20527 },
20528 {
20529 name: "EXTRconst",
20530 auxType: auxInt64,
20531 argLen: 2,
20532 asm: arm64.AEXTR,
20533 reg: regInfo{
20534 inputs: []inputInfo{
20535 {0, 402653183},
20536 {1, 402653183},
20537 },
20538 outputs: []outputInfo{
20539 {0, 335544319},
20540 },
20541 },
20542 },
20543 {
20544 name: "EXTRWconst",
20545 auxType: auxInt64,
20546 argLen: 2,
20547 asm: arm64.AEXTRW,
20548 reg: regInfo{
20549 inputs: []inputInfo{
20550 {0, 402653183},
20551 {1, 402653183},
20552 },
20553 outputs: []outputInfo{
20554 {0, 335544319},
20555 },
20556 },
20557 },
20558 {
20559 name: "CMP",
20560 argLen: 2,
20561 asm: arm64.ACMP,
20562 reg: regInfo{
20563 inputs: []inputInfo{
20564 {0, 402653183},
20565 {1, 402653183},
20566 },
20567 },
20568 },
20569 {
20570 name: "CMPconst",
20571 auxType: auxInt64,
20572 argLen: 1,
20573 asm: arm64.ACMP,
20574 reg: regInfo{
20575 inputs: []inputInfo{
20576 {0, 402653183},
20577 },
20578 },
20579 },
20580 {
20581 name: "CMPW",
20582 argLen: 2,
20583 asm: arm64.ACMPW,
20584 reg: regInfo{
20585 inputs: []inputInfo{
20586 {0, 402653183},
20587 {1, 402653183},
20588 },
20589 },
20590 },
20591 {
20592 name: "CMPWconst",
20593 auxType: auxInt32,
20594 argLen: 1,
20595 asm: arm64.ACMPW,
20596 reg: regInfo{
20597 inputs: []inputInfo{
20598 {0, 402653183},
20599 },
20600 },
20601 },
20602 {
20603 name: "CMN",
20604 argLen: 2,
20605 commutative: true,
20606 asm: arm64.ACMN,
20607 reg: regInfo{
20608 inputs: []inputInfo{
20609 {0, 402653183},
20610 {1, 402653183},
20611 },
20612 },
20613 },
20614 {
20615 name: "CMNconst",
20616 auxType: auxInt64,
20617 argLen: 1,
20618 asm: arm64.ACMN,
20619 reg: regInfo{
20620 inputs: []inputInfo{
20621 {0, 402653183},
20622 },
20623 },
20624 },
20625 {
20626 name: "CMNW",
20627 argLen: 2,
20628 commutative: true,
20629 asm: arm64.ACMNW,
20630 reg: regInfo{
20631 inputs: []inputInfo{
20632 {0, 402653183},
20633 {1, 402653183},
20634 },
20635 },
20636 },
20637 {
20638 name: "CMNWconst",
20639 auxType: auxInt32,
20640 argLen: 1,
20641 asm: arm64.ACMNW,
20642 reg: regInfo{
20643 inputs: []inputInfo{
20644 {0, 402653183},
20645 },
20646 },
20647 },
20648 {
20649 name: "TST",
20650 argLen: 2,
20651 commutative: true,
20652 asm: arm64.ATST,
20653 reg: regInfo{
20654 inputs: []inputInfo{
20655 {0, 402653183},
20656 {1, 402653183},
20657 },
20658 },
20659 },
20660 {
20661 name: "TSTconst",
20662 auxType: auxInt64,
20663 argLen: 1,
20664 asm: arm64.ATST,
20665 reg: regInfo{
20666 inputs: []inputInfo{
20667 {0, 402653183},
20668 },
20669 },
20670 },
20671 {
20672 name: "TSTW",
20673 argLen: 2,
20674 commutative: true,
20675 asm: arm64.ATSTW,
20676 reg: regInfo{
20677 inputs: []inputInfo{
20678 {0, 402653183},
20679 {1, 402653183},
20680 },
20681 },
20682 },
20683 {
20684 name: "TSTWconst",
20685 auxType: auxInt32,
20686 argLen: 1,
20687 asm: arm64.ATSTW,
20688 reg: regInfo{
20689 inputs: []inputInfo{
20690 {0, 402653183},
20691 },
20692 },
20693 },
20694 {
20695 name: "FCMPS",
20696 argLen: 2,
20697 asm: arm64.AFCMPS,
20698 reg: regInfo{
20699 inputs: []inputInfo{
20700 {0, 9223372034707292160},
20701 {1, 9223372034707292160},
20702 },
20703 },
20704 },
20705 {
20706 name: "FCMPD",
20707 argLen: 2,
20708 asm: arm64.AFCMPD,
20709 reg: regInfo{
20710 inputs: []inputInfo{
20711 {0, 9223372034707292160},
20712 {1, 9223372034707292160},
20713 },
20714 },
20715 },
20716 {
20717 name: "FCMPS0",
20718 argLen: 1,
20719 asm: arm64.AFCMPS,
20720 reg: regInfo{
20721 inputs: []inputInfo{
20722 {0, 9223372034707292160},
20723 },
20724 },
20725 },
20726 {
20727 name: "FCMPD0",
20728 argLen: 1,
20729 asm: arm64.AFCMPD,
20730 reg: regInfo{
20731 inputs: []inputInfo{
20732 {0, 9223372034707292160},
20733 },
20734 },
20735 },
20736 {
20737 name: "MVNshiftLL",
20738 auxType: auxInt64,
20739 argLen: 1,
20740 asm: arm64.AMVN,
20741 reg: regInfo{
20742 inputs: []inputInfo{
20743 {0, 402653183},
20744 },
20745 outputs: []outputInfo{
20746 {0, 335544319},
20747 },
20748 },
20749 },
20750 {
20751 name: "MVNshiftRL",
20752 auxType: auxInt64,
20753 argLen: 1,
20754 asm: arm64.AMVN,
20755 reg: regInfo{
20756 inputs: []inputInfo{
20757 {0, 402653183},
20758 },
20759 outputs: []outputInfo{
20760 {0, 335544319},
20761 },
20762 },
20763 },
20764 {
20765 name: "MVNshiftRA",
20766 auxType: auxInt64,
20767 argLen: 1,
20768 asm: arm64.AMVN,
20769 reg: regInfo{
20770 inputs: []inputInfo{
20771 {0, 402653183},
20772 },
20773 outputs: []outputInfo{
20774 {0, 335544319},
20775 },
20776 },
20777 },
20778 {
20779 name: "MVNshiftRO",
20780 auxType: auxInt64,
20781 argLen: 1,
20782 asm: arm64.AMVN,
20783 reg: regInfo{
20784 inputs: []inputInfo{
20785 {0, 402653183},
20786 },
20787 outputs: []outputInfo{
20788 {0, 335544319},
20789 },
20790 },
20791 },
20792 {
20793 name: "NEGshiftLL",
20794 auxType: auxInt64,
20795 argLen: 1,
20796 asm: arm64.ANEG,
20797 reg: regInfo{
20798 inputs: []inputInfo{
20799 {0, 402653183},
20800 },
20801 outputs: []outputInfo{
20802 {0, 335544319},
20803 },
20804 },
20805 },
20806 {
20807 name: "NEGshiftRL",
20808 auxType: auxInt64,
20809 argLen: 1,
20810 asm: arm64.ANEG,
20811 reg: regInfo{
20812 inputs: []inputInfo{
20813 {0, 402653183},
20814 },
20815 outputs: []outputInfo{
20816 {0, 335544319},
20817 },
20818 },
20819 },
20820 {
20821 name: "NEGshiftRA",
20822 auxType: auxInt64,
20823 argLen: 1,
20824 asm: arm64.ANEG,
20825 reg: regInfo{
20826 inputs: []inputInfo{
20827 {0, 402653183},
20828 },
20829 outputs: []outputInfo{
20830 {0, 335544319},
20831 },
20832 },
20833 },
20834 {
20835 name: "ADDshiftLL",
20836 auxType: auxInt64,
20837 argLen: 2,
20838 asm: arm64.AADD,
20839 reg: regInfo{
20840 inputs: []inputInfo{
20841 {0, 402653183},
20842 {1, 402653183},
20843 },
20844 outputs: []outputInfo{
20845 {0, 335544319},
20846 },
20847 },
20848 },
20849 {
20850 name: "ADDshiftRL",
20851 auxType: auxInt64,
20852 argLen: 2,
20853 asm: arm64.AADD,
20854 reg: regInfo{
20855 inputs: []inputInfo{
20856 {0, 402653183},
20857 {1, 402653183},
20858 },
20859 outputs: []outputInfo{
20860 {0, 335544319},
20861 },
20862 },
20863 },
20864 {
20865 name: "ADDshiftRA",
20866 auxType: auxInt64,
20867 argLen: 2,
20868 asm: arm64.AADD,
20869 reg: regInfo{
20870 inputs: []inputInfo{
20871 {0, 402653183},
20872 {1, 402653183},
20873 },
20874 outputs: []outputInfo{
20875 {0, 335544319},
20876 },
20877 },
20878 },
20879 {
20880 name: "SUBshiftLL",
20881 auxType: auxInt64,
20882 argLen: 2,
20883 asm: arm64.ASUB,
20884 reg: regInfo{
20885 inputs: []inputInfo{
20886 {0, 402653183},
20887 {1, 402653183},
20888 },
20889 outputs: []outputInfo{
20890 {0, 335544319},
20891 },
20892 },
20893 },
20894 {
20895 name: "SUBshiftRL",
20896 auxType: auxInt64,
20897 argLen: 2,
20898 asm: arm64.ASUB,
20899 reg: regInfo{
20900 inputs: []inputInfo{
20901 {0, 402653183},
20902 {1, 402653183},
20903 },
20904 outputs: []outputInfo{
20905 {0, 335544319},
20906 },
20907 },
20908 },
20909 {
20910 name: "SUBshiftRA",
20911 auxType: auxInt64,
20912 argLen: 2,
20913 asm: arm64.ASUB,
20914 reg: regInfo{
20915 inputs: []inputInfo{
20916 {0, 402653183},
20917 {1, 402653183},
20918 },
20919 outputs: []outputInfo{
20920 {0, 335544319},
20921 },
20922 },
20923 },
20924 {
20925 name: "ANDshiftLL",
20926 auxType: auxInt64,
20927 argLen: 2,
20928 asm: arm64.AAND,
20929 reg: regInfo{
20930 inputs: []inputInfo{
20931 {0, 402653183},
20932 {1, 402653183},
20933 },
20934 outputs: []outputInfo{
20935 {0, 335544319},
20936 },
20937 },
20938 },
20939 {
20940 name: "ANDshiftRL",
20941 auxType: auxInt64,
20942 argLen: 2,
20943 asm: arm64.AAND,
20944 reg: regInfo{
20945 inputs: []inputInfo{
20946 {0, 402653183},
20947 {1, 402653183},
20948 },
20949 outputs: []outputInfo{
20950 {0, 335544319},
20951 },
20952 },
20953 },
20954 {
20955 name: "ANDshiftRA",
20956 auxType: auxInt64,
20957 argLen: 2,
20958 asm: arm64.AAND,
20959 reg: regInfo{
20960 inputs: []inputInfo{
20961 {0, 402653183},
20962 {1, 402653183},
20963 },
20964 outputs: []outputInfo{
20965 {0, 335544319},
20966 },
20967 },
20968 },
20969 {
20970 name: "ANDshiftRO",
20971 auxType: auxInt64,
20972 argLen: 2,
20973 asm: arm64.AAND,
20974 reg: regInfo{
20975 inputs: []inputInfo{
20976 {0, 402653183},
20977 {1, 402653183},
20978 },
20979 outputs: []outputInfo{
20980 {0, 335544319},
20981 },
20982 },
20983 },
20984 {
20985 name: "ORshiftLL",
20986 auxType: auxInt64,
20987 argLen: 2,
20988 asm: arm64.AORR,
20989 reg: regInfo{
20990 inputs: []inputInfo{
20991 {0, 402653183},
20992 {1, 402653183},
20993 },
20994 outputs: []outputInfo{
20995 {0, 335544319},
20996 },
20997 },
20998 },
20999 {
21000 name: "ORshiftRL",
21001 auxType: auxInt64,
21002 argLen: 2,
21003 asm: arm64.AORR,
21004 reg: regInfo{
21005 inputs: []inputInfo{
21006 {0, 402653183},
21007 {1, 402653183},
21008 },
21009 outputs: []outputInfo{
21010 {0, 335544319},
21011 },
21012 },
21013 },
21014 {
21015 name: "ORshiftRA",
21016 auxType: auxInt64,
21017 argLen: 2,
21018 asm: arm64.AORR,
21019 reg: regInfo{
21020 inputs: []inputInfo{
21021 {0, 402653183},
21022 {1, 402653183},
21023 },
21024 outputs: []outputInfo{
21025 {0, 335544319},
21026 },
21027 },
21028 },
21029 {
21030 name: "ORshiftRO",
21031 auxType: auxInt64,
21032 argLen: 2,
21033 asm: arm64.AORR,
21034 reg: regInfo{
21035 inputs: []inputInfo{
21036 {0, 402653183},
21037 {1, 402653183},
21038 },
21039 outputs: []outputInfo{
21040 {0, 335544319},
21041 },
21042 },
21043 },
21044 {
21045 name: "XORshiftLL",
21046 auxType: auxInt64,
21047 argLen: 2,
21048 asm: arm64.AEOR,
21049 reg: regInfo{
21050 inputs: []inputInfo{
21051 {0, 402653183},
21052 {1, 402653183},
21053 },
21054 outputs: []outputInfo{
21055 {0, 335544319},
21056 },
21057 },
21058 },
21059 {
21060 name: "XORshiftRL",
21061 auxType: auxInt64,
21062 argLen: 2,
21063 asm: arm64.AEOR,
21064 reg: regInfo{
21065 inputs: []inputInfo{
21066 {0, 402653183},
21067 {1, 402653183},
21068 },
21069 outputs: []outputInfo{
21070 {0, 335544319},
21071 },
21072 },
21073 },
21074 {
21075 name: "XORshiftRA",
21076 auxType: auxInt64,
21077 argLen: 2,
21078 asm: arm64.AEOR,
21079 reg: regInfo{
21080 inputs: []inputInfo{
21081 {0, 402653183},
21082 {1, 402653183},
21083 },
21084 outputs: []outputInfo{
21085 {0, 335544319},
21086 },
21087 },
21088 },
21089 {
21090 name: "XORshiftRO",
21091 auxType: auxInt64,
21092 argLen: 2,
21093 asm: arm64.AEOR,
21094 reg: regInfo{
21095 inputs: []inputInfo{
21096 {0, 402653183},
21097 {1, 402653183},
21098 },
21099 outputs: []outputInfo{
21100 {0, 335544319},
21101 },
21102 },
21103 },
21104 {
21105 name: "BICshiftLL",
21106 auxType: auxInt64,
21107 argLen: 2,
21108 asm: arm64.ABIC,
21109 reg: regInfo{
21110 inputs: []inputInfo{
21111 {0, 402653183},
21112 {1, 402653183},
21113 },
21114 outputs: []outputInfo{
21115 {0, 335544319},
21116 },
21117 },
21118 },
21119 {
21120 name: "BICshiftRL",
21121 auxType: auxInt64,
21122 argLen: 2,
21123 asm: arm64.ABIC,
21124 reg: regInfo{
21125 inputs: []inputInfo{
21126 {0, 402653183},
21127 {1, 402653183},
21128 },
21129 outputs: []outputInfo{
21130 {0, 335544319},
21131 },
21132 },
21133 },
21134 {
21135 name: "BICshiftRA",
21136 auxType: auxInt64,
21137 argLen: 2,
21138 asm: arm64.ABIC,
21139 reg: regInfo{
21140 inputs: []inputInfo{
21141 {0, 402653183},
21142 {1, 402653183},
21143 },
21144 outputs: []outputInfo{
21145 {0, 335544319},
21146 },
21147 },
21148 },
21149 {
21150 name: "BICshiftRO",
21151 auxType: auxInt64,
21152 argLen: 2,
21153 asm: arm64.ABIC,
21154 reg: regInfo{
21155 inputs: []inputInfo{
21156 {0, 402653183},
21157 {1, 402653183},
21158 },
21159 outputs: []outputInfo{
21160 {0, 335544319},
21161 },
21162 },
21163 },
21164 {
21165 name: "EONshiftLL",
21166 auxType: auxInt64,
21167 argLen: 2,
21168 asm: arm64.AEON,
21169 reg: regInfo{
21170 inputs: []inputInfo{
21171 {0, 402653183},
21172 {1, 402653183},
21173 },
21174 outputs: []outputInfo{
21175 {0, 335544319},
21176 },
21177 },
21178 },
21179 {
21180 name: "EONshiftRL",
21181 auxType: auxInt64,
21182 argLen: 2,
21183 asm: arm64.AEON,
21184 reg: regInfo{
21185 inputs: []inputInfo{
21186 {0, 402653183},
21187 {1, 402653183},
21188 },
21189 outputs: []outputInfo{
21190 {0, 335544319},
21191 },
21192 },
21193 },
21194 {
21195 name: "EONshiftRA",
21196 auxType: auxInt64,
21197 argLen: 2,
21198 asm: arm64.AEON,
21199 reg: regInfo{
21200 inputs: []inputInfo{
21201 {0, 402653183},
21202 {1, 402653183},
21203 },
21204 outputs: []outputInfo{
21205 {0, 335544319},
21206 },
21207 },
21208 },
21209 {
21210 name: "EONshiftRO",
21211 auxType: auxInt64,
21212 argLen: 2,
21213 asm: arm64.AEON,
21214 reg: regInfo{
21215 inputs: []inputInfo{
21216 {0, 402653183},
21217 {1, 402653183},
21218 },
21219 outputs: []outputInfo{
21220 {0, 335544319},
21221 },
21222 },
21223 },
21224 {
21225 name: "ORNshiftLL",
21226 auxType: auxInt64,
21227 argLen: 2,
21228 asm: arm64.AORN,
21229 reg: regInfo{
21230 inputs: []inputInfo{
21231 {0, 402653183},
21232 {1, 402653183},
21233 },
21234 outputs: []outputInfo{
21235 {0, 335544319},
21236 },
21237 },
21238 },
21239 {
21240 name: "ORNshiftRL",
21241 auxType: auxInt64,
21242 argLen: 2,
21243 asm: arm64.AORN,
21244 reg: regInfo{
21245 inputs: []inputInfo{
21246 {0, 402653183},
21247 {1, 402653183},
21248 },
21249 outputs: []outputInfo{
21250 {0, 335544319},
21251 },
21252 },
21253 },
21254 {
21255 name: "ORNshiftRA",
21256 auxType: auxInt64,
21257 argLen: 2,
21258 asm: arm64.AORN,
21259 reg: regInfo{
21260 inputs: []inputInfo{
21261 {0, 402653183},
21262 {1, 402653183},
21263 },
21264 outputs: []outputInfo{
21265 {0, 335544319},
21266 },
21267 },
21268 },
21269 {
21270 name: "ORNshiftRO",
21271 auxType: auxInt64,
21272 argLen: 2,
21273 asm: arm64.AORN,
21274 reg: regInfo{
21275 inputs: []inputInfo{
21276 {0, 402653183},
21277 {1, 402653183},
21278 },
21279 outputs: []outputInfo{
21280 {0, 335544319},
21281 },
21282 },
21283 },
21284 {
21285 name: "CMPshiftLL",
21286 auxType: auxInt64,
21287 argLen: 2,
21288 asm: arm64.ACMP,
21289 reg: regInfo{
21290 inputs: []inputInfo{
21291 {0, 402653183},
21292 {1, 402653183},
21293 },
21294 },
21295 },
21296 {
21297 name: "CMPshiftRL",
21298 auxType: auxInt64,
21299 argLen: 2,
21300 asm: arm64.ACMP,
21301 reg: regInfo{
21302 inputs: []inputInfo{
21303 {0, 402653183},
21304 {1, 402653183},
21305 },
21306 },
21307 },
21308 {
21309 name: "CMPshiftRA",
21310 auxType: auxInt64,
21311 argLen: 2,
21312 asm: arm64.ACMP,
21313 reg: regInfo{
21314 inputs: []inputInfo{
21315 {0, 402653183},
21316 {1, 402653183},
21317 },
21318 },
21319 },
21320 {
21321 name: "CMNshiftLL",
21322 auxType: auxInt64,
21323 argLen: 2,
21324 asm: arm64.ACMN,
21325 reg: regInfo{
21326 inputs: []inputInfo{
21327 {0, 402653183},
21328 {1, 402653183},
21329 },
21330 },
21331 },
21332 {
21333 name: "CMNshiftRL",
21334 auxType: auxInt64,
21335 argLen: 2,
21336 asm: arm64.ACMN,
21337 reg: regInfo{
21338 inputs: []inputInfo{
21339 {0, 402653183},
21340 {1, 402653183},
21341 },
21342 },
21343 },
21344 {
21345 name: "CMNshiftRA",
21346 auxType: auxInt64,
21347 argLen: 2,
21348 asm: arm64.ACMN,
21349 reg: regInfo{
21350 inputs: []inputInfo{
21351 {0, 402653183},
21352 {1, 402653183},
21353 },
21354 },
21355 },
21356 {
21357 name: "TSTshiftLL",
21358 auxType: auxInt64,
21359 argLen: 2,
21360 asm: arm64.ATST,
21361 reg: regInfo{
21362 inputs: []inputInfo{
21363 {0, 402653183},
21364 {1, 402653183},
21365 },
21366 },
21367 },
21368 {
21369 name: "TSTshiftRL",
21370 auxType: auxInt64,
21371 argLen: 2,
21372 asm: arm64.ATST,
21373 reg: regInfo{
21374 inputs: []inputInfo{
21375 {0, 402653183},
21376 {1, 402653183},
21377 },
21378 },
21379 },
21380 {
21381 name: "TSTshiftRA",
21382 auxType: auxInt64,
21383 argLen: 2,
21384 asm: arm64.ATST,
21385 reg: regInfo{
21386 inputs: []inputInfo{
21387 {0, 402653183},
21388 {1, 402653183},
21389 },
21390 },
21391 },
21392 {
21393 name: "TSTshiftRO",
21394 auxType: auxInt64,
21395 argLen: 2,
21396 asm: arm64.ATST,
21397 reg: regInfo{
21398 inputs: []inputInfo{
21399 {0, 402653183},
21400 {1, 402653183},
21401 },
21402 },
21403 },
21404 {
21405 name: "BFI",
21406 auxType: auxARM64BitField,
21407 argLen: 2,
21408 resultInArg0: true,
21409 asm: arm64.ABFI,
21410 reg: regInfo{
21411 inputs: []inputInfo{
21412 {0, 335544319},
21413 {1, 335544319},
21414 },
21415 outputs: []outputInfo{
21416 {0, 335544319},
21417 },
21418 },
21419 },
21420 {
21421 name: "BFXIL",
21422 auxType: auxARM64BitField,
21423 argLen: 2,
21424 resultInArg0: true,
21425 asm: arm64.ABFXIL,
21426 reg: regInfo{
21427 inputs: []inputInfo{
21428 {0, 335544319},
21429 {1, 335544319},
21430 },
21431 outputs: []outputInfo{
21432 {0, 335544319},
21433 },
21434 },
21435 },
21436 {
21437 name: "SBFIZ",
21438 auxType: auxARM64BitField,
21439 argLen: 1,
21440 asm: arm64.ASBFIZ,
21441 reg: regInfo{
21442 inputs: []inputInfo{
21443 {0, 402653183},
21444 },
21445 outputs: []outputInfo{
21446 {0, 335544319},
21447 },
21448 },
21449 },
21450 {
21451 name: "SBFX",
21452 auxType: auxARM64BitField,
21453 argLen: 1,
21454 asm: arm64.ASBFX,
21455 reg: regInfo{
21456 inputs: []inputInfo{
21457 {0, 402653183},
21458 },
21459 outputs: []outputInfo{
21460 {0, 335544319},
21461 },
21462 },
21463 },
21464 {
21465 name: "UBFIZ",
21466 auxType: auxARM64BitField,
21467 argLen: 1,
21468 asm: arm64.AUBFIZ,
21469 reg: regInfo{
21470 inputs: []inputInfo{
21471 {0, 402653183},
21472 },
21473 outputs: []outputInfo{
21474 {0, 335544319},
21475 },
21476 },
21477 },
21478 {
21479 name: "UBFX",
21480 auxType: auxARM64BitField,
21481 argLen: 1,
21482 asm: arm64.AUBFX,
21483 reg: regInfo{
21484 inputs: []inputInfo{
21485 {0, 402653183},
21486 },
21487 outputs: []outputInfo{
21488 {0, 335544319},
21489 },
21490 },
21491 },
21492 {
21493 name: "MOVDconst",
21494 auxType: auxInt64,
21495 argLen: 0,
21496 rematerializeable: true,
21497 asm: arm64.AMOVD,
21498 reg: regInfo{
21499 outputs: []outputInfo{
21500 {0, 335544319},
21501 },
21502 },
21503 },
21504 {
21505 name: "FMOVSconst",
21506 auxType: auxFloat64,
21507 argLen: 0,
21508 rematerializeable: true,
21509 asm: arm64.AFMOVS,
21510 reg: regInfo{
21511 outputs: []outputInfo{
21512 {0, 9223372034707292160},
21513 },
21514 },
21515 },
21516 {
21517 name: "FMOVDconst",
21518 auxType: auxFloat64,
21519 argLen: 0,
21520 rematerializeable: true,
21521 asm: arm64.AFMOVD,
21522 reg: regInfo{
21523 outputs: []outputInfo{
21524 {0, 9223372034707292160},
21525 },
21526 },
21527 },
21528 {
21529 name: "MOVDaddr",
21530 auxType: auxSymOff,
21531 argLen: 1,
21532 rematerializeable: true,
21533 symEffect: SymAddr,
21534 asm: arm64.AMOVD,
21535 reg: regInfo{
21536 inputs: []inputInfo{
21537 {0, 9223372037928517632},
21538 },
21539 outputs: []outputInfo{
21540 {0, 335544319},
21541 },
21542 },
21543 },
21544 {
21545 name: "MOVBload",
21546 auxType: auxSymOff,
21547 argLen: 2,
21548 faultOnNilArg0: true,
21549 symEffect: SymRead,
21550 asm: arm64.AMOVB,
21551 reg: regInfo{
21552 inputs: []inputInfo{
21553 {0, 9223372038331170815},
21554 },
21555 outputs: []outputInfo{
21556 {0, 335544319},
21557 },
21558 },
21559 },
21560 {
21561 name: "MOVBUload",
21562 auxType: auxSymOff,
21563 argLen: 2,
21564 faultOnNilArg0: true,
21565 symEffect: SymRead,
21566 asm: arm64.AMOVBU,
21567 reg: regInfo{
21568 inputs: []inputInfo{
21569 {0, 9223372038331170815},
21570 },
21571 outputs: []outputInfo{
21572 {0, 335544319},
21573 },
21574 },
21575 },
21576 {
21577 name: "MOVHload",
21578 auxType: auxSymOff,
21579 argLen: 2,
21580 faultOnNilArg0: true,
21581 symEffect: SymRead,
21582 asm: arm64.AMOVH,
21583 reg: regInfo{
21584 inputs: []inputInfo{
21585 {0, 9223372038331170815},
21586 },
21587 outputs: []outputInfo{
21588 {0, 335544319},
21589 },
21590 },
21591 },
21592 {
21593 name: "MOVHUload",
21594 auxType: auxSymOff,
21595 argLen: 2,
21596 faultOnNilArg0: true,
21597 symEffect: SymRead,
21598 asm: arm64.AMOVHU,
21599 reg: regInfo{
21600 inputs: []inputInfo{
21601 {0, 9223372038331170815},
21602 },
21603 outputs: []outputInfo{
21604 {0, 335544319},
21605 },
21606 },
21607 },
21608 {
21609 name: "MOVWload",
21610 auxType: auxSymOff,
21611 argLen: 2,
21612 faultOnNilArg0: true,
21613 symEffect: SymRead,
21614 asm: arm64.AMOVW,
21615 reg: regInfo{
21616 inputs: []inputInfo{
21617 {0, 9223372038331170815},
21618 },
21619 outputs: []outputInfo{
21620 {0, 335544319},
21621 },
21622 },
21623 },
21624 {
21625 name: "MOVWUload",
21626 auxType: auxSymOff,
21627 argLen: 2,
21628 faultOnNilArg0: true,
21629 symEffect: SymRead,
21630 asm: arm64.AMOVWU,
21631 reg: regInfo{
21632 inputs: []inputInfo{
21633 {0, 9223372038331170815},
21634 },
21635 outputs: []outputInfo{
21636 {0, 335544319},
21637 },
21638 },
21639 },
21640 {
21641 name: "MOVDload",
21642 auxType: auxSymOff,
21643 argLen: 2,
21644 faultOnNilArg0: true,
21645 symEffect: SymRead,
21646 asm: arm64.AMOVD,
21647 reg: regInfo{
21648 inputs: []inputInfo{
21649 {0, 9223372038331170815},
21650 },
21651 outputs: []outputInfo{
21652 {0, 335544319},
21653 },
21654 },
21655 },
21656 {
21657 name: "FMOVSload",
21658 auxType: auxSymOff,
21659 argLen: 2,
21660 faultOnNilArg0: true,
21661 symEffect: SymRead,
21662 asm: arm64.AFMOVS,
21663 reg: regInfo{
21664 inputs: []inputInfo{
21665 {0, 9223372038331170815},
21666 },
21667 outputs: []outputInfo{
21668 {0, 9223372034707292160},
21669 },
21670 },
21671 },
21672 {
21673 name: "FMOVDload",
21674 auxType: auxSymOff,
21675 argLen: 2,
21676 faultOnNilArg0: true,
21677 symEffect: SymRead,
21678 asm: arm64.AFMOVD,
21679 reg: regInfo{
21680 inputs: []inputInfo{
21681 {0, 9223372038331170815},
21682 },
21683 outputs: []outputInfo{
21684 {0, 9223372034707292160},
21685 },
21686 },
21687 },
21688 {
21689 name: "LDP",
21690 auxType: auxSymOff,
21691 argLen: 2,
21692 faultOnNilArg0: true,
21693 symEffect: SymRead,
21694 asm: arm64.ALDP,
21695 reg: regInfo{
21696 inputs: []inputInfo{
21697 {0, 9223372038331170815},
21698 },
21699 outputs: []outputInfo{
21700 {0, 402653183},
21701 {1, 402653183},
21702 },
21703 },
21704 },
21705 {
21706 name: "LDPW",
21707 auxType: auxSymOff,
21708 argLen: 2,
21709 faultOnNilArg0: true,
21710 symEffect: SymRead,
21711 asm: arm64.ALDPW,
21712 reg: regInfo{
21713 inputs: []inputInfo{
21714 {0, 9223372038331170815},
21715 },
21716 outputs: []outputInfo{
21717 {0, 402653183},
21718 {1, 402653183},
21719 },
21720 },
21721 },
21722 {
21723 name: "LDPSW",
21724 auxType: auxSymOff,
21725 argLen: 2,
21726 faultOnNilArg0: true,
21727 symEffect: SymRead,
21728 asm: arm64.ALDPSW,
21729 reg: regInfo{
21730 inputs: []inputInfo{
21731 {0, 9223372038331170815},
21732 },
21733 outputs: []outputInfo{
21734 {0, 402653183},
21735 {1, 402653183},
21736 },
21737 },
21738 },
21739 {
21740 name: "FLDPD",
21741 auxType: auxSymOff,
21742 argLen: 2,
21743 faultOnNilArg0: true,
21744 symEffect: SymRead,
21745 asm: arm64.AFLDPD,
21746 reg: regInfo{
21747 inputs: []inputInfo{
21748 {0, 9223372038331170815},
21749 },
21750 outputs: []outputInfo{
21751 {0, 9223372034707292160},
21752 {1, 9223372034707292160},
21753 },
21754 },
21755 },
21756 {
21757 name: "FLDPS",
21758 auxType: auxSymOff,
21759 argLen: 2,
21760 faultOnNilArg0: true,
21761 symEffect: SymRead,
21762 asm: arm64.AFLDPS,
21763 reg: regInfo{
21764 inputs: []inputInfo{
21765 {0, 9223372038331170815},
21766 },
21767 outputs: []outputInfo{
21768 {0, 9223372034707292160},
21769 {1, 9223372034707292160},
21770 },
21771 },
21772 },
21773 {
21774 name: "MOVDloadidx",
21775 argLen: 3,
21776 asm: arm64.AMOVD,
21777 reg: regInfo{
21778 inputs: []inputInfo{
21779 {1, 402653183},
21780 {0, 9223372038331170815},
21781 },
21782 outputs: []outputInfo{
21783 {0, 335544319},
21784 },
21785 },
21786 },
21787 {
21788 name: "MOVWloadidx",
21789 argLen: 3,
21790 asm: arm64.AMOVW,
21791 reg: regInfo{
21792 inputs: []inputInfo{
21793 {1, 402653183},
21794 {0, 9223372038331170815},
21795 },
21796 outputs: []outputInfo{
21797 {0, 335544319},
21798 },
21799 },
21800 },
21801 {
21802 name: "MOVWUloadidx",
21803 argLen: 3,
21804 asm: arm64.AMOVWU,
21805 reg: regInfo{
21806 inputs: []inputInfo{
21807 {1, 402653183},
21808 {0, 9223372038331170815},
21809 },
21810 outputs: []outputInfo{
21811 {0, 335544319},
21812 },
21813 },
21814 },
21815 {
21816 name: "MOVHloadidx",
21817 argLen: 3,
21818 asm: arm64.AMOVH,
21819 reg: regInfo{
21820 inputs: []inputInfo{
21821 {1, 402653183},
21822 {0, 9223372038331170815},
21823 },
21824 outputs: []outputInfo{
21825 {0, 335544319},
21826 },
21827 },
21828 },
21829 {
21830 name: "MOVHUloadidx",
21831 argLen: 3,
21832 asm: arm64.AMOVHU,
21833 reg: regInfo{
21834 inputs: []inputInfo{
21835 {1, 402653183},
21836 {0, 9223372038331170815},
21837 },
21838 outputs: []outputInfo{
21839 {0, 335544319},
21840 },
21841 },
21842 },
21843 {
21844 name: "MOVBloadidx",
21845 argLen: 3,
21846 asm: arm64.AMOVB,
21847 reg: regInfo{
21848 inputs: []inputInfo{
21849 {1, 402653183},
21850 {0, 9223372038331170815},
21851 },
21852 outputs: []outputInfo{
21853 {0, 335544319},
21854 },
21855 },
21856 },
21857 {
21858 name: "MOVBUloadidx",
21859 argLen: 3,
21860 asm: arm64.AMOVBU,
21861 reg: regInfo{
21862 inputs: []inputInfo{
21863 {1, 402653183},
21864 {0, 9223372038331170815},
21865 },
21866 outputs: []outputInfo{
21867 {0, 335544319},
21868 },
21869 },
21870 },
21871 {
21872 name: "FMOVSloadidx",
21873 argLen: 3,
21874 asm: arm64.AFMOVS,
21875 reg: regInfo{
21876 inputs: []inputInfo{
21877 {1, 402653183},
21878 {0, 9223372038331170815},
21879 },
21880 outputs: []outputInfo{
21881 {0, 9223372034707292160},
21882 },
21883 },
21884 },
21885 {
21886 name: "FMOVDloadidx",
21887 argLen: 3,
21888 asm: arm64.AFMOVD,
21889 reg: regInfo{
21890 inputs: []inputInfo{
21891 {1, 402653183},
21892 {0, 9223372038331170815},
21893 },
21894 outputs: []outputInfo{
21895 {0, 9223372034707292160},
21896 },
21897 },
21898 },
21899 {
21900 name: "MOVHloadidx2",
21901 argLen: 3,
21902 asm: arm64.AMOVH,
21903 reg: regInfo{
21904 inputs: []inputInfo{
21905 {1, 402653183},
21906 {0, 9223372038331170815},
21907 },
21908 outputs: []outputInfo{
21909 {0, 335544319},
21910 },
21911 },
21912 },
21913 {
21914 name: "MOVHUloadidx2",
21915 argLen: 3,
21916 asm: arm64.AMOVHU,
21917 reg: regInfo{
21918 inputs: []inputInfo{
21919 {1, 402653183},
21920 {0, 9223372038331170815},
21921 },
21922 outputs: []outputInfo{
21923 {0, 335544319},
21924 },
21925 },
21926 },
21927 {
21928 name: "MOVWloadidx4",
21929 argLen: 3,
21930 asm: arm64.AMOVW,
21931 reg: regInfo{
21932 inputs: []inputInfo{
21933 {1, 402653183},
21934 {0, 9223372038331170815},
21935 },
21936 outputs: []outputInfo{
21937 {0, 335544319},
21938 },
21939 },
21940 },
21941 {
21942 name: "MOVWUloadidx4",
21943 argLen: 3,
21944 asm: arm64.AMOVWU,
21945 reg: regInfo{
21946 inputs: []inputInfo{
21947 {1, 402653183},
21948 {0, 9223372038331170815},
21949 },
21950 outputs: []outputInfo{
21951 {0, 335544319},
21952 },
21953 },
21954 },
21955 {
21956 name: "MOVDloadidx8",
21957 argLen: 3,
21958 asm: arm64.AMOVD,
21959 reg: regInfo{
21960 inputs: []inputInfo{
21961 {1, 402653183},
21962 {0, 9223372038331170815},
21963 },
21964 outputs: []outputInfo{
21965 {0, 335544319},
21966 },
21967 },
21968 },
21969 {
21970 name: "FMOVSloadidx4",
21971 argLen: 3,
21972 asm: arm64.AFMOVS,
21973 reg: regInfo{
21974 inputs: []inputInfo{
21975 {1, 402653183},
21976 {0, 9223372038331170815},
21977 },
21978 outputs: []outputInfo{
21979 {0, 9223372034707292160},
21980 },
21981 },
21982 },
21983 {
21984 name: "FMOVDloadidx8",
21985 argLen: 3,
21986 asm: arm64.AFMOVD,
21987 reg: regInfo{
21988 inputs: []inputInfo{
21989 {1, 402653183},
21990 {0, 9223372038331170815},
21991 },
21992 outputs: []outputInfo{
21993 {0, 9223372034707292160},
21994 },
21995 },
21996 },
21997 {
21998 name: "MOVBstore",
21999 auxType: auxSymOff,
22000 argLen: 3,
22001 faultOnNilArg0: true,
22002 symEffect: SymWrite,
22003 asm: arm64.AMOVB,
22004 reg: regInfo{
22005 inputs: []inputInfo{
22006 {1, 939524095},
22007 {0, 9223372038331170815},
22008 },
22009 },
22010 },
22011 {
22012 name: "MOVHstore",
22013 auxType: auxSymOff,
22014 argLen: 3,
22015 faultOnNilArg0: true,
22016 symEffect: SymWrite,
22017 asm: arm64.AMOVH,
22018 reg: regInfo{
22019 inputs: []inputInfo{
22020 {1, 939524095},
22021 {0, 9223372038331170815},
22022 },
22023 },
22024 },
22025 {
22026 name: "MOVWstore",
22027 auxType: auxSymOff,
22028 argLen: 3,
22029 faultOnNilArg0: true,
22030 symEffect: SymWrite,
22031 asm: arm64.AMOVW,
22032 reg: regInfo{
22033 inputs: []inputInfo{
22034 {1, 939524095},
22035 {0, 9223372038331170815},
22036 },
22037 },
22038 },
22039 {
22040 name: "MOVDstore",
22041 auxType: auxSymOff,
22042 argLen: 3,
22043 faultOnNilArg0: true,
22044 symEffect: SymWrite,
22045 asm: arm64.AMOVD,
22046 reg: regInfo{
22047 inputs: []inputInfo{
22048 {1, 939524095},
22049 {0, 9223372038331170815},
22050 },
22051 },
22052 },
22053 {
22054 name: "FMOVSstore",
22055 auxType: auxSymOff,
22056 argLen: 3,
22057 faultOnNilArg0: true,
22058 symEffect: SymWrite,
22059 asm: arm64.AFMOVS,
22060 reg: regInfo{
22061 inputs: []inputInfo{
22062 {0, 9223372038331170815},
22063 {1, 9223372034707292160},
22064 },
22065 },
22066 },
22067 {
22068 name: "FMOVDstore",
22069 auxType: auxSymOff,
22070 argLen: 3,
22071 faultOnNilArg0: true,
22072 symEffect: SymWrite,
22073 asm: arm64.AFMOVD,
22074 reg: regInfo{
22075 inputs: []inputInfo{
22076 {0, 9223372038331170815},
22077 {1, 9223372034707292160},
22078 },
22079 },
22080 },
22081 {
22082 name: "STP",
22083 auxType: auxSymOff,
22084 argLen: 4,
22085 faultOnNilArg0: true,
22086 symEffect: SymWrite,
22087 asm: arm64.ASTP,
22088 reg: regInfo{
22089 inputs: []inputInfo{
22090 {1, 939524095},
22091 {2, 939524095},
22092 {0, 9223372038331170815},
22093 },
22094 },
22095 },
22096 {
22097 name: "STPW",
22098 auxType: auxSymOff,
22099 argLen: 4,
22100 faultOnNilArg0: true,
22101 symEffect: SymWrite,
22102 asm: arm64.ASTPW,
22103 reg: regInfo{
22104 inputs: []inputInfo{
22105 {1, 939524095},
22106 {2, 939524095},
22107 {0, 9223372038331170815},
22108 },
22109 },
22110 },
22111 {
22112 name: "FSTPD",
22113 auxType: auxSymOff,
22114 argLen: 4,
22115 faultOnNilArg0: true,
22116 symEffect: SymWrite,
22117 asm: arm64.AFSTPD,
22118 reg: regInfo{
22119 inputs: []inputInfo{
22120 {0, 9223372038331170815},
22121 {1, 9223372034707292160},
22122 {2, 9223372034707292160},
22123 },
22124 },
22125 },
22126 {
22127 name: "FSTPS",
22128 auxType: auxSymOff,
22129 argLen: 4,
22130 faultOnNilArg0: true,
22131 symEffect: SymWrite,
22132 asm: arm64.AFSTPS,
22133 reg: regInfo{
22134 inputs: []inputInfo{
22135 {0, 9223372038331170815},
22136 {1, 9223372034707292160},
22137 {2, 9223372034707292160},
22138 },
22139 },
22140 },
22141 {
22142 name: "MOVBstoreidx",
22143 argLen: 4,
22144 asm: arm64.AMOVB,
22145 reg: regInfo{
22146 inputs: []inputInfo{
22147 {1, 939524095},
22148 {2, 939524095},
22149 {0, 9223372038331170815},
22150 },
22151 },
22152 },
22153 {
22154 name: "MOVHstoreidx",
22155 argLen: 4,
22156 asm: arm64.AMOVH,
22157 reg: regInfo{
22158 inputs: []inputInfo{
22159 {1, 939524095},
22160 {2, 939524095},
22161 {0, 9223372038331170815},
22162 },
22163 },
22164 },
22165 {
22166 name: "MOVWstoreidx",
22167 argLen: 4,
22168 asm: arm64.AMOVW,
22169 reg: regInfo{
22170 inputs: []inputInfo{
22171 {1, 939524095},
22172 {2, 939524095},
22173 {0, 9223372038331170815},
22174 },
22175 },
22176 },
22177 {
22178 name: "MOVDstoreidx",
22179 argLen: 4,
22180 asm: arm64.AMOVD,
22181 reg: regInfo{
22182 inputs: []inputInfo{
22183 {1, 939524095},
22184 {2, 939524095},
22185 {0, 9223372038331170815},
22186 },
22187 },
22188 },
22189 {
22190 name: "FMOVSstoreidx",
22191 argLen: 4,
22192 asm: arm64.AFMOVS,
22193 reg: regInfo{
22194 inputs: []inputInfo{
22195 {1, 402653183},
22196 {0, 9223372038331170815},
22197 {2, 9223372034707292160},
22198 },
22199 },
22200 },
22201 {
22202 name: "FMOVDstoreidx",
22203 argLen: 4,
22204 asm: arm64.AFMOVD,
22205 reg: regInfo{
22206 inputs: []inputInfo{
22207 {1, 402653183},
22208 {0, 9223372038331170815},
22209 {2, 9223372034707292160},
22210 },
22211 },
22212 },
22213 {
22214 name: "MOVHstoreidx2",
22215 argLen: 4,
22216 asm: arm64.AMOVH,
22217 reg: regInfo{
22218 inputs: []inputInfo{
22219 {1, 939524095},
22220 {2, 939524095},
22221 {0, 9223372038331170815},
22222 },
22223 },
22224 },
22225 {
22226 name: "MOVWstoreidx4",
22227 argLen: 4,
22228 asm: arm64.AMOVW,
22229 reg: regInfo{
22230 inputs: []inputInfo{
22231 {1, 939524095},
22232 {2, 939524095},
22233 {0, 9223372038331170815},
22234 },
22235 },
22236 },
22237 {
22238 name: "MOVDstoreidx8",
22239 argLen: 4,
22240 asm: arm64.AMOVD,
22241 reg: regInfo{
22242 inputs: []inputInfo{
22243 {1, 939524095},
22244 {2, 939524095},
22245 {0, 9223372038331170815},
22246 },
22247 },
22248 },
22249 {
22250 name: "FMOVSstoreidx4",
22251 argLen: 4,
22252 asm: arm64.AFMOVS,
22253 reg: regInfo{
22254 inputs: []inputInfo{
22255 {1, 402653183},
22256 {0, 9223372038331170815},
22257 {2, 9223372034707292160},
22258 },
22259 },
22260 },
22261 {
22262 name: "FMOVDstoreidx8",
22263 argLen: 4,
22264 asm: arm64.AFMOVD,
22265 reg: regInfo{
22266 inputs: []inputInfo{
22267 {1, 402653183},
22268 {0, 9223372038331170815},
22269 {2, 9223372034707292160},
22270 },
22271 },
22272 },
22273 {
22274 name: "FMOVDgpfp",
22275 argLen: 1,
22276 asm: arm64.AFMOVD,
22277 reg: regInfo{
22278 inputs: []inputInfo{
22279 {0, 335544319},
22280 },
22281 outputs: []outputInfo{
22282 {0, 9223372034707292160},
22283 },
22284 },
22285 },
22286 {
22287 name: "FMOVDfpgp",
22288 argLen: 1,
22289 asm: arm64.AFMOVD,
22290 reg: regInfo{
22291 inputs: []inputInfo{
22292 {0, 9223372034707292160},
22293 },
22294 outputs: []outputInfo{
22295 {0, 335544319},
22296 },
22297 },
22298 },
22299 {
22300 name: "FMOVSgpfp",
22301 argLen: 1,
22302 asm: arm64.AFMOVS,
22303 reg: regInfo{
22304 inputs: []inputInfo{
22305 {0, 335544319},
22306 },
22307 outputs: []outputInfo{
22308 {0, 9223372034707292160},
22309 },
22310 },
22311 },
22312 {
22313 name: "FMOVSfpgp",
22314 argLen: 1,
22315 asm: arm64.AFMOVS,
22316 reg: regInfo{
22317 inputs: []inputInfo{
22318 {0, 9223372034707292160},
22319 },
22320 outputs: []outputInfo{
22321 {0, 335544319},
22322 },
22323 },
22324 },
22325 {
22326 name: "MOVBreg",
22327 argLen: 1,
22328 asm: arm64.AMOVB,
22329 reg: regInfo{
22330 inputs: []inputInfo{
22331 {0, 402653183},
22332 },
22333 outputs: []outputInfo{
22334 {0, 335544319},
22335 },
22336 },
22337 },
22338 {
22339 name: "MOVBUreg",
22340 argLen: 1,
22341 asm: arm64.AMOVBU,
22342 reg: regInfo{
22343 inputs: []inputInfo{
22344 {0, 402653183},
22345 },
22346 outputs: []outputInfo{
22347 {0, 335544319},
22348 },
22349 },
22350 },
22351 {
22352 name: "MOVHreg",
22353 argLen: 1,
22354 asm: arm64.AMOVH,
22355 reg: regInfo{
22356 inputs: []inputInfo{
22357 {0, 402653183},
22358 },
22359 outputs: []outputInfo{
22360 {0, 335544319},
22361 },
22362 },
22363 },
22364 {
22365 name: "MOVHUreg",
22366 argLen: 1,
22367 asm: arm64.AMOVHU,
22368 reg: regInfo{
22369 inputs: []inputInfo{
22370 {0, 402653183},
22371 },
22372 outputs: []outputInfo{
22373 {0, 335544319},
22374 },
22375 },
22376 },
22377 {
22378 name: "MOVWreg",
22379 argLen: 1,
22380 asm: arm64.AMOVW,
22381 reg: regInfo{
22382 inputs: []inputInfo{
22383 {0, 402653183},
22384 },
22385 outputs: []outputInfo{
22386 {0, 335544319},
22387 },
22388 },
22389 },
22390 {
22391 name: "MOVWUreg",
22392 argLen: 1,
22393 asm: arm64.AMOVWU,
22394 reg: regInfo{
22395 inputs: []inputInfo{
22396 {0, 402653183},
22397 },
22398 outputs: []outputInfo{
22399 {0, 335544319},
22400 },
22401 },
22402 },
22403 {
22404 name: "MOVDreg",
22405 argLen: 1,
22406 asm: arm64.AMOVD,
22407 reg: regInfo{
22408 inputs: []inputInfo{
22409 {0, 402653183},
22410 },
22411 outputs: []outputInfo{
22412 {0, 335544319},
22413 },
22414 },
22415 },
22416 {
22417 name: "MOVDnop",
22418 argLen: 1,
22419 resultInArg0: true,
22420 reg: regInfo{
22421 inputs: []inputInfo{
22422 {0, 335544319},
22423 },
22424 outputs: []outputInfo{
22425 {0, 335544319},
22426 },
22427 },
22428 },
22429 {
22430 name: "SCVTFWS",
22431 argLen: 1,
22432 asm: arm64.ASCVTFWS,
22433 reg: regInfo{
22434 inputs: []inputInfo{
22435 {0, 335544319},
22436 },
22437 outputs: []outputInfo{
22438 {0, 9223372034707292160},
22439 },
22440 },
22441 },
22442 {
22443 name: "SCVTFWD",
22444 argLen: 1,
22445 asm: arm64.ASCVTFWD,
22446 reg: regInfo{
22447 inputs: []inputInfo{
22448 {0, 335544319},
22449 },
22450 outputs: []outputInfo{
22451 {0, 9223372034707292160},
22452 },
22453 },
22454 },
22455 {
22456 name: "UCVTFWS",
22457 argLen: 1,
22458 asm: arm64.AUCVTFWS,
22459 reg: regInfo{
22460 inputs: []inputInfo{
22461 {0, 335544319},
22462 },
22463 outputs: []outputInfo{
22464 {0, 9223372034707292160},
22465 },
22466 },
22467 },
22468 {
22469 name: "UCVTFWD",
22470 argLen: 1,
22471 asm: arm64.AUCVTFWD,
22472 reg: regInfo{
22473 inputs: []inputInfo{
22474 {0, 335544319},
22475 },
22476 outputs: []outputInfo{
22477 {0, 9223372034707292160},
22478 },
22479 },
22480 },
22481 {
22482 name: "SCVTFS",
22483 argLen: 1,
22484 asm: arm64.ASCVTFS,
22485 reg: regInfo{
22486 inputs: []inputInfo{
22487 {0, 335544319},
22488 },
22489 outputs: []outputInfo{
22490 {0, 9223372034707292160},
22491 },
22492 },
22493 },
22494 {
22495 name: "SCVTFD",
22496 argLen: 1,
22497 asm: arm64.ASCVTFD,
22498 reg: regInfo{
22499 inputs: []inputInfo{
22500 {0, 335544319},
22501 },
22502 outputs: []outputInfo{
22503 {0, 9223372034707292160},
22504 },
22505 },
22506 },
22507 {
22508 name: "UCVTFS",
22509 argLen: 1,
22510 asm: arm64.AUCVTFS,
22511 reg: regInfo{
22512 inputs: []inputInfo{
22513 {0, 335544319},
22514 },
22515 outputs: []outputInfo{
22516 {0, 9223372034707292160},
22517 },
22518 },
22519 },
22520 {
22521 name: "UCVTFD",
22522 argLen: 1,
22523 asm: arm64.AUCVTFD,
22524 reg: regInfo{
22525 inputs: []inputInfo{
22526 {0, 335544319},
22527 },
22528 outputs: []outputInfo{
22529 {0, 9223372034707292160},
22530 },
22531 },
22532 },
22533 {
22534 name: "FCVTZSSW",
22535 argLen: 1,
22536 asm: arm64.AFCVTZSSW,
22537 reg: regInfo{
22538 inputs: []inputInfo{
22539 {0, 9223372034707292160},
22540 },
22541 outputs: []outputInfo{
22542 {0, 335544319},
22543 },
22544 },
22545 },
22546 {
22547 name: "FCVTZSDW",
22548 argLen: 1,
22549 asm: arm64.AFCVTZSDW,
22550 reg: regInfo{
22551 inputs: []inputInfo{
22552 {0, 9223372034707292160},
22553 },
22554 outputs: []outputInfo{
22555 {0, 335544319},
22556 },
22557 },
22558 },
22559 {
22560 name: "FCVTZUSW",
22561 argLen: 1,
22562 asm: arm64.AFCVTZUSW,
22563 reg: regInfo{
22564 inputs: []inputInfo{
22565 {0, 9223372034707292160},
22566 },
22567 outputs: []outputInfo{
22568 {0, 335544319},
22569 },
22570 },
22571 },
22572 {
22573 name: "FCVTZUDW",
22574 argLen: 1,
22575 asm: arm64.AFCVTZUDW,
22576 reg: regInfo{
22577 inputs: []inputInfo{
22578 {0, 9223372034707292160},
22579 },
22580 outputs: []outputInfo{
22581 {0, 335544319},
22582 },
22583 },
22584 },
22585 {
22586 name: "FCVTZSS",
22587 argLen: 1,
22588 asm: arm64.AFCVTZSS,
22589 reg: regInfo{
22590 inputs: []inputInfo{
22591 {0, 9223372034707292160},
22592 },
22593 outputs: []outputInfo{
22594 {0, 335544319},
22595 },
22596 },
22597 },
22598 {
22599 name: "FCVTZSD",
22600 argLen: 1,
22601 asm: arm64.AFCVTZSD,
22602 reg: regInfo{
22603 inputs: []inputInfo{
22604 {0, 9223372034707292160},
22605 },
22606 outputs: []outputInfo{
22607 {0, 335544319},
22608 },
22609 },
22610 },
22611 {
22612 name: "FCVTZUS",
22613 argLen: 1,
22614 asm: arm64.AFCVTZUS,
22615 reg: regInfo{
22616 inputs: []inputInfo{
22617 {0, 9223372034707292160},
22618 },
22619 outputs: []outputInfo{
22620 {0, 335544319},
22621 },
22622 },
22623 },
22624 {
22625 name: "FCVTZUD",
22626 argLen: 1,
22627 asm: arm64.AFCVTZUD,
22628 reg: regInfo{
22629 inputs: []inputInfo{
22630 {0, 9223372034707292160},
22631 },
22632 outputs: []outputInfo{
22633 {0, 335544319},
22634 },
22635 },
22636 },
22637 {
22638 name: "FCVTSD",
22639 argLen: 1,
22640 asm: arm64.AFCVTSD,
22641 reg: regInfo{
22642 inputs: []inputInfo{
22643 {0, 9223372034707292160},
22644 },
22645 outputs: []outputInfo{
22646 {0, 9223372034707292160},
22647 },
22648 },
22649 },
22650 {
22651 name: "FCVTDS",
22652 argLen: 1,
22653 asm: arm64.AFCVTDS,
22654 reg: regInfo{
22655 inputs: []inputInfo{
22656 {0, 9223372034707292160},
22657 },
22658 outputs: []outputInfo{
22659 {0, 9223372034707292160},
22660 },
22661 },
22662 },
22663 {
22664 name: "FRINTAD",
22665 argLen: 1,
22666 asm: arm64.AFRINTAD,
22667 reg: regInfo{
22668 inputs: []inputInfo{
22669 {0, 9223372034707292160},
22670 },
22671 outputs: []outputInfo{
22672 {0, 9223372034707292160},
22673 },
22674 },
22675 },
22676 {
22677 name: "FRINTMD",
22678 argLen: 1,
22679 asm: arm64.AFRINTMD,
22680 reg: regInfo{
22681 inputs: []inputInfo{
22682 {0, 9223372034707292160},
22683 },
22684 outputs: []outputInfo{
22685 {0, 9223372034707292160},
22686 },
22687 },
22688 },
22689 {
22690 name: "FRINTND",
22691 argLen: 1,
22692 asm: arm64.AFRINTND,
22693 reg: regInfo{
22694 inputs: []inputInfo{
22695 {0, 9223372034707292160},
22696 },
22697 outputs: []outputInfo{
22698 {0, 9223372034707292160},
22699 },
22700 },
22701 },
22702 {
22703 name: "FRINTPD",
22704 argLen: 1,
22705 asm: arm64.AFRINTPD,
22706 reg: regInfo{
22707 inputs: []inputInfo{
22708 {0, 9223372034707292160},
22709 },
22710 outputs: []outputInfo{
22711 {0, 9223372034707292160},
22712 },
22713 },
22714 },
22715 {
22716 name: "FRINTZD",
22717 argLen: 1,
22718 asm: arm64.AFRINTZD,
22719 reg: regInfo{
22720 inputs: []inputInfo{
22721 {0, 9223372034707292160},
22722 },
22723 outputs: []outputInfo{
22724 {0, 9223372034707292160},
22725 },
22726 },
22727 },
22728 {
22729 name: "CSEL",
22730 auxType: auxCCop,
22731 argLen: 3,
22732 asm: arm64.ACSEL,
22733 reg: regInfo{
22734 inputs: []inputInfo{
22735 {0, 335544319},
22736 {1, 335544319},
22737 },
22738 outputs: []outputInfo{
22739 {0, 335544319},
22740 },
22741 },
22742 },
22743 {
22744 name: "CSEL0",
22745 auxType: auxCCop,
22746 argLen: 2,
22747 asm: arm64.ACSEL,
22748 reg: regInfo{
22749 inputs: []inputInfo{
22750 {0, 402653183},
22751 },
22752 outputs: []outputInfo{
22753 {0, 335544319},
22754 },
22755 },
22756 },
22757 {
22758 name: "CSINC",
22759 auxType: auxCCop,
22760 argLen: 3,
22761 asm: arm64.ACSINC,
22762 reg: regInfo{
22763 inputs: []inputInfo{
22764 {0, 335544319},
22765 {1, 335544319},
22766 },
22767 outputs: []outputInfo{
22768 {0, 335544319},
22769 },
22770 },
22771 },
22772 {
22773 name: "CSINV",
22774 auxType: auxCCop,
22775 argLen: 3,
22776 asm: arm64.ACSINV,
22777 reg: regInfo{
22778 inputs: []inputInfo{
22779 {0, 335544319},
22780 {1, 335544319},
22781 },
22782 outputs: []outputInfo{
22783 {0, 335544319},
22784 },
22785 },
22786 },
22787 {
22788 name: "CSNEG",
22789 auxType: auxCCop,
22790 argLen: 3,
22791 asm: arm64.ACSNEG,
22792 reg: regInfo{
22793 inputs: []inputInfo{
22794 {0, 335544319},
22795 {1, 335544319},
22796 },
22797 outputs: []outputInfo{
22798 {0, 335544319},
22799 },
22800 },
22801 },
22802 {
22803 name: "CSETM",
22804 auxType: auxCCop,
22805 argLen: 1,
22806 asm: arm64.ACSETM,
22807 reg: regInfo{
22808 outputs: []outputInfo{
22809 {0, 335544319},
22810 },
22811 },
22812 },
22813 {
22814 name: "CALLstatic",
22815 auxType: auxCallOff,
22816 argLen: -1,
22817 clobberFlags: true,
22818 call: true,
22819 reg: regInfo{
22820 clobbers: 9223372035109945343,
22821 },
22822 },
22823 {
22824 name: "CALLtail",
22825 auxType: auxCallOff,
22826 argLen: -1,
22827 clobberFlags: true,
22828 call: true,
22829 tailCall: true,
22830 reg: regInfo{
22831 clobbers: 9223372035109945343,
22832 },
22833 },
22834 {
22835 name: "CALLclosure",
22836 auxType: auxCallOff,
22837 argLen: -1,
22838 clobberFlags: true,
22839 call: true,
22840 reg: regInfo{
22841 inputs: []inputInfo{
22842 {1, 33554432},
22843 {0, 1409286143},
22844 },
22845 clobbers: 9223372035109945343,
22846 },
22847 },
22848 {
22849 name: "CALLinter",
22850 auxType: auxCallOff,
22851 argLen: -1,
22852 clobberFlags: true,
22853 call: true,
22854 reg: regInfo{
22855 inputs: []inputInfo{
22856 {0, 335544319},
22857 },
22858 clobbers: 9223372035109945343,
22859 },
22860 },
22861 {
22862 name: "LoweredNilCheck",
22863 argLen: 2,
22864 nilCheck: true,
22865 faultOnNilArg0: true,
22866 reg: regInfo{
22867 inputs: []inputInfo{
22868 {0, 402653183},
22869 },
22870 },
22871 },
22872 {
22873 name: "Equal",
22874 argLen: 1,
22875 reg: regInfo{
22876 outputs: []outputInfo{
22877 {0, 335544319},
22878 },
22879 },
22880 },
22881 {
22882 name: "NotEqual",
22883 argLen: 1,
22884 reg: regInfo{
22885 outputs: []outputInfo{
22886 {0, 335544319},
22887 },
22888 },
22889 },
22890 {
22891 name: "LessThan",
22892 argLen: 1,
22893 reg: regInfo{
22894 outputs: []outputInfo{
22895 {0, 335544319},
22896 },
22897 },
22898 },
22899 {
22900 name: "LessEqual",
22901 argLen: 1,
22902 reg: regInfo{
22903 outputs: []outputInfo{
22904 {0, 335544319},
22905 },
22906 },
22907 },
22908 {
22909 name: "GreaterThan",
22910 argLen: 1,
22911 reg: regInfo{
22912 outputs: []outputInfo{
22913 {0, 335544319},
22914 },
22915 },
22916 },
22917 {
22918 name: "GreaterEqual",
22919 argLen: 1,
22920 reg: regInfo{
22921 outputs: []outputInfo{
22922 {0, 335544319},
22923 },
22924 },
22925 },
22926 {
22927 name: "LessThanU",
22928 argLen: 1,
22929 reg: regInfo{
22930 outputs: []outputInfo{
22931 {0, 335544319},
22932 },
22933 },
22934 },
22935 {
22936 name: "LessEqualU",
22937 argLen: 1,
22938 reg: regInfo{
22939 outputs: []outputInfo{
22940 {0, 335544319},
22941 },
22942 },
22943 },
22944 {
22945 name: "GreaterThanU",
22946 argLen: 1,
22947 reg: regInfo{
22948 outputs: []outputInfo{
22949 {0, 335544319},
22950 },
22951 },
22952 },
22953 {
22954 name: "GreaterEqualU",
22955 argLen: 1,
22956 reg: regInfo{
22957 outputs: []outputInfo{
22958 {0, 335544319},
22959 },
22960 },
22961 },
22962 {
22963 name: "LessThanF",
22964 argLen: 1,
22965 reg: regInfo{
22966 outputs: []outputInfo{
22967 {0, 335544319},
22968 },
22969 },
22970 },
22971 {
22972 name: "LessEqualF",
22973 argLen: 1,
22974 reg: regInfo{
22975 outputs: []outputInfo{
22976 {0, 335544319},
22977 },
22978 },
22979 },
22980 {
22981 name: "GreaterThanF",
22982 argLen: 1,
22983 reg: regInfo{
22984 outputs: []outputInfo{
22985 {0, 335544319},
22986 },
22987 },
22988 },
22989 {
22990 name: "GreaterEqualF",
22991 argLen: 1,
22992 reg: regInfo{
22993 outputs: []outputInfo{
22994 {0, 335544319},
22995 },
22996 },
22997 },
22998 {
22999 name: "NotLessThanF",
23000 argLen: 1,
23001 reg: regInfo{
23002 outputs: []outputInfo{
23003 {0, 335544319},
23004 },
23005 },
23006 },
23007 {
23008 name: "NotLessEqualF",
23009 argLen: 1,
23010 reg: regInfo{
23011 outputs: []outputInfo{
23012 {0, 335544319},
23013 },
23014 },
23015 },
23016 {
23017 name: "NotGreaterThanF",
23018 argLen: 1,
23019 reg: regInfo{
23020 outputs: []outputInfo{
23021 {0, 335544319},
23022 },
23023 },
23024 },
23025 {
23026 name: "NotGreaterEqualF",
23027 argLen: 1,
23028 reg: regInfo{
23029 outputs: []outputInfo{
23030 {0, 335544319},
23031 },
23032 },
23033 },
23034 {
23035 name: "LessThanNoov",
23036 argLen: 1,
23037 reg: regInfo{
23038 outputs: []outputInfo{
23039 {0, 335544319},
23040 },
23041 },
23042 },
23043 {
23044 name: "GreaterEqualNoov",
23045 argLen: 1,
23046 reg: regInfo{
23047 outputs: []outputInfo{
23048 {0, 335544319},
23049 },
23050 },
23051 },
23052 {
23053 name: "DUFFZERO",
23054 auxType: auxInt64,
23055 argLen: 2,
23056 unsafePoint: true,
23057 reg: regInfo{
23058 inputs: []inputInfo{
23059 {0, 524288},
23060 },
23061 clobbers: 269156352,
23062 },
23063 },
23064 {
23065 name: "LoweredZero",
23066 argLen: 3,
23067 clobberFlags: true,
23068 faultOnNilArg0: true,
23069 reg: regInfo{
23070 inputs: []inputInfo{
23071 {0, 65536},
23072 {1, 335544319},
23073 },
23074 clobbers: 65536,
23075 },
23076 },
23077 {
23078 name: "DUFFCOPY",
23079 auxType: auxInt64,
23080 argLen: 3,
23081 unsafePoint: true,
23082 reg: regInfo{
23083 inputs: []inputInfo{
23084 {0, 1048576},
23085 {1, 524288},
23086 },
23087 clobbers: 303759360,
23088 },
23089 },
23090 {
23091 name: "LoweredMove",
23092 argLen: 4,
23093 clobberFlags: true,
23094 faultOnNilArg0: true,
23095 faultOnNilArg1: true,
23096 reg: regInfo{
23097 inputs: []inputInfo{
23098 {0, 131072},
23099 {1, 65536},
23100 {2, 318767103},
23101 },
23102 clobbers: 16973824,
23103 },
23104 },
23105 {
23106 name: "LoweredGetClosurePtr",
23107 argLen: 0,
23108 zeroWidth: true,
23109 reg: regInfo{
23110 outputs: []outputInfo{
23111 {0, 33554432},
23112 },
23113 },
23114 },
23115 {
23116 name: "LoweredGetCallerSP",
23117 argLen: 1,
23118 rematerializeable: true,
23119 reg: regInfo{
23120 outputs: []outputInfo{
23121 {0, 335544319},
23122 },
23123 },
23124 },
23125 {
23126 name: "LoweredGetCallerPC",
23127 argLen: 0,
23128 rematerializeable: true,
23129 reg: regInfo{
23130 outputs: []outputInfo{
23131 {0, 335544319},
23132 },
23133 },
23134 },
23135 {
23136 name: "FlagConstant",
23137 auxType: auxFlagConstant,
23138 argLen: 0,
23139 reg: regInfo{},
23140 },
23141 {
23142 name: "InvertFlags",
23143 argLen: 1,
23144 reg: regInfo{},
23145 },
23146 {
23147 name: "LDAR",
23148 argLen: 2,
23149 faultOnNilArg0: true,
23150 asm: arm64.ALDAR,
23151 reg: regInfo{
23152 inputs: []inputInfo{
23153 {0, 9223372038331170815},
23154 },
23155 outputs: []outputInfo{
23156 {0, 335544319},
23157 },
23158 },
23159 },
23160 {
23161 name: "LDARB",
23162 argLen: 2,
23163 faultOnNilArg0: true,
23164 asm: arm64.ALDARB,
23165 reg: regInfo{
23166 inputs: []inputInfo{
23167 {0, 9223372038331170815},
23168 },
23169 outputs: []outputInfo{
23170 {0, 335544319},
23171 },
23172 },
23173 },
23174 {
23175 name: "LDARW",
23176 argLen: 2,
23177 faultOnNilArg0: true,
23178 asm: arm64.ALDARW,
23179 reg: regInfo{
23180 inputs: []inputInfo{
23181 {0, 9223372038331170815},
23182 },
23183 outputs: []outputInfo{
23184 {0, 335544319},
23185 },
23186 },
23187 },
23188 {
23189 name: "STLRB",
23190 argLen: 3,
23191 faultOnNilArg0: true,
23192 hasSideEffects: true,
23193 asm: arm64.ASTLRB,
23194 reg: regInfo{
23195 inputs: []inputInfo{
23196 {1, 939524095},
23197 {0, 9223372038331170815},
23198 },
23199 },
23200 },
23201 {
23202 name: "STLR",
23203 argLen: 3,
23204 faultOnNilArg0: true,
23205 hasSideEffects: true,
23206 asm: arm64.ASTLR,
23207 reg: regInfo{
23208 inputs: []inputInfo{
23209 {1, 939524095},
23210 {0, 9223372038331170815},
23211 },
23212 },
23213 },
23214 {
23215 name: "STLRW",
23216 argLen: 3,
23217 faultOnNilArg0: true,
23218 hasSideEffects: true,
23219 asm: arm64.ASTLRW,
23220 reg: regInfo{
23221 inputs: []inputInfo{
23222 {1, 939524095},
23223 {0, 9223372038331170815},
23224 },
23225 },
23226 },
23227 {
23228 name: "LoweredAtomicExchange64",
23229 argLen: 3,
23230 resultNotInArgs: true,
23231 faultOnNilArg0: true,
23232 hasSideEffects: true,
23233 unsafePoint: true,
23234 reg: regInfo{
23235 inputs: []inputInfo{
23236 {1, 939524095},
23237 {0, 9223372038331170815},
23238 },
23239 outputs: []outputInfo{
23240 {0, 335544319},
23241 },
23242 },
23243 },
23244 {
23245 name: "LoweredAtomicExchange32",
23246 argLen: 3,
23247 resultNotInArgs: true,
23248 faultOnNilArg0: true,
23249 hasSideEffects: true,
23250 unsafePoint: true,
23251 reg: regInfo{
23252 inputs: []inputInfo{
23253 {1, 939524095},
23254 {0, 9223372038331170815},
23255 },
23256 outputs: []outputInfo{
23257 {0, 335544319},
23258 },
23259 },
23260 },
23261 {
23262 name: "LoweredAtomicExchange8",
23263 argLen: 3,
23264 resultNotInArgs: true,
23265 faultOnNilArg0: true,
23266 hasSideEffects: true,
23267 unsafePoint: true,
23268 reg: regInfo{
23269 inputs: []inputInfo{
23270 {1, 939524095},
23271 {0, 9223372038331170815},
23272 },
23273 outputs: []outputInfo{
23274 {0, 335544319},
23275 },
23276 },
23277 },
23278 {
23279 name: "LoweredAtomicExchange64Variant",
23280 argLen: 3,
23281 resultNotInArgs: true,
23282 faultOnNilArg0: true,
23283 hasSideEffects: true,
23284 reg: regInfo{
23285 inputs: []inputInfo{
23286 {1, 939524095},
23287 {0, 9223372038331170815},
23288 },
23289 outputs: []outputInfo{
23290 {0, 335544319},
23291 },
23292 },
23293 },
23294 {
23295 name: "LoweredAtomicExchange32Variant",
23296 argLen: 3,
23297 resultNotInArgs: true,
23298 faultOnNilArg0: true,
23299 hasSideEffects: true,
23300 reg: regInfo{
23301 inputs: []inputInfo{
23302 {1, 939524095},
23303 {0, 9223372038331170815},
23304 },
23305 outputs: []outputInfo{
23306 {0, 335544319},
23307 },
23308 },
23309 },
23310 {
23311 name: "LoweredAtomicExchange8Variant",
23312 argLen: 3,
23313 resultNotInArgs: true,
23314 faultOnNilArg0: true,
23315 hasSideEffects: true,
23316 unsafePoint: true,
23317 reg: regInfo{
23318 inputs: []inputInfo{
23319 {1, 939524095},
23320 {0, 9223372038331170815},
23321 },
23322 outputs: []outputInfo{
23323 {0, 335544319},
23324 },
23325 },
23326 },
23327 {
23328 name: "LoweredAtomicAdd64",
23329 argLen: 3,
23330 resultNotInArgs: true,
23331 faultOnNilArg0: true,
23332 hasSideEffects: true,
23333 unsafePoint: true,
23334 reg: regInfo{
23335 inputs: []inputInfo{
23336 {1, 939524095},
23337 {0, 9223372038331170815},
23338 },
23339 outputs: []outputInfo{
23340 {0, 335544319},
23341 },
23342 },
23343 },
23344 {
23345 name: "LoweredAtomicAdd32",
23346 argLen: 3,
23347 resultNotInArgs: true,
23348 faultOnNilArg0: true,
23349 hasSideEffects: true,
23350 unsafePoint: true,
23351 reg: regInfo{
23352 inputs: []inputInfo{
23353 {1, 939524095},
23354 {0, 9223372038331170815},
23355 },
23356 outputs: []outputInfo{
23357 {0, 335544319},
23358 },
23359 },
23360 },
23361 {
23362 name: "LoweredAtomicAdd64Variant",
23363 argLen: 3,
23364 resultNotInArgs: true,
23365 faultOnNilArg0: true,
23366 hasSideEffects: true,
23367 reg: regInfo{
23368 inputs: []inputInfo{
23369 {1, 939524095},
23370 {0, 9223372038331170815},
23371 },
23372 outputs: []outputInfo{
23373 {0, 335544319},
23374 },
23375 },
23376 },
23377 {
23378 name: "LoweredAtomicAdd32Variant",
23379 argLen: 3,
23380 resultNotInArgs: true,
23381 faultOnNilArg0: true,
23382 hasSideEffects: true,
23383 reg: regInfo{
23384 inputs: []inputInfo{
23385 {1, 939524095},
23386 {0, 9223372038331170815},
23387 },
23388 outputs: []outputInfo{
23389 {0, 335544319},
23390 },
23391 },
23392 },
23393 {
23394 name: "LoweredAtomicCas64",
23395 argLen: 4,
23396 resultNotInArgs: true,
23397 clobberFlags: true,
23398 faultOnNilArg0: true,
23399 hasSideEffects: true,
23400 unsafePoint: true,
23401 reg: regInfo{
23402 inputs: []inputInfo{
23403 {1, 939524095},
23404 {2, 939524095},
23405 {0, 9223372038331170815},
23406 },
23407 outputs: []outputInfo{
23408 {0, 335544319},
23409 },
23410 },
23411 },
23412 {
23413 name: "LoweredAtomicCas32",
23414 argLen: 4,
23415 resultNotInArgs: true,
23416 clobberFlags: true,
23417 faultOnNilArg0: true,
23418 hasSideEffects: true,
23419 unsafePoint: true,
23420 reg: regInfo{
23421 inputs: []inputInfo{
23422 {1, 939524095},
23423 {2, 939524095},
23424 {0, 9223372038331170815},
23425 },
23426 outputs: []outputInfo{
23427 {0, 335544319},
23428 },
23429 },
23430 },
23431 {
23432 name: "LoweredAtomicCas64Variant",
23433 argLen: 4,
23434 resultNotInArgs: true,
23435 clobberFlags: true,
23436 faultOnNilArg0: true,
23437 hasSideEffects: true,
23438 unsafePoint: true,
23439 reg: regInfo{
23440 inputs: []inputInfo{
23441 {1, 939524095},
23442 {2, 939524095},
23443 {0, 9223372038331170815},
23444 },
23445 outputs: []outputInfo{
23446 {0, 335544319},
23447 },
23448 },
23449 },
23450 {
23451 name: "LoweredAtomicCas32Variant",
23452 argLen: 4,
23453 resultNotInArgs: true,
23454 clobberFlags: true,
23455 faultOnNilArg0: true,
23456 hasSideEffects: true,
23457 unsafePoint: true,
23458 reg: regInfo{
23459 inputs: []inputInfo{
23460 {1, 939524095},
23461 {2, 939524095},
23462 {0, 9223372038331170815},
23463 },
23464 outputs: []outputInfo{
23465 {0, 335544319},
23466 },
23467 },
23468 },
23469 {
23470 name: "LoweredAtomicAnd8",
23471 argLen: 3,
23472 resultNotInArgs: true,
23473 needIntTemp: true,
23474 faultOnNilArg0: true,
23475 hasSideEffects: true,
23476 unsafePoint: true,
23477 asm: arm64.AAND,
23478 reg: regInfo{
23479 inputs: []inputInfo{
23480 {1, 939524095},
23481 {0, 9223372038331170815},
23482 },
23483 outputs: []outputInfo{
23484 {0, 335544319},
23485 },
23486 },
23487 },
23488 {
23489 name: "LoweredAtomicOr8",
23490 argLen: 3,
23491 resultNotInArgs: true,
23492 needIntTemp: true,
23493 faultOnNilArg0: true,
23494 hasSideEffects: true,
23495 unsafePoint: true,
23496 asm: arm64.AORR,
23497 reg: regInfo{
23498 inputs: []inputInfo{
23499 {1, 939524095},
23500 {0, 9223372038331170815},
23501 },
23502 outputs: []outputInfo{
23503 {0, 335544319},
23504 },
23505 },
23506 },
23507 {
23508 name: "LoweredAtomicAnd64",
23509 argLen: 3,
23510 resultNotInArgs: true,
23511 needIntTemp: true,
23512 faultOnNilArg0: true,
23513 hasSideEffects: true,
23514 unsafePoint: true,
23515 asm: arm64.AAND,
23516 reg: regInfo{
23517 inputs: []inputInfo{
23518 {1, 939524095},
23519 {0, 9223372038331170815},
23520 },
23521 outputs: []outputInfo{
23522 {0, 335544319},
23523 },
23524 },
23525 },
23526 {
23527 name: "LoweredAtomicOr64",
23528 argLen: 3,
23529 resultNotInArgs: true,
23530 needIntTemp: true,
23531 faultOnNilArg0: true,
23532 hasSideEffects: true,
23533 unsafePoint: true,
23534 asm: arm64.AORR,
23535 reg: regInfo{
23536 inputs: []inputInfo{
23537 {1, 939524095},
23538 {0, 9223372038331170815},
23539 },
23540 outputs: []outputInfo{
23541 {0, 335544319},
23542 },
23543 },
23544 },
23545 {
23546 name: "LoweredAtomicAnd32",
23547 argLen: 3,
23548 resultNotInArgs: true,
23549 needIntTemp: true,
23550 faultOnNilArg0: true,
23551 hasSideEffects: true,
23552 unsafePoint: true,
23553 asm: arm64.AAND,
23554 reg: regInfo{
23555 inputs: []inputInfo{
23556 {1, 939524095},
23557 {0, 9223372038331170815},
23558 },
23559 outputs: []outputInfo{
23560 {0, 335544319},
23561 },
23562 },
23563 },
23564 {
23565 name: "LoweredAtomicOr32",
23566 argLen: 3,
23567 resultNotInArgs: true,
23568 needIntTemp: true,
23569 faultOnNilArg0: true,
23570 hasSideEffects: true,
23571 unsafePoint: true,
23572 asm: arm64.AORR,
23573 reg: regInfo{
23574 inputs: []inputInfo{
23575 {1, 939524095},
23576 {0, 9223372038331170815},
23577 },
23578 outputs: []outputInfo{
23579 {0, 335544319},
23580 },
23581 },
23582 },
23583 {
23584 name: "LoweredAtomicAnd8Variant",
23585 argLen: 3,
23586 resultNotInArgs: true,
23587 faultOnNilArg0: true,
23588 hasSideEffects: true,
23589 unsafePoint: true,
23590 reg: regInfo{
23591 inputs: []inputInfo{
23592 {1, 939524095},
23593 {0, 9223372038331170815},
23594 },
23595 outputs: []outputInfo{
23596 {0, 335544319},
23597 },
23598 },
23599 },
23600 {
23601 name: "LoweredAtomicOr8Variant",
23602 argLen: 3,
23603 resultNotInArgs: true,
23604 faultOnNilArg0: true,
23605 hasSideEffects: true,
23606 reg: regInfo{
23607 inputs: []inputInfo{
23608 {1, 939524095},
23609 {0, 9223372038331170815},
23610 },
23611 outputs: []outputInfo{
23612 {0, 335544319},
23613 },
23614 },
23615 },
23616 {
23617 name: "LoweredAtomicAnd64Variant",
23618 argLen: 3,
23619 resultNotInArgs: true,
23620 faultOnNilArg0: true,
23621 hasSideEffects: true,
23622 unsafePoint: true,
23623 reg: regInfo{
23624 inputs: []inputInfo{
23625 {1, 939524095},
23626 {0, 9223372038331170815},
23627 },
23628 outputs: []outputInfo{
23629 {0, 335544319},
23630 },
23631 },
23632 },
23633 {
23634 name: "LoweredAtomicOr64Variant",
23635 argLen: 3,
23636 resultNotInArgs: true,
23637 faultOnNilArg0: true,
23638 hasSideEffects: true,
23639 reg: regInfo{
23640 inputs: []inputInfo{
23641 {1, 939524095},
23642 {0, 9223372038331170815},
23643 },
23644 outputs: []outputInfo{
23645 {0, 335544319},
23646 },
23647 },
23648 },
23649 {
23650 name: "LoweredAtomicAnd32Variant",
23651 argLen: 3,
23652 resultNotInArgs: true,
23653 faultOnNilArg0: true,
23654 hasSideEffects: true,
23655 unsafePoint: true,
23656 reg: regInfo{
23657 inputs: []inputInfo{
23658 {1, 939524095},
23659 {0, 9223372038331170815},
23660 },
23661 outputs: []outputInfo{
23662 {0, 335544319},
23663 },
23664 },
23665 },
23666 {
23667 name: "LoweredAtomicOr32Variant",
23668 argLen: 3,
23669 resultNotInArgs: true,
23670 faultOnNilArg0: true,
23671 hasSideEffects: true,
23672 reg: regInfo{
23673 inputs: []inputInfo{
23674 {1, 939524095},
23675 {0, 9223372038331170815},
23676 },
23677 outputs: []outputInfo{
23678 {0, 335544319},
23679 },
23680 },
23681 },
23682 {
23683 name: "LoweredWB",
23684 auxType: auxInt64,
23685 argLen: 1,
23686 clobberFlags: true,
23687 reg: regInfo{
23688 clobbers: 9223372034975924224,
23689 outputs: []outputInfo{
23690 {0, 16777216},
23691 },
23692 },
23693 },
23694 {
23695 name: "LoweredPanicBoundsRR",
23696 auxType: auxInt64,
23697 argLen: 3,
23698 call: true,
23699 reg: regInfo{
23700 inputs: []inputInfo{
23701 {0, 65535},
23702 {1, 65535},
23703 },
23704 },
23705 },
23706 {
23707 name: "LoweredPanicBoundsRC",
23708 auxType: auxPanicBoundsC,
23709 argLen: 2,
23710 call: true,
23711 reg: regInfo{
23712 inputs: []inputInfo{
23713 {0, 65535},
23714 },
23715 },
23716 },
23717 {
23718 name: "LoweredPanicBoundsCR",
23719 auxType: auxPanicBoundsC,
23720 argLen: 2,
23721 call: true,
23722 reg: regInfo{
23723 inputs: []inputInfo{
23724 {0, 65535},
23725 },
23726 },
23727 },
23728 {
23729 name: "LoweredPanicBoundsCC",
23730 auxType: auxPanicBoundsCC,
23731 argLen: 1,
23732 call: true,
23733 reg: regInfo{},
23734 },
23735 {
23736 name: "PRFM",
23737 auxType: auxInt64,
23738 argLen: 2,
23739 hasSideEffects: true,
23740 asm: arm64.APRFM,
23741 reg: regInfo{
23742 inputs: []inputInfo{
23743 {0, 9223372038331170815},
23744 },
23745 },
23746 },
23747 {
23748 name: "DMB",
23749 auxType: auxInt64,
23750 argLen: 1,
23751 hasSideEffects: true,
23752 asm: arm64.ADMB,
23753 reg: regInfo{},
23754 },
23755 {
23756 name: "ZERO",
23757 argLen: 0,
23758 zeroWidth: true,
23759 fixedReg: true,
23760 reg: regInfo{},
23761 },
23762
23763 {
23764 name: "NEGV",
23765 argLen: 1,
23766 reg: regInfo{
23767 inputs: []inputInfo{
23768 {0, 1073741816},
23769 },
23770 outputs: []outputInfo{
23771 {0, 1071644664},
23772 },
23773 },
23774 },
23775 {
23776 name: "NEGF",
23777 argLen: 1,
23778 asm: loong64.ANEGF,
23779 reg: regInfo{
23780 inputs: []inputInfo{
23781 {0, 4611686017353646080},
23782 },
23783 outputs: []outputInfo{
23784 {0, 4611686017353646080},
23785 },
23786 },
23787 },
23788 {
23789 name: "NEGD",
23790 argLen: 1,
23791 asm: loong64.ANEGD,
23792 reg: regInfo{
23793 inputs: []inputInfo{
23794 {0, 4611686017353646080},
23795 },
23796 outputs: []outputInfo{
23797 {0, 4611686017353646080},
23798 },
23799 },
23800 },
23801 {
23802 name: "SQRTD",
23803 argLen: 1,
23804 asm: loong64.ASQRTD,
23805 reg: regInfo{
23806 inputs: []inputInfo{
23807 {0, 4611686017353646080},
23808 },
23809 outputs: []outputInfo{
23810 {0, 4611686017353646080},
23811 },
23812 },
23813 },
23814 {
23815 name: "SQRTF",
23816 argLen: 1,
23817 asm: loong64.ASQRTF,
23818 reg: regInfo{
23819 inputs: []inputInfo{
23820 {0, 4611686017353646080},
23821 },
23822 outputs: []outputInfo{
23823 {0, 4611686017353646080},
23824 },
23825 },
23826 },
23827 {
23828 name: "ABSD",
23829 argLen: 1,
23830 asm: loong64.AABSD,
23831 reg: regInfo{
23832 inputs: []inputInfo{
23833 {0, 4611686017353646080},
23834 },
23835 outputs: []outputInfo{
23836 {0, 4611686017353646080},
23837 },
23838 },
23839 },
23840 {
23841 name: "CLZW",
23842 argLen: 1,
23843 asm: loong64.ACLZW,
23844 reg: regInfo{
23845 inputs: []inputInfo{
23846 {0, 1073741816},
23847 },
23848 outputs: []outputInfo{
23849 {0, 1071644664},
23850 },
23851 },
23852 },
23853 {
23854 name: "CLZV",
23855 argLen: 1,
23856 asm: loong64.ACLZV,
23857 reg: regInfo{
23858 inputs: []inputInfo{
23859 {0, 1073741816},
23860 },
23861 outputs: []outputInfo{
23862 {0, 1071644664},
23863 },
23864 },
23865 },
23866 {
23867 name: "CTZW",
23868 argLen: 1,
23869 asm: loong64.ACTZW,
23870 reg: regInfo{
23871 inputs: []inputInfo{
23872 {0, 1073741816},
23873 },
23874 outputs: []outputInfo{
23875 {0, 1071644664},
23876 },
23877 },
23878 },
23879 {
23880 name: "CTZV",
23881 argLen: 1,
23882 asm: loong64.ACTZV,
23883 reg: regInfo{
23884 inputs: []inputInfo{
23885 {0, 1073741816},
23886 },
23887 outputs: []outputInfo{
23888 {0, 1071644664},
23889 },
23890 },
23891 },
23892 {
23893 name: "REVB2H",
23894 argLen: 1,
23895 asm: loong64.AREVB2H,
23896 reg: regInfo{
23897 inputs: []inputInfo{
23898 {0, 1073741816},
23899 },
23900 outputs: []outputInfo{
23901 {0, 1071644664},
23902 },
23903 },
23904 },
23905 {
23906 name: "REVB2W",
23907 argLen: 1,
23908 asm: loong64.AREVB2W,
23909 reg: regInfo{
23910 inputs: []inputInfo{
23911 {0, 1073741816},
23912 },
23913 outputs: []outputInfo{
23914 {0, 1071644664},
23915 },
23916 },
23917 },
23918 {
23919 name: "REVBV",
23920 argLen: 1,
23921 asm: loong64.AREVBV,
23922 reg: regInfo{
23923 inputs: []inputInfo{
23924 {0, 1073741816},
23925 },
23926 outputs: []outputInfo{
23927 {0, 1071644664},
23928 },
23929 },
23930 },
23931 {
23932 name: "BITREV4B",
23933 argLen: 1,
23934 asm: loong64.ABITREV4B,
23935 reg: regInfo{
23936 inputs: []inputInfo{
23937 {0, 1073741816},
23938 },
23939 outputs: []outputInfo{
23940 {0, 1071644664},
23941 },
23942 },
23943 },
23944 {
23945 name: "BITREVW",
23946 argLen: 1,
23947 asm: loong64.ABITREVW,
23948 reg: regInfo{
23949 inputs: []inputInfo{
23950 {0, 1073741816},
23951 },
23952 outputs: []outputInfo{
23953 {0, 1071644664},
23954 },
23955 },
23956 },
23957 {
23958 name: "BITREVV",
23959 argLen: 1,
23960 asm: loong64.ABITREVV,
23961 reg: regInfo{
23962 inputs: []inputInfo{
23963 {0, 1073741816},
23964 },
23965 outputs: []outputInfo{
23966 {0, 1071644664},
23967 },
23968 },
23969 },
23970 {
23971 name: "VPCNT64",
23972 argLen: 1,
23973 asm: loong64.AVPCNTV,
23974 reg: regInfo{
23975 inputs: []inputInfo{
23976 {0, 4611686017353646080},
23977 },
23978 outputs: []outputInfo{
23979 {0, 4611686017353646080},
23980 },
23981 },
23982 },
23983 {
23984 name: "VPCNT32",
23985 argLen: 1,
23986 asm: loong64.AVPCNTW,
23987 reg: regInfo{
23988 inputs: []inputInfo{
23989 {0, 4611686017353646080},
23990 },
23991 outputs: []outputInfo{
23992 {0, 4611686017353646080},
23993 },
23994 },
23995 },
23996 {
23997 name: "VPCNT16",
23998 argLen: 1,
23999 asm: loong64.AVPCNTH,
24000 reg: regInfo{
24001 inputs: []inputInfo{
24002 {0, 4611686017353646080},
24003 },
24004 outputs: []outputInfo{
24005 {0, 4611686017353646080},
24006 },
24007 },
24008 },
24009 {
24010 name: "ADDV",
24011 argLen: 2,
24012 commutative: true,
24013 asm: loong64.AADDVU,
24014 reg: regInfo{
24015 inputs: []inputInfo{
24016 {0, 1073741816},
24017 {1, 1073741816},
24018 },
24019 outputs: []outputInfo{
24020 {0, 1071644664},
24021 },
24022 },
24023 },
24024 {
24025 name: "ADDVconst",
24026 auxType: auxInt64,
24027 argLen: 1,
24028 asm: loong64.AADDVU,
24029 reg: regInfo{
24030 inputs: []inputInfo{
24031 {0, 1073741820},
24032 },
24033 outputs: []outputInfo{
24034 {0, 1071644664},
24035 },
24036 },
24037 },
24038 {
24039 name: "SUBV",
24040 argLen: 2,
24041 asm: loong64.ASUBVU,
24042 reg: regInfo{
24043 inputs: []inputInfo{
24044 {0, 1073741816},
24045 {1, 1073741816},
24046 },
24047 outputs: []outputInfo{
24048 {0, 1071644664},
24049 },
24050 },
24051 },
24052 {
24053 name: "SUBVconst",
24054 auxType: auxInt64,
24055 argLen: 1,
24056 asm: loong64.ASUBVU,
24057 reg: regInfo{
24058 inputs: []inputInfo{
24059 {0, 1073741816},
24060 },
24061 outputs: []outputInfo{
24062 {0, 1071644664},
24063 },
24064 },
24065 },
24066 {
24067 name: "MULV",
24068 argLen: 2,
24069 commutative: true,
24070 asm: loong64.AMULV,
24071 reg: regInfo{
24072 inputs: []inputInfo{
24073 {0, 1073741816},
24074 {1, 1073741816},
24075 },
24076 outputs: []outputInfo{
24077 {0, 1071644664},
24078 },
24079 },
24080 },
24081 {
24082 name: "MULHV",
24083 argLen: 2,
24084 commutative: true,
24085 asm: loong64.AMULHV,
24086 reg: regInfo{
24087 inputs: []inputInfo{
24088 {0, 1073741816},
24089 {1, 1073741816},
24090 },
24091 outputs: []outputInfo{
24092 {0, 1071644664},
24093 },
24094 },
24095 },
24096 {
24097 name: "MULHVU",
24098 argLen: 2,
24099 commutative: true,
24100 asm: loong64.AMULHVU,
24101 reg: regInfo{
24102 inputs: []inputInfo{
24103 {0, 1073741816},
24104 {1, 1073741816},
24105 },
24106 outputs: []outputInfo{
24107 {0, 1071644664},
24108 },
24109 },
24110 },
24111 {
24112 name: "DIVV",
24113 argLen: 2,
24114 asm: loong64.ADIVV,
24115 reg: regInfo{
24116 inputs: []inputInfo{
24117 {0, 1073741816},
24118 {1, 1073741816},
24119 },
24120 outputs: []outputInfo{
24121 {0, 1071644664},
24122 },
24123 },
24124 },
24125 {
24126 name: "DIVVU",
24127 argLen: 2,
24128 asm: loong64.ADIVVU,
24129 reg: regInfo{
24130 inputs: []inputInfo{
24131 {0, 1073741816},
24132 {1, 1073741816},
24133 },
24134 outputs: []outputInfo{
24135 {0, 1071644664},
24136 },
24137 },
24138 },
24139 {
24140 name: "REMV",
24141 argLen: 2,
24142 asm: loong64.AREMV,
24143 reg: regInfo{
24144 inputs: []inputInfo{
24145 {0, 1073741816},
24146 {1, 1073741816},
24147 },
24148 outputs: []outputInfo{
24149 {0, 1071644664},
24150 },
24151 },
24152 },
24153 {
24154 name: "REMVU",
24155 argLen: 2,
24156 asm: loong64.AREMVU,
24157 reg: regInfo{
24158 inputs: []inputInfo{
24159 {0, 1073741816},
24160 {1, 1073741816},
24161 },
24162 outputs: []outputInfo{
24163 {0, 1071644664},
24164 },
24165 },
24166 },
24167 {
24168 name: "ADDF",
24169 argLen: 2,
24170 commutative: true,
24171 asm: loong64.AADDF,
24172 reg: regInfo{
24173 inputs: []inputInfo{
24174 {0, 4611686017353646080},
24175 {1, 4611686017353646080},
24176 },
24177 outputs: []outputInfo{
24178 {0, 4611686017353646080},
24179 },
24180 },
24181 },
24182 {
24183 name: "ADDD",
24184 argLen: 2,
24185 commutative: true,
24186 asm: loong64.AADDD,
24187 reg: regInfo{
24188 inputs: []inputInfo{
24189 {0, 4611686017353646080},
24190 {1, 4611686017353646080},
24191 },
24192 outputs: []outputInfo{
24193 {0, 4611686017353646080},
24194 },
24195 },
24196 },
24197 {
24198 name: "SUBF",
24199 argLen: 2,
24200 asm: loong64.ASUBF,
24201 reg: regInfo{
24202 inputs: []inputInfo{
24203 {0, 4611686017353646080},
24204 {1, 4611686017353646080},
24205 },
24206 outputs: []outputInfo{
24207 {0, 4611686017353646080},
24208 },
24209 },
24210 },
24211 {
24212 name: "SUBD",
24213 argLen: 2,
24214 asm: loong64.ASUBD,
24215 reg: regInfo{
24216 inputs: []inputInfo{
24217 {0, 4611686017353646080},
24218 {1, 4611686017353646080},
24219 },
24220 outputs: []outputInfo{
24221 {0, 4611686017353646080},
24222 },
24223 },
24224 },
24225 {
24226 name: "MULF",
24227 argLen: 2,
24228 commutative: true,
24229 asm: loong64.AMULF,
24230 reg: regInfo{
24231 inputs: []inputInfo{
24232 {0, 4611686017353646080},
24233 {1, 4611686017353646080},
24234 },
24235 outputs: []outputInfo{
24236 {0, 4611686017353646080},
24237 },
24238 },
24239 },
24240 {
24241 name: "MULD",
24242 argLen: 2,
24243 commutative: true,
24244 asm: loong64.AMULD,
24245 reg: regInfo{
24246 inputs: []inputInfo{
24247 {0, 4611686017353646080},
24248 {1, 4611686017353646080},
24249 },
24250 outputs: []outputInfo{
24251 {0, 4611686017353646080},
24252 },
24253 },
24254 },
24255 {
24256 name: "DIVF",
24257 argLen: 2,
24258 asm: loong64.ADIVF,
24259 reg: regInfo{
24260 inputs: []inputInfo{
24261 {0, 4611686017353646080},
24262 {1, 4611686017353646080},
24263 },
24264 outputs: []outputInfo{
24265 {0, 4611686017353646080},
24266 },
24267 },
24268 },
24269 {
24270 name: "DIVD",
24271 argLen: 2,
24272 asm: loong64.ADIVD,
24273 reg: regInfo{
24274 inputs: []inputInfo{
24275 {0, 4611686017353646080},
24276 {1, 4611686017353646080},
24277 },
24278 outputs: []outputInfo{
24279 {0, 4611686017353646080},
24280 },
24281 },
24282 },
24283 {
24284 name: "AND",
24285 argLen: 2,
24286 commutative: true,
24287 asm: loong64.AAND,
24288 reg: regInfo{
24289 inputs: []inputInfo{
24290 {0, 1073741816},
24291 {1, 1073741816},
24292 },
24293 outputs: []outputInfo{
24294 {0, 1071644664},
24295 },
24296 },
24297 },
24298 {
24299 name: "ANDconst",
24300 auxType: auxInt64,
24301 argLen: 1,
24302 asm: loong64.AAND,
24303 reg: regInfo{
24304 inputs: []inputInfo{
24305 {0, 1073741816},
24306 },
24307 outputs: []outputInfo{
24308 {0, 1071644664},
24309 },
24310 },
24311 },
24312 {
24313 name: "OR",
24314 argLen: 2,
24315 commutative: true,
24316 asm: loong64.AOR,
24317 reg: regInfo{
24318 inputs: []inputInfo{
24319 {0, 1073741816},
24320 {1, 1073741816},
24321 },
24322 outputs: []outputInfo{
24323 {0, 1071644664},
24324 },
24325 },
24326 },
24327 {
24328 name: "ORconst",
24329 auxType: auxInt64,
24330 argLen: 1,
24331 asm: loong64.AOR,
24332 reg: regInfo{
24333 inputs: []inputInfo{
24334 {0, 1073741816},
24335 },
24336 outputs: []outputInfo{
24337 {0, 1071644664},
24338 },
24339 },
24340 },
24341 {
24342 name: "XOR",
24343 argLen: 2,
24344 commutative: true,
24345 asm: loong64.AXOR,
24346 reg: regInfo{
24347 inputs: []inputInfo{
24348 {0, 1073741816},
24349 {1, 1073741816},
24350 },
24351 outputs: []outputInfo{
24352 {0, 1071644664},
24353 },
24354 },
24355 },
24356 {
24357 name: "XORconst",
24358 auxType: auxInt64,
24359 argLen: 1,
24360 asm: loong64.AXOR,
24361 reg: regInfo{
24362 inputs: []inputInfo{
24363 {0, 1073741816},
24364 },
24365 outputs: []outputInfo{
24366 {0, 1071644664},
24367 },
24368 },
24369 },
24370 {
24371 name: "NOR",
24372 argLen: 2,
24373 commutative: true,
24374 asm: loong64.ANOR,
24375 reg: regInfo{
24376 inputs: []inputInfo{
24377 {0, 1073741816},
24378 {1, 1073741816},
24379 },
24380 outputs: []outputInfo{
24381 {0, 1071644664},
24382 },
24383 },
24384 },
24385 {
24386 name: "NORconst",
24387 auxType: auxInt64,
24388 argLen: 1,
24389 asm: loong64.ANOR,
24390 reg: regInfo{
24391 inputs: []inputInfo{
24392 {0, 1073741816},
24393 },
24394 outputs: []outputInfo{
24395 {0, 1071644664},
24396 },
24397 },
24398 },
24399 {
24400 name: "ANDN",
24401 argLen: 2,
24402 asm: loong64.AANDN,
24403 reg: regInfo{
24404 inputs: []inputInfo{
24405 {0, 1073741816},
24406 {1, 1073741816},
24407 },
24408 outputs: []outputInfo{
24409 {0, 1071644664},
24410 },
24411 },
24412 },
24413 {
24414 name: "ORN",
24415 argLen: 2,
24416 asm: loong64.AORN,
24417 reg: regInfo{
24418 inputs: []inputInfo{
24419 {0, 1073741816},
24420 {1, 1073741816},
24421 },
24422 outputs: []outputInfo{
24423 {0, 1071644664},
24424 },
24425 },
24426 },
24427 {
24428 name: "FMADDF",
24429 argLen: 3,
24430 commutative: true,
24431 asm: loong64.AFMADDF,
24432 reg: regInfo{
24433 inputs: []inputInfo{
24434 {0, 4611686017353646080},
24435 {1, 4611686017353646080},
24436 {2, 4611686017353646080},
24437 },
24438 outputs: []outputInfo{
24439 {0, 4611686017353646080},
24440 },
24441 },
24442 },
24443 {
24444 name: "FMADDD",
24445 argLen: 3,
24446 commutative: true,
24447 asm: loong64.AFMADDD,
24448 reg: regInfo{
24449 inputs: []inputInfo{
24450 {0, 4611686017353646080},
24451 {1, 4611686017353646080},
24452 {2, 4611686017353646080},
24453 },
24454 outputs: []outputInfo{
24455 {0, 4611686017353646080},
24456 },
24457 },
24458 },
24459 {
24460 name: "FMSUBF",
24461 argLen: 3,
24462 commutative: true,
24463 asm: loong64.AFMSUBF,
24464 reg: regInfo{
24465 inputs: []inputInfo{
24466 {0, 4611686017353646080},
24467 {1, 4611686017353646080},
24468 {2, 4611686017353646080},
24469 },
24470 outputs: []outputInfo{
24471 {0, 4611686017353646080},
24472 },
24473 },
24474 },
24475 {
24476 name: "FMSUBD",
24477 argLen: 3,
24478 commutative: true,
24479 asm: loong64.AFMSUBD,
24480 reg: regInfo{
24481 inputs: []inputInfo{
24482 {0, 4611686017353646080},
24483 {1, 4611686017353646080},
24484 {2, 4611686017353646080},
24485 },
24486 outputs: []outputInfo{
24487 {0, 4611686017353646080},
24488 },
24489 },
24490 },
24491 {
24492 name: "FNMADDF",
24493 argLen: 3,
24494 commutative: true,
24495 asm: loong64.AFNMADDF,
24496 reg: regInfo{
24497 inputs: []inputInfo{
24498 {0, 4611686017353646080},
24499 {1, 4611686017353646080},
24500 {2, 4611686017353646080},
24501 },
24502 outputs: []outputInfo{
24503 {0, 4611686017353646080},
24504 },
24505 },
24506 },
24507 {
24508 name: "FNMADDD",
24509 argLen: 3,
24510 commutative: true,
24511 asm: loong64.AFNMADDD,
24512 reg: regInfo{
24513 inputs: []inputInfo{
24514 {0, 4611686017353646080},
24515 {1, 4611686017353646080},
24516 {2, 4611686017353646080},
24517 },
24518 outputs: []outputInfo{
24519 {0, 4611686017353646080},
24520 },
24521 },
24522 },
24523 {
24524 name: "FNMSUBF",
24525 argLen: 3,
24526 commutative: true,
24527 asm: loong64.AFNMSUBF,
24528 reg: regInfo{
24529 inputs: []inputInfo{
24530 {0, 4611686017353646080},
24531 {1, 4611686017353646080},
24532 {2, 4611686017353646080},
24533 },
24534 outputs: []outputInfo{
24535 {0, 4611686017353646080},
24536 },
24537 },
24538 },
24539 {
24540 name: "FNMSUBD",
24541 argLen: 3,
24542 commutative: true,
24543 asm: loong64.AFNMSUBD,
24544 reg: regInfo{
24545 inputs: []inputInfo{
24546 {0, 4611686017353646080},
24547 {1, 4611686017353646080},
24548 {2, 4611686017353646080},
24549 },
24550 outputs: []outputInfo{
24551 {0, 4611686017353646080},
24552 },
24553 },
24554 },
24555 {
24556 name: "FMINF",
24557 argLen: 2,
24558 commutative: true,
24559 resultNotInArgs: true,
24560 asm: loong64.AFMINF,
24561 reg: regInfo{
24562 inputs: []inputInfo{
24563 {0, 4611686017353646080},
24564 {1, 4611686017353646080},
24565 },
24566 outputs: []outputInfo{
24567 {0, 4611686017353646080},
24568 },
24569 },
24570 },
24571 {
24572 name: "FMIND",
24573 argLen: 2,
24574 commutative: true,
24575 resultNotInArgs: true,
24576 asm: loong64.AFMIND,
24577 reg: regInfo{
24578 inputs: []inputInfo{
24579 {0, 4611686017353646080},
24580 {1, 4611686017353646080},
24581 },
24582 outputs: []outputInfo{
24583 {0, 4611686017353646080},
24584 },
24585 },
24586 },
24587 {
24588 name: "FMAXF",
24589 argLen: 2,
24590 commutative: true,
24591 resultNotInArgs: true,
24592 asm: loong64.AFMAXF,
24593 reg: regInfo{
24594 inputs: []inputInfo{
24595 {0, 4611686017353646080},
24596 {1, 4611686017353646080},
24597 },
24598 outputs: []outputInfo{
24599 {0, 4611686017353646080},
24600 },
24601 },
24602 },
24603 {
24604 name: "FMAXD",
24605 argLen: 2,
24606 commutative: true,
24607 resultNotInArgs: true,
24608 asm: loong64.AFMAXD,
24609 reg: regInfo{
24610 inputs: []inputInfo{
24611 {0, 4611686017353646080},
24612 {1, 4611686017353646080},
24613 },
24614 outputs: []outputInfo{
24615 {0, 4611686017353646080},
24616 },
24617 },
24618 },
24619 {
24620 name: "MASKEQZ",
24621 argLen: 2,
24622 asm: loong64.AMASKEQZ,
24623 reg: regInfo{
24624 inputs: []inputInfo{
24625 {0, 1073741816},
24626 {1, 1073741816},
24627 },
24628 outputs: []outputInfo{
24629 {0, 1071644664},
24630 },
24631 },
24632 },
24633 {
24634 name: "MASKNEZ",
24635 argLen: 2,
24636 asm: loong64.AMASKNEZ,
24637 reg: regInfo{
24638 inputs: []inputInfo{
24639 {0, 1073741816},
24640 {1, 1073741816},
24641 },
24642 outputs: []outputInfo{
24643 {0, 1071644664},
24644 },
24645 },
24646 },
24647 {
24648 name: "FCOPYSGD",
24649 argLen: 2,
24650 asm: loong64.AFCOPYSGD,
24651 reg: regInfo{
24652 inputs: []inputInfo{
24653 {0, 4611686017353646080},
24654 {1, 4611686017353646080},
24655 },
24656 outputs: []outputInfo{
24657 {0, 4611686017353646080},
24658 },
24659 },
24660 },
24661 {
24662 name: "SLL",
24663 argLen: 2,
24664 asm: loong64.ASLL,
24665 reg: regInfo{
24666 inputs: []inputInfo{
24667 {0, 1073741816},
24668 {1, 1073741816},
24669 },
24670 outputs: []outputInfo{
24671 {0, 1071644664},
24672 },
24673 },
24674 },
24675 {
24676 name: "SLLV",
24677 argLen: 2,
24678 asm: loong64.ASLLV,
24679 reg: regInfo{
24680 inputs: []inputInfo{
24681 {0, 1073741816},
24682 {1, 1073741816},
24683 },
24684 outputs: []outputInfo{
24685 {0, 1071644664},
24686 },
24687 },
24688 },
24689 {
24690 name: "SLLconst",
24691 auxType: auxInt64,
24692 argLen: 1,
24693 asm: loong64.ASLL,
24694 reg: regInfo{
24695 inputs: []inputInfo{
24696 {0, 1073741816},
24697 },
24698 outputs: []outputInfo{
24699 {0, 1071644664},
24700 },
24701 },
24702 },
24703 {
24704 name: "SLLVconst",
24705 auxType: auxInt64,
24706 argLen: 1,
24707 asm: loong64.ASLLV,
24708 reg: regInfo{
24709 inputs: []inputInfo{
24710 {0, 1073741816},
24711 },
24712 outputs: []outputInfo{
24713 {0, 1071644664},
24714 },
24715 },
24716 },
24717 {
24718 name: "SRL",
24719 argLen: 2,
24720 asm: loong64.ASRL,
24721 reg: regInfo{
24722 inputs: []inputInfo{
24723 {0, 1073741816},
24724 {1, 1073741816},
24725 },
24726 outputs: []outputInfo{
24727 {0, 1071644664},
24728 },
24729 },
24730 },
24731 {
24732 name: "SRLV",
24733 argLen: 2,
24734 asm: loong64.ASRLV,
24735 reg: regInfo{
24736 inputs: []inputInfo{
24737 {0, 1073741816},
24738 {1, 1073741816},
24739 },
24740 outputs: []outputInfo{
24741 {0, 1071644664},
24742 },
24743 },
24744 },
24745 {
24746 name: "SRLconst",
24747 auxType: auxInt64,
24748 argLen: 1,
24749 asm: loong64.ASRL,
24750 reg: regInfo{
24751 inputs: []inputInfo{
24752 {0, 1073741816},
24753 },
24754 outputs: []outputInfo{
24755 {0, 1071644664},
24756 },
24757 },
24758 },
24759 {
24760 name: "SRLVconst",
24761 auxType: auxInt64,
24762 argLen: 1,
24763 asm: loong64.ASRLV,
24764 reg: regInfo{
24765 inputs: []inputInfo{
24766 {0, 1073741816},
24767 },
24768 outputs: []outputInfo{
24769 {0, 1071644664},
24770 },
24771 },
24772 },
24773 {
24774 name: "SRA",
24775 argLen: 2,
24776 asm: loong64.ASRA,
24777 reg: regInfo{
24778 inputs: []inputInfo{
24779 {0, 1073741816},
24780 {1, 1073741816},
24781 },
24782 outputs: []outputInfo{
24783 {0, 1071644664},
24784 },
24785 },
24786 },
24787 {
24788 name: "SRAV",
24789 argLen: 2,
24790 asm: loong64.ASRAV,
24791 reg: regInfo{
24792 inputs: []inputInfo{
24793 {0, 1073741816},
24794 {1, 1073741816},
24795 },
24796 outputs: []outputInfo{
24797 {0, 1071644664},
24798 },
24799 },
24800 },
24801 {
24802 name: "SRAconst",
24803 auxType: auxInt64,
24804 argLen: 1,
24805 asm: loong64.ASRA,
24806 reg: regInfo{
24807 inputs: []inputInfo{
24808 {0, 1073741816},
24809 },
24810 outputs: []outputInfo{
24811 {0, 1071644664},
24812 },
24813 },
24814 },
24815 {
24816 name: "SRAVconst",
24817 auxType: auxInt64,
24818 argLen: 1,
24819 asm: loong64.ASRAV,
24820 reg: regInfo{
24821 inputs: []inputInfo{
24822 {0, 1073741816},
24823 },
24824 outputs: []outputInfo{
24825 {0, 1071644664},
24826 },
24827 },
24828 },
24829 {
24830 name: "ROTR",
24831 argLen: 2,
24832 asm: loong64.AROTR,
24833 reg: regInfo{
24834 inputs: []inputInfo{
24835 {0, 1073741816},
24836 {1, 1073741816},
24837 },
24838 outputs: []outputInfo{
24839 {0, 1071644664},
24840 },
24841 },
24842 },
24843 {
24844 name: "ROTRV",
24845 argLen: 2,
24846 asm: loong64.AROTRV,
24847 reg: regInfo{
24848 inputs: []inputInfo{
24849 {0, 1073741816},
24850 {1, 1073741816},
24851 },
24852 outputs: []outputInfo{
24853 {0, 1071644664},
24854 },
24855 },
24856 },
24857 {
24858 name: "ROTRconst",
24859 auxType: auxInt64,
24860 argLen: 1,
24861 asm: loong64.AROTR,
24862 reg: regInfo{
24863 inputs: []inputInfo{
24864 {0, 1073741816},
24865 },
24866 outputs: []outputInfo{
24867 {0, 1071644664},
24868 },
24869 },
24870 },
24871 {
24872 name: "ROTRVconst",
24873 auxType: auxInt64,
24874 argLen: 1,
24875 asm: loong64.AROTRV,
24876 reg: regInfo{
24877 inputs: []inputInfo{
24878 {0, 1073741816},
24879 },
24880 outputs: []outputInfo{
24881 {0, 1071644664},
24882 },
24883 },
24884 },
24885 {
24886 name: "SGT",
24887 argLen: 2,
24888 asm: loong64.ASGT,
24889 reg: regInfo{
24890 inputs: []inputInfo{
24891 {0, 1073741816},
24892 {1, 1073741816},
24893 },
24894 outputs: []outputInfo{
24895 {0, 1071644664},
24896 },
24897 },
24898 },
24899 {
24900 name: "SGTconst",
24901 auxType: auxInt64,
24902 argLen: 1,
24903 asm: loong64.ASGT,
24904 reg: regInfo{
24905 inputs: []inputInfo{
24906 {0, 1073741816},
24907 },
24908 outputs: []outputInfo{
24909 {0, 1071644664},
24910 },
24911 },
24912 },
24913 {
24914 name: "SGTU",
24915 argLen: 2,
24916 asm: loong64.ASGTU,
24917 reg: regInfo{
24918 inputs: []inputInfo{
24919 {0, 1073741816},
24920 {1, 1073741816},
24921 },
24922 outputs: []outputInfo{
24923 {0, 1071644664},
24924 },
24925 },
24926 },
24927 {
24928 name: "SGTUconst",
24929 auxType: auxInt64,
24930 argLen: 1,
24931 asm: loong64.ASGTU,
24932 reg: regInfo{
24933 inputs: []inputInfo{
24934 {0, 1073741816},
24935 },
24936 outputs: []outputInfo{
24937 {0, 1071644664},
24938 },
24939 },
24940 },
24941 {
24942 name: "CMPEQF",
24943 argLen: 2,
24944 asm: loong64.ACMPEQF,
24945 reg: regInfo{
24946 inputs: []inputInfo{
24947 {0, 4611686017353646080},
24948 {1, 4611686017353646080},
24949 },
24950 },
24951 },
24952 {
24953 name: "CMPEQD",
24954 argLen: 2,
24955 asm: loong64.ACMPEQD,
24956 reg: regInfo{
24957 inputs: []inputInfo{
24958 {0, 4611686017353646080},
24959 {1, 4611686017353646080},
24960 },
24961 },
24962 },
24963 {
24964 name: "CMPGEF",
24965 argLen: 2,
24966 asm: loong64.ACMPGEF,
24967 reg: regInfo{
24968 inputs: []inputInfo{
24969 {0, 4611686017353646080},
24970 {1, 4611686017353646080},
24971 },
24972 },
24973 },
24974 {
24975 name: "CMPGED",
24976 argLen: 2,
24977 asm: loong64.ACMPGED,
24978 reg: regInfo{
24979 inputs: []inputInfo{
24980 {0, 4611686017353646080},
24981 {1, 4611686017353646080},
24982 },
24983 },
24984 },
24985 {
24986 name: "CMPGTF",
24987 argLen: 2,
24988 asm: loong64.ACMPGTF,
24989 reg: regInfo{
24990 inputs: []inputInfo{
24991 {0, 4611686017353646080},
24992 {1, 4611686017353646080},
24993 },
24994 },
24995 },
24996 {
24997 name: "CMPGTD",
24998 argLen: 2,
24999 asm: loong64.ACMPGTD,
25000 reg: regInfo{
25001 inputs: []inputInfo{
25002 {0, 4611686017353646080},
25003 {1, 4611686017353646080},
25004 },
25005 },
25006 },
25007 {
25008 name: "BSTRPICKW",
25009 auxType: auxInt64,
25010 argLen: 1,
25011 asm: loong64.ABSTRPICKW,
25012 reg: regInfo{
25013 inputs: []inputInfo{
25014 {0, 1073741816},
25015 },
25016 outputs: []outputInfo{
25017 {0, 1071644664},
25018 },
25019 },
25020 },
25021 {
25022 name: "BSTRPICKV",
25023 auxType: auxInt64,
25024 argLen: 1,
25025 asm: loong64.ABSTRPICKV,
25026 reg: regInfo{
25027 inputs: []inputInfo{
25028 {0, 1073741816},
25029 },
25030 outputs: []outputInfo{
25031 {0, 1071644664},
25032 },
25033 },
25034 },
25035 {
25036 name: "MOVVconst",
25037 auxType: auxInt64,
25038 argLen: 0,
25039 rematerializeable: true,
25040 asm: loong64.AMOVV,
25041 reg: regInfo{
25042 outputs: []outputInfo{
25043 {0, 1071644664},
25044 },
25045 },
25046 },
25047 {
25048 name: "MOVFconst",
25049 auxType: auxFloat64,
25050 argLen: 0,
25051 rematerializeable: true,
25052 asm: loong64.AMOVF,
25053 reg: regInfo{
25054 outputs: []outputInfo{
25055 {0, 4611686017353646080},
25056 },
25057 },
25058 },
25059 {
25060 name: "MOVDconst",
25061 auxType: auxFloat64,
25062 argLen: 0,
25063 rematerializeable: true,
25064 asm: loong64.AMOVD,
25065 reg: regInfo{
25066 outputs: []outputInfo{
25067 {0, 4611686017353646080},
25068 },
25069 },
25070 },
25071 {
25072 name: "MOVVaddr",
25073 auxType: auxSymOff,
25074 argLen: 1,
25075 rematerializeable: true,
25076 symEffect: SymAddr,
25077 asm: loong64.AMOVV,
25078 reg: regInfo{
25079 inputs: []inputInfo{
25080 {0, 4611686018427387908},
25081 },
25082 outputs: []outputInfo{
25083 {0, 1071644664},
25084 },
25085 },
25086 },
25087 {
25088 name: "MOVBload",
25089 auxType: auxSymOff,
25090 argLen: 2,
25091 faultOnNilArg0: true,
25092 symEffect: SymRead,
25093 asm: loong64.AMOVB,
25094 reg: regInfo{
25095 inputs: []inputInfo{
25096 {0, 4611686019501129724},
25097 },
25098 outputs: []outputInfo{
25099 {0, 1071644664},
25100 },
25101 },
25102 },
25103 {
25104 name: "MOVBUload",
25105 auxType: auxSymOff,
25106 argLen: 2,
25107 faultOnNilArg0: true,
25108 symEffect: SymRead,
25109 asm: loong64.AMOVBU,
25110 reg: regInfo{
25111 inputs: []inputInfo{
25112 {0, 4611686019501129724},
25113 },
25114 outputs: []outputInfo{
25115 {0, 1071644664},
25116 },
25117 },
25118 },
25119 {
25120 name: "MOVHload",
25121 auxType: auxSymOff,
25122 argLen: 2,
25123 faultOnNilArg0: true,
25124 symEffect: SymRead,
25125 asm: loong64.AMOVH,
25126 reg: regInfo{
25127 inputs: []inputInfo{
25128 {0, 4611686019501129724},
25129 },
25130 outputs: []outputInfo{
25131 {0, 1071644664},
25132 },
25133 },
25134 },
25135 {
25136 name: "MOVHUload",
25137 auxType: auxSymOff,
25138 argLen: 2,
25139 faultOnNilArg0: true,
25140 symEffect: SymRead,
25141 asm: loong64.AMOVHU,
25142 reg: regInfo{
25143 inputs: []inputInfo{
25144 {0, 4611686019501129724},
25145 },
25146 outputs: []outputInfo{
25147 {0, 1071644664},
25148 },
25149 },
25150 },
25151 {
25152 name: "MOVWload",
25153 auxType: auxSymOff,
25154 argLen: 2,
25155 faultOnNilArg0: true,
25156 symEffect: SymRead,
25157 asm: loong64.AMOVW,
25158 reg: regInfo{
25159 inputs: []inputInfo{
25160 {0, 4611686019501129724},
25161 },
25162 outputs: []outputInfo{
25163 {0, 1071644664},
25164 },
25165 },
25166 },
25167 {
25168 name: "MOVWUload",
25169 auxType: auxSymOff,
25170 argLen: 2,
25171 faultOnNilArg0: true,
25172 symEffect: SymRead,
25173 asm: loong64.AMOVWU,
25174 reg: regInfo{
25175 inputs: []inputInfo{
25176 {0, 4611686019501129724},
25177 },
25178 outputs: []outputInfo{
25179 {0, 1071644664},
25180 },
25181 },
25182 },
25183 {
25184 name: "MOVVload",
25185 auxType: auxSymOff,
25186 argLen: 2,
25187 faultOnNilArg0: true,
25188 symEffect: SymRead,
25189 asm: loong64.AMOVV,
25190 reg: regInfo{
25191 inputs: []inputInfo{
25192 {0, 4611686019501129724},
25193 },
25194 outputs: []outputInfo{
25195 {0, 1071644664},
25196 },
25197 },
25198 },
25199 {
25200 name: "MOVFload",
25201 auxType: auxSymOff,
25202 argLen: 2,
25203 faultOnNilArg0: true,
25204 symEffect: SymRead,
25205 asm: loong64.AMOVF,
25206 reg: regInfo{
25207 inputs: []inputInfo{
25208 {0, 4611686019501129724},
25209 },
25210 outputs: []outputInfo{
25211 {0, 4611686017353646080},
25212 },
25213 },
25214 },
25215 {
25216 name: "MOVDload",
25217 auxType: auxSymOff,
25218 argLen: 2,
25219 faultOnNilArg0: true,
25220 symEffect: SymRead,
25221 asm: loong64.AMOVD,
25222 reg: regInfo{
25223 inputs: []inputInfo{
25224 {0, 4611686019501129724},
25225 },
25226 outputs: []outputInfo{
25227 {0, 4611686017353646080},
25228 },
25229 },
25230 },
25231 {
25232 name: "MOVVloadidx",
25233 argLen: 3,
25234 asm: loong64.AMOVV,
25235 reg: regInfo{
25236 inputs: []inputInfo{
25237 {1, 1073741816},
25238 {0, 4611686019501129724},
25239 },
25240 outputs: []outputInfo{
25241 {0, 1071644664},
25242 },
25243 },
25244 },
25245 {
25246 name: "MOVWloadidx",
25247 argLen: 3,
25248 asm: loong64.AMOVW,
25249 reg: regInfo{
25250 inputs: []inputInfo{
25251 {1, 1073741816},
25252 {0, 4611686019501129724},
25253 },
25254 outputs: []outputInfo{
25255 {0, 1071644664},
25256 },
25257 },
25258 },
25259 {
25260 name: "MOVWUloadidx",
25261 argLen: 3,
25262 asm: loong64.AMOVWU,
25263 reg: regInfo{
25264 inputs: []inputInfo{
25265 {1, 1073741816},
25266 {0, 4611686019501129724},
25267 },
25268 outputs: []outputInfo{
25269 {0, 1071644664},
25270 },
25271 },
25272 },
25273 {
25274 name: "MOVHloadidx",
25275 argLen: 3,
25276 asm: loong64.AMOVH,
25277 reg: regInfo{
25278 inputs: []inputInfo{
25279 {1, 1073741816},
25280 {0, 4611686019501129724},
25281 },
25282 outputs: []outputInfo{
25283 {0, 1071644664},
25284 },
25285 },
25286 },
25287 {
25288 name: "MOVHUloadidx",
25289 argLen: 3,
25290 asm: loong64.AMOVHU,
25291 reg: regInfo{
25292 inputs: []inputInfo{
25293 {1, 1073741816},
25294 {0, 4611686019501129724},
25295 },
25296 outputs: []outputInfo{
25297 {0, 1071644664},
25298 },
25299 },
25300 },
25301 {
25302 name: "MOVBloadidx",
25303 argLen: 3,
25304 asm: loong64.AMOVB,
25305 reg: regInfo{
25306 inputs: []inputInfo{
25307 {1, 1073741816},
25308 {0, 4611686019501129724},
25309 },
25310 outputs: []outputInfo{
25311 {0, 1071644664},
25312 },
25313 },
25314 },
25315 {
25316 name: "MOVBUloadidx",
25317 argLen: 3,
25318 asm: loong64.AMOVBU,
25319 reg: regInfo{
25320 inputs: []inputInfo{
25321 {1, 1073741816},
25322 {0, 4611686019501129724},
25323 },
25324 outputs: []outputInfo{
25325 {0, 1071644664},
25326 },
25327 },
25328 },
25329 {
25330 name: "MOVFloadidx",
25331 argLen: 3,
25332 asm: loong64.AMOVF,
25333 reg: regInfo{
25334 inputs: []inputInfo{
25335 {1, 1073741816},
25336 {0, 4611686019501129724},
25337 },
25338 outputs: []outputInfo{
25339 {0, 4611686017353646080},
25340 },
25341 },
25342 },
25343 {
25344 name: "MOVDloadidx",
25345 argLen: 3,
25346 asm: loong64.AMOVD,
25347 reg: regInfo{
25348 inputs: []inputInfo{
25349 {1, 1073741816},
25350 {0, 4611686019501129724},
25351 },
25352 outputs: []outputInfo{
25353 {0, 4611686017353646080},
25354 },
25355 },
25356 },
25357 {
25358 name: "MOVBstore",
25359 auxType: auxSymOff,
25360 argLen: 3,
25361 faultOnNilArg0: true,
25362 symEffect: SymWrite,
25363 asm: loong64.AMOVB,
25364 reg: regInfo{
25365 inputs: []inputInfo{
25366 {1, 1073741816},
25367 {0, 4611686019501129724},
25368 },
25369 },
25370 },
25371 {
25372 name: "MOVHstore",
25373 auxType: auxSymOff,
25374 argLen: 3,
25375 faultOnNilArg0: true,
25376 symEffect: SymWrite,
25377 asm: loong64.AMOVH,
25378 reg: regInfo{
25379 inputs: []inputInfo{
25380 {1, 1073741816},
25381 {0, 4611686019501129724},
25382 },
25383 },
25384 },
25385 {
25386 name: "MOVWstore",
25387 auxType: auxSymOff,
25388 argLen: 3,
25389 faultOnNilArg0: true,
25390 symEffect: SymWrite,
25391 asm: loong64.AMOVW,
25392 reg: regInfo{
25393 inputs: []inputInfo{
25394 {1, 1073741816},
25395 {0, 4611686019501129724},
25396 },
25397 },
25398 },
25399 {
25400 name: "MOVVstore",
25401 auxType: auxSymOff,
25402 argLen: 3,
25403 faultOnNilArg0: true,
25404 symEffect: SymWrite,
25405 asm: loong64.AMOVV,
25406 reg: regInfo{
25407 inputs: []inputInfo{
25408 {1, 1073741816},
25409 {0, 4611686019501129724},
25410 },
25411 },
25412 },
25413 {
25414 name: "MOVFstore",
25415 auxType: auxSymOff,
25416 argLen: 3,
25417 faultOnNilArg0: true,
25418 symEffect: SymWrite,
25419 asm: loong64.AMOVF,
25420 reg: regInfo{
25421 inputs: []inputInfo{
25422 {0, 4611686019501129724},
25423 {1, 4611686017353646080},
25424 },
25425 },
25426 },
25427 {
25428 name: "MOVDstore",
25429 auxType: auxSymOff,
25430 argLen: 3,
25431 faultOnNilArg0: true,
25432 symEffect: SymWrite,
25433 asm: loong64.AMOVD,
25434 reg: regInfo{
25435 inputs: []inputInfo{
25436 {0, 4611686019501129724},
25437 {1, 4611686017353646080},
25438 },
25439 },
25440 },
25441 {
25442 name: "MOVBstoreidx",
25443 argLen: 4,
25444 asm: loong64.AMOVB,
25445 reg: regInfo{
25446 inputs: []inputInfo{
25447 {1, 1073741816},
25448 {2, 1073741816},
25449 {0, 4611686019501129724},
25450 },
25451 },
25452 },
25453 {
25454 name: "MOVHstoreidx",
25455 argLen: 4,
25456 asm: loong64.AMOVH,
25457 reg: regInfo{
25458 inputs: []inputInfo{
25459 {1, 1073741816},
25460 {2, 1073741816},
25461 {0, 4611686019501129724},
25462 },
25463 },
25464 },
25465 {
25466 name: "MOVWstoreidx",
25467 argLen: 4,
25468 asm: loong64.AMOVW,
25469 reg: regInfo{
25470 inputs: []inputInfo{
25471 {1, 1073741816},
25472 {2, 1073741816},
25473 {0, 4611686019501129724},
25474 },
25475 },
25476 },
25477 {
25478 name: "MOVVstoreidx",
25479 argLen: 4,
25480 asm: loong64.AMOVV,
25481 reg: regInfo{
25482 inputs: []inputInfo{
25483 {1, 1073741816},
25484 {2, 1073741816},
25485 {0, 4611686019501129724},
25486 },
25487 },
25488 },
25489 {
25490 name: "MOVFstoreidx",
25491 argLen: 4,
25492 asm: loong64.AMOVF,
25493 reg: regInfo{
25494 inputs: []inputInfo{
25495 {1, 1073741816},
25496 {0, 4611686019501129724},
25497 {2, 4611686017353646080},
25498 },
25499 },
25500 },
25501 {
25502 name: "MOVDstoreidx",
25503 argLen: 4,
25504 asm: loong64.AMOVD,
25505 reg: regInfo{
25506 inputs: []inputInfo{
25507 {1, 1073741816},
25508 {0, 4611686019501129724},
25509 {2, 4611686017353646080},
25510 },
25511 },
25512 },
25513 {
25514 name: "MOVBstorezero",
25515 auxType: auxSymOff,
25516 argLen: 2,
25517 faultOnNilArg0: true,
25518 symEffect: SymWrite,
25519 asm: loong64.AMOVB,
25520 reg: regInfo{
25521 inputs: []inputInfo{
25522 {0, 4611686019501129724},
25523 },
25524 },
25525 },
25526 {
25527 name: "MOVHstorezero",
25528 auxType: auxSymOff,
25529 argLen: 2,
25530 faultOnNilArg0: true,
25531 symEffect: SymWrite,
25532 asm: loong64.AMOVH,
25533 reg: regInfo{
25534 inputs: []inputInfo{
25535 {0, 4611686019501129724},
25536 },
25537 },
25538 },
25539 {
25540 name: "MOVWstorezero",
25541 auxType: auxSymOff,
25542 argLen: 2,
25543 faultOnNilArg0: true,
25544 symEffect: SymWrite,
25545 asm: loong64.AMOVW,
25546 reg: regInfo{
25547 inputs: []inputInfo{
25548 {0, 4611686019501129724},
25549 },
25550 },
25551 },
25552 {
25553 name: "MOVVstorezero",
25554 auxType: auxSymOff,
25555 argLen: 2,
25556 faultOnNilArg0: true,
25557 symEffect: SymWrite,
25558 asm: loong64.AMOVV,
25559 reg: regInfo{
25560 inputs: []inputInfo{
25561 {0, 4611686019501129724},
25562 },
25563 },
25564 },
25565 {
25566 name: "MOVBstorezeroidx",
25567 argLen: 3,
25568 asm: loong64.AMOVB,
25569 reg: regInfo{
25570 inputs: []inputInfo{
25571 {1, 1073741816},
25572 {0, 4611686019501129724},
25573 },
25574 },
25575 },
25576 {
25577 name: "MOVHstorezeroidx",
25578 argLen: 3,
25579 asm: loong64.AMOVH,
25580 reg: regInfo{
25581 inputs: []inputInfo{
25582 {1, 1073741816},
25583 {0, 4611686019501129724},
25584 },
25585 },
25586 },
25587 {
25588 name: "MOVWstorezeroidx",
25589 argLen: 3,
25590 asm: loong64.AMOVW,
25591 reg: regInfo{
25592 inputs: []inputInfo{
25593 {1, 1073741816},
25594 {0, 4611686019501129724},
25595 },
25596 },
25597 },
25598 {
25599 name: "MOVVstorezeroidx",
25600 argLen: 3,
25601 asm: loong64.AMOVV,
25602 reg: regInfo{
25603 inputs: []inputInfo{
25604 {1, 1073741816},
25605 {0, 4611686019501129724},
25606 },
25607 },
25608 },
25609 {
25610 name: "MOVWfpgp",
25611 argLen: 1,
25612 asm: loong64.AMOVW,
25613 reg: regInfo{
25614 inputs: []inputInfo{
25615 {0, 4611686017353646080},
25616 },
25617 outputs: []outputInfo{
25618 {0, 1071644664},
25619 },
25620 },
25621 },
25622 {
25623 name: "MOVWgpfp",
25624 argLen: 1,
25625 asm: loong64.AMOVW,
25626 reg: regInfo{
25627 inputs: []inputInfo{
25628 {0, 1071644664},
25629 },
25630 outputs: []outputInfo{
25631 {0, 4611686017353646080},
25632 },
25633 },
25634 },
25635 {
25636 name: "MOVVfpgp",
25637 argLen: 1,
25638 asm: loong64.AMOVV,
25639 reg: regInfo{
25640 inputs: []inputInfo{
25641 {0, 4611686017353646080},
25642 },
25643 outputs: []outputInfo{
25644 {0, 1071644664},
25645 },
25646 },
25647 },
25648 {
25649 name: "MOVVgpfp",
25650 argLen: 1,
25651 asm: loong64.AMOVV,
25652 reg: regInfo{
25653 inputs: []inputInfo{
25654 {0, 1071644664},
25655 },
25656 outputs: []outputInfo{
25657 {0, 4611686017353646080},
25658 },
25659 },
25660 },
25661 {
25662 name: "MOVBreg",
25663 argLen: 1,
25664 asm: loong64.AMOVB,
25665 reg: regInfo{
25666 inputs: []inputInfo{
25667 {0, 1073741816},
25668 },
25669 outputs: []outputInfo{
25670 {0, 1071644664},
25671 },
25672 },
25673 },
25674 {
25675 name: "MOVBUreg",
25676 argLen: 1,
25677 asm: loong64.AMOVBU,
25678 reg: regInfo{
25679 inputs: []inputInfo{
25680 {0, 1073741816},
25681 },
25682 outputs: []outputInfo{
25683 {0, 1071644664},
25684 },
25685 },
25686 },
25687 {
25688 name: "MOVHreg",
25689 argLen: 1,
25690 asm: loong64.AMOVH,
25691 reg: regInfo{
25692 inputs: []inputInfo{
25693 {0, 1073741816},
25694 },
25695 outputs: []outputInfo{
25696 {0, 1071644664},
25697 },
25698 },
25699 },
25700 {
25701 name: "MOVHUreg",
25702 argLen: 1,
25703 asm: loong64.AMOVHU,
25704 reg: regInfo{
25705 inputs: []inputInfo{
25706 {0, 1073741816},
25707 },
25708 outputs: []outputInfo{
25709 {0, 1071644664},
25710 },
25711 },
25712 },
25713 {
25714 name: "MOVWreg",
25715 argLen: 1,
25716 asm: loong64.AMOVW,
25717 reg: regInfo{
25718 inputs: []inputInfo{
25719 {0, 1073741816},
25720 },
25721 outputs: []outputInfo{
25722 {0, 1071644664},
25723 },
25724 },
25725 },
25726 {
25727 name: "MOVWUreg",
25728 argLen: 1,
25729 asm: loong64.AMOVWU,
25730 reg: regInfo{
25731 inputs: []inputInfo{
25732 {0, 1073741816},
25733 },
25734 outputs: []outputInfo{
25735 {0, 1071644664},
25736 },
25737 },
25738 },
25739 {
25740 name: "MOVVreg",
25741 argLen: 1,
25742 asm: loong64.AMOVV,
25743 reg: regInfo{
25744 inputs: []inputInfo{
25745 {0, 1073741816},
25746 },
25747 outputs: []outputInfo{
25748 {0, 1071644664},
25749 },
25750 },
25751 },
25752 {
25753 name: "MOVVnop",
25754 argLen: 1,
25755 resultInArg0: true,
25756 reg: regInfo{
25757 inputs: []inputInfo{
25758 {0, 1071644664},
25759 },
25760 outputs: []outputInfo{
25761 {0, 1071644664},
25762 },
25763 },
25764 },
25765 {
25766 name: "MOVWF",
25767 argLen: 1,
25768 asm: loong64.AMOVWF,
25769 reg: regInfo{
25770 inputs: []inputInfo{
25771 {0, 4611686017353646080},
25772 },
25773 outputs: []outputInfo{
25774 {0, 4611686017353646080},
25775 },
25776 },
25777 },
25778 {
25779 name: "MOVWD",
25780 argLen: 1,
25781 asm: loong64.AMOVWD,
25782 reg: regInfo{
25783 inputs: []inputInfo{
25784 {0, 4611686017353646080},
25785 },
25786 outputs: []outputInfo{
25787 {0, 4611686017353646080},
25788 },
25789 },
25790 },
25791 {
25792 name: "MOVVF",
25793 argLen: 1,
25794 asm: loong64.AMOVVF,
25795 reg: regInfo{
25796 inputs: []inputInfo{
25797 {0, 4611686017353646080},
25798 },
25799 outputs: []outputInfo{
25800 {0, 4611686017353646080},
25801 },
25802 },
25803 },
25804 {
25805 name: "MOVVD",
25806 argLen: 1,
25807 asm: loong64.AMOVVD,
25808 reg: regInfo{
25809 inputs: []inputInfo{
25810 {0, 4611686017353646080},
25811 },
25812 outputs: []outputInfo{
25813 {0, 4611686017353646080},
25814 },
25815 },
25816 },
25817 {
25818 name: "TRUNCFW",
25819 argLen: 1,
25820 asm: loong64.ATRUNCFW,
25821 reg: regInfo{
25822 inputs: []inputInfo{
25823 {0, 4611686017353646080},
25824 },
25825 outputs: []outputInfo{
25826 {0, 4611686017353646080},
25827 },
25828 },
25829 },
25830 {
25831 name: "TRUNCDW",
25832 argLen: 1,
25833 asm: loong64.ATRUNCDW,
25834 reg: regInfo{
25835 inputs: []inputInfo{
25836 {0, 4611686017353646080},
25837 },
25838 outputs: []outputInfo{
25839 {0, 4611686017353646080},
25840 },
25841 },
25842 },
25843 {
25844 name: "TRUNCFV",
25845 argLen: 1,
25846 asm: loong64.ATRUNCFV,
25847 reg: regInfo{
25848 inputs: []inputInfo{
25849 {0, 4611686017353646080},
25850 },
25851 outputs: []outputInfo{
25852 {0, 4611686017353646080},
25853 },
25854 },
25855 },
25856 {
25857 name: "TRUNCDV",
25858 argLen: 1,
25859 asm: loong64.ATRUNCDV,
25860 reg: regInfo{
25861 inputs: []inputInfo{
25862 {0, 4611686017353646080},
25863 },
25864 outputs: []outputInfo{
25865 {0, 4611686017353646080},
25866 },
25867 },
25868 },
25869 {
25870 name: "MOVFD",
25871 argLen: 1,
25872 asm: loong64.AMOVFD,
25873 reg: regInfo{
25874 inputs: []inputInfo{
25875 {0, 4611686017353646080},
25876 },
25877 outputs: []outputInfo{
25878 {0, 4611686017353646080},
25879 },
25880 },
25881 },
25882 {
25883 name: "MOVDF",
25884 argLen: 1,
25885 asm: loong64.AMOVDF,
25886 reg: regInfo{
25887 inputs: []inputInfo{
25888 {0, 4611686017353646080},
25889 },
25890 outputs: []outputInfo{
25891 {0, 4611686017353646080},
25892 },
25893 },
25894 },
25895 {
25896 name: "LoweredRound32F",
25897 argLen: 1,
25898 resultInArg0: true,
25899 reg: regInfo{
25900 inputs: []inputInfo{
25901 {0, 4611686017353646080},
25902 },
25903 outputs: []outputInfo{
25904 {0, 4611686017353646080},
25905 },
25906 },
25907 },
25908 {
25909 name: "LoweredRound64F",
25910 argLen: 1,
25911 resultInArg0: true,
25912 reg: regInfo{
25913 inputs: []inputInfo{
25914 {0, 4611686017353646080},
25915 },
25916 outputs: []outputInfo{
25917 {0, 4611686017353646080},
25918 },
25919 },
25920 },
25921 {
25922 name: "CALLstatic",
25923 auxType: auxCallOff,
25924 argLen: -1,
25925 clobberFlags: true,
25926 call: true,
25927 reg: regInfo{
25928 clobbers: 4611686018427387896,
25929 },
25930 },
25931 {
25932 name: "CALLtail",
25933 auxType: auxCallOff,
25934 argLen: -1,
25935 clobberFlags: true,
25936 call: true,
25937 tailCall: true,
25938 reg: regInfo{
25939 clobbers: 4611686018427387896,
25940 },
25941 },
25942 {
25943 name: "CALLclosure",
25944 auxType: auxCallOff,
25945 argLen: -1,
25946 clobberFlags: true,
25947 call: true,
25948 reg: regInfo{
25949 inputs: []inputInfo{
25950 {1, 268435456},
25951 {0, 1071644668},
25952 },
25953 clobbers: 4611686018427387896,
25954 },
25955 },
25956 {
25957 name: "CALLinter",
25958 auxType: auxCallOff,
25959 argLen: -1,
25960 clobberFlags: true,
25961 call: true,
25962 reg: regInfo{
25963 inputs: []inputInfo{
25964 {0, 1071644664},
25965 },
25966 clobbers: 4611686018427387896,
25967 },
25968 },
25969 {
25970 name: "DUFFZERO",
25971 auxType: auxInt64,
25972 argLen: 2,
25973 faultOnNilArg0: true,
25974 reg: regInfo{
25975 inputs: []inputInfo{
25976 {0, 524288},
25977 },
25978 clobbers: 524290,
25979 },
25980 },
25981 {
25982 name: "DUFFCOPY",
25983 auxType: auxInt64,
25984 argLen: 3,
25985 faultOnNilArg0: true,
25986 faultOnNilArg1: true,
25987 reg: regInfo{
25988 inputs: []inputInfo{
25989 {0, 1048576},
25990 {1, 524288},
25991 },
25992 clobbers: 1572866,
25993 },
25994 },
25995 {
25996 name: "LoweredZero",
25997 auxType: auxInt64,
25998 argLen: 3,
25999 faultOnNilArg0: true,
26000 reg: regInfo{
26001 inputs: []inputInfo{
26002 {0, 524288},
26003 {1, 1071644664},
26004 },
26005 clobbers: 524288,
26006 },
26007 },
26008 {
26009 name: "LoweredMove",
26010 auxType: auxInt64,
26011 argLen: 4,
26012 faultOnNilArg0: true,
26013 faultOnNilArg1: true,
26014 reg: regInfo{
26015 inputs: []inputInfo{
26016 {0, 1048576},
26017 {1, 524288},
26018 {2, 1071644664},
26019 },
26020 clobbers: 1572864,
26021 },
26022 },
26023 {
26024 name: "LoweredAtomicLoad8",
26025 argLen: 2,
26026 faultOnNilArg0: true,
26027 reg: regInfo{
26028 inputs: []inputInfo{
26029 {0, 4611686019501129724},
26030 },
26031 outputs: []outputInfo{
26032 {0, 1071644664},
26033 },
26034 },
26035 },
26036 {
26037 name: "LoweredAtomicLoad32",
26038 argLen: 2,
26039 faultOnNilArg0: true,
26040 reg: regInfo{
26041 inputs: []inputInfo{
26042 {0, 4611686019501129724},
26043 },
26044 outputs: []outputInfo{
26045 {0, 1071644664},
26046 },
26047 },
26048 },
26049 {
26050 name: "LoweredAtomicLoad64",
26051 argLen: 2,
26052 faultOnNilArg0: true,
26053 reg: regInfo{
26054 inputs: []inputInfo{
26055 {0, 4611686019501129724},
26056 },
26057 outputs: []outputInfo{
26058 {0, 1071644664},
26059 },
26060 },
26061 },
26062 {
26063 name: "LoweredAtomicStore8",
26064 argLen: 3,
26065 faultOnNilArg0: true,
26066 hasSideEffects: true,
26067 reg: regInfo{
26068 inputs: []inputInfo{
26069 {1, 1073741816},
26070 {0, 4611686019501129724},
26071 },
26072 },
26073 },
26074 {
26075 name: "LoweredAtomicStore32",
26076 argLen: 3,
26077 faultOnNilArg0: true,
26078 hasSideEffects: true,
26079 reg: regInfo{
26080 inputs: []inputInfo{
26081 {1, 1073741816},
26082 {0, 4611686019501129724},
26083 },
26084 },
26085 },
26086 {
26087 name: "LoweredAtomicStore64",
26088 argLen: 3,
26089 faultOnNilArg0: true,
26090 hasSideEffects: true,
26091 reg: regInfo{
26092 inputs: []inputInfo{
26093 {1, 1073741816},
26094 {0, 4611686019501129724},
26095 },
26096 },
26097 },
26098 {
26099 name: "LoweredAtomicStore8Variant",
26100 argLen: 3,
26101 faultOnNilArg0: true,
26102 hasSideEffects: true,
26103 reg: regInfo{
26104 inputs: []inputInfo{
26105 {1, 1073741816},
26106 {0, 4611686019501129724},
26107 },
26108 },
26109 },
26110 {
26111 name: "LoweredAtomicStore32Variant",
26112 argLen: 3,
26113 faultOnNilArg0: true,
26114 hasSideEffects: true,
26115 reg: regInfo{
26116 inputs: []inputInfo{
26117 {1, 1073741816},
26118 {0, 4611686019501129724},
26119 },
26120 },
26121 },
26122 {
26123 name: "LoweredAtomicStore64Variant",
26124 argLen: 3,
26125 faultOnNilArg0: true,
26126 hasSideEffects: true,
26127 reg: regInfo{
26128 inputs: []inputInfo{
26129 {1, 1073741816},
26130 {0, 4611686019501129724},
26131 },
26132 },
26133 },
26134 {
26135 name: "LoweredAtomicExchange32",
26136 argLen: 3,
26137 resultNotInArgs: true,
26138 faultOnNilArg0: true,
26139 hasSideEffects: true,
26140 reg: regInfo{
26141 inputs: []inputInfo{
26142 {1, 1073741816},
26143 {0, 4611686019501129724},
26144 },
26145 outputs: []outputInfo{
26146 {0, 1071644664},
26147 },
26148 },
26149 },
26150 {
26151 name: "LoweredAtomicExchange64",
26152 argLen: 3,
26153 resultNotInArgs: true,
26154 faultOnNilArg0: true,
26155 hasSideEffects: true,
26156 reg: regInfo{
26157 inputs: []inputInfo{
26158 {1, 1073741816},
26159 {0, 4611686019501129724},
26160 },
26161 outputs: []outputInfo{
26162 {0, 1071644664},
26163 },
26164 },
26165 },
26166 {
26167 name: "LoweredAtomicExchange8Variant",
26168 argLen: 3,
26169 resultNotInArgs: true,
26170 faultOnNilArg0: true,
26171 hasSideEffects: true,
26172 reg: regInfo{
26173 inputs: []inputInfo{
26174 {1, 1073741816},
26175 {0, 4611686019501129724},
26176 },
26177 outputs: []outputInfo{
26178 {0, 1071644664},
26179 },
26180 },
26181 },
26182 {
26183 name: "LoweredAtomicAdd32",
26184 argLen: 3,
26185 resultNotInArgs: true,
26186 faultOnNilArg0: true,
26187 hasSideEffects: true,
26188 reg: regInfo{
26189 inputs: []inputInfo{
26190 {1, 1073741816},
26191 {0, 4611686019501129724},
26192 },
26193 outputs: []outputInfo{
26194 {0, 1071644664},
26195 },
26196 },
26197 },
26198 {
26199 name: "LoweredAtomicAdd64",
26200 argLen: 3,
26201 resultNotInArgs: true,
26202 faultOnNilArg0: true,
26203 hasSideEffects: true,
26204 reg: regInfo{
26205 inputs: []inputInfo{
26206 {1, 1073741816},
26207 {0, 4611686019501129724},
26208 },
26209 outputs: []outputInfo{
26210 {0, 1071644664},
26211 },
26212 },
26213 },
26214 {
26215 name: "LoweredAtomicCas32",
26216 argLen: 4,
26217 resultNotInArgs: true,
26218 faultOnNilArg0: true,
26219 hasSideEffects: true,
26220 unsafePoint: true,
26221 reg: regInfo{
26222 inputs: []inputInfo{
26223 {1, 1073741816},
26224 {2, 1073741816},
26225 {0, 4611686019501129724},
26226 },
26227 outputs: []outputInfo{
26228 {0, 1071644664},
26229 },
26230 },
26231 },
26232 {
26233 name: "LoweredAtomicCas64",
26234 argLen: 4,
26235 resultNotInArgs: true,
26236 faultOnNilArg0: true,
26237 hasSideEffects: true,
26238 unsafePoint: true,
26239 reg: regInfo{
26240 inputs: []inputInfo{
26241 {1, 1073741816},
26242 {2, 1073741816},
26243 {0, 4611686019501129724},
26244 },
26245 outputs: []outputInfo{
26246 {0, 1071644664},
26247 },
26248 },
26249 },
26250 {
26251 name: "LoweredAtomicCas64Variant",
26252 argLen: 4,
26253 resultNotInArgs: true,
26254 faultOnNilArg0: true,
26255 hasSideEffects: true,
26256 unsafePoint: true,
26257 reg: regInfo{
26258 inputs: []inputInfo{
26259 {1, 1073741816},
26260 {2, 1073741816},
26261 {0, 4611686019501129724},
26262 },
26263 outputs: []outputInfo{
26264 {0, 1071644664},
26265 },
26266 },
26267 },
26268 {
26269 name: "LoweredAtomicCas32Variant",
26270 argLen: 4,
26271 resultNotInArgs: true,
26272 faultOnNilArg0: true,
26273 hasSideEffects: true,
26274 unsafePoint: true,
26275 reg: regInfo{
26276 inputs: []inputInfo{
26277 {1, 1073741816},
26278 {2, 1073741816},
26279 {0, 4611686019501129724},
26280 },
26281 outputs: []outputInfo{
26282 {0, 1071644664},
26283 },
26284 },
26285 },
26286 {
26287 name: "LoweredAtomicAnd32",
26288 argLen: 3,
26289 resultNotInArgs: true,
26290 faultOnNilArg0: true,
26291 hasSideEffects: true,
26292 asm: loong64.AAMANDDBW,
26293 reg: regInfo{
26294 inputs: []inputInfo{
26295 {1, 1073741816},
26296 {0, 4611686019501129724},
26297 },
26298 outputs: []outputInfo{
26299 {0, 1071644664},
26300 },
26301 },
26302 },
26303 {
26304 name: "LoweredAtomicOr32",
26305 argLen: 3,
26306 resultNotInArgs: true,
26307 faultOnNilArg0: true,
26308 hasSideEffects: true,
26309 asm: loong64.AAMORDBW,
26310 reg: regInfo{
26311 inputs: []inputInfo{
26312 {1, 1073741816},
26313 {0, 4611686019501129724},
26314 },
26315 outputs: []outputInfo{
26316 {0, 1071644664},
26317 },
26318 },
26319 },
26320 {
26321 name: "LoweredAtomicAnd32value",
26322 argLen: 3,
26323 resultNotInArgs: true,
26324 faultOnNilArg0: true,
26325 hasSideEffects: true,
26326 asm: loong64.AAMANDDBW,
26327 reg: regInfo{
26328 inputs: []inputInfo{
26329 {1, 1073741816},
26330 {0, 4611686019501129724},
26331 },
26332 outputs: []outputInfo{
26333 {0, 1071644664},
26334 },
26335 },
26336 },
26337 {
26338 name: "LoweredAtomicAnd64value",
26339 argLen: 3,
26340 resultNotInArgs: true,
26341 faultOnNilArg0: true,
26342 hasSideEffects: true,
26343 asm: loong64.AAMANDDBV,
26344 reg: regInfo{
26345 inputs: []inputInfo{
26346 {1, 1073741816},
26347 {0, 4611686019501129724},
26348 },
26349 outputs: []outputInfo{
26350 {0, 1071644664},
26351 },
26352 },
26353 },
26354 {
26355 name: "LoweredAtomicOr32value",
26356 argLen: 3,
26357 resultNotInArgs: true,
26358 faultOnNilArg0: true,
26359 hasSideEffects: true,
26360 asm: loong64.AAMORDBW,
26361 reg: regInfo{
26362 inputs: []inputInfo{
26363 {1, 1073741816},
26364 {0, 4611686019501129724},
26365 },
26366 outputs: []outputInfo{
26367 {0, 1071644664},
26368 },
26369 },
26370 },
26371 {
26372 name: "LoweredAtomicOr64value",
26373 argLen: 3,
26374 resultNotInArgs: true,
26375 faultOnNilArg0: true,
26376 hasSideEffects: true,
26377 asm: loong64.AAMORDBV,
26378 reg: regInfo{
26379 inputs: []inputInfo{
26380 {1, 1073741816},
26381 {0, 4611686019501129724},
26382 },
26383 outputs: []outputInfo{
26384 {0, 1071644664},
26385 },
26386 },
26387 },
26388 {
26389 name: "LoweredNilCheck",
26390 argLen: 2,
26391 nilCheck: true,
26392 faultOnNilArg0: true,
26393 reg: regInfo{
26394 inputs: []inputInfo{
26395 {0, 1073741816},
26396 },
26397 },
26398 },
26399 {
26400 name: "FPFlagTrue",
26401 argLen: 1,
26402 reg: regInfo{
26403 outputs: []outputInfo{
26404 {0, 1071644664},
26405 },
26406 },
26407 },
26408 {
26409 name: "FPFlagFalse",
26410 argLen: 1,
26411 reg: regInfo{
26412 outputs: []outputInfo{
26413 {0, 1071644664},
26414 },
26415 },
26416 },
26417 {
26418 name: "LoweredGetClosurePtr",
26419 argLen: 0,
26420 zeroWidth: true,
26421 reg: regInfo{
26422 outputs: []outputInfo{
26423 {0, 268435456},
26424 },
26425 },
26426 },
26427 {
26428 name: "LoweredGetCallerSP",
26429 argLen: 1,
26430 rematerializeable: true,
26431 reg: regInfo{
26432 outputs: []outputInfo{
26433 {0, 1071644664},
26434 },
26435 },
26436 },
26437 {
26438 name: "LoweredGetCallerPC",
26439 argLen: 0,
26440 rematerializeable: true,
26441 reg: regInfo{
26442 outputs: []outputInfo{
26443 {0, 1071644664},
26444 },
26445 },
26446 },
26447 {
26448 name: "LoweredWB",
26449 auxType: auxInt64,
26450 argLen: 1,
26451 clobberFlags: true,
26452 reg: regInfo{
26453 clobbers: 4611686017353646082,
26454 outputs: []outputInfo{
26455 {0, 268435456},
26456 },
26457 },
26458 },
26459 {
26460 name: "LoweredPubBarrier",
26461 argLen: 1,
26462 hasSideEffects: true,
26463 asm: loong64.ADBAR,
26464 reg: regInfo{},
26465 },
26466 {
26467 name: "LoweredPanicBoundsRR",
26468 auxType: auxInt64,
26469 argLen: 3,
26470 call: true,
26471 reg: regInfo{
26472 inputs: []inputInfo{
26473 {0, 524280},
26474 {1, 524280},
26475 },
26476 },
26477 },
26478 {
26479 name: "LoweredPanicBoundsRC",
26480 auxType: auxPanicBoundsC,
26481 argLen: 2,
26482 call: true,
26483 reg: regInfo{
26484 inputs: []inputInfo{
26485 {0, 524280},
26486 },
26487 },
26488 },
26489 {
26490 name: "LoweredPanicBoundsCR",
26491 auxType: auxPanicBoundsC,
26492 argLen: 2,
26493 call: true,
26494 reg: regInfo{
26495 inputs: []inputInfo{
26496 {0, 524280},
26497 },
26498 },
26499 },
26500 {
26501 name: "LoweredPanicBoundsCC",
26502 auxType: auxPanicBoundsCC,
26503 argLen: 1,
26504 call: true,
26505 reg: regInfo{},
26506 },
26507 {
26508 name: "PRELD",
26509 auxType: auxInt64,
26510 argLen: 2,
26511 hasSideEffects: true,
26512 asm: loong64.APRELD,
26513 reg: regInfo{
26514 inputs: []inputInfo{
26515 {0, 1073741820},
26516 },
26517 },
26518 },
26519 {
26520 name: "PRELDX",
26521 auxType: auxInt64,
26522 argLen: 2,
26523 hasSideEffects: true,
26524 asm: loong64.APRELDX,
26525 reg: regInfo{
26526 inputs: []inputInfo{
26527 {0, 1073741820},
26528 },
26529 },
26530 },
26531
26532 {
26533 name: "ADD",
26534 argLen: 2,
26535 commutative: true,
26536 asm: mips.AADDU,
26537 reg: regInfo{
26538 inputs: []inputInfo{
26539 {0, 469762046},
26540 {1, 469762046},
26541 },
26542 outputs: []outputInfo{
26543 {0, 335544318},
26544 },
26545 },
26546 },
26547 {
26548 name: "ADDconst",
26549 auxType: auxInt32,
26550 argLen: 1,
26551 asm: mips.AADDU,
26552 reg: regInfo{
26553 inputs: []inputInfo{
26554 {0, 536870910},
26555 },
26556 outputs: []outputInfo{
26557 {0, 335544318},
26558 },
26559 },
26560 },
26561 {
26562 name: "SUB",
26563 argLen: 2,
26564 asm: mips.ASUBU,
26565 reg: regInfo{
26566 inputs: []inputInfo{
26567 {0, 469762046},
26568 {1, 469762046},
26569 },
26570 outputs: []outputInfo{
26571 {0, 335544318},
26572 },
26573 },
26574 },
26575 {
26576 name: "SUBconst",
26577 auxType: auxInt32,
26578 argLen: 1,
26579 asm: mips.ASUBU,
26580 reg: regInfo{
26581 inputs: []inputInfo{
26582 {0, 469762046},
26583 },
26584 outputs: []outputInfo{
26585 {0, 335544318},
26586 },
26587 },
26588 },
26589 {
26590 name: "MUL",
26591 argLen: 2,
26592 commutative: true,
26593 asm: mips.AMUL,
26594 reg: regInfo{
26595 inputs: []inputInfo{
26596 {0, 469762046},
26597 {1, 469762046},
26598 },
26599 clobbers: 105553116266496,
26600 outputs: []outputInfo{
26601 {0, 335544318},
26602 },
26603 },
26604 },
26605 {
26606 name: "MULT",
26607 argLen: 2,
26608 commutative: true,
26609 asm: mips.AMUL,
26610 reg: regInfo{
26611 inputs: []inputInfo{
26612 {0, 469762046},
26613 {1, 469762046},
26614 },
26615 outputs: []outputInfo{
26616 {0, 35184372088832},
26617 {1, 70368744177664},
26618 },
26619 },
26620 },
26621 {
26622 name: "MULTU",
26623 argLen: 2,
26624 commutative: true,
26625 asm: mips.AMULU,
26626 reg: regInfo{
26627 inputs: []inputInfo{
26628 {0, 469762046},
26629 {1, 469762046},
26630 },
26631 outputs: []outputInfo{
26632 {0, 35184372088832},
26633 {1, 70368744177664},
26634 },
26635 },
26636 },
26637 {
26638 name: "DIV",
26639 argLen: 2,
26640 asm: mips.ADIV,
26641 reg: regInfo{
26642 inputs: []inputInfo{
26643 {0, 469762046},
26644 {1, 469762046},
26645 },
26646 outputs: []outputInfo{
26647 {0, 35184372088832},
26648 {1, 70368744177664},
26649 },
26650 },
26651 },
26652 {
26653 name: "DIVU",
26654 argLen: 2,
26655 asm: mips.ADIVU,
26656 reg: regInfo{
26657 inputs: []inputInfo{
26658 {0, 469762046},
26659 {1, 469762046},
26660 },
26661 outputs: []outputInfo{
26662 {0, 35184372088832},
26663 {1, 70368744177664},
26664 },
26665 },
26666 },
26667 {
26668 name: "ADDF",
26669 argLen: 2,
26670 commutative: true,
26671 asm: mips.AADDF,
26672 reg: regInfo{
26673 inputs: []inputInfo{
26674 {0, 35183835217920},
26675 {1, 35183835217920},
26676 },
26677 outputs: []outputInfo{
26678 {0, 35183835217920},
26679 },
26680 },
26681 },
26682 {
26683 name: "ADDD",
26684 argLen: 2,
26685 commutative: true,
26686 asm: mips.AADDD,
26687 reg: regInfo{
26688 inputs: []inputInfo{
26689 {0, 35183835217920},
26690 {1, 35183835217920},
26691 },
26692 outputs: []outputInfo{
26693 {0, 35183835217920},
26694 },
26695 },
26696 },
26697 {
26698 name: "SUBF",
26699 argLen: 2,
26700 asm: mips.ASUBF,
26701 reg: regInfo{
26702 inputs: []inputInfo{
26703 {0, 35183835217920},
26704 {1, 35183835217920},
26705 },
26706 outputs: []outputInfo{
26707 {0, 35183835217920},
26708 },
26709 },
26710 },
26711 {
26712 name: "SUBD",
26713 argLen: 2,
26714 asm: mips.ASUBD,
26715 reg: regInfo{
26716 inputs: []inputInfo{
26717 {0, 35183835217920},
26718 {1, 35183835217920},
26719 },
26720 outputs: []outputInfo{
26721 {0, 35183835217920},
26722 },
26723 },
26724 },
26725 {
26726 name: "MULF",
26727 argLen: 2,
26728 commutative: true,
26729 asm: mips.AMULF,
26730 reg: regInfo{
26731 inputs: []inputInfo{
26732 {0, 35183835217920},
26733 {1, 35183835217920},
26734 },
26735 outputs: []outputInfo{
26736 {0, 35183835217920},
26737 },
26738 },
26739 },
26740 {
26741 name: "MULD",
26742 argLen: 2,
26743 commutative: true,
26744 asm: mips.AMULD,
26745 reg: regInfo{
26746 inputs: []inputInfo{
26747 {0, 35183835217920},
26748 {1, 35183835217920},
26749 },
26750 outputs: []outputInfo{
26751 {0, 35183835217920},
26752 },
26753 },
26754 },
26755 {
26756 name: "DIVF",
26757 argLen: 2,
26758 asm: mips.ADIVF,
26759 reg: regInfo{
26760 inputs: []inputInfo{
26761 {0, 35183835217920},
26762 {1, 35183835217920},
26763 },
26764 outputs: []outputInfo{
26765 {0, 35183835217920},
26766 },
26767 },
26768 },
26769 {
26770 name: "DIVD",
26771 argLen: 2,
26772 asm: mips.ADIVD,
26773 reg: regInfo{
26774 inputs: []inputInfo{
26775 {0, 35183835217920},
26776 {1, 35183835217920},
26777 },
26778 outputs: []outputInfo{
26779 {0, 35183835217920},
26780 },
26781 },
26782 },
26783 {
26784 name: "AND",
26785 argLen: 2,
26786 commutative: true,
26787 asm: mips.AAND,
26788 reg: regInfo{
26789 inputs: []inputInfo{
26790 {0, 469762046},
26791 {1, 469762046},
26792 },
26793 outputs: []outputInfo{
26794 {0, 335544318},
26795 },
26796 },
26797 },
26798 {
26799 name: "ANDconst",
26800 auxType: auxInt32,
26801 argLen: 1,
26802 asm: mips.AAND,
26803 reg: regInfo{
26804 inputs: []inputInfo{
26805 {0, 469762046},
26806 },
26807 outputs: []outputInfo{
26808 {0, 335544318},
26809 },
26810 },
26811 },
26812 {
26813 name: "OR",
26814 argLen: 2,
26815 commutative: true,
26816 asm: mips.AOR,
26817 reg: regInfo{
26818 inputs: []inputInfo{
26819 {0, 469762046},
26820 {1, 469762046},
26821 },
26822 outputs: []outputInfo{
26823 {0, 335544318},
26824 },
26825 },
26826 },
26827 {
26828 name: "ORconst",
26829 auxType: auxInt32,
26830 argLen: 1,
26831 asm: mips.AOR,
26832 reg: regInfo{
26833 inputs: []inputInfo{
26834 {0, 469762046},
26835 },
26836 outputs: []outputInfo{
26837 {0, 335544318},
26838 },
26839 },
26840 },
26841 {
26842 name: "XOR",
26843 argLen: 2,
26844 commutative: true,
26845 asm: mips.AXOR,
26846 reg: regInfo{
26847 inputs: []inputInfo{
26848 {0, 469762046},
26849 {1, 469762046},
26850 },
26851 outputs: []outputInfo{
26852 {0, 335544318},
26853 },
26854 },
26855 },
26856 {
26857 name: "XORconst",
26858 auxType: auxInt32,
26859 argLen: 1,
26860 asm: mips.AXOR,
26861 reg: regInfo{
26862 inputs: []inputInfo{
26863 {0, 469762046},
26864 },
26865 outputs: []outputInfo{
26866 {0, 335544318},
26867 },
26868 },
26869 },
26870 {
26871 name: "NOR",
26872 argLen: 2,
26873 commutative: true,
26874 asm: mips.ANOR,
26875 reg: regInfo{
26876 inputs: []inputInfo{
26877 {0, 469762046},
26878 {1, 469762046},
26879 },
26880 outputs: []outputInfo{
26881 {0, 335544318},
26882 },
26883 },
26884 },
26885 {
26886 name: "NORconst",
26887 auxType: auxInt32,
26888 argLen: 1,
26889 asm: mips.ANOR,
26890 reg: regInfo{
26891 inputs: []inputInfo{
26892 {0, 469762046},
26893 },
26894 outputs: []outputInfo{
26895 {0, 335544318},
26896 },
26897 },
26898 },
26899 {
26900 name: "NEG",
26901 argLen: 1,
26902 reg: regInfo{
26903 inputs: []inputInfo{
26904 {0, 469762046},
26905 },
26906 outputs: []outputInfo{
26907 {0, 335544318},
26908 },
26909 },
26910 },
26911 {
26912 name: "NEGF",
26913 argLen: 1,
26914 asm: mips.ANEGF,
26915 reg: regInfo{
26916 inputs: []inputInfo{
26917 {0, 35183835217920},
26918 },
26919 outputs: []outputInfo{
26920 {0, 35183835217920},
26921 },
26922 },
26923 },
26924 {
26925 name: "NEGD",
26926 argLen: 1,
26927 asm: mips.ANEGD,
26928 reg: regInfo{
26929 inputs: []inputInfo{
26930 {0, 35183835217920},
26931 },
26932 outputs: []outputInfo{
26933 {0, 35183835217920},
26934 },
26935 },
26936 },
26937 {
26938 name: "ABSD",
26939 argLen: 1,
26940 asm: mips.AABSD,
26941 reg: regInfo{
26942 inputs: []inputInfo{
26943 {0, 35183835217920},
26944 },
26945 outputs: []outputInfo{
26946 {0, 35183835217920},
26947 },
26948 },
26949 },
26950 {
26951 name: "SQRTD",
26952 argLen: 1,
26953 asm: mips.ASQRTD,
26954 reg: regInfo{
26955 inputs: []inputInfo{
26956 {0, 35183835217920},
26957 },
26958 outputs: []outputInfo{
26959 {0, 35183835217920},
26960 },
26961 },
26962 },
26963 {
26964 name: "SQRTF",
26965 argLen: 1,
26966 asm: mips.ASQRTF,
26967 reg: regInfo{
26968 inputs: []inputInfo{
26969 {0, 35183835217920},
26970 },
26971 outputs: []outputInfo{
26972 {0, 35183835217920},
26973 },
26974 },
26975 },
26976 {
26977 name: "SLL",
26978 argLen: 2,
26979 asm: mips.ASLL,
26980 reg: regInfo{
26981 inputs: []inputInfo{
26982 {0, 469762046},
26983 {1, 469762046},
26984 },
26985 outputs: []outputInfo{
26986 {0, 335544318},
26987 },
26988 },
26989 },
26990 {
26991 name: "SLLconst",
26992 auxType: auxInt32,
26993 argLen: 1,
26994 asm: mips.ASLL,
26995 reg: regInfo{
26996 inputs: []inputInfo{
26997 {0, 469762046},
26998 },
26999 outputs: []outputInfo{
27000 {0, 335544318},
27001 },
27002 },
27003 },
27004 {
27005 name: "SRL",
27006 argLen: 2,
27007 asm: mips.ASRL,
27008 reg: regInfo{
27009 inputs: []inputInfo{
27010 {0, 469762046},
27011 {1, 469762046},
27012 },
27013 outputs: []outputInfo{
27014 {0, 335544318},
27015 },
27016 },
27017 },
27018 {
27019 name: "SRLconst",
27020 auxType: auxInt32,
27021 argLen: 1,
27022 asm: mips.ASRL,
27023 reg: regInfo{
27024 inputs: []inputInfo{
27025 {0, 469762046},
27026 },
27027 outputs: []outputInfo{
27028 {0, 335544318},
27029 },
27030 },
27031 },
27032 {
27033 name: "SRA",
27034 argLen: 2,
27035 asm: mips.ASRA,
27036 reg: regInfo{
27037 inputs: []inputInfo{
27038 {0, 469762046},
27039 {1, 469762046},
27040 },
27041 outputs: []outputInfo{
27042 {0, 335544318},
27043 },
27044 },
27045 },
27046 {
27047 name: "SRAconst",
27048 auxType: auxInt32,
27049 argLen: 1,
27050 asm: mips.ASRA,
27051 reg: regInfo{
27052 inputs: []inputInfo{
27053 {0, 469762046},
27054 },
27055 outputs: []outputInfo{
27056 {0, 335544318},
27057 },
27058 },
27059 },
27060 {
27061 name: "CLZ",
27062 argLen: 1,
27063 asm: mips.ACLZ,
27064 reg: regInfo{
27065 inputs: []inputInfo{
27066 {0, 469762046},
27067 },
27068 outputs: []outputInfo{
27069 {0, 335544318},
27070 },
27071 },
27072 },
27073 {
27074 name: "SGT",
27075 argLen: 2,
27076 asm: mips.ASGT,
27077 reg: regInfo{
27078 inputs: []inputInfo{
27079 {0, 469762046},
27080 {1, 469762046},
27081 },
27082 outputs: []outputInfo{
27083 {0, 335544318},
27084 },
27085 },
27086 },
27087 {
27088 name: "SGTconst",
27089 auxType: auxInt32,
27090 argLen: 1,
27091 asm: mips.ASGT,
27092 reg: regInfo{
27093 inputs: []inputInfo{
27094 {0, 469762046},
27095 },
27096 outputs: []outputInfo{
27097 {0, 335544318},
27098 },
27099 },
27100 },
27101 {
27102 name: "SGTzero",
27103 argLen: 1,
27104 asm: mips.ASGT,
27105 reg: regInfo{
27106 inputs: []inputInfo{
27107 {0, 469762046},
27108 },
27109 outputs: []outputInfo{
27110 {0, 335544318},
27111 },
27112 },
27113 },
27114 {
27115 name: "SGTU",
27116 argLen: 2,
27117 asm: mips.ASGTU,
27118 reg: regInfo{
27119 inputs: []inputInfo{
27120 {0, 469762046},
27121 {1, 469762046},
27122 },
27123 outputs: []outputInfo{
27124 {0, 335544318},
27125 },
27126 },
27127 },
27128 {
27129 name: "SGTUconst",
27130 auxType: auxInt32,
27131 argLen: 1,
27132 asm: mips.ASGTU,
27133 reg: regInfo{
27134 inputs: []inputInfo{
27135 {0, 469762046},
27136 },
27137 outputs: []outputInfo{
27138 {0, 335544318},
27139 },
27140 },
27141 },
27142 {
27143 name: "SGTUzero",
27144 argLen: 1,
27145 asm: mips.ASGTU,
27146 reg: regInfo{
27147 inputs: []inputInfo{
27148 {0, 469762046},
27149 },
27150 outputs: []outputInfo{
27151 {0, 335544318},
27152 },
27153 },
27154 },
27155 {
27156 name: "CMPEQF",
27157 argLen: 2,
27158 asm: mips.ACMPEQF,
27159 reg: regInfo{
27160 inputs: []inputInfo{
27161 {0, 35183835217920},
27162 {1, 35183835217920},
27163 },
27164 },
27165 },
27166 {
27167 name: "CMPEQD",
27168 argLen: 2,
27169 asm: mips.ACMPEQD,
27170 reg: regInfo{
27171 inputs: []inputInfo{
27172 {0, 35183835217920},
27173 {1, 35183835217920},
27174 },
27175 },
27176 },
27177 {
27178 name: "CMPGEF",
27179 argLen: 2,
27180 asm: mips.ACMPGEF,
27181 reg: regInfo{
27182 inputs: []inputInfo{
27183 {0, 35183835217920},
27184 {1, 35183835217920},
27185 },
27186 },
27187 },
27188 {
27189 name: "CMPGED",
27190 argLen: 2,
27191 asm: mips.ACMPGED,
27192 reg: regInfo{
27193 inputs: []inputInfo{
27194 {0, 35183835217920},
27195 {1, 35183835217920},
27196 },
27197 },
27198 },
27199 {
27200 name: "CMPGTF",
27201 argLen: 2,
27202 asm: mips.ACMPGTF,
27203 reg: regInfo{
27204 inputs: []inputInfo{
27205 {0, 35183835217920},
27206 {1, 35183835217920},
27207 },
27208 },
27209 },
27210 {
27211 name: "CMPGTD",
27212 argLen: 2,
27213 asm: mips.ACMPGTD,
27214 reg: regInfo{
27215 inputs: []inputInfo{
27216 {0, 35183835217920},
27217 {1, 35183835217920},
27218 },
27219 },
27220 },
27221 {
27222 name: "MOVWconst",
27223 auxType: auxInt32,
27224 argLen: 0,
27225 rematerializeable: true,
27226 asm: mips.AMOVW,
27227 reg: regInfo{
27228 outputs: []outputInfo{
27229 {0, 335544318},
27230 },
27231 },
27232 },
27233 {
27234 name: "MOVFconst",
27235 auxType: auxFloat32,
27236 argLen: 0,
27237 rematerializeable: true,
27238 asm: mips.AMOVF,
27239 reg: regInfo{
27240 outputs: []outputInfo{
27241 {0, 35183835217920},
27242 },
27243 },
27244 },
27245 {
27246 name: "MOVDconst",
27247 auxType: auxFloat64,
27248 argLen: 0,
27249 rematerializeable: true,
27250 asm: mips.AMOVD,
27251 reg: regInfo{
27252 outputs: []outputInfo{
27253 {0, 35183835217920},
27254 },
27255 },
27256 },
27257 {
27258 name: "MOVWaddr",
27259 auxType: auxSymOff,
27260 argLen: 1,
27261 rematerializeable: true,
27262 symEffect: SymAddr,
27263 asm: mips.AMOVW,
27264 reg: regInfo{
27265 inputs: []inputInfo{
27266 {0, 140737555464192},
27267 },
27268 outputs: []outputInfo{
27269 {0, 335544318},
27270 },
27271 },
27272 },
27273 {
27274 name: "MOVBload",
27275 auxType: auxSymOff,
27276 argLen: 2,
27277 faultOnNilArg0: true,
27278 symEffect: SymRead,
27279 asm: mips.AMOVB,
27280 reg: regInfo{
27281 inputs: []inputInfo{
27282 {0, 140738025226238},
27283 },
27284 outputs: []outputInfo{
27285 {0, 335544318},
27286 },
27287 },
27288 },
27289 {
27290 name: "MOVBUload",
27291 auxType: auxSymOff,
27292 argLen: 2,
27293 faultOnNilArg0: true,
27294 symEffect: SymRead,
27295 asm: mips.AMOVBU,
27296 reg: regInfo{
27297 inputs: []inputInfo{
27298 {0, 140738025226238},
27299 },
27300 outputs: []outputInfo{
27301 {0, 335544318},
27302 },
27303 },
27304 },
27305 {
27306 name: "MOVHload",
27307 auxType: auxSymOff,
27308 argLen: 2,
27309 faultOnNilArg0: true,
27310 symEffect: SymRead,
27311 asm: mips.AMOVH,
27312 reg: regInfo{
27313 inputs: []inputInfo{
27314 {0, 140738025226238},
27315 },
27316 outputs: []outputInfo{
27317 {0, 335544318},
27318 },
27319 },
27320 },
27321 {
27322 name: "MOVHUload",
27323 auxType: auxSymOff,
27324 argLen: 2,
27325 faultOnNilArg0: true,
27326 symEffect: SymRead,
27327 asm: mips.AMOVHU,
27328 reg: regInfo{
27329 inputs: []inputInfo{
27330 {0, 140738025226238},
27331 },
27332 outputs: []outputInfo{
27333 {0, 335544318},
27334 },
27335 },
27336 },
27337 {
27338 name: "MOVWload",
27339 auxType: auxSymOff,
27340 argLen: 2,
27341 faultOnNilArg0: true,
27342 symEffect: SymRead,
27343 asm: mips.AMOVW,
27344 reg: regInfo{
27345 inputs: []inputInfo{
27346 {0, 140738025226238},
27347 },
27348 outputs: []outputInfo{
27349 {0, 335544318},
27350 },
27351 },
27352 },
27353 {
27354 name: "MOVFload",
27355 auxType: auxSymOff,
27356 argLen: 2,
27357 faultOnNilArg0: true,
27358 symEffect: SymRead,
27359 asm: mips.AMOVF,
27360 reg: regInfo{
27361 inputs: []inputInfo{
27362 {0, 140738025226238},
27363 },
27364 outputs: []outputInfo{
27365 {0, 35183835217920},
27366 },
27367 },
27368 },
27369 {
27370 name: "MOVDload",
27371 auxType: auxSymOff,
27372 argLen: 2,
27373 faultOnNilArg0: true,
27374 symEffect: SymRead,
27375 asm: mips.AMOVD,
27376 reg: regInfo{
27377 inputs: []inputInfo{
27378 {0, 140738025226238},
27379 },
27380 outputs: []outputInfo{
27381 {0, 35183835217920},
27382 },
27383 },
27384 },
27385 {
27386 name: "MOVBstore",
27387 auxType: auxSymOff,
27388 argLen: 3,
27389 faultOnNilArg0: true,
27390 symEffect: SymWrite,
27391 asm: mips.AMOVB,
27392 reg: regInfo{
27393 inputs: []inputInfo{
27394 {1, 469762046},
27395 {0, 140738025226238},
27396 },
27397 },
27398 },
27399 {
27400 name: "MOVHstore",
27401 auxType: auxSymOff,
27402 argLen: 3,
27403 faultOnNilArg0: true,
27404 symEffect: SymWrite,
27405 asm: mips.AMOVH,
27406 reg: regInfo{
27407 inputs: []inputInfo{
27408 {1, 469762046},
27409 {0, 140738025226238},
27410 },
27411 },
27412 },
27413 {
27414 name: "MOVWstore",
27415 auxType: auxSymOff,
27416 argLen: 3,
27417 faultOnNilArg0: true,
27418 symEffect: SymWrite,
27419 asm: mips.AMOVW,
27420 reg: regInfo{
27421 inputs: []inputInfo{
27422 {1, 469762046},
27423 {0, 140738025226238},
27424 },
27425 },
27426 },
27427 {
27428 name: "MOVFstore",
27429 auxType: auxSymOff,
27430 argLen: 3,
27431 faultOnNilArg0: true,
27432 symEffect: SymWrite,
27433 asm: mips.AMOVF,
27434 reg: regInfo{
27435 inputs: []inputInfo{
27436 {1, 35183835217920},
27437 {0, 140738025226238},
27438 },
27439 },
27440 },
27441 {
27442 name: "MOVDstore",
27443 auxType: auxSymOff,
27444 argLen: 3,
27445 faultOnNilArg0: true,
27446 symEffect: SymWrite,
27447 asm: mips.AMOVD,
27448 reg: regInfo{
27449 inputs: []inputInfo{
27450 {1, 35183835217920},
27451 {0, 140738025226238},
27452 },
27453 },
27454 },
27455 {
27456 name: "MOVBstorezero",
27457 auxType: auxSymOff,
27458 argLen: 2,
27459 faultOnNilArg0: true,
27460 symEffect: SymWrite,
27461 asm: mips.AMOVB,
27462 reg: regInfo{
27463 inputs: []inputInfo{
27464 {0, 140738025226238},
27465 },
27466 },
27467 },
27468 {
27469 name: "MOVHstorezero",
27470 auxType: auxSymOff,
27471 argLen: 2,
27472 faultOnNilArg0: true,
27473 symEffect: SymWrite,
27474 asm: mips.AMOVH,
27475 reg: regInfo{
27476 inputs: []inputInfo{
27477 {0, 140738025226238},
27478 },
27479 },
27480 },
27481 {
27482 name: "MOVWstorezero",
27483 auxType: auxSymOff,
27484 argLen: 2,
27485 faultOnNilArg0: true,
27486 symEffect: SymWrite,
27487 asm: mips.AMOVW,
27488 reg: regInfo{
27489 inputs: []inputInfo{
27490 {0, 140738025226238},
27491 },
27492 },
27493 },
27494 {
27495 name: "MOVWfpgp",
27496 argLen: 1,
27497 asm: mips.AMOVW,
27498 reg: regInfo{
27499 inputs: []inputInfo{
27500 {0, 35183835217920},
27501 },
27502 outputs: []outputInfo{
27503 {0, 335544318},
27504 },
27505 },
27506 },
27507 {
27508 name: "MOVWgpfp",
27509 argLen: 1,
27510 asm: mips.AMOVW,
27511 reg: regInfo{
27512 inputs: []inputInfo{
27513 {0, 335544318},
27514 },
27515 outputs: []outputInfo{
27516 {0, 35183835217920},
27517 },
27518 },
27519 },
27520 {
27521 name: "MOVBreg",
27522 argLen: 1,
27523 asm: mips.AMOVB,
27524 reg: regInfo{
27525 inputs: []inputInfo{
27526 {0, 469762046},
27527 },
27528 outputs: []outputInfo{
27529 {0, 335544318},
27530 },
27531 },
27532 },
27533 {
27534 name: "MOVBUreg",
27535 argLen: 1,
27536 asm: mips.AMOVBU,
27537 reg: regInfo{
27538 inputs: []inputInfo{
27539 {0, 469762046},
27540 },
27541 outputs: []outputInfo{
27542 {0, 335544318},
27543 },
27544 },
27545 },
27546 {
27547 name: "MOVHreg",
27548 argLen: 1,
27549 asm: mips.AMOVH,
27550 reg: regInfo{
27551 inputs: []inputInfo{
27552 {0, 469762046},
27553 },
27554 outputs: []outputInfo{
27555 {0, 335544318},
27556 },
27557 },
27558 },
27559 {
27560 name: "MOVHUreg",
27561 argLen: 1,
27562 asm: mips.AMOVHU,
27563 reg: regInfo{
27564 inputs: []inputInfo{
27565 {0, 469762046},
27566 },
27567 outputs: []outputInfo{
27568 {0, 335544318},
27569 },
27570 },
27571 },
27572 {
27573 name: "MOVWreg",
27574 argLen: 1,
27575 asm: mips.AMOVW,
27576 reg: regInfo{
27577 inputs: []inputInfo{
27578 {0, 469762046},
27579 },
27580 outputs: []outputInfo{
27581 {0, 335544318},
27582 },
27583 },
27584 },
27585 {
27586 name: "MOVWnop",
27587 argLen: 1,
27588 resultInArg0: true,
27589 reg: regInfo{
27590 inputs: []inputInfo{
27591 {0, 335544318},
27592 },
27593 outputs: []outputInfo{
27594 {0, 335544318},
27595 },
27596 },
27597 },
27598 {
27599 name: "CMOVZ",
27600 argLen: 3,
27601 resultInArg0: true,
27602 asm: mips.ACMOVZ,
27603 reg: regInfo{
27604 inputs: []inputInfo{
27605 {0, 335544318},
27606 {1, 335544318},
27607 {2, 335544318},
27608 },
27609 outputs: []outputInfo{
27610 {0, 335544318},
27611 },
27612 },
27613 },
27614 {
27615 name: "CMOVZzero",
27616 argLen: 2,
27617 resultInArg0: true,
27618 asm: mips.ACMOVZ,
27619 reg: regInfo{
27620 inputs: []inputInfo{
27621 {0, 335544318},
27622 {1, 469762046},
27623 },
27624 outputs: []outputInfo{
27625 {0, 335544318},
27626 },
27627 },
27628 },
27629 {
27630 name: "MOVWF",
27631 argLen: 1,
27632 asm: mips.AMOVWF,
27633 reg: regInfo{
27634 inputs: []inputInfo{
27635 {0, 35183835217920},
27636 },
27637 outputs: []outputInfo{
27638 {0, 35183835217920},
27639 },
27640 },
27641 },
27642 {
27643 name: "MOVWD",
27644 argLen: 1,
27645 asm: mips.AMOVWD,
27646 reg: regInfo{
27647 inputs: []inputInfo{
27648 {0, 35183835217920},
27649 },
27650 outputs: []outputInfo{
27651 {0, 35183835217920},
27652 },
27653 },
27654 },
27655 {
27656 name: "TRUNCFW",
27657 argLen: 1,
27658 asm: mips.ATRUNCFW,
27659 reg: regInfo{
27660 inputs: []inputInfo{
27661 {0, 35183835217920},
27662 },
27663 outputs: []outputInfo{
27664 {0, 35183835217920},
27665 },
27666 },
27667 },
27668 {
27669 name: "TRUNCDW",
27670 argLen: 1,
27671 asm: mips.ATRUNCDW,
27672 reg: regInfo{
27673 inputs: []inputInfo{
27674 {0, 35183835217920},
27675 },
27676 outputs: []outputInfo{
27677 {0, 35183835217920},
27678 },
27679 },
27680 },
27681 {
27682 name: "MOVFD",
27683 argLen: 1,
27684 asm: mips.AMOVFD,
27685 reg: regInfo{
27686 inputs: []inputInfo{
27687 {0, 35183835217920},
27688 },
27689 outputs: []outputInfo{
27690 {0, 35183835217920},
27691 },
27692 },
27693 },
27694 {
27695 name: "MOVDF",
27696 argLen: 1,
27697 asm: mips.AMOVDF,
27698 reg: regInfo{
27699 inputs: []inputInfo{
27700 {0, 35183835217920},
27701 },
27702 outputs: []outputInfo{
27703 {0, 35183835217920},
27704 },
27705 },
27706 },
27707 {
27708 name: "CALLstatic",
27709 auxType: auxCallOff,
27710 argLen: 1,
27711 clobberFlags: true,
27712 call: true,
27713 reg: regInfo{
27714 clobbers: 140737421246462,
27715 },
27716 },
27717 {
27718 name: "CALLtail",
27719 auxType: auxCallOff,
27720 argLen: 1,
27721 clobberFlags: true,
27722 call: true,
27723 tailCall: true,
27724 reg: regInfo{
27725 clobbers: 140737421246462,
27726 },
27727 },
27728 {
27729 name: "CALLclosure",
27730 auxType: auxCallOff,
27731 argLen: 3,
27732 clobberFlags: true,
27733 call: true,
27734 reg: regInfo{
27735 inputs: []inputInfo{
27736 {1, 4194304},
27737 {0, 402653182},
27738 },
27739 clobbers: 140737421246462,
27740 },
27741 },
27742 {
27743 name: "CALLinter",
27744 auxType: auxCallOff,
27745 argLen: 2,
27746 clobberFlags: true,
27747 call: true,
27748 reg: regInfo{
27749 inputs: []inputInfo{
27750 {0, 335544318},
27751 },
27752 clobbers: 140737421246462,
27753 },
27754 },
27755 {
27756 name: "LoweredAtomicLoad8",
27757 argLen: 2,
27758 faultOnNilArg0: true,
27759 reg: regInfo{
27760 inputs: []inputInfo{
27761 {0, 140738025226238},
27762 },
27763 outputs: []outputInfo{
27764 {0, 335544318},
27765 },
27766 },
27767 },
27768 {
27769 name: "LoweredAtomicLoad32",
27770 argLen: 2,
27771 faultOnNilArg0: true,
27772 reg: regInfo{
27773 inputs: []inputInfo{
27774 {0, 140738025226238},
27775 },
27776 outputs: []outputInfo{
27777 {0, 335544318},
27778 },
27779 },
27780 },
27781 {
27782 name: "LoweredAtomicStore8",
27783 argLen: 3,
27784 faultOnNilArg0: true,
27785 hasSideEffects: true,
27786 reg: regInfo{
27787 inputs: []inputInfo{
27788 {1, 469762046},
27789 {0, 140738025226238},
27790 },
27791 },
27792 },
27793 {
27794 name: "LoweredAtomicStore32",
27795 argLen: 3,
27796 faultOnNilArg0: true,
27797 hasSideEffects: true,
27798 reg: regInfo{
27799 inputs: []inputInfo{
27800 {1, 469762046},
27801 {0, 140738025226238},
27802 },
27803 },
27804 },
27805 {
27806 name: "LoweredAtomicStorezero",
27807 argLen: 2,
27808 faultOnNilArg0: true,
27809 hasSideEffects: true,
27810 reg: regInfo{
27811 inputs: []inputInfo{
27812 {0, 140738025226238},
27813 },
27814 },
27815 },
27816 {
27817 name: "LoweredAtomicExchange",
27818 argLen: 3,
27819 resultNotInArgs: true,
27820 faultOnNilArg0: true,
27821 hasSideEffects: true,
27822 unsafePoint: true,
27823 reg: regInfo{
27824 inputs: []inputInfo{
27825 {1, 469762046},
27826 {0, 140738025226238},
27827 },
27828 outputs: []outputInfo{
27829 {0, 335544318},
27830 },
27831 },
27832 },
27833 {
27834 name: "LoweredAtomicAdd",
27835 argLen: 3,
27836 resultNotInArgs: true,
27837 faultOnNilArg0: true,
27838 hasSideEffects: true,
27839 unsafePoint: true,
27840 reg: regInfo{
27841 inputs: []inputInfo{
27842 {1, 469762046},
27843 {0, 140738025226238},
27844 },
27845 outputs: []outputInfo{
27846 {0, 335544318},
27847 },
27848 },
27849 },
27850 {
27851 name: "LoweredAtomicAddconst",
27852 auxType: auxInt32,
27853 argLen: 2,
27854 resultNotInArgs: true,
27855 faultOnNilArg0: true,
27856 hasSideEffects: true,
27857 unsafePoint: true,
27858 reg: regInfo{
27859 inputs: []inputInfo{
27860 {0, 140738025226238},
27861 },
27862 outputs: []outputInfo{
27863 {0, 335544318},
27864 },
27865 },
27866 },
27867 {
27868 name: "LoweredAtomicCas",
27869 argLen: 4,
27870 resultNotInArgs: true,
27871 faultOnNilArg0: true,
27872 hasSideEffects: true,
27873 unsafePoint: true,
27874 reg: regInfo{
27875 inputs: []inputInfo{
27876 {1, 469762046},
27877 {2, 469762046},
27878 {0, 140738025226238},
27879 },
27880 outputs: []outputInfo{
27881 {0, 335544318},
27882 },
27883 },
27884 },
27885 {
27886 name: "LoweredAtomicAnd",
27887 argLen: 3,
27888 faultOnNilArg0: true,
27889 hasSideEffects: true,
27890 unsafePoint: true,
27891 asm: mips.AAND,
27892 reg: regInfo{
27893 inputs: []inputInfo{
27894 {1, 469762046},
27895 {0, 140738025226238},
27896 },
27897 },
27898 },
27899 {
27900 name: "LoweredAtomicOr",
27901 argLen: 3,
27902 faultOnNilArg0: true,
27903 hasSideEffects: true,
27904 unsafePoint: true,
27905 asm: mips.AOR,
27906 reg: regInfo{
27907 inputs: []inputInfo{
27908 {1, 469762046},
27909 {0, 140738025226238},
27910 },
27911 },
27912 },
27913 {
27914 name: "LoweredZero",
27915 auxType: auxInt32,
27916 argLen: 3,
27917 faultOnNilArg0: true,
27918 reg: regInfo{
27919 inputs: []inputInfo{
27920 {0, 2},
27921 {1, 335544318},
27922 },
27923 clobbers: 2,
27924 },
27925 },
27926 {
27927 name: "LoweredMove",
27928 auxType: auxInt32,
27929 argLen: 4,
27930 faultOnNilArg0: true,
27931 faultOnNilArg1: true,
27932 reg: regInfo{
27933 inputs: []inputInfo{
27934 {0, 4},
27935 {1, 2},
27936 {2, 335544318},
27937 },
27938 clobbers: 6,
27939 },
27940 },
27941 {
27942 name: "LoweredNilCheck",
27943 argLen: 2,
27944 nilCheck: true,
27945 faultOnNilArg0: true,
27946 reg: regInfo{
27947 inputs: []inputInfo{
27948 {0, 469762046},
27949 },
27950 },
27951 },
27952 {
27953 name: "FPFlagTrue",
27954 argLen: 1,
27955 reg: regInfo{
27956 outputs: []outputInfo{
27957 {0, 335544318},
27958 },
27959 },
27960 },
27961 {
27962 name: "FPFlagFalse",
27963 argLen: 1,
27964 reg: regInfo{
27965 outputs: []outputInfo{
27966 {0, 335544318},
27967 },
27968 },
27969 },
27970 {
27971 name: "LoweredGetClosurePtr",
27972 argLen: 0,
27973 zeroWidth: true,
27974 reg: regInfo{
27975 outputs: []outputInfo{
27976 {0, 4194304},
27977 },
27978 },
27979 },
27980 {
27981 name: "LoweredGetCallerSP",
27982 argLen: 1,
27983 rematerializeable: true,
27984 reg: regInfo{
27985 outputs: []outputInfo{
27986 {0, 335544318},
27987 },
27988 },
27989 },
27990 {
27991 name: "LoweredGetCallerPC",
27992 argLen: 0,
27993 rematerializeable: true,
27994 reg: regInfo{
27995 outputs: []outputInfo{
27996 {0, 335544318},
27997 },
27998 },
27999 },
28000 {
28001 name: "LoweredWB",
28002 auxType: auxInt64,
28003 argLen: 1,
28004 clobberFlags: true,
28005 reg: regInfo{
28006 clobbers: 140737219919872,
28007 outputs: []outputInfo{
28008 {0, 16777216},
28009 },
28010 },
28011 },
28012 {
28013 name: "LoweredPubBarrier",
28014 argLen: 1,
28015 hasSideEffects: true,
28016 asm: mips.ASYNC,
28017 reg: regInfo{},
28018 },
28019 {
28020 name: "LoweredPanicBoundsRR",
28021 auxType: auxInt64,
28022 argLen: 3,
28023 call: true,
28024 reg: regInfo{
28025 inputs: []inputInfo{
28026 {0, 131070},
28027 {1, 131070},
28028 },
28029 },
28030 },
28031 {
28032 name: "LoweredPanicBoundsRC",
28033 auxType: auxPanicBoundsC,
28034 argLen: 2,
28035 call: true,
28036 reg: regInfo{
28037 inputs: []inputInfo{
28038 {0, 131070},
28039 },
28040 },
28041 },
28042 {
28043 name: "LoweredPanicBoundsCR",
28044 auxType: auxPanicBoundsC,
28045 argLen: 2,
28046 call: true,
28047 reg: regInfo{
28048 inputs: []inputInfo{
28049 {0, 131070},
28050 },
28051 },
28052 },
28053 {
28054 name: "LoweredPanicBoundsCC",
28055 auxType: auxPanicBoundsCC,
28056 argLen: 1,
28057 call: true,
28058 reg: regInfo{},
28059 },
28060 {
28061 name: "LoweredPanicExtendRR",
28062 auxType: auxInt64,
28063 argLen: 4,
28064 call: true,
28065 reg: regInfo{
28066 inputs: []inputInfo{
28067 {0, 30},
28068 {1, 30},
28069 {2, 131070},
28070 },
28071 },
28072 },
28073 {
28074 name: "LoweredPanicExtendRC",
28075 auxType: auxPanicBoundsC,
28076 argLen: 3,
28077 call: true,
28078 reg: regInfo{
28079 inputs: []inputInfo{
28080 {0, 30},
28081 {1, 30},
28082 },
28083 },
28084 },
28085
28086 {
28087 name: "ADDV",
28088 argLen: 2,
28089 commutative: true,
28090 asm: mips.AADDVU,
28091 reg: regInfo{
28092 inputs: []inputInfo{
28093 {0, 234881022},
28094 {1, 234881022},
28095 },
28096 outputs: []outputInfo{
28097 {0, 167772158},
28098 },
28099 },
28100 },
28101 {
28102 name: "ADDVconst",
28103 auxType: auxInt64,
28104 argLen: 1,
28105 asm: mips.AADDVU,
28106 reg: regInfo{
28107 inputs: []inputInfo{
28108 {0, 268435454},
28109 },
28110 outputs: []outputInfo{
28111 {0, 167772158},
28112 },
28113 },
28114 },
28115 {
28116 name: "SUBV",
28117 argLen: 2,
28118 asm: mips.ASUBVU,
28119 reg: regInfo{
28120 inputs: []inputInfo{
28121 {0, 234881022},
28122 {1, 234881022},
28123 },
28124 outputs: []outputInfo{
28125 {0, 167772158},
28126 },
28127 },
28128 },
28129 {
28130 name: "SUBVconst",
28131 auxType: auxInt64,
28132 argLen: 1,
28133 asm: mips.ASUBVU,
28134 reg: regInfo{
28135 inputs: []inputInfo{
28136 {0, 234881022},
28137 },
28138 outputs: []outputInfo{
28139 {0, 167772158},
28140 },
28141 },
28142 },
28143 {
28144 name: "MULV",
28145 argLen: 2,
28146 commutative: true,
28147 asm: mips.AMULV,
28148 reg: regInfo{
28149 inputs: []inputInfo{
28150 {0, 234881022},
28151 {1, 234881022},
28152 },
28153 outputs: []outputInfo{
28154 {0, 1152921504606846976},
28155 {1, 2305843009213693952},
28156 },
28157 },
28158 },
28159 {
28160 name: "MULVU",
28161 argLen: 2,
28162 commutative: true,
28163 asm: mips.AMULVU,
28164 reg: regInfo{
28165 inputs: []inputInfo{
28166 {0, 234881022},
28167 {1, 234881022},
28168 },
28169 outputs: []outputInfo{
28170 {0, 1152921504606846976},
28171 {1, 2305843009213693952},
28172 },
28173 },
28174 },
28175 {
28176 name: "DIVV",
28177 argLen: 2,
28178 asm: mips.ADIVV,
28179 reg: regInfo{
28180 inputs: []inputInfo{
28181 {0, 234881022},
28182 {1, 234881022},
28183 },
28184 outputs: []outputInfo{
28185 {0, 1152921504606846976},
28186 {1, 2305843009213693952},
28187 },
28188 },
28189 },
28190 {
28191 name: "DIVVU",
28192 argLen: 2,
28193 asm: mips.ADIVVU,
28194 reg: regInfo{
28195 inputs: []inputInfo{
28196 {0, 234881022},
28197 {1, 234881022},
28198 },
28199 outputs: []outputInfo{
28200 {0, 1152921504606846976},
28201 {1, 2305843009213693952},
28202 },
28203 },
28204 },
28205 {
28206 name: "ADDF",
28207 argLen: 2,
28208 commutative: true,
28209 asm: mips.AADDF,
28210 reg: regInfo{
28211 inputs: []inputInfo{
28212 {0, 1152921504338411520},
28213 {1, 1152921504338411520},
28214 },
28215 outputs: []outputInfo{
28216 {0, 1152921504338411520},
28217 },
28218 },
28219 },
28220 {
28221 name: "ADDD",
28222 argLen: 2,
28223 commutative: true,
28224 asm: mips.AADDD,
28225 reg: regInfo{
28226 inputs: []inputInfo{
28227 {0, 1152921504338411520},
28228 {1, 1152921504338411520},
28229 },
28230 outputs: []outputInfo{
28231 {0, 1152921504338411520},
28232 },
28233 },
28234 },
28235 {
28236 name: "SUBF",
28237 argLen: 2,
28238 asm: mips.ASUBF,
28239 reg: regInfo{
28240 inputs: []inputInfo{
28241 {0, 1152921504338411520},
28242 {1, 1152921504338411520},
28243 },
28244 outputs: []outputInfo{
28245 {0, 1152921504338411520},
28246 },
28247 },
28248 },
28249 {
28250 name: "SUBD",
28251 argLen: 2,
28252 asm: mips.ASUBD,
28253 reg: regInfo{
28254 inputs: []inputInfo{
28255 {0, 1152921504338411520},
28256 {1, 1152921504338411520},
28257 },
28258 outputs: []outputInfo{
28259 {0, 1152921504338411520},
28260 },
28261 },
28262 },
28263 {
28264 name: "MULF",
28265 argLen: 2,
28266 commutative: true,
28267 asm: mips.AMULF,
28268 reg: regInfo{
28269 inputs: []inputInfo{
28270 {0, 1152921504338411520},
28271 {1, 1152921504338411520},
28272 },
28273 outputs: []outputInfo{
28274 {0, 1152921504338411520},
28275 },
28276 },
28277 },
28278 {
28279 name: "MULD",
28280 argLen: 2,
28281 commutative: true,
28282 asm: mips.AMULD,
28283 reg: regInfo{
28284 inputs: []inputInfo{
28285 {0, 1152921504338411520},
28286 {1, 1152921504338411520},
28287 },
28288 outputs: []outputInfo{
28289 {0, 1152921504338411520},
28290 },
28291 },
28292 },
28293 {
28294 name: "DIVF",
28295 argLen: 2,
28296 asm: mips.ADIVF,
28297 reg: regInfo{
28298 inputs: []inputInfo{
28299 {0, 1152921504338411520},
28300 {1, 1152921504338411520},
28301 },
28302 outputs: []outputInfo{
28303 {0, 1152921504338411520},
28304 },
28305 },
28306 },
28307 {
28308 name: "DIVD",
28309 argLen: 2,
28310 asm: mips.ADIVD,
28311 reg: regInfo{
28312 inputs: []inputInfo{
28313 {0, 1152921504338411520},
28314 {1, 1152921504338411520},
28315 },
28316 outputs: []outputInfo{
28317 {0, 1152921504338411520},
28318 },
28319 },
28320 },
28321 {
28322 name: "AND",
28323 argLen: 2,
28324 commutative: true,
28325 asm: mips.AAND,
28326 reg: regInfo{
28327 inputs: []inputInfo{
28328 {0, 234881022},
28329 {1, 234881022},
28330 },
28331 outputs: []outputInfo{
28332 {0, 167772158},
28333 },
28334 },
28335 },
28336 {
28337 name: "ANDconst",
28338 auxType: auxInt64,
28339 argLen: 1,
28340 asm: mips.AAND,
28341 reg: regInfo{
28342 inputs: []inputInfo{
28343 {0, 234881022},
28344 },
28345 outputs: []outputInfo{
28346 {0, 167772158},
28347 },
28348 },
28349 },
28350 {
28351 name: "OR",
28352 argLen: 2,
28353 commutative: true,
28354 asm: mips.AOR,
28355 reg: regInfo{
28356 inputs: []inputInfo{
28357 {0, 234881022},
28358 {1, 234881022},
28359 },
28360 outputs: []outputInfo{
28361 {0, 167772158},
28362 },
28363 },
28364 },
28365 {
28366 name: "ORconst",
28367 auxType: auxInt64,
28368 argLen: 1,
28369 asm: mips.AOR,
28370 reg: regInfo{
28371 inputs: []inputInfo{
28372 {0, 234881022},
28373 },
28374 outputs: []outputInfo{
28375 {0, 167772158},
28376 },
28377 },
28378 },
28379 {
28380 name: "XOR",
28381 argLen: 2,
28382 commutative: true,
28383 asm: mips.AXOR,
28384 reg: regInfo{
28385 inputs: []inputInfo{
28386 {0, 234881022},
28387 {1, 234881022},
28388 },
28389 outputs: []outputInfo{
28390 {0, 167772158},
28391 },
28392 },
28393 },
28394 {
28395 name: "XORconst",
28396 auxType: auxInt64,
28397 argLen: 1,
28398 asm: mips.AXOR,
28399 reg: regInfo{
28400 inputs: []inputInfo{
28401 {0, 234881022},
28402 },
28403 outputs: []outputInfo{
28404 {0, 167772158},
28405 },
28406 },
28407 },
28408 {
28409 name: "NOR",
28410 argLen: 2,
28411 commutative: true,
28412 asm: mips.ANOR,
28413 reg: regInfo{
28414 inputs: []inputInfo{
28415 {0, 234881022},
28416 {1, 234881022},
28417 },
28418 outputs: []outputInfo{
28419 {0, 167772158},
28420 },
28421 },
28422 },
28423 {
28424 name: "NORconst",
28425 auxType: auxInt64,
28426 argLen: 1,
28427 asm: mips.ANOR,
28428 reg: regInfo{
28429 inputs: []inputInfo{
28430 {0, 234881022},
28431 },
28432 outputs: []outputInfo{
28433 {0, 167772158},
28434 },
28435 },
28436 },
28437 {
28438 name: "NEGV",
28439 argLen: 1,
28440 reg: regInfo{
28441 inputs: []inputInfo{
28442 {0, 234881022},
28443 },
28444 outputs: []outputInfo{
28445 {0, 167772158},
28446 },
28447 },
28448 },
28449 {
28450 name: "NEGF",
28451 argLen: 1,
28452 asm: mips.ANEGF,
28453 reg: regInfo{
28454 inputs: []inputInfo{
28455 {0, 1152921504338411520},
28456 },
28457 outputs: []outputInfo{
28458 {0, 1152921504338411520},
28459 },
28460 },
28461 },
28462 {
28463 name: "NEGD",
28464 argLen: 1,
28465 asm: mips.ANEGD,
28466 reg: regInfo{
28467 inputs: []inputInfo{
28468 {0, 1152921504338411520},
28469 },
28470 outputs: []outputInfo{
28471 {0, 1152921504338411520},
28472 },
28473 },
28474 },
28475 {
28476 name: "ABSD",
28477 argLen: 1,
28478 asm: mips.AABSD,
28479 reg: regInfo{
28480 inputs: []inputInfo{
28481 {0, 1152921504338411520},
28482 },
28483 outputs: []outputInfo{
28484 {0, 1152921504338411520},
28485 },
28486 },
28487 },
28488 {
28489 name: "SQRTD",
28490 argLen: 1,
28491 asm: mips.ASQRTD,
28492 reg: regInfo{
28493 inputs: []inputInfo{
28494 {0, 1152921504338411520},
28495 },
28496 outputs: []outputInfo{
28497 {0, 1152921504338411520},
28498 },
28499 },
28500 },
28501 {
28502 name: "SQRTF",
28503 argLen: 1,
28504 asm: mips.ASQRTF,
28505 reg: regInfo{
28506 inputs: []inputInfo{
28507 {0, 1152921504338411520},
28508 },
28509 outputs: []outputInfo{
28510 {0, 1152921504338411520},
28511 },
28512 },
28513 },
28514 {
28515 name: "SLLV",
28516 argLen: 2,
28517 asm: mips.ASLLV,
28518 reg: regInfo{
28519 inputs: []inputInfo{
28520 {0, 234881022},
28521 {1, 234881022},
28522 },
28523 outputs: []outputInfo{
28524 {0, 167772158},
28525 },
28526 },
28527 },
28528 {
28529 name: "SLLVconst",
28530 auxType: auxInt64,
28531 argLen: 1,
28532 asm: mips.ASLLV,
28533 reg: regInfo{
28534 inputs: []inputInfo{
28535 {0, 234881022},
28536 },
28537 outputs: []outputInfo{
28538 {0, 167772158},
28539 },
28540 },
28541 },
28542 {
28543 name: "SRLV",
28544 argLen: 2,
28545 asm: mips.ASRLV,
28546 reg: regInfo{
28547 inputs: []inputInfo{
28548 {0, 234881022},
28549 {1, 234881022},
28550 },
28551 outputs: []outputInfo{
28552 {0, 167772158},
28553 },
28554 },
28555 },
28556 {
28557 name: "SRLVconst",
28558 auxType: auxInt64,
28559 argLen: 1,
28560 asm: mips.ASRLV,
28561 reg: regInfo{
28562 inputs: []inputInfo{
28563 {0, 234881022},
28564 },
28565 outputs: []outputInfo{
28566 {0, 167772158},
28567 },
28568 },
28569 },
28570 {
28571 name: "SRAV",
28572 argLen: 2,
28573 asm: mips.ASRAV,
28574 reg: regInfo{
28575 inputs: []inputInfo{
28576 {0, 234881022},
28577 {1, 234881022},
28578 },
28579 outputs: []outputInfo{
28580 {0, 167772158},
28581 },
28582 },
28583 },
28584 {
28585 name: "SRAVconst",
28586 auxType: auxInt64,
28587 argLen: 1,
28588 asm: mips.ASRAV,
28589 reg: regInfo{
28590 inputs: []inputInfo{
28591 {0, 234881022},
28592 },
28593 outputs: []outputInfo{
28594 {0, 167772158},
28595 },
28596 },
28597 },
28598 {
28599 name: "SGT",
28600 argLen: 2,
28601 asm: mips.ASGT,
28602 reg: regInfo{
28603 inputs: []inputInfo{
28604 {0, 234881022},
28605 {1, 234881022},
28606 },
28607 outputs: []outputInfo{
28608 {0, 167772158},
28609 },
28610 },
28611 },
28612 {
28613 name: "SGTconst",
28614 auxType: auxInt64,
28615 argLen: 1,
28616 asm: mips.ASGT,
28617 reg: regInfo{
28618 inputs: []inputInfo{
28619 {0, 234881022},
28620 },
28621 outputs: []outputInfo{
28622 {0, 167772158},
28623 },
28624 },
28625 },
28626 {
28627 name: "SGTU",
28628 argLen: 2,
28629 asm: mips.ASGTU,
28630 reg: regInfo{
28631 inputs: []inputInfo{
28632 {0, 234881022},
28633 {1, 234881022},
28634 },
28635 outputs: []outputInfo{
28636 {0, 167772158},
28637 },
28638 },
28639 },
28640 {
28641 name: "SGTUconst",
28642 auxType: auxInt64,
28643 argLen: 1,
28644 asm: mips.ASGTU,
28645 reg: regInfo{
28646 inputs: []inputInfo{
28647 {0, 234881022},
28648 },
28649 outputs: []outputInfo{
28650 {0, 167772158},
28651 },
28652 },
28653 },
28654 {
28655 name: "CMPEQF",
28656 argLen: 2,
28657 asm: mips.ACMPEQF,
28658 reg: regInfo{
28659 inputs: []inputInfo{
28660 {0, 1152921504338411520},
28661 {1, 1152921504338411520},
28662 },
28663 },
28664 },
28665 {
28666 name: "CMPEQD",
28667 argLen: 2,
28668 asm: mips.ACMPEQD,
28669 reg: regInfo{
28670 inputs: []inputInfo{
28671 {0, 1152921504338411520},
28672 {1, 1152921504338411520},
28673 },
28674 },
28675 },
28676 {
28677 name: "CMPGEF",
28678 argLen: 2,
28679 asm: mips.ACMPGEF,
28680 reg: regInfo{
28681 inputs: []inputInfo{
28682 {0, 1152921504338411520},
28683 {1, 1152921504338411520},
28684 },
28685 },
28686 },
28687 {
28688 name: "CMPGED",
28689 argLen: 2,
28690 asm: mips.ACMPGED,
28691 reg: regInfo{
28692 inputs: []inputInfo{
28693 {0, 1152921504338411520},
28694 {1, 1152921504338411520},
28695 },
28696 },
28697 },
28698 {
28699 name: "CMPGTF",
28700 argLen: 2,
28701 asm: mips.ACMPGTF,
28702 reg: regInfo{
28703 inputs: []inputInfo{
28704 {0, 1152921504338411520},
28705 {1, 1152921504338411520},
28706 },
28707 },
28708 },
28709 {
28710 name: "CMPGTD",
28711 argLen: 2,
28712 asm: mips.ACMPGTD,
28713 reg: regInfo{
28714 inputs: []inputInfo{
28715 {0, 1152921504338411520},
28716 {1, 1152921504338411520},
28717 },
28718 },
28719 },
28720 {
28721 name: "MOVVconst",
28722 auxType: auxInt64,
28723 argLen: 0,
28724 rematerializeable: true,
28725 asm: mips.AMOVV,
28726 reg: regInfo{
28727 outputs: []outputInfo{
28728 {0, 167772158},
28729 },
28730 },
28731 },
28732 {
28733 name: "MOVFconst",
28734 auxType: auxFloat64,
28735 argLen: 0,
28736 rematerializeable: true,
28737 asm: mips.AMOVF,
28738 reg: regInfo{
28739 outputs: []outputInfo{
28740 {0, 1152921504338411520},
28741 },
28742 },
28743 },
28744 {
28745 name: "MOVDconst",
28746 auxType: auxFloat64,
28747 argLen: 0,
28748 rematerializeable: true,
28749 asm: mips.AMOVD,
28750 reg: regInfo{
28751 outputs: []outputInfo{
28752 {0, 1152921504338411520},
28753 },
28754 },
28755 },
28756 {
28757 name: "MOVVaddr",
28758 auxType: auxSymOff,
28759 argLen: 1,
28760 rematerializeable: true,
28761 symEffect: SymAddr,
28762 asm: mips.AMOVV,
28763 reg: regInfo{
28764 inputs: []inputInfo{
28765 {0, 4611686018460942336},
28766 },
28767 outputs: []outputInfo{
28768 {0, 167772158},
28769 },
28770 },
28771 },
28772 {
28773 name: "MOVBload",
28774 auxType: auxSymOff,
28775 argLen: 2,
28776 faultOnNilArg0: true,
28777 symEffect: SymRead,
28778 asm: mips.AMOVB,
28779 reg: regInfo{
28780 inputs: []inputInfo{
28781 {0, 4611686018695823358},
28782 },
28783 outputs: []outputInfo{
28784 {0, 167772158},
28785 },
28786 },
28787 },
28788 {
28789 name: "MOVBUload",
28790 auxType: auxSymOff,
28791 argLen: 2,
28792 faultOnNilArg0: true,
28793 symEffect: SymRead,
28794 asm: mips.AMOVBU,
28795 reg: regInfo{
28796 inputs: []inputInfo{
28797 {0, 4611686018695823358},
28798 },
28799 outputs: []outputInfo{
28800 {0, 167772158},
28801 },
28802 },
28803 },
28804 {
28805 name: "MOVHload",
28806 auxType: auxSymOff,
28807 argLen: 2,
28808 faultOnNilArg0: true,
28809 symEffect: SymRead,
28810 asm: mips.AMOVH,
28811 reg: regInfo{
28812 inputs: []inputInfo{
28813 {0, 4611686018695823358},
28814 },
28815 outputs: []outputInfo{
28816 {0, 167772158},
28817 },
28818 },
28819 },
28820 {
28821 name: "MOVHUload",
28822 auxType: auxSymOff,
28823 argLen: 2,
28824 faultOnNilArg0: true,
28825 symEffect: SymRead,
28826 asm: mips.AMOVHU,
28827 reg: regInfo{
28828 inputs: []inputInfo{
28829 {0, 4611686018695823358},
28830 },
28831 outputs: []outputInfo{
28832 {0, 167772158},
28833 },
28834 },
28835 },
28836 {
28837 name: "MOVWload",
28838 auxType: auxSymOff,
28839 argLen: 2,
28840 faultOnNilArg0: true,
28841 symEffect: SymRead,
28842 asm: mips.AMOVW,
28843 reg: regInfo{
28844 inputs: []inputInfo{
28845 {0, 4611686018695823358},
28846 },
28847 outputs: []outputInfo{
28848 {0, 167772158},
28849 },
28850 },
28851 },
28852 {
28853 name: "MOVWUload",
28854 auxType: auxSymOff,
28855 argLen: 2,
28856 faultOnNilArg0: true,
28857 symEffect: SymRead,
28858 asm: mips.AMOVWU,
28859 reg: regInfo{
28860 inputs: []inputInfo{
28861 {0, 4611686018695823358},
28862 },
28863 outputs: []outputInfo{
28864 {0, 167772158},
28865 },
28866 },
28867 },
28868 {
28869 name: "MOVVload",
28870 auxType: auxSymOff,
28871 argLen: 2,
28872 faultOnNilArg0: true,
28873 symEffect: SymRead,
28874 asm: mips.AMOVV,
28875 reg: regInfo{
28876 inputs: []inputInfo{
28877 {0, 4611686018695823358},
28878 },
28879 outputs: []outputInfo{
28880 {0, 167772158},
28881 },
28882 },
28883 },
28884 {
28885 name: "MOVFload",
28886 auxType: auxSymOff,
28887 argLen: 2,
28888 faultOnNilArg0: true,
28889 symEffect: SymRead,
28890 asm: mips.AMOVF,
28891 reg: regInfo{
28892 inputs: []inputInfo{
28893 {0, 4611686018695823358},
28894 },
28895 outputs: []outputInfo{
28896 {0, 1152921504338411520},
28897 },
28898 },
28899 },
28900 {
28901 name: "MOVDload",
28902 auxType: auxSymOff,
28903 argLen: 2,
28904 faultOnNilArg0: true,
28905 symEffect: SymRead,
28906 asm: mips.AMOVD,
28907 reg: regInfo{
28908 inputs: []inputInfo{
28909 {0, 4611686018695823358},
28910 },
28911 outputs: []outputInfo{
28912 {0, 1152921504338411520},
28913 },
28914 },
28915 },
28916 {
28917 name: "MOVBstore",
28918 auxType: auxSymOff,
28919 argLen: 3,
28920 faultOnNilArg0: true,
28921 symEffect: SymWrite,
28922 asm: mips.AMOVB,
28923 reg: regInfo{
28924 inputs: []inputInfo{
28925 {1, 234881022},
28926 {0, 4611686018695823358},
28927 },
28928 },
28929 },
28930 {
28931 name: "MOVHstore",
28932 auxType: auxSymOff,
28933 argLen: 3,
28934 faultOnNilArg0: true,
28935 symEffect: SymWrite,
28936 asm: mips.AMOVH,
28937 reg: regInfo{
28938 inputs: []inputInfo{
28939 {1, 234881022},
28940 {0, 4611686018695823358},
28941 },
28942 },
28943 },
28944 {
28945 name: "MOVWstore",
28946 auxType: auxSymOff,
28947 argLen: 3,
28948 faultOnNilArg0: true,
28949 symEffect: SymWrite,
28950 asm: mips.AMOVW,
28951 reg: regInfo{
28952 inputs: []inputInfo{
28953 {1, 234881022},
28954 {0, 4611686018695823358},
28955 },
28956 },
28957 },
28958 {
28959 name: "MOVVstore",
28960 auxType: auxSymOff,
28961 argLen: 3,
28962 faultOnNilArg0: true,
28963 symEffect: SymWrite,
28964 asm: mips.AMOVV,
28965 reg: regInfo{
28966 inputs: []inputInfo{
28967 {1, 234881022},
28968 {0, 4611686018695823358},
28969 },
28970 },
28971 },
28972 {
28973 name: "MOVFstore",
28974 auxType: auxSymOff,
28975 argLen: 3,
28976 faultOnNilArg0: true,
28977 symEffect: SymWrite,
28978 asm: mips.AMOVF,
28979 reg: regInfo{
28980 inputs: []inputInfo{
28981 {0, 4611686018695823358},
28982 {1, 1152921504338411520},
28983 },
28984 },
28985 },
28986 {
28987 name: "MOVDstore",
28988 auxType: auxSymOff,
28989 argLen: 3,
28990 faultOnNilArg0: true,
28991 symEffect: SymWrite,
28992 asm: mips.AMOVD,
28993 reg: regInfo{
28994 inputs: []inputInfo{
28995 {0, 4611686018695823358},
28996 {1, 1152921504338411520},
28997 },
28998 },
28999 },
29000 {
29001 name: "MOVBstorezero",
29002 auxType: auxSymOff,
29003 argLen: 2,
29004 faultOnNilArg0: true,
29005 symEffect: SymWrite,
29006 asm: mips.AMOVB,
29007 reg: regInfo{
29008 inputs: []inputInfo{
29009 {0, 4611686018695823358},
29010 },
29011 },
29012 },
29013 {
29014 name: "MOVHstorezero",
29015 auxType: auxSymOff,
29016 argLen: 2,
29017 faultOnNilArg0: true,
29018 symEffect: SymWrite,
29019 asm: mips.AMOVH,
29020 reg: regInfo{
29021 inputs: []inputInfo{
29022 {0, 4611686018695823358},
29023 },
29024 },
29025 },
29026 {
29027 name: "MOVWstorezero",
29028 auxType: auxSymOff,
29029 argLen: 2,
29030 faultOnNilArg0: true,
29031 symEffect: SymWrite,
29032 asm: mips.AMOVW,
29033 reg: regInfo{
29034 inputs: []inputInfo{
29035 {0, 4611686018695823358},
29036 },
29037 },
29038 },
29039 {
29040 name: "MOVVstorezero",
29041 auxType: auxSymOff,
29042 argLen: 2,
29043 faultOnNilArg0: true,
29044 symEffect: SymWrite,
29045 asm: mips.AMOVV,
29046 reg: regInfo{
29047 inputs: []inputInfo{
29048 {0, 4611686018695823358},
29049 },
29050 },
29051 },
29052 {
29053 name: "MOVWfpgp",
29054 argLen: 1,
29055 asm: mips.AMOVW,
29056 reg: regInfo{
29057 inputs: []inputInfo{
29058 {0, 1152921504338411520},
29059 },
29060 outputs: []outputInfo{
29061 {0, 167772158},
29062 },
29063 },
29064 },
29065 {
29066 name: "MOVWgpfp",
29067 argLen: 1,
29068 asm: mips.AMOVW,
29069 reg: regInfo{
29070 inputs: []inputInfo{
29071 {0, 167772158},
29072 },
29073 outputs: []outputInfo{
29074 {0, 1152921504338411520},
29075 },
29076 },
29077 },
29078 {
29079 name: "MOVVfpgp",
29080 argLen: 1,
29081 asm: mips.AMOVV,
29082 reg: regInfo{
29083 inputs: []inputInfo{
29084 {0, 1152921504338411520},
29085 },
29086 outputs: []outputInfo{
29087 {0, 167772158},
29088 },
29089 },
29090 },
29091 {
29092 name: "MOVVgpfp",
29093 argLen: 1,
29094 asm: mips.AMOVV,
29095 reg: regInfo{
29096 inputs: []inputInfo{
29097 {0, 167772158},
29098 },
29099 outputs: []outputInfo{
29100 {0, 1152921504338411520},
29101 },
29102 },
29103 },
29104 {
29105 name: "MOVBreg",
29106 argLen: 1,
29107 asm: mips.AMOVB,
29108 reg: regInfo{
29109 inputs: []inputInfo{
29110 {0, 234881022},
29111 },
29112 outputs: []outputInfo{
29113 {0, 167772158},
29114 },
29115 },
29116 },
29117 {
29118 name: "MOVBUreg",
29119 argLen: 1,
29120 asm: mips.AMOVBU,
29121 reg: regInfo{
29122 inputs: []inputInfo{
29123 {0, 234881022},
29124 },
29125 outputs: []outputInfo{
29126 {0, 167772158},
29127 },
29128 },
29129 },
29130 {
29131 name: "MOVHreg",
29132 argLen: 1,
29133 asm: mips.AMOVH,
29134 reg: regInfo{
29135 inputs: []inputInfo{
29136 {0, 234881022},
29137 },
29138 outputs: []outputInfo{
29139 {0, 167772158},
29140 },
29141 },
29142 },
29143 {
29144 name: "MOVHUreg",
29145 argLen: 1,
29146 asm: mips.AMOVHU,
29147 reg: regInfo{
29148 inputs: []inputInfo{
29149 {0, 234881022},
29150 },
29151 outputs: []outputInfo{
29152 {0, 167772158},
29153 },
29154 },
29155 },
29156 {
29157 name: "MOVWreg",
29158 argLen: 1,
29159 asm: mips.AMOVW,
29160 reg: regInfo{
29161 inputs: []inputInfo{
29162 {0, 234881022},
29163 },
29164 outputs: []outputInfo{
29165 {0, 167772158},
29166 },
29167 },
29168 },
29169 {
29170 name: "MOVWUreg",
29171 argLen: 1,
29172 asm: mips.AMOVWU,
29173 reg: regInfo{
29174 inputs: []inputInfo{
29175 {0, 234881022},
29176 },
29177 outputs: []outputInfo{
29178 {0, 167772158},
29179 },
29180 },
29181 },
29182 {
29183 name: "MOVVreg",
29184 argLen: 1,
29185 asm: mips.AMOVV,
29186 reg: regInfo{
29187 inputs: []inputInfo{
29188 {0, 234881022},
29189 },
29190 outputs: []outputInfo{
29191 {0, 167772158},
29192 },
29193 },
29194 },
29195 {
29196 name: "MOVVnop",
29197 argLen: 1,
29198 resultInArg0: true,
29199 reg: regInfo{
29200 inputs: []inputInfo{
29201 {0, 167772158},
29202 },
29203 outputs: []outputInfo{
29204 {0, 167772158},
29205 },
29206 },
29207 },
29208 {
29209 name: "MOVWF",
29210 argLen: 1,
29211 asm: mips.AMOVWF,
29212 reg: regInfo{
29213 inputs: []inputInfo{
29214 {0, 1152921504338411520},
29215 },
29216 outputs: []outputInfo{
29217 {0, 1152921504338411520},
29218 },
29219 },
29220 },
29221 {
29222 name: "MOVWD",
29223 argLen: 1,
29224 asm: mips.AMOVWD,
29225 reg: regInfo{
29226 inputs: []inputInfo{
29227 {0, 1152921504338411520},
29228 },
29229 outputs: []outputInfo{
29230 {0, 1152921504338411520},
29231 },
29232 },
29233 },
29234 {
29235 name: "MOVVF",
29236 argLen: 1,
29237 asm: mips.AMOVVF,
29238 reg: regInfo{
29239 inputs: []inputInfo{
29240 {0, 1152921504338411520},
29241 },
29242 outputs: []outputInfo{
29243 {0, 1152921504338411520},
29244 },
29245 },
29246 },
29247 {
29248 name: "MOVVD",
29249 argLen: 1,
29250 asm: mips.AMOVVD,
29251 reg: regInfo{
29252 inputs: []inputInfo{
29253 {0, 1152921504338411520},
29254 },
29255 outputs: []outputInfo{
29256 {0, 1152921504338411520},
29257 },
29258 },
29259 },
29260 {
29261 name: "TRUNCFW",
29262 argLen: 1,
29263 asm: mips.ATRUNCFW,
29264 reg: regInfo{
29265 inputs: []inputInfo{
29266 {0, 1152921504338411520},
29267 },
29268 outputs: []outputInfo{
29269 {0, 1152921504338411520},
29270 },
29271 },
29272 },
29273 {
29274 name: "TRUNCDW",
29275 argLen: 1,
29276 asm: mips.ATRUNCDW,
29277 reg: regInfo{
29278 inputs: []inputInfo{
29279 {0, 1152921504338411520},
29280 },
29281 outputs: []outputInfo{
29282 {0, 1152921504338411520},
29283 },
29284 },
29285 },
29286 {
29287 name: "TRUNCFV",
29288 argLen: 1,
29289 asm: mips.ATRUNCFV,
29290 reg: regInfo{
29291 inputs: []inputInfo{
29292 {0, 1152921504338411520},
29293 },
29294 outputs: []outputInfo{
29295 {0, 1152921504338411520},
29296 },
29297 },
29298 },
29299 {
29300 name: "TRUNCDV",
29301 argLen: 1,
29302 asm: mips.ATRUNCDV,
29303 reg: regInfo{
29304 inputs: []inputInfo{
29305 {0, 1152921504338411520},
29306 },
29307 outputs: []outputInfo{
29308 {0, 1152921504338411520},
29309 },
29310 },
29311 },
29312 {
29313 name: "MOVFD",
29314 argLen: 1,
29315 asm: mips.AMOVFD,
29316 reg: regInfo{
29317 inputs: []inputInfo{
29318 {0, 1152921504338411520},
29319 },
29320 outputs: []outputInfo{
29321 {0, 1152921504338411520},
29322 },
29323 },
29324 },
29325 {
29326 name: "MOVDF",
29327 argLen: 1,
29328 asm: mips.AMOVDF,
29329 reg: regInfo{
29330 inputs: []inputInfo{
29331 {0, 1152921504338411520},
29332 },
29333 outputs: []outputInfo{
29334 {0, 1152921504338411520},
29335 },
29336 },
29337 },
29338 {
29339 name: "CALLstatic",
29340 auxType: auxCallOff,
29341 argLen: 1,
29342 clobberFlags: true,
29343 call: true,
29344 reg: regInfo{
29345 clobbers: 4611686018393833470,
29346 },
29347 },
29348 {
29349 name: "CALLtail",
29350 auxType: auxCallOff,
29351 argLen: 1,
29352 clobberFlags: true,
29353 call: true,
29354 tailCall: true,
29355 reg: regInfo{
29356 clobbers: 4611686018393833470,
29357 },
29358 },
29359 {
29360 name: "CALLclosure",
29361 auxType: auxCallOff,
29362 argLen: 3,
29363 clobberFlags: true,
29364 call: true,
29365 reg: regInfo{
29366 inputs: []inputInfo{
29367 {1, 4194304},
29368 {0, 201326590},
29369 },
29370 clobbers: 4611686018393833470,
29371 },
29372 },
29373 {
29374 name: "CALLinter",
29375 auxType: auxCallOff,
29376 argLen: 2,
29377 clobberFlags: true,
29378 call: true,
29379 reg: regInfo{
29380 inputs: []inputInfo{
29381 {0, 167772158},
29382 },
29383 clobbers: 4611686018393833470,
29384 },
29385 },
29386 {
29387 name: "DUFFZERO",
29388 auxType: auxInt64,
29389 argLen: 2,
29390 faultOnNilArg0: true,
29391 reg: regInfo{
29392 inputs: []inputInfo{
29393 {0, 167772158},
29394 },
29395 clobbers: 134217730,
29396 },
29397 },
29398 {
29399 name: "DUFFCOPY",
29400 auxType: auxInt64,
29401 argLen: 3,
29402 faultOnNilArg0: true,
29403 faultOnNilArg1: true,
29404 reg: regInfo{
29405 inputs: []inputInfo{
29406 {0, 4},
29407 {1, 2},
29408 },
29409 clobbers: 134217734,
29410 },
29411 },
29412 {
29413 name: "LoweredZero",
29414 auxType: auxInt64,
29415 argLen: 3,
29416 clobberFlags: true,
29417 faultOnNilArg0: true,
29418 reg: regInfo{
29419 inputs: []inputInfo{
29420 {0, 2},
29421 {1, 167772158},
29422 },
29423 clobbers: 2,
29424 },
29425 },
29426 {
29427 name: "LoweredMove",
29428 auxType: auxInt64,
29429 argLen: 4,
29430 clobberFlags: true,
29431 faultOnNilArg0: true,
29432 faultOnNilArg1: true,
29433 reg: regInfo{
29434 inputs: []inputInfo{
29435 {0, 4},
29436 {1, 2},
29437 {2, 167772158},
29438 },
29439 clobbers: 6,
29440 },
29441 },
29442 {
29443 name: "LoweredAtomicAnd32",
29444 argLen: 3,
29445 faultOnNilArg0: true,
29446 hasSideEffects: true,
29447 unsafePoint: true,
29448 asm: mips.AAND,
29449 reg: regInfo{
29450 inputs: []inputInfo{
29451 {1, 234881022},
29452 {0, 4611686018695823358},
29453 },
29454 },
29455 },
29456 {
29457 name: "LoweredAtomicOr32",
29458 argLen: 3,
29459 faultOnNilArg0: true,
29460 hasSideEffects: true,
29461 unsafePoint: true,
29462 asm: mips.AOR,
29463 reg: regInfo{
29464 inputs: []inputInfo{
29465 {1, 234881022},
29466 {0, 4611686018695823358},
29467 },
29468 },
29469 },
29470 {
29471 name: "LoweredAtomicLoad8",
29472 argLen: 2,
29473 faultOnNilArg0: true,
29474 reg: regInfo{
29475 inputs: []inputInfo{
29476 {0, 4611686018695823358},
29477 },
29478 outputs: []outputInfo{
29479 {0, 167772158},
29480 },
29481 },
29482 },
29483 {
29484 name: "LoweredAtomicLoad32",
29485 argLen: 2,
29486 faultOnNilArg0: true,
29487 reg: regInfo{
29488 inputs: []inputInfo{
29489 {0, 4611686018695823358},
29490 },
29491 outputs: []outputInfo{
29492 {0, 167772158},
29493 },
29494 },
29495 },
29496 {
29497 name: "LoweredAtomicLoad64",
29498 argLen: 2,
29499 faultOnNilArg0: true,
29500 reg: regInfo{
29501 inputs: []inputInfo{
29502 {0, 4611686018695823358},
29503 },
29504 outputs: []outputInfo{
29505 {0, 167772158},
29506 },
29507 },
29508 },
29509 {
29510 name: "LoweredAtomicStore8",
29511 argLen: 3,
29512 faultOnNilArg0: true,
29513 hasSideEffects: true,
29514 reg: regInfo{
29515 inputs: []inputInfo{
29516 {1, 234881022},
29517 {0, 4611686018695823358},
29518 },
29519 },
29520 },
29521 {
29522 name: "LoweredAtomicStore32",
29523 argLen: 3,
29524 faultOnNilArg0: true,
29525 hasSideEffects: true,
29526 reg: regInfo{
29527 inputs: []inputInfo{
29528 {1, 234881022},
29529 {0, 4611686018695823358},
29530 },
29531 },
29532 },
29533 {
29534 name: "LoweredAtomicStore64",
29535 argLen: 3,
29536 faultOnNilArg0: true,
29537 hasSideEffects: true,
29538 reg: regInfo{
29539 inputs: []inputInfo{
29540 {1, 234881022},
29541 {0, 4611686018695823358},
29542 },
29543 },
29544 },
29545 {
29546 name: "LoweredAtomicStorezero32",
29547 argLen: 2,
29548 faultOnNilArg0: true,
29549 hasSideEffects: true,
29550 reg: regInfo{
29551 inputs: []inputInfo{
29552 {0, 4611686018695823358},
29553 },
29554 },
29555 },
29556 {
29557 name: "LoweredAtomicStorezero64",
29558 argLen: 2,
29559 faultOnNilArg0: true,
29560 hasSideEffects: true,
29561 reg: regInfo{
29562 inputs: []inputInfo{
29563 {0, 4611686018695823358},
29564 },
29565 },
29566 },
29567 {
29568 name: "LoweredAtomicExchange32",
29569 argLen: 3,
29570 resultNotInArgs: true,
29571 faultOnNilArg0: true,
29572 hasSideEffects: true,
29573 unsafePoint: true,
29574 reg: regInfo{
29575 inputs: []inputInfo{
29576 {1, 234881022},
29577 {0, 4611686018695823358},
29578 },
29579 outputs: []outputInfo{
29580 {0, 167772158},
29581 },
29582 },
29583 },
29584 {
29585 name: "LoweredAtomicExchange64",
29586 argLen: 3,
29587 resultNotInArgs: true,
29588 faultOnNilArg0: true,
29589 hasSideEffects: true,
29590 unsafePoint: true,
29591 reg: regInfo{
29592 inputs: []inputInfo{
29593 {1, 234881022},
29594 {0, 4611686018695823358},
29595 },
29596 outputs: []outputInfo{
29597 {0, 167772158},
29598 },
29599 },
29600 },
29601 {
29602 name: "LoweredAtomicAdd32",
29603 argLen: 3,
29604 resultNotInArgs: true,
29605 faultOnNilArg0: true,
29606 hasSideEffects: true,
29607 unsafePoint: true,
29608 reg: regInfo{
29609 inputs: []inputInfo{
29610 {1, 234881022},
29611 {0, 4611686018695823358},
29612 },
29613 outputs: []outputInfo{
29614 {0, 167772158},
29615 },
29616 },
29617 },
29618 {
29619 name: "LoweredAtomicAdd64",
29620 argLen: 3,
29621 resultNotInArgs: true,
29622 faultOnNilArg0: true,
29623 hasSideEffects: true,
29624 unsafePoint: true,
29625 reg: regInfo{
29626 inputs: []inputInfo{
29627 {1, 234881022},
29628 {0, 4611686018695823358},
29629 },
29630 outputs: []outputInfo{
29631 {0, 167772158},
29632 },
29633 },
29634 },
29635 {
29636 name: "LoweredAtomicAddconst32",
29637 auxType: auxInt32,
29638 argLen: 2,
29639 resultNotInArgs: true,
29640 faultOnNilArg0: true,
29641 hasSideEffects: true,
29642 unsafePoint: true,
29643 reg: regInfo{
29644 inputs: []inputInfo{
29645 {0, 4611686018695823358},
29646 },
29647 outputs: []outputInfo{
29648 {0, 167772158},
29649 },
29650 },
29651 },
29652 {
29653 name: "LoweredAtomicAddconst64",
29654 auxType: auxInt64,
29655 argLen: 2,
29656 resultNotInArgs: true,
29657 faultOnNilArg0: true,
29658 hasSideEffects: true,
29659 unsafePoint: true,
29660 reg: regInfo{
29661 inputs: []inputInfo{
29662 {0, 4611686018695823358},
29663 },
29664 outputs: []outputInfo{
29665 {0, 167772158},
29666 },
29667 },
29668 },
29669 {
29670 name: "LoweredAtomicCas32",
29671 argLen: 4,
29672 resultNotInArgs: true,
29673 faultOnNilArg0: true,
29674 hasSideEffects: true,
29675 unsafePoint: true,
29676 reg: regInfo{
29677 inputs: []inputInfo{
29678 {1, 234881022},
29679 {2, 234881022},
29680 {0, 4611686018695823358},
29681 },
29682 outputs: []outputInfo{
29683 {0, 167772158},
29684 },
29685 },
29686 },
29687 {
29688 name: "LoweredAtomicCas64",
29689 argLen: 4,
29690 resultNotInArgs: true,
29691 faultOnNilArg0: true,
29692 hasSideEffects: true,
29693 unsafePoint: true,
29694 reg: regInfo{
29695 inputs: []inputInfo{
29696 {1, 234881022},
29697 {2, 234881022},
29698 {0, 4611686018695823358},
29699 },
29700 outputs: []outputInfo{
29701 {0, 167772158},
29702 },
29703 },
29704 },
29705 {
29706 name: "LoweredNilCheck",
29707 argLen: 2,
29708 nilCheck: true,
29709 faultOnNilArg0: true,
29710 reg: regInfo{
29711 inputs: []inputInfo{
29712 {0, 234881022},
29713 },
29714 },
29715 },
29716 {
29717 name: "FPFlagTrue",
29718 argLen: 1,
29719 reg: regInfo{
29720 outputs: []outputInfo{
29721 {0, 167772158},
29722 },
29723 },
29724 },
29725 {
29726 name: "FPFlagFalse",
29727 argLen: 1,
29728 reg: regInfo{
29729 outputs: []outputInfo{
29730 {0, 167772158},
29731 },
29732 },
29733 },
29734 {
29735 name: "LoweredGetClosurePtr",
29736 argLen: 0,
29737 zeroWidth: true,
29738 reg: regInfo{
29739 outputs: []outputInfo{
29740 {0, 4194304},
29741 },
29742 },
29743 },
29744 {
29745 name: "LoweredGetCallerSP",
29746 argLen: 1,
29747 rematerializeable: true,
29748 reg: regInfo{
29749 outputs: []outputInfo{
29750 {0, 167772158},
29751 },
29752 },
29753 },
29754 {
29755 name: "LoweredGetCallerPC",
29756 argLen: 0,
29757 rematerializeable: true,
29758 reg: regInfo{
29759 outputs: []outputInfo{
29760 {0, 167772158},
29761 },
29762 },
29763 },
29764 {
29765 name: "LoweredWB",
29766 auxType: auxInt64,
29767 argLen: 1,
29768 clobberFlags: true,
29769 reg: regInfo{
29770 clobbers: 4611686018293170176,
29771 outputs: []outputInfo{
29772 {0, 16777216},
29773 },
29774 },
29775 },
29776 {
29777 name: "LoweredPubBarrier",
29778 argLen: 1,
29779 hasSideEffects: true,
29780 asm: mips.ASYNC,
29781 reg: regInfo{},
29782 },
29783 {
29784 name: "LoweredPanicBoundsRR",
29785 auxType: auxInt64,
29786 argLen: 3,
29787 call: true,
29788 reg: regInfo{
29789 inputs: []inputInfo{
29790 {0, 131070},
29791 {1, 131070},
29792 },
29793 },
29794 },
29795 {
29796 name: "LoweredPanicBoundsRC",
29797 auxType: auxPanicBoundsC,
29798 argLen: 2,
29799 call: true,
29800 reg: regInfo{
29801 inputs: []inputInfo{
29802 {0, 131070},
29803 },
29804 },
29805 },
29806 {
29807 name: "LoweredPanicBoundsCR",
29808 auxType: auxPanicBoundsC,
29809 argLen: 2,
29810 call: true,
29811 reg: regInfo{
29812 inputs: []inputInfo{
29813 {0, 131070},
29814 },
29815 },
29816 },
29817 {
29818 name: "LoweredPanicBoundsCC",
29819 auxType: auxPanicBoundsCC,
29820 argLen: 1,
29821 call: true,
29822 reg: regInfo{},
29823 },
29824
29825 {
29826 name: "ADD",
29827 argLen: 2,
29828 commutative: true,
29829 asm: ppc64.AADD,
29830 reg: regInfo{
29831 inputs: []inputInfo{
29832 {0, 1073733630},
29833 {1, 1073733630},
29834 },
29835 outputs: []outputInfo{
29836 {0, 1073733624},
29837 },
29838 },
29839 },
29840 {
29841 name: "ADDCC",
29842 argLen: 2,
29843 commutative: true,
29844 asm: ppc64.AADDCC,
29845 reg: regInfo{
29846 inputs: []inputInfo{
29847 {0, 1073733630},
29848 {1, 1073733630},
29849 },
29850 outputs: []outputInfo{
29851 {0, 1073733624},
29852 },
29853 },
29854 },
29855 {
29856 name: "ADDconst",
29857 auxType: auxInt64,
29858 argLen: 1,
29859 asm: ppc64.AADD,
29860 reg: regInfo{
29861 inputs: []inputInfo{
29862 {0, 1073733630},
29863 },
29864 outputs: []outputInfo{
29865 {0, 1073733624},
29866 },
29867 },
29868 },
29869 {
29870 name: "ADDCCconst",
29871 auxType: auxInt64,
29872 argLen: 1,
29873 asm: ppc64.AADDCCC,
29874 reg: regInfo{
29875 inputs: []inputInfo{
29876 {0, 1073733630},
29877 },
29878 clobbers: 9223372036854775808,
29879 outputs: []outputInfo{
29880 {0, 1073733624},
29881 },
29882 },
29883 },
29884 {
29885 name: "FADD",
29886 argLen: 2,
29887 commutative: true,
29888 asm: ppc64.AFADD,
29889 reg: regInfo{
29890 inputs: []inputInfo{
29891 {0, 9223372032559808512},
29892 {1, 9223372032559808512},
29893 },
29894 outputs: []outputInfo{
29895 {0, 9223372032559808512},
29896 },
29897 },
29898 },
29899 {
29900 name: "FADDS",
29901 argLen: 2,
29902 commutative: true,
29903 asm: ppc64.AFADDS,
29904 reg: regInfo{
29905 inputs: []inputInfo{
29906 {0, 9223372032559808512},
29907 {1, 9223372032559808512},
29908 },
29909 outputs: []outputInfo{
29910 {0, 9223372032559808512},
29911 },
29912 },
29913 },
29914 {
29915 name: "SUB",
29916 argLen: 2,
29917 asm: ppc64.ASUB,
29918 reg: regInfo{
29919 inputs: []inputInfo{
29920 {0, 1073733630},
29921 {1, 1073733630},
29922 },
29923 outputs: []outputInfo{
29924 {0, 1073733624},
29925 },
29926 },
29927 },
29928 {
29929 name: "SUBCC",
29930 argLen: 2,
29931 asm: ppc64.ASUBCC,
29932 reg: regInfo{
29933 inputs: []inputInfo{
29934 {0, 1073733630},
29935 {1, 1073733630},
29936 },
29937 outputs: []outputInfo{
29938 {0, 1073733624},
29939 },
29940 },
29941 },
29942 {
29943 name: "SUBFCconst",
29944 auxType: auxInt64,
29945 argLen: 1,
29946 asm: ppc64.ASUBC,
29947 reg: regInfo{
29948 inputs: []inputInfo{
29949 {0, 1073733630},
29950 },
29951 clobbers: 9223372036854775808,
29952 outputs: []outputInfo{
29953 {0, 1073733624},
29954 },
29955 },
29956 },
29957 {
29958 name: "FSUB",
29959 argLen: 2,
29960 asm: ppc64.AFSUB,
29961 reg: regInfo{
29962 inputs: []inputInfo{
29963 {0, 9223372032559808512},
29964 {1, 9223372032559808512},
29965 },
29966 outputs: []outputInfo{
29967 {0, 9223372032559808512},
29968 },
29969 },
29970 },
29971 {
29972 name: "FSUBS",
29973 argLen: 2,
29974 asm: ppc64.AFSUBS,
29975 reg: regInfo{
29976 inputs: []inputInfo{
29977 {0, 9223372032559808512},
29978 {1, 9223372032559808512},
29979 },
29980 outputs: []outputInfo{
29981 {0, 9223372032559808512},
29982 },
29983 },
29984 },
29985 {
29986 name: "XSMINJDP",
29987 argLen: 2,
29988 asm: ppc64.AXSMINJDP,
29989 reg: regInfo{
29990 inputs: []inputInfo{
29991 {0, 9223372032559808512},
29992 {1, 9223372032559808512},
29993 },
29994 outputs: []outputInfo{
29995 {0, 9223372032559808512},
29996 },
29997 },
29998 },
29999 {
30000 name: "XSMAXJDP",
30001 argLen: 2,
30002 asm: ppc64.AXSMAXJDP,
30003 reg: regInfo{
30004 inputs: []inputInfo{
30005 {0, 9223372032559808512},
30006 {1, 9223372032559808512},
30007 },
30008 outputs: []outputInfo{
30009 {0, 9223372032559808512},
30010 },
30011 },
30012 },
30013 {
30014 name: "MULLD",
30015 argLen: 2,
30016 commutative: true,
30017 asm: ppc64.AMULLD,
30018 reg: regInfo{
30019 inputs: []inputInfo{
30020 {0, 1073733630},
30021 {1, 1073733630},
30022 },
30023 outputs: []outputInfo{
30024 {0, 1073733624},
30025 },
30026 },
30027 },
30028 {
30029 name: "MULLW",
30030 argLen: 2,
30031 commutative: true,
30032 asm: ppc64.AMULLW,
30033 reg: regInfo{
30034 inputs: []inputInfo{
30035 {0, 1073733630},
30036 {1, 1073733630},
30037 },
30038 outputs: []outputInfo{
30039 {0, 1073733624},
30040 },
30041 },
30042 },
30043 {
30044 name: "MULLDconst",
30045 auxType: auxInt32,
30046 argLen: 1,
30047 asm: ppc64.AMULLD,
30048 reg: regInfo{
30049 inputs: []inputInfo{
30050 {0, 1073733630},
30051 },
30052 outputs: []outputInfo{
30053 {0, 1073733624},
30054 },
30055 },
30056 },
30057 {
30058 name: "MULLWconst",
30059 auxType: auxInt32,
30060 argLen: 1,
30061 asm: ppc64.AMULLW,
30062 reg: regInfo{
30063 inputs: []inputInfo{
30064 {0, 1073733630},
30065 },
30066 outputs: []outputInfo{
30067 {0, 1073733624},
30068 },
30069 },
30070 },
30071 {
30072 name: "MADDLD",
30073 argLen: 3,
30074 asm: ppc64.AMADDLD,
30075 reg: regInfo{
30076 inputs: []inputInfo{
30077 {0, 1073733630},
30078 {1, 1073733630},
30079 {2, 1073733630},
30080 },
30081 outputs: []outputInfo{
30082 {0, 1073733624},
30083 },
30084 },
30085 },
30086 {
30087 name: "MULHD",
30088 argLen: 2,
30089 commutative: true,
30090 asm: ppc64.AMULHD,
30091 reg: regInfo{
30092 inputs: []inputInfo{
30093 {0, 1073733630},
30094 {1, 1073733630},
30095 },
30096 outputs: []outputInfo{
30097 {0, 1073733624},
30098 },
30099 },
30100 },
30101 {
30102 name: "MULHW",
30103 argLen: 2,
30104 commutative: true,
30105 asm: ppc64.AMULHW,
30106 reg: regInfo{
30107 inputs: []inputInfo{
30108 {0, 1073733630},
30109 {1, 1073733630},
30110 },
30111 outputs: []outputInfo{
30112 {0, 1073733624},
30113 },
30114 },
30115 },
30116 {
30117 name: "MULHDU",
30118 argLen: 2,
30119 commutative: true,
30120 asm: ppc64.AMULHDU,
30121 reg: regInfo{
30122 inputs: []inputInfo{
30123 {0, 1073733630},
30124 {1, 1073733630},
30125 },
30126 outputs: []outputInfo{
30127 {0, 1073733624},
30128 },
30129 },
30130 },
30131 {
30132 name: "MULHDUCC",
30133 argLen: 2,
30134 commutative: true,
30135 asm: ppc64.AMULHDUCC,
30136 reg: regInfo{
30137 inputs: []inputInfo{
30138 {0, 1073733630},
30139 {1, 1073733630},
30140 },
30141 outputs: []outputInfo{
30142 {0, 1073733624},
30143 },
30144 },
30145 },
30146 {
30147 name: "MULHWU",
30148 argLen: 2,
30149 commutative: true,
30150 asm: ppc64.AMULHWU,
30151 reg: regInfo{
30152 inputs: []inputInfo{
30153 {0, 1073733630},
30154 {1, 1073733630},
30155 },
30156 outputs: []outputInfo{
30157 {0, 1073733624},
30158 },
30159 },
30160 },
30161 {
30162 name: "FMUL",
30163 argLen: 2,
30164 commutative: true,
30165 asm: ppc64.AFMUL,
30166 reg: regInfo{
30167 inputs: []inputInfo{
30168 {0, 9223372032559808512},
30169 {1, 9223372032559808512},
30170 },
30171 outputs: []outputInfo{
30172 {0, 9223372032559808512},
30173 },
30174 },
30175 },
30176 {
30177 name: "FMULS",
30178 argLen: 2,
30179 commutative: true,
30180 asm: ppc64.AFMULS,
30181 reg: regInfo{
30182 inputs: []inputInfo{
30183 {0, 9223372032559808512},
30184 {1, 9223372032559808512},
30185 },
30186 outputs: []outputInfo{
30187 {0, 9223372032559808512},
30188 },
30189 },
30190 },
30191 {
30192 name: "FMADD",
30193 argLen: 3,
30194 asm: ppc64.AFMADD,
30195 reg: regInfo{
30196 inputs: []inputInfo{
30197 {0, 9223372032559808512},
30198 {1, 9223372032559808512},
30199 {2, 9223372032559808512},
30200 },
30201 outputs: []outputInfo{
30202 {0, 9223372032559808512},
30203 },
30204 },
30205 },
30206 {
30207 name: "FMADDS",
30208 argLen: 3,
30209 asm: ppc64.AFMADDS,
30210 reg: regInfo{
30211 inputs: []inputInfo{
30212 {0, 9223372032559808512},
30213 {1, 9223372032559808512},
30214 {2, 9223372032559808512},
30215 },
30216 outputs: []outputInfo{
30217 {0, 9223372032559808512},
30218 },
30219 },
30220 },
30221 {
30222 name: "FMSUB",
30223 argLen: 3,
30224 asm: ppc64.AFMSUB,
30225 reg: regInfo{
30226 inputs: []inputInfo{
30227 {0, 9223372032559808512},
30228 {1, 9223372032559808512},
30229 {2, 9223372032559808512},
30230 },
30231 outputs: []outputInfo{
30232 {0, 9223372032559808512},
30233 },
30234 },
30235 },
30236 {
30237 name: "FMSUBS",
30238 argLen: 3,
30239 asm: ppc64.AFMSUBS,
30240 reg: regInfo{
30241 inputs: []inputInfo{
30242 {0, 9223372032559808512},
30243 {1, 9223372032559808512},
30244 {2, 9223372032559808512},
30245 },
30246 outputs: []outputInfo{
30247 {0, 9223372032559808512},
30248 },
30249 },
30250 },
30251 {
30252 name: "SRAD",
30253 argLen: 2,
30254 asm: ppc64.ASRAD,
30255 reg: regInfo{
30256 inputs: []inputInfo{
30257 {0, 1073733630},
30258 {1, 1073733630},
30259 },
30260 clobbers: 9223372036854775808,
30261 outputs: []outputInfo{
30262 {0, 1073733624},
30263 },
30264 },
30265 },
30266 {
30267 name: "SRAW",
30268 argLen: 2,
30269 asm: ppc64.ASRAW,
30270 reg: regInfo{
30271 inputs: []inputInfo{
30272 {0, 1073733630},
30273 {1, 1073733630},
30274 },
30275 clobbers: 9223372036854775808,
30276 outputs: []outputInfo{
30277 {0, 1073733624},
30278 },
30279 },
30280 },
30281 {
30282 name: "SRD",
30283 argLen: 2,
30284 asm: ppc64.ASRD,
30285 reg: regInfo{
30286 inputs: []inputInfo{
30287 {0, 1073733630},
30288 {1, 1073733630},
30289 },
30290 outputs: []outputInfo{
30291 {0, 1073733624},
30292 },
30293 },
30294 },
30295 {
30296 name: "SRW",
30297 argLen: 2,
30298 asm: ppc64.ASRW,
30299 reg: regInfo{
30300 inputs: []inputInfo{
30301 {0, 1073733630},
30302 {1, 1073733630},
30303 },
30304 outputs: []outputInfo{
30305 {0, 1073733624},
30306 },
30307 },
30308 },
30309 {
30310 name: "SLD",
30311 argLen: 2,
30312 asm: ppc64.ASLD,
30313 reg: regInfo{
30314 inputs: []inputInfo{
30315 {0, 1073733630},
30316 {1, 1073733630},
30317 },
30318 outputs: []outputInfo{
30319 {0, 1073733624},
30320 },
30321 },
30322 },
30323 {
30324 name: "SLW",
30325 argLen: 2,
30326 asm: ppc64.ASLW,
30327 reg: regInfo{
30328 inputs: []inputInfo{
30329 {0, 1073733630},
30330 {1, 1073733630},
30331 },
30332 outputs: []outputInfo{
30333 {0, 1073733624},
30334 },
30335 },
30336 },
30337 {
30338 name: "ROTL",
30339 argLen: 2,
30340 asm: ppc64.AROTL,
30341 reg: regInfo{
30342 inputs: []inputInfo{
30343 {0, 1073733630},
30344 {1, 1073733630},
30345 },
30346 outputs: []outputInfo{
30347 {0, 1073733624},
30348 },
30349 },
30350 },
30351 {
30352 name: "ROTLW",
30353 argLen: 2,
30354 asm: ppc64.AROTLW,
30355 reg: regInfo{
30356 inputs: []inputInfo{
30357 {0, 1073733630},
30358 {1, 1073733630},
30359 },
30360 outputs: []outputInfo{
30361 {0, 1073733624},
30362 },
30363 },
30364 },
30365 {
30366 name: "CLRLSLWI",
30367 auxType: auxInt32,
30368 argLen: 1,
30369 asm: ppc64.ACLRLSLWI,
30370 reg: regInfo{
30371 inputs: []inputInfo{
30372 {0, 1073733630},
30373 },
30374 outputs: []outputInfo{
30375 {0, 1073733624},
30376 },
30377 },
30378 },
30379 {
30380 name: "CLRLSLDI",
30381 auxType: auxInt32,
30382 argLen: 1,
30383 asm: ppc64.ACLRLSLDI,
30384 reg: regInfo{
30385 inputs: []inputInfo{
30386 {0, 1073733630},
30387 },
30388 outputs: []outputInfo{
30389 {0, 1073733624},
30390 },
30391 },
30392 },
30393 {
30394 name: "ADDC",
30395 argLen: 2,
30396 commutative: true,
30397 asm: ppc64.AADDC,
30398 reg: regInfo{
30399 inputs: []inputInfo{
30400 {0, 1073733630},
30401 {1, 1073733630},
30402 },
30403 clobbers: 9223372036854775808,
30404 outputs: []outputInfo{
30405 {1, 9223372036854775808},
30406 {0, 1073733624},
30407 },
30408 },
30409 },
30410 {
30411 name: "SUBC",
30412 argLen: 2,
30413 asm: ppc64.ASUBC,
30414 reg: regInfo{
30415 inputs: []inputInfo{
30416 {0, 1073733630},
30417 {1, 1073733630},
30418 },
30419 clobbers: 9223372036854775808,
30420 outputs: []outputInfo{
30421 {1, 9223372036854775808},
30422 {0, 1073733624},
30423 },
30424 },
30425 },
30426 {
30427 name: "ADDCconst",
30428 auxType: auxInt64,
30429 argLen: 1,
30430 asm: ppc64.AADDC,
30431 reg: regInfo{
30432 inputs: []inputInfo{
30433 {0, 1073733630},
30434 },
30435 outputs: []outputInfo{
30436 {1, 9223372036854775808},
30437 {0, 1073733624},
30438 },
30439 },
30440 },
30441 {
30442 name: "SUBCconst",
30443 auxType: auxInt64,
30444 argLen: 1,
30445 asm: ppc64.ASUBC,
30446 reg: regInfo{
30447 inputs: []inputInfo{
30448 {0, 1073733630},
30449 },
30450 outputs: []outputInfo{
30451 {1, 9223372036854775808},
30452 {0, 1073733624},
30453 },
30454 },
30455 },
30456 {
30457 name: "ADDE",
30458 argLen: 3,
30459 commutative: true,
30460 asm: ppc64.AADDE,
30461 reg: regInfo{
30462 inputs: []inputInfo{
30463 {2, 9223372036854775808},
30464 {0, 1073733630},
30465 {1, 1073733630},
30466 },
30467 clobbers: 9223372036854775808,
30468 outputs: []outputInfo{
30469 {1, 9223372036854775808},
30470 {0, 1073733624},
30471 },
30472 },
30473 },
30474 {
30475 name: "ADDZE",
30476 argLen: 2,
30477 asm: ppc64.AADDZE,
30478 reg: regInfo{
30479 inputs: []inputInfo{
30480 {1, 9223372036854775808},
30481 {0, 1073733630},
30482 },
30483 clobbers: 9223372036854775808,
30484 outputs: []outputInfo{
30485 {1, 9223372036854775808},
30486 {0, 1073733624},
30487 },
30488 },
30489 },
30490 {
30491 name: "SUBE",
30492 argLen: 3,
30493 asm: ppc64.ASUBE,
30494 reg: regInfo{
30495 inputs: []inputInfo{
30496 {2, 9223372036854775808},
30497 {0, 1073733630},
30498 {1, 1073733630},
30499 },
30500 clobbers: 9223372036854775808,
30501 outputs: []outputInfo{
30502 {1, 9223372036854775808},
30503 {0, 1073733624},
30504 },
30505 },
30506 },
30507 {
30508 name: "ADDZEzero",
30509 argLen: 1,
30510 asm: ppc64.AADDZE,
30511 reg: regInfo{
30512 inputs: []inputInfo{
30513 {0, 9223372036854775808},
30514 },
30515 clobbers: 9223372036854775808,
30516 outputs: []outputInfo{
30517 {0, 1073733624},
30518 },
30519 },
30520 },
30521 {
30522 name: "SUBZEzero",
30523 argLen: 1,
30524 asm: ppc64.ASUBZE,
30525 reg: regInfo{
30526 inputs: []inputInfo{
30527 {0, 9223372036854775808},
30528 },
30529 clobbers: 9223372036854775808,
30530 outputs: []outputInfo{
30531 {0, 1073733624},
30532 },
30533 },
30534 },
30535 {
30536 name: "SRADconst",
30537 auxType: auxInt64,
30538 argLen: 1,
30539 asm: ppc64.ASRAD,
30540 reg: regInfo{
30541 inputs: []inputInfo{
30542 {0, 1073733630},
30543 },
30544 clobbers: 9223372036854775808,
30545 outputs: []outputInfo{
30546 {0, 1073733624},
30547 },
30548 },
30549 },
30550 {
30551 name: "SRAWconst",
30552 auxType: auxInt64,
30553 argLen: 1,
30554 asm: ppc64.ASRAW,
30555 reg: regInfo{
30556 inputs: []inputInfo{
30557 {0, 1073733630},
30558 },
30559 clobbers: 9223372036854775808,
30560 outputs: []outputInfo{
30561 {0, 1073733624},
30562 },
30563 },
30564 },
30565 {
30566 name: "SRDconst",
30567 auxType: auxInt64,
30568 argLen: 1,
30569 asm: ppc64.ASRD,
30570 reg: regInfo{
30571 inputs: []inputInfo{
30572 {0, 1073733630},
30573 },
30574 outputs: []outputInfo{
30575 {0, 1073733624},
30576 },
30577 },
30578 },
30579 {
30580 name: "SRWconst",
30581 auxType: auxInt64,
30582 argLen: 1,
30583 asm: ppc64.ASRW,
30584 reg: regInfo{
30585 inputs: []inputInfo{
30586 {0, 1073733630},
30587 },
30588 outputs: []outputInfo{
30589 {0, 1073733624},
30590 },
30591 },
30592 },
30593 {
30594 name: "SLDconst",
30595 auxType: auxInt64,
30596 argLen: 1,
30597 asm: ppc64.ASLD,
30598 reg: regInfo{
30599 inputs: []inputInfo{
30600 {0, 1073733630},
30601 },
30602 outputs: []outputInfo{
30603 {0, 1073733624},
30604 },
30605 },
30606 },
30607 {
30608 name: "SLWconst",
30609 auxType: auxInt64,
30610 argLen: 1,
30611 asm: ppc64.ASLW,
30612 reg: regInfo{
30613 inputs: []inputInfo{
30614 {0, 1073733630},
30615 },
30616 outputs: []outputInfo{
30617 {0, 1073733624},
30618 },
30619 },
30620 },
30621 {
30622 name: "ROTLconst",
30623 auxType: auxInt64,
30624 argLen: 1,
30625 asm: ppc64.AROTL,
30626 reg: regInfo{
30627 inputs: []inputInfo{
30628 {0, 1073733630},
30629 },
30630 outputs: []outputInfo{
30631 {0, 1073733624},
30632 },
30633 },
30634 },
30635 {
30636 name: "ROTLWconst",
30637 auxType: auxInt64,
30638 argLen: 1,
30639 asm: ppc64.AROTLW,
30640 reg: regInfo{
30641 inputs: []inputInfo{
30642 {0, 1073733630},
30643 },
30644 outputs: []outputInfo{
30645 {0, 1073733624},
30646 },
30647 },
30648 },
30649 {
30650 name: "EXTSWSLconst",
30651 auxType: auxInt64,
30652 argLen: 1,
30653 asm: ppc64.AEXTSWSLI,
30654 reg: regInfo{
30655 inputs: []inputInfo{
30656 {0, 1073733630},
30657 },
30658 outputs: []outputInfo{
30659 {0, 1073733624},
30660 },
30661 },
30662 },
30663 {
30664 name: "RLWINM",
30665 auxType: auxInt64,
30666 argLen: 1,
30667 asm: ppc64.ARLWNM,
30668 reg: regInfo{
30669 inputs: []inputInfo{
30670 {0, 1073733630},
30671 },
30672 outputs: []outputInfo{
30673 {0, 1073733624},
30674 },
30675 },
30676 },
30677 {
30678 name: "RLWNM",
30679 auxType: auxInt64,
30680 argLen: 2,
30681 asm: ppc64.ARLWNM,
30682 reg: regInfo{
30683 inputs: []inputInfo{
30684 {0, 1073733630},
30685 {1, 1073733630},
30686 },
30687 outputs: []outputInfo{
30688 {0, 1073733624},
30689 },
30690 },
30691 },
30692 {
30693 name: "RLWMI",
30694 auxType: auxInt64,
30695 argLen: 2,
30696 resultInArg0: true,
30697 asm: ppc64.ARLWMI,
30698 reg: regInfo{
30699 inputs: []inputInfo{
30700 {0, 1073733624},
30701 {1, 1073733630},
30702 },
30703 outputs: []outputInfo{
30704 {0, 1073733624},
30705 },
30706 },
30707 },
30708 {
30709 name: "RLDICL",
30710 auxType: auxInt64,
30711 argLen: 1,
30712 asm: ppc64.ARLDICL,
30713 reg: regInfo{
30714 inputs: []inputInfo{
30715 {0, 1073733630},
30716 },
30717 outputs: []outputInfo{
30718 {0, 1073733624},
30719 },
30720 },
30721 },
30722 {
30723 name: "RLDICLCC",
30724 auxType: auxInt64,
30725 argLen: 1,
30726 asm: ppc64.ARLDICLCC,
30727 reg: regInfo{
30728 inputs: []inputInfo{
30729 {0, 1073733630},
30730 },
30731 outputs: []outputInfo{
30732 {0, 1073733624},
30733 },
30734 },
30735 },
30736 {
30737 name: "RLDICR",
30738 auxType: auxInt64,
30739 argLen: 1,
30740 asm: ppc64.ARLDICR,
30741 reg: regInfo{
30742 inputs: []inputInfo{
30743 {0, 1073733630},
30744 },
30745 outputs: []outputInfo{
30746 {0, 1073733624},
30747 },
30748 },
30749 },
30750 {
30751 name: "CNTLZD",
30752 argLen: 1,
30753 asm: ppc64.ACNTLZD,
30754 reg: regInfo{
30755 inputs: []inputInfo{
30756 {0, 1073733630},
30757 },
30758 outputs: []outputInfo{
30759 {0, 1073733624},
30760 },
30761 },
30762 },
30763 {
30764 name: "CNTLZDCC",
30765 argLen: 1,
30766 asm: ppc64.ACNTLZDCC,
30767 reg: regInfo{
30768 inputs: []inputInfo{
30769 {0, 1073733630},
30770 },
30771 outputs: []outputInfo{
30772 {0, 1073733624},
30773 },
30774 },
30775 },
30776 {
30777 name: "CNTLZW",
30778 argLen: 1,
30779 asm: ppc64.ACNTLZW,
30780 reg: regInfo{
30781 inputs: []inputInfo{
30782 {0, 1073733630},
30783 },
30784 outputs: []outputInfo{
30785 {0, 1073733624},
30786 },
30787 },
30788 },
30789 {
30790 name: "CNTTZD",
30791 argLen: 1,
30792 asm: ppc64.ACNTTZD,
30793 reg: regInfo{
30794 inputs: []inputInfo{
30795 {0, 1073733630},
30796 },
30797 outputs: []outputInfo{
30798 {0, 1073733624},
30799 },
30800 },
30801 },
30802 {
30803 name: "CNTTZW",
30804 argLen: 1,
30805 asm: ppc64.ACNTTZW,
30806 reg: regInfo{
30807 inputs: []inputInfo{
30808 {0, 1073733630},
30809 },
30810 outputs: []outputInfo{
30811 {0, 1073733624},
30812 },
30813 },
30814 },
30815 {
30816 name: "POPCNTD",
30817 argLen: 1,
30818 asm: ppc64.APOPCNTD,
30819 reg: regInfo{
30820 inputs: []inputInfo{
30821 {0, 1073733630},
30822 },
30823 outputs: []outputInfo{
30824 {0, 1073733624},
30825 },
30826 },
30827 },
30828 {
30829 name: "POPCNTW",
30830 argLen: 1,
30831 asm: ppc64.APOPCNTW,
30832 reg: regInfo{
30833 inputs: []inputInfo{
30834 {0, 1073733630},
30835 },
30836 outputs: []outputInfo{
30837 {0, 1073733624},
30838 },
30839 },
30840 },
30841 {
30842 name: "POPCNTB",
30843 argLen: 1,
30844 asm: ppc64.APOPCNTB,
30845 reg: regInfo{
30846 inputs: []inputInfo{
30847 {0, 1073733630},
30848 },
30849 outputs: []outputInfo{
30850 {0, 1073733624},
30851 },
30852 },
30853 },
30854 {
30855 name: "FDIV",
30856 argLen: 2,
30857 asm: ppc64.AFDIV,
30858 reg: regInfo{
30859 inputs: []inputInfo{
30860 {0, 9223372032559808512},
30861 {1, 9223372032559808512},
30862 },
30863 outputs: []outputInfo{
30864 {0, 9223372032559808512},
30865 },
30866 },
30867 },
30868 {
30869 name: "FDIVS",
30870 argLen: 2,
30871 asm: ppc64.AFDIVS,
30872 reg: regInfo{
30873 inputs: []inputInfo{
30874 {0, 9223372032559808512},
30875 {1, 9223372032559808512},
30876 },
30877 outputs: []outputInfo{
30878 {0, 9223372032559808512},
30879 },
30880 },
30881 },
30882 {
30883 name: "DIVD",
30884 argLen: 2,
30885 asm: ppc64.ADIVD,
30886 reg: regInfo{
30887 inputs: []inputInfo{
30888 {0, 1073733630},
30889 {1, 1073733630},
30890 },
30891 outputs: []outputInfo{
30892 {0, 1073733624},
30893 },
30894 },
30895 },
30896 {
30897 name: "DIVW",
30898 argLen: 2,
30899 asm: ppc64.ADIVW,
30900 reg: regInfo{
30901 inputs: []inputInfo{
30902 {0, 1073733630},
30903 {1, 1073733630},
30904 },
30905 outputs: []outputInfo{
30906 {0, 1073733624},
30907 },
30908 },
30909 },
30910 {
30911 name: "DIVDU",
30912 argLen: 2,
30913 asm: ppc64.ADIVDU,
30914 reg: regInfo{
30915 inputs: []inputInfo{
30916 {0, 1073733630},
30917 {1, 1073733630},
30918 },
30919 outputs: []outputInfo{
30920 {0, 1073733624},
30921 },
30922 },
30923 },
30924 {
30925 name: "DIVWU",
30926 argLen: 2,
30927 asm: ppc64.ADIVWU,
30928 reg: regInfo{
30929 inputs: []inputInfo{
30930 {0, 1073733630},
30931 {1, 1073733630},
30932 },
30933 outputs: []outputInfo{
30934 {0, 1073733624},
30935 },
30936 },
30937 },
30938 {
30939 name: "MODUD",
30940 argLen: 2,
30941 asm: ppc64.AMODUD,
30942 reg: regInfo{
30943 inputs: []inputInfo{
30944 {0, 1073733630},
30945 {1, 1073733630},
30946 },
30947 outputs: []outputInfo{
30948 {0, 1073733624},
30949 },
30950 },
30951 },
30952 {
30953 name: "MODSD",
30954 argLen: 2,
30955 asm: ppc64.AMODSD,
30956 reg: regInfo{
30957 inputs: []inputInfo{
30958 {0, 1073733630},
30959 {1, 1073733630},
30960 },
30961 outputs: []outputInfo{
30962 {0, 1073733624},
30963 },
30964 },
30965 },
30966 {
30967 name: "MODUW",
30968 argLen: 2,
30969 asm: ppc64.AMODUW,
30970 reg: regInfo{
30971 inputs: []inputInfo{
30972 {0, 1073733630},
30973 {1, 1073733630},
30974 },
30975 outputs: []outputInfo{
30976 {0, 1073733624},
30977 },
30978 },
30979 },
30980 {
30981 name: "MODSW",
30982 argLen: 2,
30983 asm: ppc64.AMODSW,
30984 reg: regInfo{
30985 inputs: []inputInfo{
30986 {0, 1073733630},
30987 {1, 1073733630},
30988 },
30989 outputs: []outputInfo{
30990 {0, 1073733624},
30991 },
30992 },
30993 },
30994 {
30995 name: "FCTIDZ",
30996 argLen: 1,
30997 asm: ppc64.AFCTIDZ,
30998 reg: regInfo{
30999 inputs: []inputInfo{
31000 {0, 9223372032559808512},
31001 },
31002 outputs: []outputInfo{
31003 {0, 9223372032559808512},
31004 },
31005 },
31006 },
31007 {
31008 name: "FCTIWZ",
31009 argLen: 1,
31010 asm: ppc64.AFCTIWZ,
31011 reg: regInfo{
31012 inputs: []inputInfo{
31013 {0, 9223372032559808512},
31014 },
31015 outputs: []outputInfo{
31016 {0, 9223372032559808512},
31017 },
31018 },
31019 },
31020 {
31021 name: "FCFID",
31022 argLen: 1,
31023 asm: ppc64.AFCFID,
31024 reg: regInfo{
31025 inputs: []inputInfo{
31026 {0, 9223372032559808512},
31027 },
31028 outputs: []outputInfo{
31029 {0, 9223372032559808512},
31030 },
31031 },
31032 },
31033 {
31034 name: "FCFIDS",
31035 argLen: 1,
31036 asm: ppc64.AFCFIDS,
31037 reg: regInfo{
31038 inputs: []inputInfo{
31039 {0, 9223372032559808512},
31040 },
31041 outputs: []outputInfo{
31042 {0, 9223372032559808512},
31043 },
31044 },
31045 },
31046 {
31047 name: "FRSP",
31048 argLen: 1,
31049 asm: ppc64.AFRSP,
31050 reg: regInfo{
31051 inputs: []inputInfo{
31052 {0, 9223372032559808512},
31053 },
31054 outputs: []outputInfo{
31055 {0, 9223372032559808512},
31056 },
31057 },
31058 },
31059 {
31060 name: "MFVSRD",
31061 argLen: 1,
31062 asm: ppc64.AMFVSRD,
31063 reg: regInfo{
31064 inputs: []inputInfo{
31065 {0, 9223372032559808512},
31066 },
31067 outputs: []outputInfo{
31068 {0, 1073733624},
31069 },
31070 },
31071 },
31072 {
31073 name: "MTVSRD",
31074 argLen: 1,
31075 asm: ppc64.AMTVSRD,
31076 reg: regInfo{
31077 inputs: []inputInfo{
31078 {0, 1073733624},
31079 },
31080 outputs: []outputInfo{
31081 {0, 9223372032559808512},
31082 },
31083 },
31084 },
31085 {
31086 name: "AND",
31087 argLen: 2,
31088 commutative: true,
31089 asm: ppc64.AAND,
31090 reg: regInfo{
31091 inputs: []inputInfo{
31092 {0, 1073733630},
31093 {1, 1073733630},
31094 },
31095 outputs: []outputInfo{
31096 {0, 1073733624},
31097 },
31098 },
31099 },
31100 {
31101 name: "ANDN",
31102 argLen: 2,
31103 asm: ppc64.AANDN,
31104 reg: regInfo{
31105 inputs: []inputInfo{
31106 {0, 1073733630},
31107 {1, 1073733630},
31108 },
31109 outputs: []outputInfo{
31110 {0, 1073733624},
31111 },
31112 },
31113 },
31114 {
31115 name: "ANDNCC",
31116 argLen: 2,
31117 asm: ppc64.AANDNCC,
31118 reg: regInfo{
31119 inputs: []inputInfo{
31120 {0, 1073733630},
31121 {1, 1073733630},
31122 },
31123 outputs: []outputInfo{
31124 {0, 1073733624},
31125 },
31126 },
31127 },
31128 {
31129 name: "ANDCC",
31130 argLen: 2,
31131 commutative: true,
31132 asm: ppc64.AANDCC,
31133 reg: regInfo{
31134 inputs: []inputInfo{
31135 {0, 1073733630},
31136 {1, 1073733630},
31137 },
31138 outputs: []outputInfo{
31139 {0, 1073733624},
31140 },
31141 },
31142 },
31143 {
31144 name: "OR",
31145 argLen: 2,
31146 commutative: true,
31147 asm: ppc64.AOR,
31148 reg: regInfo{
31149 inputs: []inputInfo{
31150 {0, 1073733630},
31151 {1, 1073733630},
31152 },
31153 outputs: []outputInfo{
31154 {0, 1073733624},
31155 },
31156 },
31157 },
31158 {
31159 name: "ORN",
31160 argLen: 2,
31161 asm: ppc64.AORN,
31162 reg: regInfo{
31163 inputs: []inputInfo{
31164 {0, 1073733630},
31165 {1, 1073733630},
31166 },
31167 outputs: []outputInfo{
31168 {0, 1073733624},
31169 },
31170 },
31171 },
31172 {
31173 name: "ORCC",
31174 argLen: 2,
31175 commutative: true,
31176 asm: ppc64.AORCC,
31177 reg: regInfo{
31178 inputs: []inputInfo{
31179 {0, 1073733630},
31180 {1, 1073733630},
31181 },
31182 outputs: []outputInfo{
31183 {0, 1073733624},
31184 },
31185 },
31186 },
31187 {
31188 name: "NOR",
31189 argLen: 2,
31190 commutative: true,
31191 asm: ppc64.ANOR,
31192 reg: regInfo{
31193 inputs: []inputInfo{
31194 {0, 1073733630},
31195 {1, 1073733630},
31196 },
31197 outputs: []outputInfo{
31198 {0, 1073733624},
31199 },
31200 },
31201 },
31202 {
31203 name: "NORCC",
31204 argLen: 2,
31205 commutative: true,
31206 asm: ppc64.ANORCC,
31207 reg: regInfo{
31208 inputs: []inputInfo{
31209 {0, 1073733630},
31210 {1, 1073733630},
31211 },
31212 outputs: []outputInfo{
31213 {0, 1073733624},
31214 },
31215 },
31216 },
31217 {
31218 name: "XOR",
31219 argLen: 2,
31220 commutative: true,
31221 asm: ppc64.AXOR,
31222 reg: regInfo{
31223 inputs: []inputInfo{
31224 {0, 1073733630},
31225 {1, 1073733630},
31226 },
31227 outputs: []outputInfo{
31228 {0, 1073733624},
31229 },
31230 },
31231 },
31232 {
31233 name: "XORCC",
31234 argLen: 2,
31235 commutative: true,
31236 asm: ppc64.AXORCC,
31237 reg: regInfo{
31238 inputs: []inputInfo{
31239 {0, 1073733630},
31240 {1, 1073733630},
31241 },
31242 outputs: []outputInfo{
31243 {0, 1073733624},
31244 },
31245 },
31246 },
31247 {
31248 name: "EQV",
31249 argLen: 2,
31250 commutative: true,
31251 asm: ppc64.AEQV,
31252 reg: regInfo{
31253 inputs: []inputInfo{
31254 {0, 1073733630},
31255 {1, 1073733630},
31256 },
31257 outputs: []outputInfo{
31258 {0, 1073733624},
31259 },
31260 },
31261 },
31262 {
31263 name: "NEG",
31264 argLen: 1,
31265 asm: ppc64.ANEG,
31266 reg: regInfo{
31267 inputs: []inputInfo{
31268 {0, 1073733630},
31269 },
31270 outputs: []outputInfo{
31271 {0, 1073733624},
31272 },
31273 },
31274 },
31275 {
31276 name: "NEGCC",
31277 argLen: 1,
31278 asm: ppc64.ANEGCC,
31279 reg: regInfo{
31280 inputs: []inputInfo{
31281 {0, 1073733630},
31282 },
31283 outputs: []outputInfo{
31284 {0, 1073733624},
31285 },
31286 },
31287 },
31288 {
31289 name: "BRD",
31290 argLen: 1,
31291 asm: ppc64.ABRD,
31292 reg: regInfo{
31293 inputs: []inputInfo{
31294 {0, 1073733630},
31295 },
31296 outputs: []outputInfo{
31297 {0, 1073733624},
31298 },
31299 },
31300 },
31301 {
31302 name: "BRW",
31303 argLen: 1,
31304 asm: ppc64.ABRW,
31305 reg: regInfo{
31306 inputs: []inputInfo{
31307 {0, 1073733630},
31308 },
31309 outputs: []outputInfo{
31310 {0, 1073733624},
31311 },
31312 },
31313 },
31314 {
31315 name: "BRH",
31316 argLen: 1,
31317 asm: ppc64.ABRH,
31318 reg: regInfo{
31319 inputs: []inputInfo{
31320 {0, 1073733630},
31321 },
31322 outputs: []outputInfo{
31323 {0, 1073733624},
31324 },
31325 },
31326 },
31327 {
31328 name: "FNEG",
31329 argLen: 1,
31330 asm: ppc64.AFNEG,
31331 reg: regInfo{
31332 inputs: []inputInfo{
31333 {0, 9223372032559808512},
31334 },
31335 outputs: []outputInfo{
31336 {0, 9223372032559808512},
31337 },
31338 },
31339 },
31340 {
31341 name: "FSQRT",
31342 argLen: 1,
31343 asm: ppc64.AFSQRT,
31344 reg: regInfo{
31345 inputs: []inputInfo{
31346 {0, 9223372032559808512},
31347 },
31348 outputs: []outputInfo{
31349 {0, 9223372032559808512},
31350 },
31351 },
31352 },
31353 {
31354 name: "FSQRTS",
31355 argLen: 1,
31356 asm: ppc64.AFSQRTS,
31357 reg: regInfo{
31358 inputs: []inputInfo{
31359 {0, 9223372032559808512},
31360 },
31361 outputs: []outputInfo{
31362 {0, 9223372032559808512},
31363 },
31364 },
31365 },
31366 {
31367 name: "FFLOOR",
31368 argLen: 1,
31369 asm: ppc64.AFRIM,
31370 reg: regInfo{
31371 inputs: []inputInfo{
31372 {0, 9223372032559808512},
31373 },
31374 outputs: []outputInfo{
31375 {0, 9223372032559808512},
31376 },
31377 },
31378 },
31379 {
31380 name: "FCEIL",
31381 argLen: 1,
31382 asm: ppc64.AFRIP,
31383 reg: regInfo{
31384 inputs: []inputInfo{
31385 {0, 9223372032559808512},
31386 },
31387 outputs: []outputInfo{
31388 {0, 9223372032559808512},
31389 },
31390 },
31391 },
31392 {
31393 name: "FTRUNC",
31394 argLen: 1,
31395 asm: ppc64.AFRIZ,
31396 reg: regInfo{
31397 inputs: []inputInfo{
31398 {0, 9223372032559808512},
31399 },
31400 outputs: []outputInfo{
31401 {0, 9223372032559808512},
31402 },
31403 },
31404 },
31405 {
31406 name: "FROUND",
31407 argLen: 1,
31408 asm: ppc64.AFRIN,
31409 reg: regInfo{
31410 inputs: []inputInfo{
31411 {0, 9223372032559808512},
31412 },
31413 outputs: []outputInfo{
31414 {0, 9223372032559808512},
31415 },
31416 },
31417 },
31418 {
31419 name: "FABS",
31420 argLen: 1,
31421 asm: ppc64.AFABS,
31422 reg: regInfo{
31423 inputs: []inputInfo{
31424 {0, 9223372032559808512},
31425 },
31426 outputs: []outputInfo{
31427 {0, 9223372032559808512},
31428 },
31429 },
31430 },
31431 {
31432 name: "FNABS",
31433 argLen: 1,
31434 asm: ppc64.AFNABS,
31435 reg: regInfo{
31436 inputs: []inputInfo{
31437 {0, 9223372032559808512},
31438 },
31439 outputs: []outputInfo{
31440 {0, 9223372032559808512},
31441 },
31442 },
31443 },
31444 {
31445 name: "FCPSGN",
31446 argLen: 2,
31447 asm: ppc64.AFCPSGN,
31448 reg: regInfo{
31449 inputs: []inputInfo{
31450 {0, 9223372032559808512},
31451 {1, 9223372032559808512},
31452 },
31453 outputs: []outputInfo{
31454 {0, 9223372032559808512},
31455 },
31456 },
31457 },
31458 {
31459 name: "ORconst",
31460 auxType: auxInt64,
31461 argLen: 1,
31462 asm: ppc64.AOR,
31463 reg: regInfo{
31464 inputs: []inputInfo{
31465 {0, 1073733630},
31466 },
31467 outputs: []outputInfo{
31468 {0, 1073733624},
31469 },
31470 },
31471 },
31472 {
31473 name: "XORconst",
31474 auxType: auxInt64,
31475 argLen: 1,
31476 asm: ppc64.AXOR,
31477 reg: regInfo{
31478 inputs: []inputInfo{
31479 {0, 1073733630},
31480 },
31481 outputs: []outputInfo{
31482 {0, 1073733624},
31483 },
31484 },
31485 },
31486 {
31487 name: "ANDCCconst",
31488 auxType: auxInt64,
31489 argLen: 1,
31490 asm: ppc64.AANDCC,
31491 reg: regInfo{
31492 inputs: []inputInfo{
31493 {0, 1073733630},
31494 },
31495 outputs: []outputInfo{
31496 {0, 1073733624},
31497 },
31498 },
31499 },
31500 {
31501 name: "ANDconst",
31502 auxType: auxInt64,
31503 argLen: 1,
31504 clobberFlags: true,
31505 asm: ppc64.AANDCC,
31506 reg: regInfo{
31507 inputs: []inputInfo{
31508 {0, 1073733630},
31509 },
31510 outputs: []outputInfo{
31511 {0, 1073733624},
31512 },
31513 },
31514 },
31515 {
31516 name: "MOVBreg",
31517 argLen: 1,
31518 asm: ppc64.AMOVB,
31519 reg: regInfo{
31520 inputs: []inputInfo{
31521 {0, 1073733630},
31522 },
31523 outputs: []outputInfo{
31524 {0, 1073733624},
31525 },
31526 },
31527 },
31528 {
31529 name: "MOVBZreg",
31530 argLen: 1,
31531 asm: ppc64.AMOVBZ,
31532 reg: regInfo{
31533 inputs: []inputInfo{
31534 {0, 1073733630},
31535 },
31536 outputs: []outputInfo{
31537 {0, 1073733624},
31538 },
31539 },
31540 },
31541 {
31542 name: "MOVHreg",
31543 argLen: 1,
31544 asm: ppc64.AMOVH,
31545 reg: regInfo{
31546 inputs: []inputInfo{
31547 {0, 1073733630},
31548 },
31549 outputs: []outputInfo{
31550 {0, 1073733624},
31551 },
31552 },
31553 },
31554 {
31555 name: "MOVHZreg",
31556 argLen: 1,
31557 asm: ppc64.AMOVHZ,
31558 reg: regInfo{
31559 inputs: []inputInfo{
31560 {0, 1073733630},
31561 },
31562 outputs: []outputInfo{
31563 {0, 1073733624},
31564 },
31565 },
31566 },
31567 {
31568 name: "MOVWreg",
31569 argLen: 1,
31570 asm: ppc64.AMOVW,
31571 reg: regInfo{
31572 inputs: []inputInfo{
31573 {0, 1073733630},
31574 },
31575 outputs: []outputInfo{
31576 {0, 1073733624},
31577 },
31578 },
31579 },
31580 {
31581 name: "MOVWZreg",
31582 argLen: 1,
31583 asm: ppc64.AMOVWZ,
31584 reg: regInfo{
31585 inputs: []inputInfo{
31586 {0, 1073733630},
31587 },
31588 outputs: []outputInfo{
31589 {0, 1073733624},
31590 },
31591 },
31592 },
31593 {
31594 name: "MOVBZload",
31595 auxType: auxSymOff,
31596 argLen: 2,
31597 faultOnNilArg0: true,
31598 symEffect: SymRead,
31599 asm: ppc64.AMOVBZ,
31600 reg: regInfo{
31601 inputs: []inputInfo{
31602 {0, 1073733630},
31603 },
31604 outputs: []outputInfo{
31605 {0, 1073733624},
31606 },
31607 },
31608 },
31609 {
31610 name: "MOVHload",
31611 auxType: auxSymOff,
31612 argLen: 2,
31613 faultOnNilArg0: true,
31614 symEffect: SymRead,
31615 asm: ppc64.AMOVH,
31616 reg: regInfo{
31617 inputs: []inputInfo{
31618 {0, 1073733630},
31619 },
31620 outputs: []outputInfo{
31621 {0, 1073733624},
31622 },
31623 },
31624 },
31625 {
31626 name: "MOVHZload",
31627 auxType: auxSymOff,
31628 argLen: 2,
31629 faultOnNilArg0: true,
31630 symEffect: SymRead,
31631 asm: ppc64.AMOVHZ,
31632 reg: regInfo{
31633 inputs: []inputInfo{
31634 {0, 1073733630},
31635 },
31636 outputs: []outputInfo{
31637 {0, 1073733624},
31638 },
31639 },
31640 },
31641 {
31642 name: "MOVWload",
31643 auxType: auxSymOff,
31644 argLen: 2,
31645 faultOnNilArg0: true,
31646 symEffect: SymRead,
31647 asm: ppc64.AMOVW,
31648 reg: regInfo{
31649 inputs: []inputInfo{
31650 {0, 1073733630},
31651 },
31652 outputs: []outputInfo{
31653 {0, 1073733624},
31654 },
31655 },
31656 },
31657 {
31658 name: "MOVWZload",
31659 auxType: auxSymOff,
31660 argLen: 2,
31661 faultOnNilArg0: true,
31662 symEffect: SymRead,
31663 asm: ppc64.AMOVWZ,
31664 reg: regInfo{
31665 inputs: []inputInfo{
31666 {0, 1073733630},
31667 },
31668 outputs: []outputInfo{
31669 {0, 1073733624},
31670 },
31671 },
31672 },
31673 {
31674 name: "MOVDload",
31675 auxType: auxSymOff,
31676 argLen: 2,
31677 faultOnNilArg0: true,
31678 symEffect: SymRead,
31679 asm: ppc64.AMOVD,
31680 reg: regInfo{
31681 inputs: []inputInfo{
31682 {0, 1073733630},
31683 },
31684 outputs: []outputInfo{
31685 {0, 1073733624},
31686 },
31687 },
31688 },
31689 {
31690 name: "MOVDBRload",
31691 argLen: 2,
31692 faultOnNilArg0: true,
31693 asm: ppc64.AMOVDBR,
31694 reg: regInfo{
31695 inputs: []inputInfo{
31696 {0, 1073733630},
31697 },
31698 outputs: []outputInfo{
31699 {0, 1073733624},
31700 },
31701 },
31702 },
31703 {
31704 name: "MOVWBRload",
31705 argLen: 2,
31706 faultOnNilArg0: true,
31707 asm: ppc64.AMOVWBR,
31708 reg: regInfo{
31709 inputs: []inputInfo{
31710 {0, 1073733630},
31711 },
31712 outputs: []outputInfo{
31713 {0, 1073733624},
31714 },
31715 },
31716 },
31717 {
31718 name: "MOVHBRload",
31719 argLen: 2,
31720 faultOnNilArg0: true,
31721 asm: ppc64.AMOVHBR,
31722 reg: regInfo{
31723 inputs: []inputInfo{
31724 {0, 1073733630},
31725 },
31726 outputs: []outputInfo{
31727 {0, 1073733624},
31728 },
31729 },
31730 },
31731 {
31732 name: "MOVBZloadidx",
31733 argLen: 3,
31734 asm: ppc64.AMOVBZ,
31735 reg: regInfo{
31736 inputs: []inputInfo{
31737 {1, 1073733624},
31738 {0, 1073733630},
31739 },
31740 outputs: []outputInfo{
31741 {0, 1073733624},
31742 },
31743 },
31744 },
31745 {
31746 name: "MOVHloadidx",
31747 argLen: 3,
31748 asm: ppc64.AMOVH,
31749 reg: regInfo{
31750 inputs: []inputInfo{
31751 {1, 1073733624},
31752 {0, 1073733630},
31753 },
31754 outputs: []outputInfo{
31755 {0, 1073733624},
31756 },
31757 },
31758 },
31759 {
31760 name: "MOVHZloadidx",
31761 argLen: 3,
31762 asm: ppc64.AMOVHZ,
31763 reg: regInfo{
31764 inputs: []inputInfo{
31765 {1, 1073733624},
31766 {0, 1073733630},
31767 },
31768 outputs: []outputInfo{
31769 {0, 1073733624},
31770 },
31771 },
31772 },
31773 {
31774 name: "MOVWloadidx",
31775 argLen: 3,
31776 asm: ppc64.AMOVW,
31777 reg: regInfo{
31778 inputs: []inputInfo{
31779 {1, 1073733624},
31780 {0, 1073733630},
31781 },
31782 outputs: []outputInfo{
31783 {0, 1073733624},
31784 },
31785 },
31786 },
31787 {
31788 name: "MOVWZloadidx",
31789 argLen: 3,
31790 asm: ppc64.AMOVWZ,
31791 reg: regInfo{
31792 inputs: []inputInfo{
31793 {1, 1073733624},
31794 {0, 1073733630},
31795 },
31796 outputs: []outputInfo{
31797 {0, 1073733624},
31798 },
31799 },
31800 },
31801 {
31802 name: "MOVDloadidx",
31803 argLen: 3,
31804 asm: ppc64.AMOVD,
31805 reg: regInfo{
31806 inputs: []inputInfo{
31807 {1, 1073733624},
31808 {0, 1073733630},
31809 },
31810 outputs: []outputInfo{
31811 {0, 1073733624},
31812 },
31813 },
31814 },
31815 {
31816 name: "MOVHBRloadidx",
31817 argLen: 3,
31818 asm: ppc64.AMOVHBR,
31819 reg: regInfo{
31820 inputs: []inputInfo{
31821 {1, 1073733624},
31822 {0, 1073733630},
31823 },
31824 outputs: []outputInfo{
31825 {0, 1073733624},
31826 },
31827 },
31828 },
31829 {
31830 name: "MOVWBRloadidx",
31831 argLen: 3,
31832 asm: ppc64.AMOVWBR,
31833 reg: regInfo{
31834 inputs: []inputInfo{
31835 {1, 1073733624},
31836 {0, 1073733630},
31837 },
31838 outputs: []outputInfo{
31839 {0, 1073733624},
31840 },
31841 },
31842 },
31843 {
31844 name: "MOVDBRloadidx",
31845 argLen: 3,
31846 asm: ppc64.AMOVDBR,
31847 reg: regInfo{
31848 inputs: []inputInfo{
31849 {1, 1073733624},
31850 {0, 1073733630},
31851 },
31852 outputs: []outputInfo{
31853 {0, 1073733624},
31854 },
31855 },
31856 },
31857 {
31858 name: "FMOVDloadidx",
31859 argLen: 3,
31860 asm: ppc64.AFMOVD,
31861 reg: regInfo{
31862 inputs: []inputInfo{
31863 {0, 1073733630},
31864 {1, 1073733630},
31865 },
31866 outputs: []outputInfo{
31867 {0, 9223372032559808512},
31868 },
31869 },
31870 },
31871 {
31872 name: "FMOVSloadidx",
31873 argLen: 3,
31874 asm: ppc64.AFMOVS,
31875 reg: regInfo{
31876 inputs: []inputInfo{
31877 {0, 1073733630},
31878 {1, 1073733630},
31879 },
31880 outputs: []outputInfo{
31881 {0, 9223372032559808512},
31882 },
31883 },
31884 },
31885 {
31886 name: "DCBT",
31887 auxType: auxInt64,
31888 argLen: 2,
31889 hasSideEffects: true,
31890 asm: ppc64.ADCBT,
31891 reg: regInfo{
31892 inputs: []inputInfo{
31893 {0, 1073733630},
31894 },
31895 },
31896 },
31897 {
31898 name: "MOVDBRstore",
31899 argLen: 3,
31900 faultOnNilArg0: true,
31901 asm: ppc64.AMOVDBR,
31902 reg: regInfo{
31903 inputs: []inputInfo{
31904 {0, 1073733630},
31905 {1, 1073733630},
31906 },
31907 },
31908 },
31909 {
31910 name: "MOVWBRstore",
31911 argLen: 3,
31912 faultOnNilArg0: true,
31913 asm: ppc64.AMOVWBR,
31914 reg: regInfo{
31915 inputs: []inputInfo{
31916 {0, 1073733630},
31917 {1, 1073733630},
31918 },
31919 },
31920 },
31921 {
31922 name: "MOVHBRstore",
31923 argLen: 3,
31924 faultOnNilArg0: true,
31925 asm: ppc64.AMOVHBR,
31926 reg: regInfo{
31927 inputs: []inputInfo{
31928 {0, 1073733630},
31929 {1, 1073733630},
31930 },
31931 },
31932 },
31933 {
31934 name: "FMOVDload",
31935 auxType: auxSymOff,
31936 argLen: 2,
31937 faultOnNilArg0: true,
31938 symEffect: SymRead,
31939 asm: ppc64.AFMOVD,
31940 reg: regInfo{
31941 inputs: []inputInfo{
31942 {0, 1073733630},
31943 },
31944 outputs: []outputInfo{
31945 {0, 9223372032559808512},
31946 },
31947 },
31948 },
31949 {
31950 name: "FMOVSload",
31951 auxType: auxSymOff,
31952 argLen: 2,
31953 faultOnNilArg0: true,
31954 symEffect: SymRead,
31955 asm: ppc64.AFMOVS,
31956 reg: regInfo{
31957 inputs: []inputInfo{
31958 {0, 1073733630},
31959 },
31960 outputs: []outputInfo{
31961 {0, 9223372032559808512},
31962 },
31963 },
31964 },
31965 {
31966 name: "MOVBstore",
31967 auxType: auxSymOff,
31968 argLen: 3,
31969 faultOnNilArg0: true,
31970 symEffect: SymWrite,
31971 asm: ppc64.AMOVB,
31972 reg: regInfo{
31973 inputs: []inputInfo{
31974 {0, 1073733630},
31975 {1, 1073733630},
31976 },
31977 },
31978 },
31979 {
31980 name: "MOVHstore",
31981 auxType: auxSymOff,
31982 argLen: 3,
31983 faultOnNilArg0: true,
31984 symEffect: SymWrite,
31985 asm: ppc64.AMOVH,
31986 reg: regInfo{
31987 inputs: []inputInfo{
31988 {0, 1073733630},
31989 {1, 1073733630},
31990 },
31991 },
31992 },
31993 {
31994 name: "MOVWstore",
31995 auxType: auxSymOff,
31996 argLen: 3,
31997 faultOnNilArg0: true,
31998 symEffect: SymWrite,
31999 asm: ppc64.AMOVW,
32000 reg: regInfo{
32001 inputs: []inputInfo{
32002 {0, 1073733630},
32003 {1, 1073733630},
32004 },
32005 },
32006 },
32007 {
32008 name: "MOVDstore",
32009 auxType: auxSymOff,
32010 argLen: 3,
32011 faultOnNilArg0: true,
32012 symEffect: SymWrite,
32013 asm: ppc64.AMOVD,
32014 reg: regInfo{
32015 inputs: []inputInfo{
32016 {0, 1073733630},
32017 {1, 1073733630},
32018 },
32019 },
32020 },
32021 {
32022 name: "FMOVDstore",
32023 auxType: auxSymOff,
32024 argLen: 3,
32025 faultOnNilArg0: true,
32026 symEffect: SymWrite,
32027 asm: ppc64.AFMOVD,
32028 reg: regInfo{
32029 inputs: []inputInfo{
32030 {0, 1073733630},
32031 {1, 9223372032559808512},
32032 },
32033 },
32034 },
32035 {
32036 name: "FMOVSstore",
32037 auxType: auxSymOff,
32038 argLen: 3,
32039 faultOnNilArg0: true,
32040 symEffect: SymWrite,
32041 asm: ppc64.AFMOVS,
32042 reg: regInfo{
32043 inputs: []inputInfo{
32044 {0, 1073733630},
32045 {1, 9223372032559808512},
32046 },
32047 },
32048 },
32049 {
32050 name: "MOVBstoreidx",
32051 argLen: 4,
32052 asm: ppc64.AMOVB,
32053 reg: regInfo{
32054 inputs: []inputInfo{
32055 {0, 1073733630},
32056 {1, 1073733630},
32057 {2, 1073733630},
32058 },
32059 },
32060 },
32061 {
32062 name: "MOVHstoreidx",
32063 argLen: 4,
32064 asm: ppc64.AMOVH,
32065 reg: regInfo{
32066 inputs: []inputInfo{
32067 {0, 1073733630},
32068 {1, 1073733630},
32069 {2, 1073733630},
32070 },
32071 },
32072 },
32073 {
32074 name: "MOVWstoreidx",
32075 argLen: 4,
32076 asm: ppc64.AMOVW,
32077 reg: regInfo{
32078 inputs: []inputInfo{
32079 {0, 1073733630},
32080 {1, 1073733630},
32081 {2, 1073733630},
32082 },
32083 },
32084 },
32085 {
32086 name: "MOVDstoreidx",
32087 argLen: 4,
32088 asm: ppc64.AMOVD,
32089 reg: regInfo{
32090 inputs: []inputInfo{
32091 {0, 1073733630},
32092 {1, 1073733630},
32093 {2, 1073733630},
32094 },
32095 },
32096 },
32097 {
32098 name: "FMOVDstoreidx",
32099 argLen: 4,
32100 asm: ppc64.AFMOVD,
32101 reg: regInfo{
32102 inputs: []inputInfo{
32103 {0, 1073733630},
32104 {1, 1073733630},
32105 {2, 9223372032559808512},
32106 },
32107 },
32108 },
32109 {
32110 name: "FMOVSstoreidx",
32111 argLen: 4,
32112 asm: ppc64.AFMOVS,
32113 reg: regInfo{
32114 inputs: []inputInfo{
32115 {0, 1073733630},
32116 {1, 1073733630},
32117 {2, 9223372032559808512},
32118 },
32119 },
32120 },
32121 {
32122 name: "MOVHBRstoreidx",
32123 argLen: 4,
32124 asm: ppc64.AMOVHBR,
32125 reg: regInfo{
32126 inputs: []inputInfo{
32127 {0, 1073733630},
32128 {1, 1073733630},
32129 {2, 1073733630},
32130 },
32131 },
32132 },
32133 {
32134 name: "MOVWBRstoreidx",
32135 argLen: 4,
32136 asm: ppc64.AMOVWBR,
32137 reg: regInfo{
32138 inputs: []inputInfo{
32139 {0, 1073733630},
32140 {1, 1073733630},
32141 {2, 1073733630},
32142 },
32143 },
32144 },
32145 {
32146 name: "MOVDBRstoreidx",
32147 argLen: 4,
32148 asm: ppc64.AMOVDBR,
32149 reg: regInfo{
32150 inputs: []inputInfo{
32151 {0, 1073733630},
32152 {1, 1073733630},
32153 {2, 1073733630},
32154 },
32155 },
32156 },
32157 {
32158 name: "MOVBstorezero",
32159 auxType: auxSymOff,
32160 argLen: 2,
32161 faultOnNilArg0: true,
32162 symEffect: SymWrite,
32163 asm: ppc64.AMOVB,
32164 reg: regInfo{
32165 inputs: []inputInfo{
32166 {0, 1073733630},
32167 },
32168 },
32169 },
32170 {
32171 name: "MOVHstorezero",
32172 auxType: auxSymOff,
32173 argLen: 2,
32174 faultOnNilArg0: true,
32175 symEffect: SymWrite,
32176 asm: ppc64.AMOVH,
32177 reg: regInfo{
32178 inputs: []inputInfo{
32179 {0, 1073733630},
32180 },
32181 },
32182 },
32183 {
32184 name: "MOVWstorezero",
32185 auxType: auxSymOff,
32186 argLen: 2,
32187 faultOnNilArg0: true,
32188 symEffect: SymWrite,
32189 asm: ppc64.AMOVW,
32190 reg: regInfo{
32191 inputs: []inputInfo{
32192 {0, 1073733630},
32193 },
32194 },
32195 },
32196 {
32197 name: "MOVDstorezero",
32198 auxType: auxSymOff,
32199 argLen: 2,
32200 faultOnNilArg0: true,
32201 symEffect: SymWrite,
32202 asm: ppc64.AMOVD,
32203 reg: regInfo{
32204 inputs: []inputInfo{
32205 {0, 1073733630},
32206 },
32207 },
32208 },
32209 {
32210 name: "MOVDaddr",
32211 auxType: auxSymOff,
32212 argLen: 1,
32213 rematerializeable: true,
32214 symEffect: SymAddr,
32215 asm: ppc64.AMOVD,
32216 reg: regInfo{
32217 inputs: []inputInfo{
32218 {0, 1073733630},
32219 },
32220 outputs: []outputInfo{
32221 {0, 1073733624},
32222 },
32223 },
32224 },
32225 {
32226 name: "MOVDconst",
32227 auxType: auxInt64,
32228 argLen: 0,
32229 rematerializeable: true,
32230 asm: ppc64.AMOVD,
32231 reg: regInfo{
32232 outputs: []outputInfo{
32233 {0, 1073733624},
32234 },
32235 },
32236 },
32237 {
32238 name: "FMOVDconst",
32239 auxType: auxFloat64,
32240 argLen: 0,
32241 rematerializeable: true,
32242 asm: ppc64.AFMOVD,
32243 reg: regInfo{
32244 outputs: []outputInfo{
32245 {0, 9223372032559808512},
32246 },
32247 },
32248 },
32249 {
32250 name: "FMOVSconst",
32251 auxType: auxFloat32,
32252 argLen: 0,
32253 rematerializeable: true,
32254 asm: ppc64.AFMOVS,
32255 reg: regInfo{
32256 outputs: []outputInfo{
32257 {0, 9223372032559808512},
32258 },
32259 },
32260 },
32261 {
32262 name: "FCMPU",
32263 argLen: 2,
32264 asm: ppc64.AFCMPU,
32265 reg: regInfo{
32266 inputs: []inputInfo{
32267 {0, 9223372032559808512},
32268 {1, 9223372032559808512},
32269 },
32270 },
32271 },
32272 {
32273 name: "CMP",
32274 argLen: 2,
32275 asm: ppc64.ACMP,
32276 reg: regInfo{
32277 inputs: []inputInfo{
32278 {0, 1073733630},
32279 {1, 1073733630},
32280 },
32281 },
32282 },
32283 {
32284 name: "CMPU",
32285 argLen: 2,
32286 asm: ppc64.ACMPU,
32287 reg: regInfo{
32288 inputs: []inputInfo{
32289 {0, 1073733630},
32290 {1, 1073733630},
32291 },
32292 },
32293 },
32294 {
32295 name: "CMPW",
32296 argLen: 2,
32297 asm: ppc64.ACMPW,
32298 reg: regInfo{
32299 inputs: []inputInfo{
32300 {0, 1073733630},
32301 {1, 1073733630},
32302 },
32303 },
32304 },
32305 {
32306 name: "CMPWU",
32307 argLen: 2,
32308 asm: ppc64.ACMPWU,
32309 reg: regInfo{
32310 inputs: []inputInfo{
32311 {0, 1073733630},
32312 {1, 1073733630},
32313 },
32314 },
32315 },
32316 {
32317 name: "CMPconst",
32318 auxType: auxInt64,
32319 argLen: 1,
32320 asm: ppc64.ACMP,
32321 reg: regInfo{
32322 inputs: []inputInfo{
32323 {0, 1073733630},
32324 },
32325 },
32326 },
32327 {
32328 name: "CMPUconst",
32329 auxType: auxInt64,
32330 argLen: 1,
32331 asm: ppc64.ACMPU,
32332 reg: regInfo{
32333 inputs: []inputInfo{
32334 {0, 1073733630},
32335 },
32336 },
32337 },
32338 {
32339 name: "CMPWconst",
32340 auxType: auxInt32,
32341 argLen: 1,
32342 asm: ppc64.ACMPW,
32343 reg: regInfo{
32344 inputs: []inputInfo{
32345 {0, 1073733630},
32346 },
32347 },
32348 },
32349 {
32350 name: "CMPWUconst",
32351 auxType: auxInt32,
32352 argLen: 1,
32353 asm: ppc64.ACMPWU,
32354 reg: regInfo{
32355 inputs: []inputInfo{
32356 {0, 1073733630},
32357 },
32358 },
32359 },
32360 {
32361 name: "ISEL",
32362 auxType: auxInt32,
32363 argLen: 3,
32364 asm: ppc64.AISEL,
32365 reg: regInfo{
32366 inputs: []inputInfo{
32367 {0, 1073733624},
32368 {1, 1073733624},
32369 },
32370 outputs: []outputInfo{
32371 {0, 1073733624},
32372 },
32373 },
32374 },
32375 {
32376 name: "ISELZ",
32377 auxType: auxInt32,
32378 argLen: 2,
32379 asm: ppc64.AISEL,
32380 reg: regInfo{
32381 inputs: []inputInfo{
32382 {0, 1073733624},
32383 },
32384 outputs: []outputInfo{
32385 {0, 1073733624},
32386 },
32387 },
32388 },
32389 {
32390 name: "SETBC",
32391 auxType: auxInt32,
32392 argLen: 1,
32393 asm: ppc64.ASETBC,
32394 reg: regInfo{
32395 outputs: []outputInfo{
32396 {0, 1073733624},
32397 },
32398 },
32399 },
32400 {
32401 name: "SETBCR",
32402 auxType: auxInt32,
32403 argLen: 1,
32404 asm: ppc64.ASETBCR,
32405 reg: regInfo{
32406 outputs: []outputInfo{
32407 {0, 1073733624},
32408 },
32409 },
32410 },
32411 {
32412 name: "Equal",
32413 argLen: 1,
32414 reg: regInfo{
32415 outputs: []outputInfo{
32416 {0, 1073733624},
32417 },
32418 },
32419 },
32420 {
32421 name: "NotEqual",
32422 argLen: 1,
32423 reg: regInfo{
32424 outputs: []outputInfo{
32425 {0, 1073733624},
32426 },
32427 },
32428 },
32429 {
32430 name: "LessThan",
32431 argLen: 1,
32432 reg: regInfo{
32433 outputs: []outputInfo{
32434 {0, 1073733624},
32435 },
32436 },
32437 },
32438 {
32439 name: "FLessThan",
32440 argLen: 1,
32441 reg: regInfo{
32442 outputs: []outputInfo{
32443 {0, 1073733624},
32444 },
32445 },
32446 },
32447 {
32448 name: "LessEqual",
32449 argLen: 1,
32450 reg: regInfo{
32451 outputs: []outputInfo{
32452 {0, 1073733624},
32453 },
32454 },
32455 },
32456 {
32457 name: "FLessEqual",
32458 argLen: 1,
32459 reg: regInfo{
32460 outputs: []outputInfo{
32461 {0, 1073733624},
32462 },
32463 },
32464 },
32465 {
32466 name: "GreaterThan",
32467 argLen: 1,
32468 reg: regInfo{
32469 outputs: []outputInfo{
32470 {0, 1073733624},
32471 },
32472 },
32473 },
32474 {
32475 name: "FGreaterThan",
32476 argLen: 1,
32477 reg: regInfo{
32478 outputs: []outputInfo{
32479 {0, 1073733624},
32480 },
32481 },
32482 },
32483 {
32484 name: "GreaterEqual",
32485 argLen: 1,
32486 reg: regInfo{
32487 outputs: []outputInfo{
32488 {0, 1073733624},
32489 },
32490 },
32491 },
32492 {
32493 name: "FGreaterEqual",
32494 argLen: 1,
32495 reg: regInfo{
32496 outputs: []outputInfo{
32497 {0, 1073733624},
32498 },
32499 },
32500 },
32501 {
32502 name: "LoweredGetClosurePtr",
32503 argLen: 0,
32504 zeroWidth: true,
32505 reg: regInfo{
32506 outputs: []outputInfo{
32507 {0, 2048},
32508 },
32509 },
32510 },
32511 {
32512 name: "LoweredGetCallerSP",
32513 argLen: 1,
32514 rematerializeable: true,
32515 reg: regInfo{
32516 outputs: []outputInfo{
32517 {0, 1073733624},
32518 },
32519 },
32520 },
32521 {
32522 name: "LoweredGetCallerPC",
32523 argLen: 0,
32524 rematerializeable: true,
32525 reg: regInfo{
32526 outputs: []outputInfo{
32527 {0, 1073733624},
32528 },
32529 },
32530 },
32531 {
32532 name: "LoweredNilCheck",
32533 argLen: 2,
32534 clobberFlags: true,
32535 nilCheck: true,
32536 faultOnNilArg0: true,
32537 reg: regInfo{
32538 inputs: []inputInfo{
32539 {0, 1073733630},
32540 },
32541 clobbers: 2147483648,
32542 },
32543 },
32544 {
32545 name: "LoweredRound32F",
32546 argLen: 1,
32547 resultInArg0: true,
32548 zeroWidth: true,
32549 reg: regInfo{
32550 inputs: []inputInfo{
32551 {0, 9223372032559808512},
32552 },
32553 outputs: []outputInfo{
32554 {0, 9223372032559808512},
32555 },
32556 },
32557 },
32558 {
32559 name: "LoweredRound64F",
32560 argLen: 1,
32561 resultInArg0: true,
32562 zeroWidth: true,
32563 reg: regInfo{
32564 inputs: []inputInfo{
32565 {0, 9223372032559808512},
32566 },
32567 outputs: []outputInfo{
32568 {0, 9223372032559808512},
32569 },
32570 },
32571 },
32572 {
32573 name: "CALLstatic",
32574 auxType: auxCallOff,
32575 argLen: -1,
32576 clobberFlags: true,
32577 call: true,
32578 reg: regInfo{
32579 clobbers: 18446744071562059768,
32580 },
32581 },
32582 {
32583 name: "CALLtail",
32584 auxType: auxCallOff,
32585 argLen: -1,
32586 clobberFlags: true,
32587 call: true,
32588 tailCall: true,
32589 reg: regInfo{
32590 clobbers: 18446744071562059768,
32591 },
32592 },
32593 {
32594 name: "CALLclosure",
32595 auxType: auxCallOff,
32596 argLen: -1,
32597 clobberFlags: true,
32598 call: true,
32599 reg: regInfo{
32600 inputs: []inputInfo{
32601 {0, 4096},
32602 {1, 2048},
32603 },
32604 clobbers: 18446744071562059768,
32605 },
32606 },
32607 {
32608 name: "CALLinter",
32609 auxType: auxCallOff,
32610 argLen: -1,
32611 clobberFlags: true,
32612 call: true,
32613 reg: regInfo{
32614 inputs: []inputInfo{
32615 {0, 4096},
32616 },
32617 clobbers: 18446744071562059768,
32618 },
32619 },
32620 {
32621 name: "LoweredZero",
32622 auxType: auxInt64,
32623 argLen: 2,
32624 clobberFlags: true,
32625 faultOnNilArg0: true,
32626 unsafePoint: true,
32627 reg: regInfo{
32628 inputs: []inputInfo{
32629 {0, 1048576},
32630 },
32631 clobbers: 1048576,
32632 },
32633 },
32634 {
32635 name: "LoweredZeroShort",
32636 auxType: auxInt64,
32637 argLen: 2,
32638 faultOnNilArg0: true,
32639 unsafePoint: true,
32640 reg: regInfo{
32641 inputs: []inputInfo{
32642 {0, 1073733624},
32643 },
32644 },
32645 },
32646 {
32647 name: "LoweredQuadZeroShort",
32648 auxType: auxInt64,
32649 argLen: 2,
32650 faultOnNilArg0: true,
32651 unsafePoint: true,
32652 reg: regInfo{
32653 inputs: []inputInfo{
32654 {0, 1073733624},
32655 },
32656 },
32657 },
32658 {
32659 name: "LoweredQuadZero",
32660 auxType: auxInt64,
32661 argLen: 2,
32662 clobberFlags: true,
32663 faultOnNilArg0: true,
32664 unsafePoint: true,
32665 reg: regInfo{
32666 inputs: []inputInfo{
32667 {0, 1048576},
32668 },
32669 clobbers: 1048576,
32670 },
32671 },
32672 {
32673 name: "LoweredMove",
32674 auxType: auxInt64,
32675 argLen: 3,
32676 clobberFlags: true,
32677 faultOnNilArg0: true,
32678 faultOnNilArg1: true,
32679 unsafePoint: true,
32680 reg: regInfo{
32681 inputs: []inputInfo{
32682 {0, 1048576},
32683 {1, 2097152},
32684 },
32685 clobbers: 3145728,
32686 },
32687 },
32688 {
32689 name: "LoweredMoveShort",
32690 auxType: auxInt64,
32691 argLen: 3,
32692 faultOnNilArg0: true,
32693 faultOnNilArg1: true,
32694 unsafePoint: true,
32695 reg: regInfo{
32696 inputs: []inputInfo{
32697 {0, 1073733624},
32698 {1, 1073733624},
32699 },
32700 },
32701 },
32702 {
32703 name: "LoweredQuadMove",
32704 auxType: auxInt64,
32705 argLen: 3,
32706 clobberFlags: true,
32707 faultOnNilArg0: true,
32708 faultOnNilArg1: true,
32709 unsafePoint: true,
32710 reg: regInfo{
32711 inputs: []inputInfo{
32712 {0, 1048576},
32713 {1, 2097152},
32714 },
32715 clobbers: 3145728,
32716 },
32717 },
32718 {
32719 name: "LoweredQuadMoveShort",
32720 auxType: auxInt64,
32721 argLen: 3,
32722 faultOnNilArg0: true,
32723 faultOnNilArg1: true,
32724 unsafePoint: true,
32725 reg: regInfo{
32726 inputs: []inputInfo{
32727 {0, 1073733624},
32728 {1, 1073733624},
32729 },
32730 },
32731 },
32732 {
32733 name: "LoweredAtomicStore8",
32734 auxType: auxInt64,
32735 argLen: 3,
32736 faultOnNilArg0: true,
32737 hasSideEffects: true,
32738 reg: regInfo{
32739 inputs: []inputInfo{
32740 {0, 1073733630},
32741 {1, 1073733630},
32742 },
32743 },
32744 },
32745 {
32746 name: "LoweredAtomicStore32",
32747 auxType: auxInt64,
32748 argLen: 3,
32749 faultOnNilArg0: true,
32750 hasSideEffects: true,
32751 reg: regInfo{
32752 inputs: []inputInfo{
32753 {0, 1073733630},
32754 {1, 1073733630},
32755 },
32756 },
32757 },
32758 {
32759 name: "LoweredAtomicStore64",
32760 auxType: auxInt64,
32761 argLen: 3,
32762 faultOnNilArg0: true,
32763 hasSideEffects: true,
32764 reg: regInfo{
32765 inputs: []inputInfo{
32766 {0, 1073733630},
32767 {1, 1073733630},
32768 },
32769 },
32770 },
32771 {
32772 name: "LoweredAtomicLoad8",
32773 auxType: auxInt64,
32774 argLen: 2,
32775 clobberFlags: true,
32776 faultOnNilArg0: true,
32777 reg: regInfo{
32778 inputs: []inputInfo{
32779 {0, 1073733630},
32780 },
32781 outputs: []outputInfo{
32782 {0, 1073733624},
32783 },
32784 },
32785 },
32786 {
32787 name: "LoweredAtomicLoad32",
32788 auxType: auxInt64,
32789 argLen: 2,
32790 clobberFlags: true,
32791 faultOnNilArg0: true,
32792 reg: regInfo{
32793 inputs: []inputInfo{
32794 {0, 1073733630},
32795 },
32796 outputs: []outputInfo{
32797 {0, 1073733624},
32798 },
32799 },
32800 },
32801 {
32802 name: "LoweredAtomicLoad64",
32803 auxType: auxInt64,
32804 argLen: 2,
32805 clobberFlags: true,
32806 faultOnNilArg0: true,
32807 reg: regInfo{
32808 inputs: []inputInfo{
32809 {0, 1073733630},
32810 },
32811 outputs: []outputInfo{
32812 {0, 1073733624},
32813 },
32814 },
32815 },
32816 {
32817 name: "LoweredAtomicLoadPtr",
32818 auxType: auxInt64,
32819 argLen: 2,
32820 clobberFlags: true,
32821 faultOnNilArg0: true,
32822 reg: regInfo{
32823 inputs: []inputInfo{
32824 {0, 1073733630},
32825 },
32826 outputs: []outputInfo{
32827 {0, 1073733624},
32828 },
32829 },
32830 },
32831 {
32832 name: "LoweredAtomicAdd32",
32833 argLen: 3,
32834 resultNotInArgs: true,
32835 clobberFlags: true,
32836 faultOnNilArg0: true,
32837 hasSideEffects: true,
32838 reg: regInfo{
32839 inputs: []inputInfo{
32840 {1, 1073733624},
32841 {0, 1073733630},
32842 },
32843 outputs: []outputInfo{
32844 {0, 1073733624},
32845 },
32846 },
32847 },
32848 {
32849 name: "LoweredAtomicAdd64",
32850 argLen: 3,
32851 resultNotInArgs: true,
32852 clobberFlags: true,
32853 faultOnNilArg0: true,
32854 hasSideEffects: true,
32855 reg: regInfo{
32856 inputs: []inputInfo{
32857 {1, 1073733624},
32858 {0, 1073733630},
32859 },
32860 outputs: []outputInfo{
32861 {0, 1073733624},
32862 },
32863 },
32864 },
32865 {
32866 name: "LoweredAtomicExchange8",
32867 argLen: 3,
32868 resultNotInArgs: true,
32869 clobberFlags: true,
32870 faultOnNilArg0: true,
32871 hasSideEffects: true,
32872 reg: regInfo{
32873 inputs: []inputInfo{
32874 {1, 1073733624},
32875 {0, 1073733630},
32876 },
32877 outputs: []outputInfo{
32878 {0, 1073733624},
32879 },
32880 },
32881 },
32882 {
32883 name: "LoweredAtomicExchange32",
32884 argLen: 3,
32885 resultNotInArgs: true,
32886 clobberFlags: true,
32887 faultOnNilArg0: true,
32888 hasSideEffects: true,
32889 reg: regInfo{
32890 inputs: []inputInfo{
32891 {1, 1073733624},
32892 {0, 1073733630},
32893 },
32894 outputs: []outputInfo{
32895 {0, 1073733624},
32896 },
32897 },
32898 },
32899 {
32900 name: "LoweredAtomicExchange64",
32901 argLen: 3,
32902 resultNotInArgs: true,
32903 clobberFlags: true,
32904 faultOnNilArg0: true,
32905 hasSideEffects: true,
32906 reg: regInfo{
32907 inputs: []inputInfo{
32908 {1, 1073733624},
32909 {0, 1073733630},
32910 },
32911 outputs: []outputInfo{
32912 {0, 1073733624},
32913 },
32914 },
32915 },
32916 {
32917 name: "LoweredAtomicCas64",
32918 auxType: auxInt64,
32919 argLen: 4,
32920 resultNotInArgs: true,
32921 clobberFlags: true,
32922 faultOnNilArg0: true,
32923 hasSideEffects: true,
32924 reg: regInfo{
32925 inputs: []inputInfo{
32926 {1, 1073733624},
32927 {2, 1073733624},
32928 {0, 1073733630},
32929 },
32930 outputs: []outputInfo{
32931 {0, 1073733624},
32932 },
32933 },
32934 },
32935 {
32936 name: "LoweredAtomicCas32",
32937 auxType: auxInt64,
32938 argLen: 4,
32939 resultNotInArgs: true,
32940 clobberFlags: true,
32941 faultOnNilArg0: true,
32942 hasSideEffects: true,
32943 reg: regInfo{
32944 inputs: []inputInfo{
32945 {1, 1073733624},
32946 {2, 1073733624},
32947 {0, 1073733630},
32948 },
32949 outputs: []outputInfo{
32950 {0, 1073733624},
32951 },
32952 },
32953 },
32954 {
32955 name: "LoweredAtomicAnd8",
32956 argLen: 3,
32957 faultOnNilArg0: true,
32958 hasSideEffects: true,
32959 asm: ppc64.AAND,
32960 reg: regInfo{
32961 inputs: []inputInfo{
32962 {0, 1073733630},
32963 {1, 1073733630},
32964 },
32965 },
32966 },
32967 {
32968 name: "LoweredAtomicAnd32",
32969 argLen: 3,
32970 faultOnNilArg0: true,
32971 hasSideEffects: true,
32972 asm: ppc64.AAND,
32973 reg: regInfo{
32974 inputs: []inputInfo{
32975 {0, 1073733630},
32976 {1, 1073733630},
32977 },
32978 },
32979 },
32980 {
32981 name: "LoweredAtomicOr8",
32982 argLen: 3,
32983 faultOnNilArg0: true,
32984 hasSideEffects: true,
32985 asm: ppc64.AOR,
32986 reg: regInfo{
32987 inputs: []inputInfo{
32988 {0, 1073733630},
32989 {1, 1073733630},
32990 },
32991 },
32992 },
32993 {
32994 name: "LoweredAtomicOr32",
32995 argLen: 3,
32996 faultOnNilArg0: true,
32997 hasSideEffects: true,
32998 asm: ppc64.AOR,
32999 reg: regInfo{
33000 inputs: []inputInfo{
33001 {0, 1073733630},
33002 {1, 1073733630},
33003 },
33004 },
33005 },
33006 {
33007 name: "LoweredWB",
33008 auxType: auxInt64,
33009 argLen: 1,
33010 clobberFlags: true,
33011 reg: regInfo{
33012 clobbers: 18446744072632408064,
33013 outputs: []outputInfo{
33014 {0, 536870912},
33015 },
33016 },
33017 },
33018 {
33019 name: "LoweredPubBarrier",
33020 argLen: 1,
33021 hasSideEffects: true,
33022 asm: ppc64.ALWSYNC,
33023 reg: regInfo{},
33024 },
33025 {
33026 name: "LoweredPanicBoundsRR",
33027 auxType: auxInt64,
33028 argLen: 3,
33029 call: true,
33030 reg: regInfo{
33031 inputs: []inputInfo{
33032 {0, 1016},
33033 {1, 1016},
33034 },
33035 },
33036 },
33037 {
33038 name: "LoweredPanicBoundsRC",
33039 auxType: auxPanicBoundsC,
33040 argLen: 2,
33041 call: true,
33042 reg: regInfo{
33043 inputs: []inputInfo{
33044 {0, 1016},
33045 },
33046 },
33047 },
33048 {
33049 name: "LoweredPanicBoundsCR",
33050 auxType: auxPanicBoundsC,
33051 argLen: 2,
33052 call: true,
33053 reg: regInfo{
33054 inputs: []inputInfo{
33055 {0, 1016},
33056 },
33057 },
33058 },
33059 {
33060 name: "LoweredPanicBoundsCC",
33061 auxType: auxPanicBoundsCC,
33062 argLen: 1,
33063 call: true,
33064 reg: regInfo{},
33065 },
33066 {
33067 name: "InvertFlags",
33068 argLen: 1,
33069 reg: regInfo{},
33070 },
33071 {
33072 name: "FlagEQ",
33073 argLen: 0,
33074 reg: regInfo{},
33075 },
33076 {
33077 name: "FlagLT",
33078 argLen: 0,
33079 reg: regInfo{},
33080 },
33081 {
33082 name: "FlagGT",
33083 argLen: 0,
33084 reg: regInfo{},
33085 },
33086
33087 {
33088 name: "ADD",
33089 argLen: 2,
33090 commutative: true,
33091 asm: riscv.AADD,
33092 reg: regInfo{
33093 inputs: []inputInfo{
33094 {0, 1006632944},
33095 {1, 1006632944},
33096 },
33097 outputs: []outputInfo{
33098 {0, 1006632944},
33099 },
33100 },
33101 },
33102 {
33103 name: "ADDI",
33104 auxType: auxInt64,
33105 argLen: 1,
33106 asm: riscv.AADDI,
33107 reg: regInfo{
33108 inputs: []inputInfo{
33109 {0, 9223372037861408754},
33110 },
33111 outputs: []outputInfo{
33112 {0, 1006632944},
33113 },
33114 },
33115 },
33116 {
33117 name: "ADDIW",
33118 auxType: auxInt64,
33119 argLen: 1,
33120 asm: riscv.AADDIW,
33121 reg: regInfo{
33122 inputs: []inputInfo{
33123 {0, 1006632944},
33124 },
33125 outputs: []outputInfo{
33126 {0, 1006632944},
33127 },
33128 },
33129 },
33130 {
33131 name: "NEG",
33132 argLen: 1,
33133 asm: riscv.ANEG,
33134 reg: regInfo{
33135 inputs: []inputInfo{
33136 {0, 1006632944},
33137 },
33138 outputs: []outputInfo{
33139 {0, 1006632944},
33140 },
33141 },
33142 },
33143 {
33144 name: "NEGW",
33145 argLen: 1,
33146 asm: riscv.ANEGW,
33147 reg: regInfo{
33148 inputs: []inputInfo{
33149 {0, 1006632944},
33150 },
33151 outputs: []outputInfo{
33152 {0, 1006632944},
33153 },
33154 },
33155 },
33156 {
33157 name: "SUB",
33158 argLen: 2,
33159 asm: riscv.ASUB,
33160 reg: regInfo{
33161 inputs: []inputInfo{
33162 {0, 1006632944},
33163 {1, 1006632944},
33164 },
33165 outputs: []outputInfo{
33166 {0, 1006632944},
33167 },
33168 },
33169 },
33170 {
33171 name: "SUBW",
33172 argLen: 2,
33173 asm: riscv.ASUBW,
33174 reg: regInfo{
33175 inputs: []inputInfo{
33176 {0, 1006632944},
33177 {1, 1006632944},
33178 },
33179 outputs: []outputInfo{
33180 {0, 1006632944},
33181 },
33182 },
33183 },
33184 {
33185 name: "MUL",
33186 argLen: 2,
33187 commutative: true,
33188 asm: riscv.AMUL,
33189 reg: regInfo{
33190 inputs: []inputInfo{
33191 {0, 1006632944},
33192 {1, 1006632944},
33193 },
33194 outputs: []outputInfo{
33195 {0, 1006632944},
33196 },
33197 },
33198 },
33199 {
33200 name: "MULW",
33201 argLen: 2,
33202 commutative: true,
33203 asm: riscv.AMULW,
33204 reg: regInfo{
33205 inputs: []inputInfo{
33206 {0, 1006632944},
33207 {1, 1006632944},
33208 },
33209 outputs: []outputInfo{
33210 {0, 1006632944},
33211 },
33212 },
33213 },
33214 {
33215 name: "MULH",
33216 argLen: 2,
33217 commutative: true,
33218 asm: riscv.AMULH,
33219 reg: regInfo{
33220 inputs: []inputInfo{
33221 {0, 1006632944},
33222 {1, 1006632944},
33223 },
33224 outputs: []outputInfo{
33225 {0, 1006632944},
33226 },
33227 },
33228 },
33229 {
33230 name: "MULHU",
33231 argLen: 2,
33232 commutative: true,
33233 asm: riscv.AMULHU,
33234 reg: regInfo{
33235 inputs: []inputInfo{
33236 {0, 1006632944},
33237 {1, 1006632944},
33238 },
33239 outputs: []outputInfo{
33240 {0, 1006632944},
33241 },
33242 },
33243 },
33244 {
33245 name: "LoweredMuluhilo",
33246 argLen: 2,
33247 resultNotInArgs: true,
33248 reg: regInfo{
33249 inputs: []inputInfo{
33250 {0, 1006632944},
33251 {1, 1006632944},
33252 },
33253 outputs: []outputInfo{
33254 {0, 1006632944},
33255 {1, 1006632944},
33256 },
33257 },
33258 },
33259 {
33260 name: "LoweredMuluover",
33261 argLen: 2,
33262 resultNotInArgs: true,
33263 reg: regInfo{
33264 inputs: []inputInfo{
33265 {0, 1006632944},
33266 {1, 1006632944},
33267 },
33268 outputs: []outputInfo{
33269 {0, 1006632944},
33270 {1, 1006632944},
33271 },
33272 },
33273 },
33274 {
33275 name: "DIV",
33276 argLen: 2,
33277 asm: riscv.ADIV,
33278 reg: regInfo{
33279 inputs: []inputInfo{
33280 {0, 1006632944},
33281 {1, 1006632944},
33282 },
33283 outputs: []outputInfo{
33284 {0, 1006632944},
33285 },
33286 },
33287 },
33288 {
33289 name: "DIVU",
33290 argLen: 2,
33291 asm: riscv.ADIVU,
33292 reg: regInfo{
33293 inputs: []inputInfo{
33294 {0, 1006632944},
33295 {1, 1006632944},
33296 },
33297 outputs: []outputInfo{
33298 {0, 1006632944},
33299 },
33300 },
33301 },
33302 {
33303 name: "DIVW",
33304 argLen: 2,
33305 asm: riscv.ADIVW,
33306 reg: regInfo{
33307 inputs: []inputInfo{
33308 {0, 1006632944},
33309 {1, 1006632944},
33310 },
33311 outputs: []outputInfo{
33312 {0, 1006632944},
33313 },
33314 },
33315 },
33316 {
33317 name: "DIVUW",
33318 argLen: 2,
33319 asm: riscv.ADIVUW,
33320 reg: regInfo{
33321 inputs: []inputInfo{
33322 {0, 1006632944},
33323 {1, 1006632944},
33324 },
33325 outputs: []outputInfo{
33326 {0, 1006632944},
33327 },
33328 },
33329 },
33330 {
33331 name: "REM",
33332 argLen: 2,
33333 asm: riscv.AREM,
33334 reg: regInfo{
33335 inputs: []inputInfo{
33336 {0, 1006632944},
33337 {1, 1006632944},
33338 },
33339 outputs: []outputInfo{
33340 {0, 1006632944},
33341 },
33342 },
33343 },
33344 {
33345 name: "REMU",
33346 argLen: 2,
33347 asm: riscv.AREMU,
33348 reg: regInfo{
33349 inputs: []inputInfo{
33350 {0, 1006632944},
33351 {1, 1006632944},
33352 },
33353 outputs: []outputInfo{
33354 {0, 1006632944},
33355 },
33356 },
33357 },
33358 {
33359 name: "REMW",
33360 argLen: 2,
33361 asm: riscv.AREMW,
33362 reg: regInfo{
33363 inputs: []inputInfo{
33364 {0, 1006632944},
33365 {1, 1006632944},
33366 },
33367 outputs: []outputInfo{
33368 {0, 1006632944},
33369 },
33370 },
33371 },
33372 {
33373 name: "REMUW",
33374 argLen: 2,
33375 asm: riscv.AREMUW,
33376 reg: regInfo{
33377 inputs: []inputInfo{
33378 {0, 1006632944},
33379 {1, 1006632944},
33380 },
33381 outputs: []outputInfo{
33382 {0, 1006632944},
33383 },
33384 },
33385 },
33386 {
33387 name: "MOVaddr",
33388 auxType: auxSymOff,
33389 argLen: 1,
33390 rematerializeable: true,
33391 symEffect: SymAddr,
33392 asm: riscv.AMOV,
33393 reg: regInfo{
33394 inputs: []inputInfo{
33395 {0, 9223372037861408754},
33396 },
33397 outputs: []outputInfo{
33398 {0, 1006632944},
33399 },
33400 },
33401 },
33402 {
33403 name: "MOVDconst",
33404 auxType: auxInt64,
33405 argLen: 0,
33406 rematerializeable: true,
33407 asm: riscv.AMOV,
33408 reg: regInfo{
33409 outputs: []outputInfo{
33410 {0, 1006632944},
33411 },
33412 },
33413 },
33414 {
33415 name: "MOVBload",
33416 auxType: auxSymOff,
33417 argLen: 2,
33418 faultOnNilArg0: true,
33419 symEffect: SymRead,
33420 asm: riscv.AMOVB,
33421 reg: regInfo{
33422 inputs: []inputInfo{
33423 {0, 9223372037861408754},
33424 },
33425 outputs: []outputInfo{
33426 {0, 1006632944},
33427 },
33428 },
33429 },
33430 {
33431 name: "MOVHload",
33432 auxType: auxSymOff,
33433 argLen: 2,
33434 faultOnNilArg0: true,
33435 symEffect: SymRead,
33436 asm: riscv.AMOVH,
33437 reg: regInfo{
33438 inputs: []inputInfo{
33439 {0, 9223372037861408754},
33440 },
33441 outputs: []outputInfo{
33442 {0, 1006632944},
33443 },
33444 },
33445 },
33446 {
33447 name: "MOVWload",
33448 auxType: auxSymOff,
33449 argLen: 2,
33450 faultOnNilArg0: true,
33451 symEffect: SymRead,
33452 asm: riscv.AMOVW,
33453 reg: regInfo{
33454 inputs: []inputInfo{
33455 {0, 9223372037861408754},
33456 },
33457 outputs: []outputInfo{
33458 {0, 1006632944},
33459 },
33460 },
33461 },
33462 {
33463 name: "MOVDload",
33464 auxType: auxSymOff,
33465 argLen: 2,
33466 faultOnNilArg0: true,
33467 symEffect: SymRead,
33468 asm: riscv.AMOV,
33469 reg: regInfo{
33470 inputs: []inputInfo{
33471 {0, 9223372037861408754},
33472 },
33473 outputs: []outputInfo{
33474 {0, 1006632944},
33475 },
33476 },
33477 },
33478 {
33479 name: "MOVBUload",
33480 auxType: auxSymOff,
33481 argLen: 2,
33482 faultOnNilArg0: true,
33483 symEffect: SymRead,
33484 asm: riscv.AMOVBU,
33485 reg: regInfo{
33486 inputs: []inputInfo{
33487 {0, 9223372037861408754},
33488 },
33489 outputs: []outputInfo{
33490 {0, 1006632944},
33491 },
33492 },
33493 },
33494 {
33495 name: "MOVHUload",
33496 auxType: auxSymOff,
33497 argLen: 2,
33498 faultOnNilArg0: true,
33499 symEffect: SymRead,
33500 asm: riscv.AMOVHU,
33501 reg: regInfo{
33502 inputs: []inputInfo{
33503 {0, 9223372037861408754},
33504 },
33505 outputs: []outputInfo{
33506 {0, 1006632944},
33507 },
33508 },
33509 },
33510 {
33511 name: "MOVWUload",
33512 auxType: auxSymOff,
33513 argLen: 2,
33514 faultOnNilArg0: true,
33515 symEffect: SymRead,
33516 asm: riscv.AMOVWU,
33517 reg: regInfo{
33518 inputs: []inputInfo{
33519 {0, 9223372037861408754},
33520 },
33521 outputs: []outputInfo{
33522 {0, 1006632944},
33523 },
33524 },
33525 },
33526 {
33527 name: "MOVBstore",
33528 auxType: auxSymOff,
33529 argLen: 3,
33530 faultOnNilArg0: true,
33531 symEffect: SymWrite,
33532 asm: riscv.AMOVB,
33533 reg: regInfo{
33534 inputs: []inputInfo{
33535 {1, 1006632946},
33536 {0, 9223372037861408754},
33537 },
33538 },
33539 },
33540 {
33541 name: "MOVHstore",
33542 auxType: auxSymOff,
33543 argLen: 3,
33544 faultOnNilArg0: true,
33545 symEffect: SymWrite,
33546 asm: riscv.AMOVH,
33547 reg: regInfo{
33548 inputs: []inputInfo{
33549 {1, 1006632946},
33550 {0, 9223372037861408754},
33551 },
33552 },
33553 },
33554 {
33555 name: "MOVWstore",
33556 auxType: auxSymOff,
33557 argLen: 3,
33558 faultOnNilArg0: true,
33559 symEffect: SymWrite,
33560 asm: riscv.AMOVW,
33561 reg: regInfo{
33562 inputs: []inputInfo{
33563 {1, 1006632946},
33564 {0, 9223372037861408754},
33565 },
33566 },
33567 },
33568 {
33569 name: "MOVDstore",
33570 auxType: auxSymOff,
33571 argLen: 3,
33572 faultOnNilArg0: true,
33573 symEffect: SymWrite,
33574 asm: riscv.AMOV,
33575 reg: regInfo{
33576 inputs: []inputInfo{
33577 {1, 1006632946},
33578 {0, 9223372037861408754},
33579 },
33580 },
33581 },
33582 {
33583 name: "MOVBstorezero",
33584 auxType: auxSymOff,
33585 argLen: 2,
33586 faultOnNilArg0: true,
33587 symEffect: SymWrite,
33588 asm: riscv.AMOVB,
33589 reg: regInfo{
33590 inputs: []inputInfo{
33591 {0, 9223372037861408754},
33592 },
33593 },
33594 },
33595 {
33596 name: "MOVHstorezero",
33597 auxType: auxSymOff,
33598 argLen: 2,
33599 faultOnNilArg0: true,
33600 symEffect: SymWrite,
33601 asm: riscv.AMOVH,
33602 reg: regInfo{
33603 inputs: []inputInfo{
33604 {0, 9223372037861408754},
33605 },
33606 },
33607 },
33608 {
33609 name: "MOVWstorezero",
33610 auxType: auxSymOff,
33611 argLen: 2,
33612 faultOnNilArg0: true,
33613 symEffect: SymWrite,
33614 asm: riscv.AMOVW,
33615 reg: regInfo{
33616 inputs: []inputInfo{
33617 {0, 9223372037861408754},
33618 },
33619 },
33620 },
33621 {
33622 name: "MOVDstorezero",
33623 auxType: auxSymOff,
33624 argLen: 2,
33625 faultOnNilArg0: true,
33626 symEffect: SymWrite,
33627 asm: riscv.AMOV,
33628 reg: regInfo{
33629 inputs: []inputInfo{
33630 {0, 9223372037861408754},
33631 },
33632 },
33633 },
33634 {
33635 name: "MOVBreg",
33636 argLen: 1,
33637 asm: riscv.AMOVB,
33638 reg: regInfo{
33639 inputs: []inputInfo{
33640 {0, 1006632944},
33641 },
33642 outputs: []outputInfo{
33643 {0, 1006632944},
33644 },
33645 },
33646 },
33647 {
33648 name: "MOVHreg",
33649 argLen: 1,
33650 asm: riscv.AMOVH,
33651 reg: regInfo{
33652 inputs: []inputInfo{
33653 {0, 1006632944},
33654 },
33655 outputs: []outputInfo{
33656 {0, 1006632944},
33657 },
33658 },
33659 },
33660 {
33661 name: "MOVWreg",
33662 argLen: 1,
33663 asm: riscv.AMOVW,
33664 reg: regInfo{
33665 inputs: []inputInfo{
33666 {0, 1006632944},
33667 },
33668 outputs: []outputInfo{
33669 {0, 1006632944},
33670 },
33671 },
33672 },
33673 {
33674 name: "MOVDreg",
33675 argLen: 1,
33676 asm: riscv.AMOV,
33677 reg: regInfo{
33678 inputs: []inputInfo{
33679 {0, 1006632944},
33680 },
33681 outputs: []outputInfo{
33682 {0, 1006632944},
33683 },
33684 },
33685 },
33686 {
33687 name: "MOVBUreg",
33688 argLen: 1,
33689 asm: riscv.AMOVBU,
33690 reg: regInfo{
33691 inputs: []inputInfo{
33692 {0, 1006632944},
33693 },
33694 outputs: []outputInfo{
33695 {0, 1006632944},
33696 },
33697 },
33698 },
33699 {
33700 name: "MOVHUreg",
33701 argLen: 1,
33702 asm: riscv.AMOVHU,
33703 reg: regInfo{
33704 inputs: []inputInfo{
33705 {0, 1006632944},
33706 },
33707 outputs: []outputInfo{
33708 {0, 1006632944},
33709 },
33710 },
33711 },
33712 {
33713 name: "MOVWUreg",
33714 argLen: 1,
33715 asm: riscv.AMOVWU,
33716 reg: regInfo{
33717 inputs: []inputInfo{
33718 {0, 1006632944},
33719 },
33720 outputs: []outputInfo{
33721 {0, 1006632944},
33722 },
33723 },
33724 },
33725 {
33726 name: "MOVDnop",
33727 argLen: 1,
33728 resultInArg0: true,
33729 reg: regInfo{
33730 inputs: []inputInfo{
33731 {0, 1006632944},
33732 },
33733 outputs: []outputInfo{
33734 {0, 1006632944},
33735 },
33736 },
33737 },
33738 {
33739 name: "SLL",
33740 argLen: 2,
33741 asm: riscv.ASLL,
33742 reg: regInfo{
33743 inputs: []inputInfo{
33744 {0, 1006632944},
33745 {1, 1006632944},
33746 },
33747 outputs: []outputInfo{
33748 {0, 1006632944},
33749 },
33750 },
33751 },
33752 {
33753 name: "SLLW",
33754 argLen: 2,
33755 asm: riscv.ASLLW,
33756 reg: regInfo{
33757 inputs: []inputInfo{
33758 {0, 1006632944},
33759 {1, 1006632944},
33760 },
33761 outputs: []outputInfo{
33762 {0, 1006632944},
33763 },
33764 },
33765 },
33766 {
33767 name: "SRA",
33768 argLen: 2,
33769 asm: riscv.ASRA,
33770 reg: regInfo{
33771 inputs: []inputInfo{
33772 {0, 1006632944},
33773 {1, 1006632944},
33774 },
33775 outputs: []outputInfo{
33776 {0, 1006632944},
33777 },
33778 },
33779 },
33780 {
33781 name: "SRAW",
33782 argLen: 2,
33783 asm: riscv.ASRAW,
33784 reg: regInfo{
33785 inputs: []inputInfo{
33786 {0, 1006632944},
33787 {1, 1006632944},
33788 },
33789 outputs: []outputInfo{
33790 {0, 1006632944},
33791 },
33792 },
33793 },
33794 {
33795 name: "SRL",
33796 argLen: 2,
33797 asm: riscv.ASRL,
33798 reg: regInfo{
33799 inputs: []inputInfo{
33800 {0, 1006632944},
33801 {1, 1006632944},
33802 },
33803 outputs: []outputInfo{
33804 {0, 1006632944},
33805 },
33806 },
33807 },
33808 {
33809 name: "SRLW",
33810 argLen: 2,
33811 asm: riscv.ASRLW,
33812 reg: regInfo{
33813 inputs: []inputInfo{
33814 {0, 1006632944},
33815 {1, 1006632944},
33816 },
33817 outputs: []outputInfo{
33818 {0, 1006632944},
33819 },
33820 },
33821 },
33822 {
33823 name: "SLLI",
33824 auxType: auxInt64,
33825 argLen: 1,
33826 asm: riscv.ASLLI,
33827 reg: regInfo{
33828 inputs: []inputInfo{
33829 {0, 1006632944},
33830 },
33831 outputs: []outputInfo{
33832 {0, 1006632944},
33833 },
33834 },
33835 },
33836 {
33837 name: "SLLIW",
33838 auxType: auxInt64,
33839 argLen: 1,
33840 asm: riscv.ASLLIW,
33841 reg: regInfo{
33842 inputs: []inputInfo{
33843 {0, 1006632944},
33844 },
33845 outputs: []outputInfo{
33846 {0, 1006632944},
33847 },
33848 },
33849 },
33850 {
33851 name: "SRAI",
33852 auxType: auxInt64,
33853 argLen: 1,
33854 asm: riscv.ASRAI,
33855 reg: regInfo{
33856 inputs: []inputInfo{
33857 {0, 1006632944},
33858 },
33859 outputs: []outputInfo{
33860 {0, 1006632944},
33861 },
33862 },
33863 },
33864 {
33865 name: "SRAIW",
33866 auxType: auxInt64,
33867 argLen: 1,
33868 asm: riscv.ASRAIW,
33869 reg: regInfo{
33870 inputs: []inputInfo{
33871 {0, 1006632944},
33872 },
33873 outputs: []outputInfo{
33874 {0, 1006632944},
33875 },
33876 },
33877 },
33878 {
33879 name: "SRLI",
33880 auxType: auxInt64,
33881 argLen: 1,
33882 asm: riscv.ASRLI,
33883 reg: regInfo{
33884 inputs: []inputInfo{
33885 {0, 1006632944},
33886 },
33887 outputs: []outputInfo{
33888 {0, 1006632944},
33889 },
33890 },
33891 },
33892 {
33893 name: "SRLIW",
33894 auxType: auxInt64,
33895 argLen: 1,
33896 asm: riscv.ASRLIW,
33897 reg: regInfo{
33898 inputs: []inputInfo{
33899 {0, 1006632944},
33900 },
33901 outputs: []outputInfo{
33902 {0, 1006632944},
33903 },
33904 },
33905 },
33906 {
33907 name: "SH1ADD",
33908 argLen: 2,
33909 asm: riscv.ASH1ADD,
33910 reg: regInfo{
33911 inputs: []inputInfo{
33912 {0, 1006632944},
33913 {1, 1006632944},
33914 },
33915 outputs: []outputInfo{
33916 {0, 1006632944},
33917 },
33918 },
33919 },
33920 {
33921 name: "SH2ADD",
33922 argLen: 2,
33923 asm: riscv.ASH2ADD,
33924 reg: regInfo{
33925 inputs: []inputInfo{
33926 {0, 1006632944},
33927 {1, 1006632944},
33928 },
33929 outputs: []outputInfo{
33930 {0, 1006632944},
33931 },
33932 },
33933 },
33934 {
33935 name: "SH3ADD",
33936 argLen: 2,
33937 asm: riscv.ASH3ADD,
33938 reg: regInfo{
33939 inputs: []inputInfo{
33940 {0, 1006632944},
33941 {1, 1006632944},
33942 },
33943 outputs: []outputInfo{
33944 {0, 1006632944},
33945 },
33946 },
33947 },
33948 {
33949 name: "AND",
33950 argLen: 2,
33951 commutative: true,
33952 asm: riscv.AAND,
33953 reg: regInfo{
33954 inputs: []inputInfo{
33955 {0, 1006632944},
33956 {1, 1006632944},
33957 },
33958 outputs: []outputInfo{
33959 {0, 1006632944},
33960 },
33961 },
33962 },
33963 {
33964 name: "ANDN",
33965 argLen: 2,
33966 asm: riscv.AANDN,
33967 reg: regInfo{
33968 inputs: []inputInfo{
33969 {0, 1006632944},
33970 {1, 1006632944},
33971 },
33972 outputs: []outputInfo{
33973 {0, 1006632944},
33974 },
33975 },
33976 },
33977 {
33978 name: "ANDI",
33979 auxType: auxInt64,
33980 argLen: 1,
33981 asm: riscv.AANDI,
33982 reg: regInfo{
33983 inputs: []inputInfo{
33984 {0, 1006632944},
33985 },
33986 outputs: []outputInfo{
33987 {0, 1006632944},
33988 },
33989 },
33990 },
33991 {
33992 name: "CLZ",
33993 argLen: 1,
33994 asm: riscv.ACLZ,
33995 reg: regInfo{
33996 inputs: []inputInfo{
33997 {0, 1006632944},
33998 },
33999 outputs: []outputInfo{
34000 {0, 1006632944},
34001 },
34002 },
34003 },
34004 {
34005 name: "CLZW",
34006 argLen: 1,
34007 asm: riscv.ACLZW,
34008 reg: regInfo{
34009 inputs: []inputInfo{
34010 {0, 1006632944},
34011 },
34012 outputs: []outputInfo{
34013 {0, 1006632944},
34014 },
34015 },
34016 },
34017 {
34018 name: "CPOP",
34019 argLen: 1,
34020 asm: riscv.ACPOP,
34021 reg: regInfo{
34022 inputs: []inputInfo{
34023 {0, 1006632944},
34024 },
34025 outputs: []outputInfo{
34026 {0, 1006632944},
34027 },
34028 },
34029 },
34030 {
34031 name: "CPOPW",
34032 argLen: 1,
34033 asm: riscv.ACPOPW,
34034 reg: regInfo{
34035 inputs: []inputInfo{
34036 {0, 1006632944},
34037 },
34038 outputs: []outputInfo{
34039 {0, 1006632944},
34040 },
34041 },
34042 },
34043 {
34044 name: "CTZ",
34045 argLen: 1,
34046 asm: riscv.ACTZ,
34047 reg: regInfo{
34048 inputs: []inputInfo{
34049 {0, 1006632944},
34050 },
34051 outputs: []outputInfo{
34052 {0, 1006632944},
34053 },
34054 },
34055 },
34056 {
34057 name: "CTZW",
34058 argLen: 1,
34059 asm: riscv.ACTZW,
34060 reg: regInfo{
34061 inputs: []inputInfo{
34062 {0, 1006632944},
34063 },
34064 outputs: []outputInfo{
34065 {0, 1006632944},
34066 },
34067 },
34068 },
34069 {
34070 name: "NOT",
34071 argLen: 1,
34072 asm: riscv.ANOT,
34073 reg: regInfo{
34074 inputs: []inputInfo{
34075 {0, 1006632944},
34076 },
34077 outputs: []outputInfo{
34078 {0, 1006632944},
34079 },
34080 },
34081 },
34082 {
34083 name: "OR",
34084 argLen: 2,
34085 commutative: true,
34086 asm: riscv.AOR,
34087 reg: regInfo{
34088 inputs: []inputInfo{
34089 {0, 1006632944},
34090 {1, 1006632944},
34091 },
34092 outputs: []outputInfo{
34093 {0, 1006632944},
34094 },
34095 },
34096 },
34097 {
34098 name: "ORN",
34099 argLen: 2,
34100 asm: riscv.AORN,
34101 reg: regInfo{
34102 inputs: []inputInfo{
34103 {0, 1006632944},
34104 {1, 1006632944},
34105 },
34106 outputs: []outputInfo{
34107 {0, 1006632944},
34108 },
34109 },
34110 },
34111 {
34112 name: "ORI",
34113 auxType: auxInt64,
34114 argLen: 1,
34115 asm: riscv.AORI,
34116 reg: regInfo{
34117 inputs: []inputInfo{
34118 {0, 1006632944},
34119 },
34120 outputs: []outputInfo{
34121 {0, 1006632944},
34122 },
34123 },
34124 },
34125 {
34126 name: "REV8",
34127 argLen: 1,
34128 asm: riscv.AREV8,
34129 reg: regInfo{
34130 inputs: []inputInfo{
34131 {0, 1006632944},
34132 },
34133 outputs: []outputInfo{
34134 {0, 1006632944},
34135 },
34136 },
34137 },
34138 {
34139 name: "ROL",
34140 argLen: 2,
34141 asm: riscv.AROL,
34142 reg: regInfo{
34143 inputs: []inputInfo{
34144 {0, 1006632944},
34145 {1, 1006632944},
34146 },
34147 outputs: []outputInfo{
34148 {0, 1006632944},
34149 },
34150 },
34151 },
34152 {
34153 name: "ROLW",
34154 argLen: 2,
34155 asm: riscv.AROLW,
34156 reg: regInfo{
34157 inputs: []inputInfo{
34158 {0, 1006632944},
34159 {1, 1006632944},
34160 },
34161 outputs: []outputInfo{
34162 {0, 1006632944},
34163 },
34164 },
34165 },
34166 {
34167 name: "ROR",
34168 argLen: 2,
34169 asm: riscv.AROR,
34170 reg: regInfo{
34171 inputs: []inputInfo{
34172 {0, 1006632944},
34173 {1, 1006632944},
34174 },
34175 outputs: []outputInfo{
34176 {0, 1006632944},
34177 },
34178 },
34179 },
34180 {
34181 name: "RORI",
34182 auxType: auxInt64,
34183 argLen: 1,
34184 asm: riscv.ARORI,
34185 reg: regInfo{
34186 inputs: []inputInfo{
34187 {0, 1006632944},
34188 },
34189 outputs: []outputInfo{
34190 {0, 1006632944},
34191 },
34192 },
34193 },
34194 {
34195 name: "RORIW",
34196 auxType: auxInt64,
34197 argLen: 1,
34198 asm: riscv.ARORIW,
34199 reg: regInfo{
34200 inputs: []inputInfo{
34201 {0, 1006632944},
34202 },
34203 outputs: []outputInfo{
34204 {0, 1006632944},
34205 },
34206 },
34207 },
34208 {
34209 name: "RORW",
34210 argLen: 2,
34211 asm: riscv.ARORW,
34212 reg: regInfo{
34213 inputs: []inputInfo{
34214 {0, 1006632944},
34215 {1, 1006632944},
34216 },
34217 outputs: []outputInfo{
34218 {0, 1006632944},
34219 },
34220 },
34221 },
34222 {
34223 name: "XNOR",
34224 argLen: 2,
34225 commutative: true,
34226 asm: riscv.AXNOR,
34227 reg: regInfo{
34228 inputs: []inputInfo{
34229 {0, 1006632944},
34230 {1, 1006632944},
34231 },
34232 outputs: []outputInfo{
34233 {0, 1006632944},
34234 },
34235 },
34236 },
34237 {
34238 name: "XOR",
34239 argLen: 2,
34240 commutative: true,
34241 asm: riscv.AXOR,
34242 reg: regInfo{
34243 inputs: []inputInfo{
34244 {0, 1006632944},
34245 {1, 1006632944},
34246 },
34247 outputs: []outputInfo{
34248 {0, 1006632944},
34249 },
34250 },
34251 },
34252 {
34253 name: "XORI",
34254 auxType: auxInt64,
34255 argLen: 1,
34256 asm: riscv.AXORI,
34257 reg: regInfo{
34258 inputs: []inputInfo{
34259 {0, 1006632944},
34260 },
34261 outputs: []outputInfo{
34262 {0, 1006632944},
34263 },
34264 },
34265 },
34266 {
34267 name: "MIN",
34268 argLen: 2,
34269 commutative: true,
34270 asm: riscv.AMIN,
34271 reg: regInfo{
34272 inputs: []inputInfo{
34273 {0, 1006632944},
34274 {1, 1006632944},
34275 },
34276 outputs: []outputInfo{
34277 {0, 1006632944},
34278 },
34279 },
34280 },
34281 {
34282 name: "MAX",
34283 argLen: 2,
34284 commutative: true,
34285 asm: riscv.AMAX,
34286 reg: regInfo{
34287 inputs: []inputInfo{
34288 {0, 1006632944},
34289 {1, 1006632944},
34290 },
34291 outputs: []outputInfo{
34292 {0, 1006632944},
34293 },
34294 },
34295 },
34296 {
34297 name: "MINU",
34298 argLen: 2,
34299 commutative: true,
34300 asm: riscv.AMINU,
34301 reg: regInfo{
34302 inputs: []inputInfo{
34303 {0, 1006632944},
34304 {1, 1006632944},
34305 },
34306 outputs: []outputInfo{
34307 {0, 1006632944},
34308 },
34309 },
34310 },
34311 {
34312 name: "MAXU",
34313 argLen: 2,
34314 commutative: true,
34315 asm: riscv.AMAXU,
34316 reg: regInfo{
34317 inputs: []inputInfo{
34318 {0, 1006632944},
34319 {1, 1006632944},
34320 },
34321 outputs: []outputInfo{
34322 {0, 1006632944},
34323 },
34324 },
34325 },
34326 {
34327 name: "SEQZ",
34328 argLen: 1,
34329 asm: riscv.ASEQZ,
34330 reg: regInfo{
34331 inputs: []inputInfo{
34332 {0, 1006632944},
34333 },
34334 outputs: []outputInfo{
34335 {0, 1006632944},
34336 },
34337 },
34338 },
34339 {
34340 name: "SNEZ",
34341 argLen: 1,
34342 asm: riscv.ASNEZ,
34343 reg: regInfo{
34344 inputs: []inputInfo{
34345 {0, 1006632944},
34346 },
34347 outputs: []outputInfo{
34348 {0, 1006632944},
34349 },
34350 },
34351 },
34352 {
34353 name: "SLT",
34354 argLen: 2,
34355 asm: riscv.ASLT,
34356 reg: regInfo{
34357 inputs: []inputInfo{
34358 {0, 1006632944},
34359 {1, 1006632944},
34360 },
34361 outputs: []outputInfo{
34362 {0, 1006632944},
34363 },
34364 },
34365 },
34366 {
34367 name: "SLTI",
34368 auxType: auxInt64,
34369 argLen: 1,
34370 asm: riscv.ASLTI,
34371 reg: regInfo{
34372 inputs: []inputInfo{
34373 {0, 1006632944},
34374 },
34375 outputs: []outputInfo{
34376 {0, 1006632944},
34377 },
34378 },
34379 },
34380 {
34381 name: "SLTU",
34382 argLen: 2,
34383 asm: riscv.ASLTU,
34384 reg: regInfo{
34385 inputs: []inputInfo{
34386 {0, 1006632944},
34387 {1, 1006632944},
34388 },
34389 outputs: []outputInfo{
34390 {0, 1006632944},
34391 },
34392 },
34393 },
34394 {
34395 name: "SLTIU",
34396 auxType: auxInt64,
34397 argLen: 1,
34398 asm: riscv.ASLTIU,
34399 reg: regInfo{
34400 inputs: []inputInfo{
34401 {0, 1006632944},
34402 },
34403 outputs: []outputInfo{
34404 {0, 1006632944},
34405 },
34406 },
34407 },
34408 {
34409 name: "LoweredRound32F",
34410 argLen: 1,
34411 resultInArg0: true,
34412 reg: regInfo{
34413 inputs: []inputInfo{
34414 {0, 9223372034707292160},
34415 },
34416 outputs: []outputInfo{
34417 {0, 9223372034707292160},
34418 },
34419 },
34420 },
34421 {
34422 name: "LoweredRound64F",
34423 argLen: 1,
34424 resultInArg0: true,
34425 reg: regInfo{
34426 inputs: []inputInfo{
34427 {0, 9223372034707292160},
34428 },
34429 outputs: []outputInfo{
34430 {0, 9223372034707292160},
34431 },
34432 },
34433 },
34434 {
34435 name: "CALLstatic",
34436 auxType: auxCallOff,
34437 argLen: -1,
34438 call: true,
34439 reg: regInfo{
34440 clobbers: 9223372035781033968,
34441 },
34442 },
34443 {
34444 name: "CALLtail",
34445 auxType: auxCallOff,
34446 argLen: -1,
34447 call: true,
34448 tailCall: true,
34449 reg: regInfo{
34450 clobbers: 9223372035781033968,
34451 },
34452 },
34453 {
34454 name: "CALLclosure",
34455 auxType: auxCallOff,
34456 argLen: -1,
34457 call: true,
34458 reg: regInfo{
34459 inputs: []inputInfo{
34460 {1, 33554432},
34461 {0, 1006632946},
34462 },
34463 clobbers: 9223372035781033968,
34464 },
34465 },
34466 {
34467 name: "CALLinter",
34468 auxType: auxCallOff,
34469 argLen: -1,
34470 call: true,
34471 reg: regInfo{
34472 inputs: []inputInfo{
34473 {0, 1006632944},
34474 },
34475 clobbers: 9223372035781033968,
34476 },
34477 },
34478 {
34479 name: "DUFFZERO",
34480 auxType: auxInt64,
34481 argLen: 2,
34482 faultOnNilArg0: true,
34483 reg: regInfo{
34484 inputs: []inputInfo{
34485 {0, 16777216},
34486 },
34487 clobbers: 16777216,
34488 },
34489 },
34490 {
34491 name: "DUFFCOPY",
34492 auxType: auxInt64,
34493 argLen: 3,
34494 faultOnNilArg0: true,
34495 faultOnNilArg1: true,
34496 reg: regInfo{
34497 inputs: []inputInfo{
34498 {0, 16777216},
34499 {1, 8388608},
34500 },
34501 clobbers: 25165824,
34502 },
34503 },
34504 {
34505 name: "LoweredZero",
34506 auxType: auxInt64,
34507 argLen: 3,
34508 faultOnNilArg0: true,
34509 reg: regInfo{
34510 inputs: []inputInfo{
34511 {0, 16},
34512 {1, 1006632944},
34513 },
34514 clobbers: 16,
34515 },
34516 },
34517 {
34518 name: "LoweredMove",
34519 auxType: auxInt64,
34520 argLen: 4,
34521 faultOnNilArg0: true,
34522 faultOnNilArg1: true,
34523 reg: regInfo{
34524 inputs: []inputInfo{
34525 {0, 16},
34526 {1, 32},
34527 {2, 1006632880},
34528 },
34529 clobbers: 112,
34530 },
34531 },
34532 {
34533 name: "LoweredAtomicLoad8",
34534 argLen: 2,
34535 faultOnNilArg0: true,
34536 reg: regInfo{
34537 inputs: []inputInfo{
34538 {0, 9223372037861408754},
34539 },
34540 outputs: []outputInfo{
34541 {0, 1006632944},
34542 },
34543 },
34544 },
34545 {
34546 name: "LoweredAtomicLoad32",
34547 argLen: 2,
34548 faultOnNilArg0: true,
34549 reg: regInfo{
34550 inputs: []inputInfo{
34551 {0, 9223372037861408754},
34552 },
34553 outputs: []outputInfo{
34554 {0, 1006632944},
34555 },
34556 },
34557 },
34558 {
34559 name: "LoweredAtomicLoad64",
34560 argLen: 2,
34561 faultOnNilArg0: true,
34562 reg: regInfo{
34563 inputs: []inputInfo{
34564 {0, 9223372037861408754},
34565 },
34566 outputs: []outputInfo{
34567 {0, 1006632944},
34568 },
34569 },
34570 },
34571 {
34572 name: "LoweredAtomicStore8",
34573 argLen: 3,
34574 faultOnNilArg0: true,
34575 hasSideEffects: true,
34576 reg: regInfo{
34577 inputs: []inputInfo{
34578 {1, 1006632946},
34579 {0, 9223372037861408754},
34580 },
34581 },
34582 },
34583 {
34584 name: "LoweredAtomicStore32",
34585 argLen: 3,
34586 faultOnNilArg0: true,
34587 hasSideEffects: true,
34588 reg: regInfo{
34589 inputs: []inputInfo{
34590 {1, 1006632946},
34591 {0, 9223372037861408754},
34592 },
34593 },
34594 },
34595 {
34596 name: "LoweredAtomicStore64",
34597 argLen: 3,
34598 faultOnNilArg0: true,
34599 hasSideEffects: true,
34600 reg: regInfo{
34601 inputs: []inputInfo{
34602 {1, 1006632946},
34603 {0, 9223372037861408754},
34604 },
34605 },
34606 },
34607 {
34608 name: "LoweredAtomicExchange32",
34609 argLen: 3,
34610 resultNotInArgs: true,
34611 faultOnNilArg0: true,
34612 hasSideEffects: true,
34613 reg: regInfo{
34614 inputs: []inputInfo{
34615 {1, 1073741808},
34616 {0, 9223372037928517618},
34617 },
34618 outputs: []outputInfo{
34619 {0, 1006632944},
34620 },
34621 },
34622 },
34623 {
34624 name: "LoweredAtomicExchange64",
34625 argLen: 3,
34626 resultNotInArgs: true,
34627 faultOnNilArg0: true,
34628 hasSideEffects: true,
34629 reg: regInfo{
34630 inputs: []inputInfo{
34631 {1, 1073741808},
34632 {0, 9223372037928517618},
34633 },
34634 outputs: []outputInfo{
34635 {0, 1006632944},
34636 },
34637 },
34638 },
34639 {
34640 name: "LoweredAtomicAdd32",
34641 argLen: 3,
34642 resultNotInArgs: true,
34643 faultOnNilArg0: true,
34644 hasSideEffects: true,
34645 unsafePoint: true,
34646 reg: regInfo{
34647 inputs: []inputInfo{
34648 {1, 1073741808},
34649 {0, 9223372037928517618},
34650 },
34651 outputs: []outputInfo{
34652 {0, 1006632944},
34653 },
34654 },
34655 },
34656 {
34657 name: "LoweredAtomicAdd64",
34658 argLen: 3,
34659 resultNotInArgs: true,
34660 faultOnNilArg0: true,
34661 hasSideEffects: true,
34662 unsafePoint: true,
34663 reg: regInfo{
34664 inputs: []inputInfo{
34665 {1, 1073741808},
34666 {0, 9223372037928517618},
34667 },
34668 outputs: []outputInfo{
34669 {0, 1006632944},
34670 },
34671 },
34672 },
34673 {
34674 name: "LoweredAtomicCas32",
34675 argLen: 4,
34676 resultNotInArgs: true,
34677 faultOnNilArg0: true,
34678 hasSideEffects: true,
34679 unsafePoint: true,
34680 reg: regInfo{
34681 inputs: []inputInfo{
34682 {1, 1073741808},
34683 {2, 1073741808},
34684 {0, 9223372037928517618},
34685 },
34686 outputs: []outputInfo{
34687 {0, 1006632944},
34688 },
34689 },
34690 },
34691 {
34692 name: "LoweredAtomicCas64",
34693 argLen: 4,
34694 resultNotInArgs: true,
34695 faultOnNilArg0: true,
34696 hasSideEffects: true,
34697 unsafePoint: true,
34698 reg: regInfo{
34699 inputs: []inputInfo{
34700 {1, 1073741808},
34701 {2, 1073741808},
34702 {0, 9223372037928517618},
34703 },
34704 outputs: []outputInfo{
34705 {0, 1006632944},
34706 },
34707 },
34708 },
34709 {
34710 name: "LoweredAtomicAnd32",
34711 argLen: 3,
34712 faultOnNilArg0: true,
34713 hasSideEffects: true,
34714 asm: riscv.AAMOANDW,
34715 reg: regInfo{
34716 inputs: []inputInfo{
34717 {1, 1073741808},
34718 {0, 9223372037928517618},
34719 },
34720 },
34721 },
34722 {
34723 name: "LoweredAtomicOr32",
34724 argLen: 3,
34725 faultOnNilArg0: true,
34726 hasSideEffects: true,
34727 asm: riscv.AAMOORW,
34728 reg: regInfo{
34729 inputs: []inputInfo{
34730 {1, 1073741808},
34731 {0, 9223372037928517618},
34732 },
34733 },
34734 },
34735 {
34736 name: "LoweredNilCheck",
34737 argLen: 2,
34738 nilCheck: true,
34739 faultOnNilArg0: true,
34740 reg: regInfo{
34741 inputs: []inputInfo{
34742 {0, 1006632946},
34743 },
34744 },
34745 },
34746 {
34747 name: "LoweredGetClosurePtr",
34748 argLen: 0,
34749 reg: regInfo{
34750 outputs: []outputInfo{
34751 {0, 33554432},
34752 },
34753 },
34754 },
34755 {
34756 name: "LoweredGetCallerSP",
34757 argLen: 1,
34758 rematerializeable: true,
34759 reg: regInfo{
34760 outputs: []outputInfo{
34761 {0, 1006632944},
34762 },
34763 },
34764 },
34765 {
34766 name: "LoweredGetCallerPC",
34767 argLen: 0,
34768 rematerializeable: true,
34769 reg: regInfo{
34770 outputs: []outputInfo{
34771 {0, 1006632944},
34772 },
34773 },
34774 },
34775 {
34776 name: "LoweredWB",
34777 auxType: auxInt64,
34778 argLen: 1,
34779 clobberFlags: true,
34780 reg: regInfo{
34781 clobbers: 9223372034707292160,
34782 outputs: []outputInfo{
34783 {0, 8388608},
34784 },
34785 },
34786 },
34787 {
34788 name: "LoweredPubBarrier",
34789 argLen: 1,
34790 hasSideEffects: true,
34791 asm: riscv.AFENCE,
34792 reg: regInfo{},
34793 },
34794 {
34795 name: "LoweredPanicBoundsRR",
34796 auxType: auxInt64,
34797 argLen: 3,
34798 call: true,
34799 reg: regInfo{
34800 inputs: []inputInfo{
34801 {0, 1048560},
34802 {1, 1048560},
34803 },
34804 },
34805 },
34806 {
34807 name: "LoweredPanicBoundsRC",
34808 auxType: auxPanicBoundsC,
34809 argLen: 2,
34810 call: true,
34811 reg: regInfo{
34812 inputs: []inputInfo{
34813 {0, 1048560},
34814 },
34815 },
34816 },
34817 {
34818 name: "LoweredPanicBoundsCR",
34819 auxType: auxPanicBoundsC,
34820 argLen: 2,
34821 call: true,
34822 reg: regInfo{
34823 inputs: []inputInfo{
34824 {0, 1048560},
34825 },
34826 },
34827 },
34828 {
34829 name: "LoweredPanicBoundsCC",
34830 auxType: auxPanicBoundsCC,
34831 argLen: 1,
34832 call: true,
34833 reg: regInfo{},
34834 },
34835 {
34836 name: "FADDS",
34837 argLen: 2,
34838 commutative: true,
34839 asm: riscv.AFADDS,
34840 reg: regInfo{
34841 inputs: []inputInfo{
34842 {0, 9223372034707292160},
34843 {1, 9223372034707292160},
34844 },
34845 outputs: []outputInfo{
34846 {0, 9223372034707292160},
34847 },
34848 },
34849 },
34850 {
34851 name: "FSUBS",
34852 argLen: 2,
34853 asm: riscv.AFSUBS,
34854 reg: regInfo{
34855 inputs: []inputInfo{
34856 {0, 9223372034707292160},
34857 {1, 9223372034707292160},
34858 },
34859 outputs: []outputInfo{
34860 {0, 9223372034707292160},
34861 },
34862 },
34863 },
34864 {
34865 name: "FMULS",
34866 argLen: 2,
34867 commutative: true,
34868 asm: riscv.AFMULS,
34869 reg: regInfo{
34870 inputs: []inputInfo{
34871 {0, 9223372034707292160},
34872 {1, 9223372034707292160},
34873 },
34874 outputs: []outputInfo{
34875 {0, 9223372034707292160},
34876 },
34877 },
34878 },
34879 {
34880 name: "FDIVS",
34881 argLen: 2,
34882 asm: riscv.AFDIVS,
34883 reg: regInfo{
34884 inputs: []inputInfo{
34885 {0, 9223372034707292160},
34886 {1, 9223372034707292160},
34887 },
34888 outputs: []outputInfo{
34889 {0, 9223372034707292160},
34890 },
34891 },
34892 },
34893 {
34894 name: "FMADDS",
34895 argLen: 3,
34896 commutative: true,
34897 asm: riscv.AFMADDS,
34898 reg: regInfo{
34899 inputs: []inputInfo{
34900 {0, 9223372034707292160},
34901 {1, 9223372034707292160},
34902 {2, 9223372034707292160},
34903 },
34904 outputs: []outputInfo{
34905 {0, 9223372034707292160},
34906 },
34907 },
34908 },
34909 {
34910 name: "FMSUBS",
34911 argLen: 3,
34912 commutative: true,
34913 asm: riscv.AFMSUBS,
34914 reg: regInfo{
34915 inputs: []inputInfo{
34916 {0, 9223372034707292160},
34917 {1, 9223372034707292160},
34918 {2, 9223372034707292160},
34919 },
34920 outputs: []outputInfo{
34921 {0, 9223372034707292160},
34922 },
34923 },
34924 },
34925 {
34926 name: "FNMADDS",
34927 argLen: 3,
34928 commutative: true,
34929 asm: riscv.AFNMADDS,
34930 reg: regInfo{
34931 inputs: []inputInfo{
34932 {0, 9223372034707292160},
34933 {1, 9223372034707292160},
34934 {2, 9223372034707292160},
34935 },
34936 outputs: []outputInfo{
34937 {0, 9223372034707292160},
34938 },
34939 },
34940 },
34941 {
34942 name: "FNMSUBS",
34943 argLen: 3,
34944 commutative: true,
34945 asm: riscv.AFNMSUBS,
34946 reg: regInfo{
34947 inputs: []inputInfo{
34948 {0, 9223372034707292160},
34949 {1, 9223372034707292160},
34950 {2, 9223372034707292160},
34951 },
34952 outputs: []outputInfo{
34953 {0, 9223372034707292160},
34954 },
34955 },
34956 },
34957 {
34958 name: "FSQRTS",
34959 argLen: 1,
34960 asm: riscv.AFSQRTS,
34961 reg: regInfo{
34962 inputs: []inputInfo{
34963 {0, 9223372034707292160},
34964 },
34965 outputs: []outputInfo{
34966 {0, 9223372034707292160},
34967 },
34968 },
34969 },
34970 {
34971 name: "FNEGS",
34972 argLen: 1,
34973 asm: riscv.AFNEGS,
34974 reg: regInfo{
34975 inputs: []inputInfo{
34976 {0, 9223372034707292160},
34977 },
34978 outputs: []outputInfo{
34979 {0, 9223372034707292160},
34980 },
34981 },
34982 },
34983 {
34984 name: "FMVSX",
34985 argLen: 1,
34986 asm: riscv.AFMVSX,
34987 reg: regInfo{
34988 inputs: []inputInfo{
34989 {0, 1006632944},
34990 },
34991 outputs: []outputInfo{
34992 {0, 9223372034707292160},
34993 },
34994 },
34995 },
34996 {
34997 name: "FMVXS",
34998 argLen: 1,
34999 asm: riscv.AFMVXS,
35000 reg: regInfo{
35001 inputs: []inputInfo{
35002 {0, 9223372034707292160},
35003 },
35004 outputs: []outputInfo{
35005 {0, 1006632944},
35006 },
35007 },
35008 },
35009 {
35010 name: "FCVTSW",
35011 argLen: 1,
35012 asm: riscv.AFCVTSW,
35013 reg: regInfo{
35014 inputs: []inputInfo{
35015 {0, 1006632944},
35016 },
35017 outputs: []outputInfo{
35018 {0, 9223372034707292160},
35019 },
35020 },
35021 },
35022 {
35023 name: "FCVTSL",
35024 argLen: 1,
35025 asm: riscv.AFCVTSL,
35026 reg: regInfo{
35027 inputs: []inputInfo{
35028 {0, 1006632944},
35029 },
35030 outputs: []outputInfo{
35031 {0, 9223372034707292160},
35032 },
35033 },
35034 },
35035 {
35036 name: "FCVTWS",
35037 argLen: 1,
35038 asm: riscv.AFCVTWS,
35039 reg: regInfo{
35040 inputs: []inputInfo{
35041 {0, 9223372034707292160},
35042 },
35043 outputs: []outputInfo{
35044 {0, 1006632944},
35045 },
35046 },
35047 },
35048 {
35049 name: "FCVTLS",
35050 argLen: 1,
35051 asm: riscv.AFCVTLS,
35052 reg: regInfo{
35053 inputs: []inputInfo{
35054 {0, 9223372034707292160},
35055 },
35056 outputs: []outputInfo{
35057 {0, 1006632944},
35058 },
35059 },
35060 },
35061 {
35062 name: "FMOVWload",
35063 auxType: auxSymOff,
35064 argLen: 2,
35065 faultOnNilArg0: true,
35066 symEffect: SymRead,
35067 asm: riscv.AMOVF,
35068 reg: regInfo{
35069 inputs: []inputInfo{
35070 {0, 9223372037861408754},
35071 },
35072 outputs: []outputInfo{
35073 {0, 9223372034707292160},
35074 },
35075 },
35076 },
35077 {
35078 name: "FMOVWstore",
35079 auxType: auxSymOff,
35080 argLen: 3,
35081 faultOnNilArg0: true,
35082 symEffect: SymWrite,
35083 asm: riscv.AMOVF,
35084 reg: regInfo{
35085 inputs: []inputInfo{
35086 {0, 9223372037861408754},
35087 {1, 9223372034707292160},
35088 },
35089 },
35090 },
35091 {
35092 name: "FEQS",
35093 argLen: 2,
35094 commutative: true,
35095 asm: riscv.AFEQS,
35096 reg: regInfo{
35097 inputs: []inputInfo{
35098 {0, 9223372034707292160},
35099 {1, 9223372034707292160},
35100 },
35101 outputs: []outputInfo{
35102 {0, 1006632944},
35103 },
35104 },
35105 },
35106 {
35107 name: "FNES",
35108 argLen: 2,
35109 commutative: true,
35110 asm: riscv.AFNES,
35111 reg: regInfo{
35112 inputs: []inputInfo{
35113 {0, 9223372034707292160},
35114 {1, 9223372034707292160},
35115 },
35116 outputs: []outputInfo{
35117 {0, 1006632944},
35118 },
35119 },
35120 },
35121 {
35122 name: "FLTS",
35123 argLen: 2,
35124 asm: riscv.AFLTS,
35125 reg: regInfo{
35126 inputs: []inputInfo{
35127 {0, 9223372034707292160},
35128 {1, 9223372034707292160},
35129 },
35130 outputs: []outputInfo{
35131 {0, 1006632944},
35132 },
35133 },
35134 },
35135 {
35136 name: "FLES",
35137 argLen: 2,
35138 asm: riscv.AFLES,
35139 reg: regInfo{
35140 inputs: []inputInfo{
35141 {0, 9223372034707292160},
35142 {1, 9223372034707292160},
35143 },
35144 outputs: []outputInfo{
35145 {0, 1006632944},
35146 },
35147 },
35148 },
35149 {
35150 name: "LoweredFMAXS",
35151 argLen: 2,
35152 commutative: true,
35153 resultNotInArgs: true,
35154 asm: riscv.AFMAXS,
35155 reg: regInfo{
35156 inputs: []inputInfo{
35157 {0, 9223372034707292160},
35158 {1, 9223372034707292160},
35159 },
35160 outputs: []outputInfo{
35161 {0, 9223372034707292160},
35162 },
35163 },
35164 },
35165 {
35166 name: "LoweredFMINS",
35167 argLen: 2,
35168 commutative: true,
35169 resultNotInArgs: true,
35170 asm: riscv.AFMINS,
35171 reg: regInfo{
35172 inputs: []inputInfo{
35173 {0, 9223372034707292160},
35174 {1, 9223372034707292160},
35175 },
35176 outputs: []outputInfo{
35177 {0, 9223372034707292160},
35178 },
35179 },
35180 },
35181 {
35182 name: "FADDD",
35183 argLen: 2,
35184 commutative: true,
35185 asm: riscv.AFADDD,
35186 reg: regInfo{
35187 inputs: []inputInfo{
35188 {0, 9223372034707292160},
35189 {1, 9223372034707292160},
35190 },
35191 outputs: []outputInfo{
35192 {0, 9223372034707292160},
35193 },
35194 },
35195 },
35196 {
35197 name: "FSUBD",
35198 argLen: 2,
35199 asm: riscv.AFSUBD,
35200 reg: regInfo{
35201 inputs: []inputInfo{
35202 {0, 9223372034707292160},
35203 {1, 9223372034707292160},
35204 },
35205 outputs: []outputInfo{
35206 {0, 9223372034707292160},
35207 },
35208 },
35209 },
35210 {
35211 name: "FMULD",
35212 argLen: 2,
35213 commutative: true,
35214 asm: riscv.AFMULD,
35215 reg: regInfo{
35216 inputs: []inputInfo{
35217 {0, 9223372034707292160},
35218 {1, 9223372034707292160},
35219 },
35220 outputs: []outputInfo{
35221 {0, 9223372034707292160},
35222 },
35223 },
35224 },
35225 {
35226 name: "FDIVD",
35227 argLen: 2,
35228 asm: riscv.AFDIVD,
35229 reg: regInfo{
35230 inputs: []inputInfo{
35231 {0, 9223372034707292160},
35232 {1, 9223372034707292160},
35233 },
35234 outputs: []outputInfo{
35235 {0, 9223372034707292160},
35236 },
35237 },
35238 },
35239 {
35240 name: "FMADDD",
35241 argLen: 3,
35242 commutative: true,
35243 asm: riscv.AFMADDD,
35244 reg: regInfo{
35245 inputs: []inputInfo{
35246 {0, 9223372034707292160},
35247 {1, 9223372034707292160},
35248 {2, 9223372034707292160},
35249 },
35250 outputs: []outputInfo{
35251 {0, 9223372034707292160},
35252 },
35253 },
35254 },
35255 {
35256 name: "FMSUBD",
35257 argLen: 3,
35258 commutative: true,
35259 asm: riscv.AFMSUBD,
35260 reg: regInfo{
35261 inputs: []inputInfo{
35262 {0, 9223372034707292160},
35263 {1, 9223372034707292160},
35264 {2, 9223372034707292160},
35265 },
35266 outputs: []outputInfo{
35267 {0, 9223372034707292160},
35268 },
35269 },
35270 },
35271 {
35272 name: "FNMADDD",
35273 argLen: 3,
35274 commutative: true,
35275 asm: riscv.AFNMADDD,
35276 reg: regInfo{
35277 inputs: []inputInfo{
35278 {0, 9223372034707292160},
35279 {1, 9223372034707292160},
35280 {2, 9223372034707292160},
35281 },
35282 outputs: []outputInfo{
35283 {0, 9223372034707292160},
35284 },
35285 },
35286 },
35287 {
35288 name: "FNMSUBD",
35289 argLen: 3,
35290 commutative: true,
35291 asm: riscv.AFNMSUBD,
35292 reg: regInfo{
35293 inputs: []inputInfo{
35294 {0, 9223372034707292160},
35295 {1, 9223372034707292160},
35296 {2, 9223372034707292160},
35297 },
35298 outputs: []outputInfo{
35299 {0, 9223372034707292160},
35300 },
35301 },
35302 },
35303 {
35304 name: "FSQRTD",
35305 argLen: 1,
35306 asm: riscv.AFSQRTD,
35307 reg: regInfo{
35308 inputs: []inputInfo{
35309 {0, 9223372034707292160},
35310 },
35311 outputs: []outputInfo{
35312 {0, 9223372034707292160},
35313 },
35314 },
35315 },
35316 {
35317 name: "FNEGD",
35318 argLen: 1,
35319 asm: riscv.AFNEGD,
35320 reg: regInfo{
35321 inputs: []inputInfo{
35322 {0, 9223372034707292160},
35323 },
35324 outputs: []outputInfo{
35325 {0, 9223372034707292160},
35326 },
35327 },
35328 },
35329 {
35330 name: "FABSD",
35331 argLen: 1,
35332 asm: riscv.AFABSD,
35333 reg: regInfo{
35334 inputs: []inputInfo{
35335 {0, 9223372034707292160},
35336 },
35337 outputs: []outputInfo{
35338 {0, 9223372034707292160},
35339 },
35340 },
35341 },
35342 {
35343 name: "FSGNJD",
35344 argLen: 2,
35345 asm: riscv.AFSGNJD,
35346 reg: regInfo{
35347 inputs: []inputInfo{
35348 {0, 9223372034707292160},
35349 {1, 9223372034707292160},
35350 },
35351 outputs: []outputInfo{
35352 {0, 9223372034707292160},
35353 },
35354 },
35355 },
35356 {
35357 name: "FMVDX",
35358 argLen: 1,
35359 asm: riscv.AFMVDX,
35360 reg: regInfo{
35361 inputs: []inputInfo{
35362 {0, 1006632944},
35363 },
35364 outputs: []outputInfo{
35365 {0, 9223372034707292160},
35366 },
35367 },
35368 },
35369 {
35370 name: "FMVXD",
35371 argLen: 1,
35372 asm: riscv.AFMVXD,
35373 reg: regInfo{
35374 inputs: []inputInfo{
35375 {0, 9223372034707292160},
35376 },
35377 outputs: []outputInfo{
35378 {0, 1006632944},
35379 },
35380 },
35381 },
35382 {
35383 name: "FCVTDW",
35384 argLen: 1,
35385 asm: riscv.AFCVTDW,
35386 reg: regInfo{
35387 inputs: []inputInfo{
35388 {0, 1006632944},
35389 },
35390 outputs: []outputInfo{
35391 {0, 9223372034707292160},
35392 },
35393 },
35394 },
35395 {
35396 name: "FCVTDL",
35397 argLen: 1,
35398 asm: riscv.AFCVTDL,
35399 reg: regInfo{
35400 inputs: []inputInfo{
35401 {0, 1006632944},
35402 },
35403 outputs: []outputInfo{
35404 {0, 9223372034707292160},
35405 },
35406 },
35407 },
35408 {
35409 name: "FCVTWD",
35410 argLen: 1,
35411 asm: riscv.AFCVTWD,
35412 reg: regInfo{
35413 inputs: []inputInfo{
35414 {0, 9223372034707292160},
35415 },
35416 outputs: []outputInfo{
35417 {0, 1006632944},
35418 },
35419 },
35420 },
35421 {
35422 name: "FCVTLD",
35423 argLen: 1,
35424 asm: riscv.AFCVTLD,
35425 reg: regInfo{
35426 inputs: []inputInfo{
35427 {0, 9223372034707292160},
35428 },
35429 outputs: []outputInfo{
35430 {0, 1006632944},
35431 },
35432 },
35433 },
35434 {
35435 name: "FCVTDS",
35436 argLen: 1,
35437 asm: riscv.AFCVTDS,
35438 reg: regInfo{
35439 inputs: []inputInfo{
35440 {0, 9223372034707292160},
35441 },
35442 outputs: []outputInfo{
35443 {0, 9223372034707292160},
35444 },
35445 },
35446 },
35447 {
35448 name: "FCVTSD",
35449 argLen: 1,
35450 asm: riscv.AFCVTSD,
35451 reg: regInfo{
35452 inputs: []inputInfo{
35453 {0, 9223372034707292160},
35454 },
35455 outputs: []outputInfo{
35456 {0, 9223372034707292160},
35457 },
35458 },
35459 },
35460 {
35461 name: "FMOVDload",
35462 auxType: auxSymOff,
35463 argLen: 2,
35464 faultOnNilArg0: true,
35465 symEffect: SymRead,
35466 asm: riscv.AMOVD,
35467 reg: regInfo{
35468 inputs: []inputInfo{
35469 {0, 9223372037861408754},
35470 },
35471 outputs: []outputInfo{
35472 {0, 9223372034707292160},
35473 },
35474 },
35475 },
35476 {
35477 name: "FMOVDstore",
35478 auxType: auxSymOff,
35479 argLen: 3,
35480 faultOnNilArg0: true,
35481 symEffect: SymWrite,
35482 asm: riscv.AMOVD,
35483 reg: regInfo{
35484 inputs: []inputInfo{
35485 {0, 9223372037861408754},
35486 {1, 9223372034707292160},
35487 },
35488 },
35489 },
35490 {
35491 name: "FEQD",
35492 argLen: 2,
35493 commutative: true,
35494 asm: riscv.AFEQD,
35495 reg: regInfo{
35496 inputs: []inputInfo{
35497 {0, 9223372034707292160},
35498 {1, 9223372034707292160},
35499 },
35500 outputs: []outputInfo{
35501 {0, 1006632944},
35502 },
35503 },
35504 },
35505 {
35506 name: "FNED",
35507 argLen: 2,
35508 commutative: true,
35509 asm: riscv.AFNED,
35510 reg: regInfo{
35511 inputs: []inputInfo{
35512 {0, 9223372034707292160},
35513 {1, 9223372034707292160},
35514 },
35515 outputs: []outputInfo{
35516 {0, 1006632944},
35517 },
35518 },
35519 },
35520 {
35521 name: "FLTD",
35522 argLen: 2,
35523 asm: riscv.AFLTD,
35524 reg: regInfo{
35525 inputs: []inputInfo{
35526 {0, 9223372034707292160},
35527 {1, 9223372034707292160},
35528 },
35529 outputs: []outputInfo{
35530 {0, 1006632944},
35531 },
35532 },
35533 },
35534 {
35535 name: "FLED",
35536 argLen: 2,
35537 asm: riscv.AFLED,
35538 reg: regInfo{
35539 inputs: []inputInfo{
35540 {0, 9223372034707292160},
35541 {1, 9223372034707292160},
35542 },
35543 outputs: []outputInfo{
35544 {0, 1006632944},
35545 },
35546 },
35547 },
35548 {
35549 name: "LoweredFMIND",
35550 argLen: 2,
35551 commutative: true,
35552 resultNotInArgs: true,
35553 asm: riscv.AFMIND,
35554 reg: regInfo{
35555 inputs: []inputInfo{
35556 {0, 9223372034707292160},
35557 {1, 9223372034707292160},
35558 },
35559 outputs: []outputInfo{
35560 {0, 9223372034707292160},
35561 },
35562 },
35563 },
35564 {
35565 name: "LoweredFMAXD",
35566 argLen: 2,
35567 commutative: true,
35568 resultNotInArgs: true,
35569 asm: riscv.AFMAXD,
35570 reg: regInfo{
35571 inputs: []inputInfo{
35572 {0, 9223372034707292160},
35573 {1, 9223372034707292160},
35574 },
35575 outputs: []outputInfo{
35576 {0, 9223372034707292160},
35577 },
35578 },
35579 },
35580
35581 {
35582 name: "FADDS",
35583 argLen: 2,
35584 commutative: true,
35585 resultInArg0: true,
35586 asm: s390x.AFADDS,
35587 reg: regInfo{
35588 inputs: []inputInfo{
35589 {0, 4294901760},
35590 {1, 4294901760},
35591 },
35592 outputs: []outputInfo{
35593 {0, 4294901760},
35594 },
35595 },
35596 },
35597 {
35598 name: "FADD",
35599 argLen: 2,
35600 commutative: true,
35601 resultInArg0: true,
35602 asm: s390x.AFADD,
35603 reg: regInfo{
35604 inputs: []inputInfo{
35605 {0, 4294901760},
35606 {1, 4294901760},
35607 },
35608 outputs: []outputInfo{
35609 {0, 4294901760},
35610 },
35611 },
35612 },
35613 {
35614 name: "FSUBS",
35615 argLen: 2,
35616 resultInArg0: true,
35617 asm: s390x.AFSUBS,
35618 reg: regInfo{
35619 inputs: []inputInfo{
35620 {0, 4294901760},
35621 {1, 4294901760},
35622 },
35623 outputs: []outputInfo{
35624 {0, 4294901760},
35625 },
35626 },
35627 },
35628 {
35629 name: "FSUB",
35630 argLen: 2,
35631 resultInArg0: true,
35632 asm: s390x.AFSUB,
35633 reg: regInfo{
35634 inputs: []inputInfo{
35635 {0, 4294901760},
35636 {1, 4294901760},
35637 },
35638 outputs: []outputInfo{
35639 {0, 4294901760},
35640 },
35641 },
35642 },
35643 {
35644 name: "FMULS",
35645 argLen: 2,
35646 commutative: true,
35647 resultInArg0: true,
35648 asm: s390x.AFMULS,
35649 reg: regInfo{
35650 inputs: []inputInfo{
35651 {0, 4294901760},
35652 {1, 4294901760},
35653 },
35654 outputs: []outputInfo{
35655 {0, 4294901760},
35656 },
35657 },
35658 },
35659 {
35660 name: "FMUL",
35661 argLen: 2,
35662 commutative: true,
35663 resultInArg0: true,
35664 asm: s390x.AFMUL,
35665 reg: regInfo{
35666 inputs: []inputInfo{
35667 {0, 4294901760},
35668 {1, 4294901760},
35669 },
35670 outputs: []outputInfo{
35671 {0, 4294901760},
35672 },
35673 },
35674 },
35675 {
35676 name: "FDIVS",
35677 argLen: 2,
35678 resultInArg0: true,
35679 asm: s390x.AFDIVS,
35680 reg: regInfo{
35681 inputs: []inputInfo{
35682 {0, 4294901760},
35683 {1, 4294901760},
35684 },
35685 outputs: []outputInfo{
35686 {0, 4294901760},
35687 },
35688 },
35689 },
35690 {
35691 name: "FDIV",
35692 argLen: 2,
35693 resultInArg0: true,
35694 asm: s390x.AFDIV,
35695 reg: regInfo{
35696 inputs: []inputInfo{
35697 {0, 4294901760},
35698 {1, 4294901760},
35699 },
35700 outputs: []outputInfo{
35701 {0, 4294901760},
35702 },
35703 },
35704 },
35705 {
35706 name: "FNEGS",
35707 argLen: 1,
35708 clobberFlags: true,
35709 asm: s390x.AFNEGS,
35710 reg: regInfo{
35711 inputs: []inputInfo{
35712 {0, 4294901760},
35713 },
35714 outputs: []outputInfo{
35715 {0, 4294901760},
35716 },
35717 },
35718 },
35719 {
35720 name: "FNEG",
35721 argLen: 1,
35722 clobberFlags: true,
35723 asm: s390x.AFNEG,
35724 reg: regInfo{
35725 inputs: []inputInfo{
35726 {0, 4294901760},
35727 },
35728 outputs: []outputInfo{
35729 {0, 4294901760},
35730 },
35731 },
35732 },
35733 {
35734 name: "FMADDS",
35735 argLen: 3,
35736 resultInArg0: true,
35737 asm: s390x.AFMADDS,
35738 reg: regInfo{
35739 inputs: []inputInfo{
35740 {0, 4294901760},
35741 {1, 4294901760},
35742 {2, 4294901760},
35743 },
35744 outputs: []outputInfo{
35745 {0, 4294901760},
35746 },
35747 },
35748 },
35749 {
35750 name: "FMADD",
35751 argLen: 3,
35752 resultInArg0: true,
35753 asm: s390x.AFMADD,
35754 reg: regInfo{
35755 inputs: []inputInfo{
35756 {0, 4294901760},
35757 {1, 4294901760},
35758 {2, 4294901760},
35759 },
35760 outputs: []outputInfo{
35761 {0, 4294901760},
35762 },
35763 },
35764 },
35765 {
35766 name: "FMSUBS",
35767 argLen: 3,
35768 resultInArg0: true,
35769 asm: s390x.AFMSUBS,
35770 reg: regInfo{
35771 inputs: []inputInfo{
35772 {0, 4294901760},
35773 {1, 4294901760},
35774 {2, 4294901760},
35775 },
35776 outputs: []outputInfo{
35777 {0, 4294901760},
35778 },
35779 },
35780 },
35781 {
35782 name: "FMSUB",
35783 argLen: 3,
35784 resultInArg0: true,
35785 asm: s390x.AFMSUB,
35786 reg: regInfo{
35787 inputs: []inputInfo{
35788 {0, 4294901760},
35789 {1, 4294901760},
35790 {2, 4294901760},
35791 },
35792 outputs: []outputInfo{
35793 {0, 4294901760},
35794 },
35795 },
35796 },
35797 {
35798 name: "LPDFR",
35799 argLen: 1,
35800 asm: s390x.ALPDFR,
35801 reg: regInfo{
35802 inputs: []inputInfo{
35803 {0, 4294901760},
35804 },
35805 outputs: []outputInfo{
35806 {0, 4294901760},
35807 },
35808 },
35809 },
35810 {
35811 name: "LNDFR",
35812 argLen: 1,
35813 asm: s390x.ALNDFR,
35814 reg: regInfo{
35815 inputs: []inputInfo{
35816 {0, 4294901760},
35817 },
35818 outputs: []outputInfo{
35819 {0, 4294901760},
35820 },
35821 },
35822 },
35823 {
35824 name: "CPSDR",
35825 argLen: 2,
35826 asm: s390x.ACPSDR,
35827 reg: regInfo{
35828 inputs: []inputInfo{
35829 {0, 4294901760},
35830 {1, 4294901760},
35831 },
35832 outputs: []outputInfo{
35833 {0, 4294901760},
35834 },
35835 },
35836 },
35837 {
35838 name: "WFMAXDB",
35839 argLen: 2,
35840 asm: s390x.AWFMAXDB,
35841 reg: regInfo{
35842 inputs: []inputInfo{
35843 {0, 4294901760},
35844 {1, 4294901760},
35845 },
35846 outputs: []outputInfo{
35847 {0, 4294901760},
35848 },
35849 },
35850 },
35851 {
35852 name: "WFMAXSB",
35853 argLen: 2,
35854 asm: s390x.AWFMAXSB,
35855 reg: regInfo{
35856 inputs: []inputInfo{
35857 {0, 4294901760},
35858 {1, 4294901760},
35859 },
35860 outputs: []outputInfo{
35861 {0, 4294901760},
35862 },
35863 },
35864 },
35865 {
35866 name: "WFMINDB",
35867 argLen: 2,
35868 asm: s390x.AWFMINDB,
35869 reg: regInfo{
35870 inputs: []inputInfo{
35871 {0, 4294901760},
35872 {1, 4294901760},
35873 },
35874 outputs: []outputInfo{
35875 {0, 4294901760},
35876 },
35877 },
35878 },
35879 {
35880 name: "WFMINSB",
35881 argLen: 2,
35882 asm: s390x.AWFMINSB,
35883 reg: regInfo{
35884 inputs: []inputInfo{
35885 {0, 4294901760},
35886 {1, 4294901760},
35887 },
35888 outputs: []outputInfo{
35889 {0, 4294901760},
35890 },
35891 },
35892 },
35893 {
35894 name: "FIDBR",
35895 auxType: auxInt8,
35896 argLen: 1,
35897 asm: s390x.AFIDBR,
35898 reg: regInfo{
35899 inputs: []inputInfo{
35900 {0, 4294901760},
35901 },
35902 outputs: []outputInfo{
35903 {0, 4294901760},
35904 },
35905 },
35906 },
35907 {
35908 name: "FMOVSload",
35909 auxType: auxSymOff,
35910 argLen: 2,
35911 faultOnNilArg0: true,
35912 symEffect: SymRead,
35913 asm: s390x.AFMOVS,
35914 reg: regInfo{
35915 inputs: []inputInfo{
35916 {0, 4295023614},
35917 },
35918 outputs: []outputInfo{
35919 {0, 4294901760},
35920 },
35921 },
35922 },
35923 {
35924 name: "FMOVDload",
35925 auxType: auxSymOff,
35926 argLen: 2,
35927 faultOnNilArg0: true,
35928 symEffect: SymRead,
35929 asm: s390x.AFMOVD,
35930 reg: regInfo{
35931 inputs: []inputInfo{
35932 {0, 4295023614},
35933 },
35934 outputs: []outputInfo{
35935 {0, 4294901760},
35936 },
35937 },
35938 },
35939 {
35940 name: "FMOVSconst",
35941 auxType: auxFloat32,
35942 argLen: 0,
35943 rematerializeable: true,
35944 asm: s390x.AFMOVS,
35945 reg: regInfo{
35946 outputs: []outputInfo{
35947 {0, 4294901760},
35948 },
35949 },
35950 },
35951 {
35952 name: "FMOVDconst",
35953 auxType: auxFloat64,
35954 argLen: 0,
35955 rematerializeable: true,
35956 asm: s390x.AFMOVD,
35957 reg: regInfo{
35958 outputs: []outputInfo{
35959 {0, 4294901760},
35960 },
35961 },
35962 },
35963 {
35964 name: "FMOVSloadidx",
35965 auxType: auxSymOff,
35966 argLen: 3,
35967 symEffect: SymRead,
35968 asm: s390x.AFMOVS,
35969 reg: regInfo{
35970 inputs: []inputInfo{
35971 {0, 56318},
35972 {1, 56318},
35973 },
35974 outputs: []outputInfo{
35975 {0, 4294901760},
35976 },
35977 },
35978 },
35979 {
35980 name: "FMOVDloadidx",
35981 auxType: auxSymOff,
35982 argLen: 3,
35983 symEffect: SymRead,
35984 asm: s390x.AFMOVD,
35985 reg: regInfo{
35986 inputs: []inputInfo{
35987 {0, 56318},
35988 {1, 56318},
35989 },
35990 outputs: []outputInfo{
35991 {0, 4294901760},
35992 },
35993 },
35994 },
35995 {
35996 name: "FMOVSstore",
35997 auxType: auxSymOff,
35998 argLen: 3,
35999 faultOnNilArg0: true,
36000 symEffect: SymWrite,
36001 asm: s390x.AFMOVS,
36002 reg: regInfo{
36003 inputs: []inputInfo{
36004 {0, 4295023614},
36005 {1, 4294901760},
36006 },
36007 },
36008 },
36009 {
36010 name: "FMOVDstore",
36011 auxType: auxSymOff,
36012 argLen: 3,
36013 faultOnNilArg0: true,
36014 symEffect: SymWrite,
36015 asm: s390x.AFMOVD,
36016 reg: regInfo{
36017 inputs: []inputInfo{
36018 {0, 4295023614},
36019 {1, 4294901760},
36020 },
36021 },
36022 },
36023 {
36024 name: "FMOVSstoreidx",
36025 auxType: auxSymOff,
36026 argLen: 4,
36027 symEffect: SymWrite,
36028 asm: s390x.AFMOVS,
36029 reg: regInfo{
36030 inputs: []inputInfo{
36031 {0, 56318},
36032 {1, 56318},
36033 {2, 4294901760},
36034 },
36035 },
36036 },
36037 {
36038 name: "FMOVDstoreidx",
36039 auxType: auxSymOff,
36040 argLen: 4,
36041 symEffect: SymWrite,
36042 asm: s390x.AFMOVD,
36043 reg: regInfo{
36044 inputs: []inputInfo{
36045 {0, 56318},
36046 {1, 56318},
36047 {2, 4294901760},
36048 },
36049 },
36050 },
36051 {
36052 name: "ADD",
36053 argLen: 2,
36054 commutative: true,
36055 clobberFlags: true,
36056 asm: s390x.AADD,
36057 reg: regInfo{
36058 inputs: []inputInfo{
36059 {1, 23551},
36060 {0, 56319},
36061 },
36062 outputs: []outputInfo{
36063 {0, 23551},
36064 },
36065 },
36066 },
36067 {
36068 name: "ADDW",
36069 argLen: 2,
36070 commutative: true,
36071 clobberFlags: true,
36072 asm: s390x.AADDW,
36073 reg: regInfo{
36074 inputs: []inputInfo{
36075 {1, 23551},
36076 {0, 56319},
36077 },
36078 outputs: []outputInfo{
36079 {0, 23551},
36080 },
36081 },
36082 },
36083 {
36084 name: "ADDconst",
36085 auxType: auxInt32,
36086 argLen: 1,
36087 clobberFlags: true,
36088 asm: s390x.AADD,
36089 reg: regInfo{
36090 inputs: []inputInfo{
36091 {0, 56319},
36092 },
36093 outputs: []outputInfo{
36094 {0, 23551},
36095 },
36096 },
36097 },
36098 {
36099 name: "ADDWconst",
36100 auxType: auxInt32,
36101 argLen: 1,
36102 clobberFlags: true,
36103 asm: s390x.AADDW,
36104 reg: regInfo{
36105 inputs: []inputInfo{
36106 {0, 56319},
36107 },
36108 outputs: []outputInfo{
36109 {0, 23551},
36110 },
36111 },
36112 },
36113 {
36114 name: "ADDload",
36115 auxType: auxSymOff,
36116 argLen: 3,
36117 resultInArg0: true,
36118 clobberFlags: true,
36119 faultOnNilArg1: true,
36120 symEffect: SymRead,
36121 asm: s390x.AADD,
36122 reg: regInfo{
36123 inputs: []inputInfo{
36124 {0, 23551},
36125 {1, 56318},
36126 },
36127 outputs: []outputInfo{
36128 {0, 23551},
36129 },
36130 },
36131 },
36132 {
36133 name: "ADDWload",
36134 auxType: auxSymOff,
36135 argLen: 3,
36136 resultInArg0: true,
36137 clobberFlags: true,
36138 faultOnNilArg1: true,
36139 symEffect: SymRead,
36140 asm: s390x.AADDW,
36141 reg: regInfo{
36142 inputs: []inputInfo{
36143 {0, 23551},
36144 {1, 56318},
36145 },
36146 outputs: []outputInfo{
36147 {0, 23551},
36148 },
36149 },
36150 },
36151 {
36152 name: "SUB",
36153 argLen: 2,
36154 clobberFlags: true,
36155 asm: s390x.ASUB,
36156 reg: regInfo{
36157 inputs: []inputInfo{
36158 {0, 23551},
36159 {1, 23551},
36160 },
36161 outputs: []outputInfo{
36162 {0, 23551},
36163 },
36164 },
36165 },
36166 {
36167 name: "SUBW",
36168 argLen: 2,
36169 clobberFlags: true,
36170 asm: s390x.ASUBW,
36171 reg: regInfo{
36172 inputs: []inputInfo{
36173 {0, 23551},
36174 {1, 23551},
36175 },
36176 outputs: []outputInfo{
36177 {0, 23551},
36178 },
36179 },
36180 },
36181 {
36182 name: "SUBconst",
36183 auxType: auxInt32,
36184 argLen: 1,
36185 resultInArg0: true,
36186 clobberFlags: true,
36187 asm: s390x.ASUB,
36188 reg: regInfo{
36189 inputs: []inputInfo{
36190 {0, 23551},
36191 },
36192 outputs: []outputInfo{
36193 {0, 23551},
36194 },
36195 },
36196 },
36197 {
36198 name: "SUBWconst",
36199 auxType: auxInt32,
36200 argLen: 1,
36201 resultInArg0: true,
36202 clobberFlags: true,
36203 asm: s390x.ASUBW,
36204 reg: regInfo{
36205 inputs: []inputInfo{
36206 {0, 23551},
36207 },
36208 outputs: []outputInfo{
36209 {0, 23551},
36210 },
36211 },
36212 },
36213 {
36214 name: "SUBload",
36215 auxType: auxSymOff,
36216 argLen: 3,
36217 resultInArg0: true,
36218 clobberFlags: true,
36219 faultOnNilArg1: true,
36220 symEffect: SymRead,
36221 asm: s390x.ASUB,
36222 reg: regInfo{
36223 inputs: []inputInfo{
36224 {0, 23551},
36225 {1, 56318},
36226 },
36227 outputs: []outputInfo{
36228 {0, 23551},
36229 },
36230 },
36231 },
36232 {
36233 name: "SUBWload",
36234 auxType: auxSymOff,
36235 argLen: 3,
36236 resultInArg0: true,
36237 clobberFlags: true,
36238 faultOnNilArg1: true,
36239 symEffect: SymRead,
36240 asm: s390x.ASUBW,
36241 reg: regInfo{
36242 inputs: []inputInfo{
36243 {0, 23551},
36244 {1, 56318},
36245 },
36246 outputs: []outputInfo{
36247 {0, 23551},
36248 },
36249 },
36250 },
36251 {
36252 name: "MULLD",
36253 argLen: 2,
36254 commutative: true,
36255 resultInArg0: true,
36256 clobberFlags: true,
36257 asm: s390x.AMULLD,
36258 reg: regInfo{
36259 inputs: []inputInfo{
36260 {0, 23551},
36261 {1, 23551},
36262 },
36263 outputs: []outputInfo{
36264 {0, 23551},
36265 },
36266 },
36267 },
36268 {
36269 name: "MULLW",
36270 argLen: 2,
36271 commutative: true,
36272 resultInArg0: true,
36273 clobberFlags: true,
36274 asm: s390x.AMULLW,
36275 reg: regInfo{
36276 inputs: []inputInfo{
36277 {0, 23551},
36278 {1, 23551},
36279 },
36280 outputs: []outputInfo{
36281 {0, 23551},
36282 },
36283 },
36284 },
36285 {
36286 name: "MULLDconst",
36287 auxType: auxInt32,
36288 argLen: 1,
36289 resultInArg0: true,
36290 clobberFlags: true,
36291 asm: s390x.AMULLD,
36292 reg: regInfo{
36293 inputs: []inputInfo{
36294 {0, 23551},
36295 },
36296 outputs: []outputInfo{
36297 {0, 23551},
36298 },
36299 },
36300 },
36301 {
36302 name: "MULLWconst",
36303 auxType: auxInt32,
36304 argLen: 1,
36305 resultInArg0: true,
36306 clobberFlags: true,
36307 asm: s390x.AMULLW,
36308 reg: regInfo{
36309 inputs: []inputInfo{
36310 {0, 23551},
36311 },
36312 outputs: []outputInfo{
36313 {0, 23551},
36314 },
36315 },
36316 },
36317 {
36318 name: "MULLDload",
36319 auxType: auxSymOff,
36320 argLen: 3,
36321 resultInArg0: true,
36322 clobberFlags: true,
36323 faultOnNilArg1: true,
36324 symEffect: SymRead,
36325 asm: s390x.AMULLD,
36326 reg: regInfo{
36327 inputs: []inputInfo{
36328 {0, 23551},
36329 {1, 56318},
36330 },
36331 outputs: []outputInfo{
36332 {0, 23551},
36333 },
36334 },
36335 },
36336 {
36337 name: "MULLWload",
36338 auxType: auxSymOff,
36339 argLen: 3,
36340 resultInArg0: true,
36341 clobberFlags: true,
36342 faultOnNilArg1: true,
36343 symEffect: SymRead,
36344 asm: s390x.AMULLW,
36345 reg: regInfo{
36346 inputs: []inputInfo{
36347 {0, 23551},
36348 {1, 56318},
36349 },
36350 outputs: []outputInfo{
36351 {0, 23551},
36352 },
36353 },
36354 },
36355 {
36356 name: "MULHD",
36357 argLen: 2,
36358 commutative: true,
36359 resultInArg0: true,
36360 clobberFlags: true,
36361 asm: s390x.AMULHD,
36362 reg: regInfo{
36363 inputs: []inputInfo{
36364 {0, 21503},
36365 {1, 21503},
36366 },
36367 clobbers: 2048,
36368 outputs: []outputInfo{
36369 {0, 21503},
36370 },
36371 },
36372 },
36373 {
36374 name: "MULHDU",
36375 argLen: 2,
36376 commutative: true,
36377 resultInArg0: true,
36378 clobberFlags: true,
36379 asm: s390x.AMULHDU,
36380 reg: regInfo{
36381 inputs: []inputInfo{
36382 {0, 21503},
36383 {1, 21503},
36384 },
36385 clobbers: 2048,
36386 outputs: []outputInfo{
36387 {0, 21503},
36388 },
36389 },
36390 },
36391 {
36392 name: "DIVD",
36393 argLen: 2,
36394 resultInArg0: true,
36395 clobberFlags: true,
36396 asm: s390x.ADIVD,
36397 reg: regInfo{
36398 inputs: []inputInfo{
36399 {0, 21503},
36400 {1, 21503},
36401 },
36402 clobbers: 2048,
36403 outputs: []outputInfo{
36404 {0, 21503},
36405 },
36406 },
36407 },
36408 {
36409 name: "DIVW",
36410 argLen: 2,
36411 resultInArg0: true,
36412 clobberFlags: true,
36413 asm: s390x.ADIVW,
36414 reg: regInfo{
36415 inputs: []inputInfo{
36416 {0, 21503},
36417 {1, 21503},
36418 },
36419 clobbers: 2048,
36420 outputs: []outputInfo{
36421 {0, 21503},
36422 },
36423 },
36424 },
36425 {
36426 name: "DIVDU",
36427 argLen: 2,
36428 resultInArg0: true,
36429 clobberFlags: true,
36430 asm: s390x.ADIVDU,
36431 reg: regInfo{
36432 inputs: []inputInfo{
36433 {0, 21503},
36434 {1, 21503},
36435 },
36436 clobbers: 2048,
36437 outputs: []outputInfo{
36438 {0, 21503},
36439 },
36440 },
36441 },
36442 {
36443 name: "DIVWU",
36444 argLen: 2,
36445 resultInArg0: true,
36446 clobberFlags: true,
36447 asm: s390x.ADIVWU,
36448 reg: regInfo{
36449 inputs: []inputInfo{
36450 {0, 21503},
36451 {1, 21503},
36452 },
36453 clobbers: 2048,
36454 outputs: []outputInfo{
36455 {0, 21503},
36456 },
36457 },
36458 },
36459 {
36460 name: "MODD",
36461 argLen: 2,
36462 resultInArg0: true,
36463 clobberFlags: true,
36464 asm: s390x.AMODD,
36465 reg: regInfo{
36466 inputs: []inputInfo{
36467 {0, 21503},
36468 {1, 21503},
36469 },
36470 clobbers: 2048,
36471 outputs: []outputInfo{
36472 {0, 21503},
36473 },
36474 },
36475 },
36476 {
36477 name: "MODW",
36478 argLen: 2,
36479 resultInArg0: true,
36480 clobberFlags: true,
36481 asm: s390x.AMODW,
36482 reg: regInfo{
36483 inputs: []inputInfo{
36484 {0, 21503},
36485 {1, 21503},
36486 },
36487 clobbers: 2048,
36488 outputs: []outputInfo{
36489 {0, 21503},
36490 },
36491 },
36492 },
36493 {
36494 name: "MODDU",
36495 argLen: 2,
36496 resultInArg0: true,
36497 clobberFlags: true,
36498 asm: s390x.AMODDU,
36499 reg: regInfo{
36500 inputs: []inputInfo{
36501 {0, 21503},
36502 {1, 21503},
36503 },
36504 clobbers: 2048,
36505 outputs: []outputInfo{
36506 {0, 21503},
36507 },
36508 },
36509 },
36510 {
36511 name: "MODWU",
36512 argLen: 2,
36513 resultInArg0: true,
36514 clobberFlags: true,
36515 asm: s390x.AMODWU,
36516 reg: regInfo{
36517 inputs: []inputInfo{
36518 {0, 21503},
36519 {1, 21503},
36520 },
36521 clobbers: 2048,
36522 outputs: []outputInfo{
36523 {0, 21503},
36524 },
36525 },
36526 },
36527 {
36528 name: "AND",
36529 argLen: 2,
36530 commutative: true,
36531 clobberFlags: true,
36532 asm: s390x.AAND,
36533 reg: regInfo{
36534 inputs: []inputInfo{
36535 {0, 23551},
36536 {1, 23551},
36537 },
36538 outputs: []outputInfo{
36539 {0, 23551},
36540 },
36541 },
36542 },
36543 {
36544 name: "ANDW",
36545 argLen: 2,
36546 commutative: true,
36547 clobberFlags: true,
36548 asm: s390x.AANDW,
36549 reg: regInfo{
36550 inputs: []inputInfo{
36551 {0, 23551},
36552 {1, 23551},
36553 },
36554 outputs: []outputInfo{
36555 {0, 23551},
36556 },
36557 },
36558 },
36559 {
36560 name: "ANDconst",
36561 auxType: auxInt64,
36562 argLen: 1,
36563 resultInArg0: true,
36564 clobberFlags: true,
36565 asm: s390x.AAND,
36566 reg: regInfo{
36567 inputs: []inputInfo{
36568 {0, 23551},
36569 },
36570 outputs: []outputInfo{
36571 {0, 23551},
36572 },
36573 },
36574 },
36575 {
36576 name: "ANDWconst",
36577 auxType: auxInt32,
36578 argLen: 1,
36579 resultInArg0: true,
36580 clobberFlags: true,
36581 asm: s390x.AANDW,
36582 reg: regInfo{
36583 inputs: []inputInfo{
36584 {0, 23551},
36585 },
36586 outputs: []outputInfo{
36587 {0, 23551},
36588 },
36589 },
36590 },
36591 {
36592 name: "ANDload",
36593 auxType: auxSymOff,
36594 argLen: 3,
36595 resultInArg0: true,
36596 clobberFlags: true,
36597 faultOnNilArg1: true,
36598 symEffect: SymRead,
36599 asm: s390x.AAND,
36600 reg: regInfo{
36601 inputs: []inputInfo{
36602 {0, 23551},
36603 {1, 56318},
36604 },
36605 outputs: []outputInfo{
36606 {0, 23551},
36607 },
36608 },
36609 },
36610 {
36611 name: "ANDWload",
36612 auxType: auxSymOff,
36613 argLen: 3,
36614 resultInArg0: true,
36615 clobberFlags: true,
36616 faultOnNilArg1: true,
36617 symEffect: SymRead,
36618 asm: s390x.AANDW,
36619 reg: regInfo{
36620 inputs: []inputInfo{
36621 {0, 23551},
36622 {1, 56318},
36623 },
36624 outputs: []outputInfo{
36625 {0, 23551},
36626 },
36627 },
36628 },
36629 {
36630 name: "OR",
36631 argLen: 2,
36632 commutative: true,
36633 clobberFlags: true,
36634 asm: s390x.AOR,
36635 reg: regInfo{
36636 inputs: []inputInfo{
36637 {0, 23551},
36638 {1, 23551},
36639 },
36640 outputs: []outputInfo{
36641 {0, 23551},
36642 },
36643 },
36644 },
36645 {
36646 name: "ORW",
36647 argLen: 2,
36648 commutative: true,
36649 clobberFlags: true,
36650 asm: s390x.AORW,
36651 reg: regInfo{
36652 inputs: []inputInfo{
36653 {0, 23551},
36654 {1, 23551},
36655 },
36656 outputs: []outputInfo{
36657 {0, 23551},
36658 },
36659 },
36660 },
36661 {
36662 name: "ORconst",
36663 auxType: auxInt64,
36664 argLen: 1,
36665 resultInArg0: true,
36666 clobberFlags: true,
36667 asm: s390x.AOR,
36668 reg: regInfo{
36669 inputs: []inputInfo{
36670 {0, 23551},
36671 },
36672 outputs: []outputInfo{
36673 {0, 23551},
36674 },
36675 },
36676 },
36677 {
36678 name: "ORWconst",
36679 auxType: auxInt32,
36680 argLen: 1,
36681 resultInArg0: true,
36682 clobberFlags: true,
36683 asm: s390x.AORW,
36684 reg: regInfo{
36685 inputs: []inputInfo{
36686 {0, 23551},
36687 },
36688 outputs: []outputInfo{
36689 {0, 23551},
36690 },
36691 },
36692 },
36693 {
36694 name: "ORload",
36695 auxType: auxSymOff,
36696 argLen: 3,
36697 resultInArg0: true,
36698 clobberFlags: true,
36699 faultOnNilArg1: true,
36700 symEffect: SymRead,
36701 asm: s390x.AOR,
36702 reg: regInfo{
36703 inputs: []inputInfo{
36704 {0, 23551},
36705 {1, 56318},
36706 },
36707 outputs: []outputInfo{
36708 {0, 23551},
36709 },
36710 },
36711 },
36712 {
36713 name: "ORWload",
36714 auxType: auxSymOff,
36715 argLen: 3,
36716 resultInArg0: true,
36717 clobberFlags: true,
36718 faultOnNilArg1: true,
36719 symEffect: SymRead,
36720 asm: s390x.AORW,
36721 reg: regInfo{
36722 inputs: []inputInfo{
36723 {0, 23551},
36724 {1, 56318},
36725 },
36726 outputs: []outputInfo{
36727 {0, 23551},
36728 },
36729 },
36730 },
36731 {
36732 name: "XOR",
36733 argLen: 2,
36734 commutative: true,
36735 clobberFlags: true,
36736 asm: s390x.AXOR,
36737 reg: regInfo{
36738 inputs: []inputInfo{
36739 {0, 23551},
36740 {1, 23551},
36741 },
36742 outputs: []outputInfo{
36743 {0, 23551},
36744 },
36745 },
36746 },
36747 {
36748 name: "XORW",
36749 argLen: 2,
36750 commutative: true,
36751 clobberFlags: true,
36752 asm: s390x.AXORW,
36753 reg: regInfo{
36754 inputs: []inputInfo{
36755 {0, 23551},
36756 {1, 23551},
36757 },
36758 outputs: []outputInfo{
36759 {0, 23551},
36760 },
36761 },
36762 },
36763 {
36764 name: "XORconst",
36765 auxType: auxInt64,
36766 argLen: 1,
36767 resultInArg0: true,
36768 clobberFlags: true,
36769 asm: s390x.AXOR,
36770 reg: regInfo{
36771 inputs: []inputInfo{
36772 {0, 23551},
36773 },
36774 outputs: []outputInfo{
36775 {0, 23551},
36776 },
36777 },
36778 },
36779 {
36780 name: "XORWconst",
36781 auxType: auxInt32,
36782 argLen: 1,
36783 resultInArg0: true,
36784 clobberFlags: true,
36785 asm: s390x.AXORW,
36786 reg: regInfo{
36787 inputs: []inputInfo{
36788 {0, 23551},
36789 },
36790 outputs: []outputInfo{
36791 {0, 23551},
36792 },
36793 },
36794 },
36795 {
36796 name: "XORload",
36797 auxType: auxSymOff,
36798 argLen: 3,
36799 resultInArg0: true,
36800 clobberFlags: true,
36801 faultOnNilArg1: true,
36802 symEffect: SymRead,
36803 asm: s390x.AXOR,
36804 reg: regInfo{
36805 inputs: []inputInfo{
36806 {0, 23551},
36807 {1, 56318},
36808 },
36809 outputs: []outputInfo{
36810 {0, 23551},
36811 },
36812 },
36813 },
36814 {
36815 name: "XORWload",
36816 auxType: auxSymOff,
36817 argLen: 3,
36818 resultInArg0: true,
36819 clobberFlags: true,
36820 faultOnNilArg1: true,
36821 symEffect: SymRead,
36822 asm: s390x.AXORW,
36823 reg: regInfo{
36824 inputs: []inputInfo{
36825 {0, 23551},
36826 {1, 56318},
36827 },
36828 outputs: []outputInfo{
36829 {0, 23551},
36830 },
36831 },
36832 },
36833 {
36834 name: "ADDC",
36835 argLen: 2,
36836 commutative: true,
36837 asm: s390x.AADDC,
36838 reg: regInfo{
36839 inputs: []inputInfo{
36840 {0, 23551},
36841 {1, 23551},
36842 },
36843 outputs: []outputInfo{
36844 {0, 23551},
36845 },
36846 },
36847 },
36848 {
36849 name: "ADDCconst",
36850 auxType: auxInt16,
36851 argLen: 1,
36852 asm: s390x.AADDC,
36853 reg: regInfo{
36854 inputs: []inputInfo{
36855 {0, 23551},
36856 },
36857 outputs: []outputInfo{
36858 {0, 23551},
36859 },
36860 },
36861 },
36862 {
36863 name: "ADDE",
36864 argLen: 3,
36865 commutative: true,
36866 resultInArg0: true,
36867 asm: s390x.AADDE,
36868 reg: regInfo{
36869 inputs: []inputInfo{
36870 {0, 23551},
36871 {1, 23551},
36872 },
36873 outputs: []outputInfo{
36874 {0, 23551},
36875 },
36876 },
36877 },
36878 {
36879 name: "SUBC",
36880 argLen: 2,
36881 asm: s390x.ASUBC,
36882 reg: regInfo{
36883 inputs: []inputInfo{
36884 {0, 23551},
36885 {1, 23551},
36886 },
36887 outputs: []outputInfo{
36888 {0, 23551},
36889 },
36890 },
36891 },
36892 {
36893 name: "SUBE",
36894 argLen: 3,
36895 resultInArg0: true,
36896 asm: s390x.ASUBE,
36897 reg: regInfo{
36898 inputs: []inputInfo{
36899 {0, 23551},
36900 {1, 23551},
36901 },
36902 outputs: []outputInfo{
36903 {0, 23551},
36904 },
36905 },
36906 },
36907 {
36908 name: "CMP",
36909 argLen: 2,
36910 asm: s390x.ACMP,
36911 reg: regInfo{
36912 inputs: []inputInfo{
36913 {0, 56319},
36914 {1, 56319},
36915 },
36916 },
36917 },
36918 {
36919 name: "CMPW",
36920 argLen: 2,
36921 asm: s390x.ACMPW,
36922 reg: regInfo{
36923 inputs: []inputInfo{
36924 {0, 56319},
36925 {1, 56319},
36926 },
36927 },
36928 },
36929 {
36930 name: "CMPU",
36931 argLen: 2,
36932 asm: s390x.ACMPU,
36933 reg: regInfo{
36934 inputs: []inputInfo{
36935 {0, 56319},
36936 {1, 56319},
36937 },
36938 },
36939 },
36940 {
36941 name: "CMPWU",
36942 argLen: 2,
36943 asm: s390x.ACMPWU,
36944 reg: regInfo{
36945 inputs: []inputInfo{
36946 {0, 56319},
36947 {1, 56319},
36948 },
36949 },
36950 },
36951 {
36952 name: "CMPconst",
36953 auxType: auxInt32,
36954 argLen: 1,
36955 asm: s390x.ACMP,
36956 reg: regInfo{
36957 inputs: []inputInfo{
36958 {0, 56319},
36959 },
36960 },
36961 },
36962 {
36963 name: "CMPWconst",
36964 auxType: auxInt32,
36965 argLen: 1,
36966 asm: s390x.ACMPW,
36967 reg: regInfo{
36968 inputs: []inputInfo{
36969 {0, 56319},
36970 },
36971 },
36972 },
36973 {
36974 name: "CMPUconst",
36975 auxType: auxInt32,
36976 argLen: 1,
36977 asm: s390x.ACMPU,
36978 reg: regInfo{
36979 inputs: []inputInfo{
36980 {0, 56319},
36981 },
36982 },
36983 },
36984 {
36985 name: "CMPWUconst",
36986 auxType: auxInt32,
36987 argLen: 1,
36988 asm: s390x.ACMPWU,
36989 reg: regInfo{
36990 inputs: []inputInfo{
36991 {0, 56319},
36992 },
36993 },
36994 },
36995 {
36996 name: "FCMPS",
36997 argLen: 2,
36998 asm: s390x.ACEBR,
36999 reg: regInfo{
37000 inputs: []inputInfo{
37001 {0, 4294901760},
37002 {1, 4294901760},
37003 },
37004 },
37005 },
37006 {
37007 name: "FCMP",
37008 argLen: 2,
37009 asm: s390x.AFCMPU,
37010 reg: regInfo{
37011 inputs: []inputInfo{
37012 {0, 4294901760},
37013 {1, 4294901760},
37014 },
37015 },
37016 },
37017 {
37018 name: "LTDBR",
37019 argLen: 1,
37020 asm: s390x.ALTDBR,
37021 reg: regInfo{
37022 inputs: []inputInfo{
37023 {0, 4294901760},
37024 },
37025 },
37026 },
37027 {
37028 name: "LTEBR",
37029 argLen: 1,
37030 asm: s390x.ALTEBR,
37031 reg: regInfo{
37032 inputs: []inputInfo{
37033 {0, 4294901760},
37034 },
37035 },
37036 },
37037 {
37038 name: "SLD",
37039 argLen: 2,
37040 asm: s390x.ASLD,
37041 reg: regInfo{
37042 inputs: []inputInfo{
37043 {1, 23550},
37044 {0, 23551},
37045 },
37046 outputs: []outputInfo{
37047 {0, 23551},
37048 },
37049 },
37050 },
37051 {
37052 name: "SLW",
37053 argLen: 2,
37054 asm: s390x.ASLW,
37055 reg: regInfo{
37056 inputs: []inputInfo{
37057 {1, 23550},
37058 {0, 23551},
37059 },
37060 outputs: []outputInfo{
37061 {0, 23551},
37062 },
37063 },
37064 },
37065 {
37066 name: "SLDconst",
37067 auxType: auxUInt8,
37068 argLen: 1,
37069 asm: s390x.ASLD,
37070 reg: regInfo{
37071 inputs: []inputInfo{
37072 {0, 23551},
37073 },
37074 outputs: []outputInfo{
37075 {0, 23551},
37076 },
37077 },
37078 },
37079 {
37080 name: "SLWconst",
37081 auxType: auxUInt8,
37082 argLen: 1,
37083 asm: s390x.ASLW,
37084 reg: regInfo{
37085 inputs: []inputInfo{
37086 {0, 23551},
37087 },
37088 outputs: []outputInfo{
37089 {0, 23551},
37090 },
37091 },
37092 },
37093 {
37094 name: "SRD",
37095 argLen: 2,
37096 asm: s390x.ASRD,
37097 reg: regInfo{
37098 inputs: []inputInfo{
37099 {1, 23550},
37100 {0, 23551},
37101 },
37102 outputs: []outputInfo{
37103 {0, 23551},
37104 },
37105 },
37106 },
37107 {
37108 name: "SRW",
37109 argLen: 2,
37110 asm: s390x.ASRW,
37111 reg: regInfo{
37112 inputs: []inputInfo{
37113 {1, 23550},
37114 {0, 23551},
37115 },
37116 outputs: []outputInfo{
37117 {0, 23551},
37118 },
37119 },
37120 },
37121 {
37122 name: "SRDconst",
37123 auxType: auxUInt8,
37124 argLen: 1,
37125 asm: s390x.ASRD,
37126 reg: regInfo{
37127 inputs: []inputInfo{
37128 {0, 23551},
37129 },
37130 outputs: []outputInfo{
37131 {0, 23551},
37132 },
37133 },
37134 },
37135 {
37136 name: "SRWconst",
37137 auxType: auxUInt8,
37138 argLen: 1,
37139 asm: s390x.ASRW,
37140 reg: regInfo{
37141 inputs: []inputInfo{
37142 {0, 23551},
37143 },
37144 outputs: []outputInfo{
37145 {0, 23551},
37146 },
37147 },
37148 },
37149 {
37150 name: "SRAD",
37151 argLen: 2,
37152 clobberFlags: true,
37153 asm: s390x.ASRAD,
37154 reg: regInfo{
37155 inputs: []inputInfo{
37156 {1, 23550},
37157 {0, 23551},
37158 },
37159 outputs: []outputInfo{
37160 {0, 23551},
37161 },
37162 },
37163 },
37164 {
37165 name: "SRAW",
37166 argLen: 2,
37167 clobberFlags: true,
37168 asm: s390x.ASRAW,
37169 reg: regInfo{
37170 inputs: []inputInfo{
37171 {1, 23550},
37172 {0, 23551},
37173 },
37174 outputs: []outputInfo{
37175 {0, 23551},
37176 },
37177 },
37178 },
37179 {
37180 name: "SRADconst",
37181 auxType: auxUInt8,
37182 argLen: 1,
37183 clobberFlags: true,
37184 asm: s390x.ASRAD,
37185 reg: regInfo{
37186 inputs: []inputInfo{
37187 {0, 23551},
37188 },
37189 outputs: []outputInfo{
37190 {0, 23551},
37191 },
37192 },
37193 },
37194 {
37195 name: "SRAWconst",
37196 auxType: auxUInt8,
37197 argLen: 1,
37198 clobberFlags: true,
37199 asm: s390x.ASRAW,
37200 reg: regInfo{
37201 inputs: []inputInfo{
37202 {0, 23551},
37203 },
37204 outputs: []outputInfo{
37205 {0, 23551},
37206 },
37207 },
37208 },
37209 {
37210 name: "RLLG",
37211 argLen: 2,
37212 asm: s390x.ARLLG,
37213 reg: regInfo{
37214 inputs: []inputInfo{
37215 {1, 23550},
37216 {0, 23551},
37217 },
37218 outputs: []outputInfo{
37219 {0, 23551},
37220 },
37221 },
37222 },
37223 {
37224 name: "RLL",
37225 argLen: 2,
37226 asm: s390x.ARLL,
37227 reg: regInfo{
37228 inputs: []inputInfo{
37229 {1, 23550},
37230 {0, 23551},
37231 },
37232 outputs: []outputInfo{
37233 {0, 23551},
37234 },
37235 },
37236 },
37237 {
37238 name: "RLLconst",
37239 auxType: auxUInt8,
37240 argLen: 1,
37241 asm: s390x.ARLL,
37242 reg: regInfo{
37243 inputs: []inputInfo{
37244 {0, 23551},
37245 },
37246 outputs: []outputInfo{
37247 {0, 23551},
37248 },
37249 },
37250 },
37251 {
37252 name: "RXSBG",
37253 auxType: auxS390XRotateParams,
37254 argLen: 2,
37255 resultInArg0: true,
37256 clobberFlags: true,
37257 asm: s390x.ARXSBG,
37258 reg: regInfo{
37259 inputs: []inputInfo{
37260 {0, 23551},
37261 {1, 23551},
37262 },
37263 outputs: []outputInfo{
37264 {0, 23551},
37265 },
37266 },
37267 },
37268 {
37269 name: "RISBGZ",
37270 auxType: auxS390XRotateParams,
37271 argLen: 1,
37272 clobberFlags: true,
37273 asm: s390x.ARISBGZ,
37274 reg: regInfo{
37275 inputs: []inputInfo{
37276 {0, 23551},
37277 },
37278 outputs: []outputInfo{
37279 {0, 23551},
37280 },
37281 },
37282 },
37283 {
37284 name: "NEG",
37285 argLen: 1,
37286 clobberFlags: true,
37287 asm: s390x.ANEG,
37288 reg: regInfo{
37289 inputs: []inputInfo{
37290 {0, 23551},
37291 },
37292 outputs: []outputInfo{
37293 {0, 23551},
37294 },
37295 },
37296 },
37297 {
37298 name: "NEGW",
37299 argLen: 1,
37300 clobberFlags: true,
37301 asm: s390x.ANEGW,
37302 reg: regInfo{
37303 inputs: []inputInfo{
37304 {0, 23551},
37305 },
37306 outputs: []outputInfo{
37307 {0, 23551},
37308 },
37309 },
37310 },
37311 {
37312 name: "NOT",
37313 argLen: 1,
37314 resultInArg0: true,
37315 clobberFlags: true,
37316 reg: regInfo{
37317 inputs: []inputInfo{
37318 {0, 23551},
37319 },
37320 outputs: []outputInfo{
37321 {0, 23551},
37322 },
37323 },
37324 },
37325 {
37326 name: "NOTW",
37327 argLen: 1,
37328 resultInArg0: true,
37329 clobberFlags: true,
37330 reg: regInfo{
37331 inputs: []inputInfo{
37332 {0, 23551},
37333 },
37334 outputs: []outputInfo{
37335 {0, 23551},
37336 },
37337 },
37338 },
37339 {
37340 name: "FSQRT",
37341 argLen: 1,
37342 asm: s390x.AFSQRT,
37343 reg: regInfo{
37344 inputs: []inputInfo{
37345 {0, 4294901760},
37346 },
37347 outputs: []outputInfo{
37348 {0, 4294901760},
37349 },
37350 },
37351 },
37352 {
37353 name: "FSQRTS",
37354 argLen: 1,
37355 asm: s390x.AFSQRTS,
37356 reg: regInfo{
37357 inputs: []inputInfo{
37358 {0, 4294901760},
37359 },
37360 outputs: []outputInfo{
37361 {0, 4294901760},
37362 },
37363 },
37364 },
37365 {
37366 name: "LOCGR",
37367 auxType: auxS390XCCMask,
37368 argLen: 3,
37369 resultInArg0: true,
37370 asm: s390x.ALOCGR,
37371 reg: regInfo{
37372 inputs: []inputInfo{
37373 {0, 23551},
37374 {1, 23551},
37375 },
37376 outputs: []outputInfo{
37377 {0, 23551},
37378 },
37379 },
37380 },
37381 {
37382 name: "MOVBreg",
37383 argLen: 1,
37384 asm: s390x.AMOVB,
37385 reg: regInfo{
37386 inputs: []inputInfo{
37387 {0, 56319},
37388 },
37389 outputs: []outputInfo{
37390 {0, 23551},
37391 },
37392 },
37393 },
37394 {
37395 name: "MOVBZreg",
37396 argLen: 1,
37397 asm: s390x.AMOVBZ,
37398 reg: regInfo{
37399 inputs: []inputInfo{
37400 {0, 56319},
37401 },
37402 outputs: []outputInfo{
37403 {0, 23551},
37404 },
37405 },
37406 },
37407 {
37408 name: "MOVHreg",
37409 argLen: 1,
37410 asm: s390x.AMOVH,
37411 reg: regInfo{
37412 inputs: []inputInfo{
37413 {0, 56319},
37414 },
37415 outputs: []outputInfo{
37416 {0, 23551},
37417 },
37418 },
37419 },
37420 {
37421 name: "MOVHZreg",
37422 argLen: 1,
37423 asm: s390x.AMOVHZ,
37424 reg: regInfo{
37425 inputs: []inputInfo{
37426 {0, 56319},
37427 },
37428 outputs: []outputInfo{
37429 {0, 23551},
37430 },
37431 },
37432 },
37433 {
37434 name: "MOVWreg",
37435 argLen: 1,
37436 asm: s390x.AMOVW,
37437 reg: regInfo{
37438 inputs: []inputInfo{
37439 {0, 56319},
37440 },
37441 outputs: []outputInfo{
37442 {0, 23551},
37443 },
37444 },
37445 },
37446 {
37447 name: "MOVWZreg",
37448 argLen: 1,
37449 asm: s390x.AMOVWZ,
37450 reg: regInfo{
37451 inputs: []inputInfo{
37452 {0, 56319},
37453 },
37454 outputs: []outputInfo{
37455 {0, 23551},
37456 },
37457 },
37458 },
37459 {
37460 name: "MOVDconst",
37461 auxType: auxInt64,
37462 argLen: 0,
37463 rematerializeable: true,
37464 asm: s390x.AMOVD,
37465 reg: regInfo{
37466 outputs: []outputInfo{
37467 {0, 23551},
37468 },
37469 },
37470 },
37471 {
37472 name: "LDGR",
37473 argLen: 1,
37474 asm: s390x.ALDGR,
37475 reg: regInfo{
37476 inputs: []inputInfo{
37477 {0, 23551},
37478 },
37479 outputs: []outputInfo{
37480 {0, 4294901760},
37481 },
37482 },
37483 },
37484 {
37485 name: "LGDR",
37486 argLen: 1,
37487 asm: s390x.ALGDR,
37488 reg: regInfo{
37489 inputs: []inputInfo{
37490 {0, 4294901760},
37491 },
37492 outputs: []outputInfo{
37493 {0, 23551},
37494 },
37495 },
37496 },
37497 {
37498 name: "CFDBRA",
37499 argLen: 1,
37500 clobberFlags: true,
37501 asm: s390x.ACFDBRA,
37502 reg: regInfo{
37503 inputs: []inputInfo{
37504 {0, 4294901760},
37505 },
37506 outputs: []outputInfo{
37507 {0, 23551},
37508 },
37509 },
37510 },
37511 {
37512 name: "CGDBRA",
37513 argLen: 1,
37514 clobberFlags: true,
37515 asm: s390x.ACGDBRA,
37516 reg: regInfo{
37517 inputs: []inputInfo{
37518 {0, 4294901760},
37519 },
37520 outputs: []outputInfo{
37521 {0, 23551},
37522 },
37523 },
37524 },
37525 {
37526 name: "CFEBRA",
37527 argLen: 1,
37528 clobberFlags: true,
37529 asm: s390x.ACFEBRA,
37530 reg: regInfo{
37531 inputs: []inputInfo{
37532 {0, 4294901760},
37533 },
37534 outputs: []outputInfo{
37535 {0, 23551},
37536 },
37537 },
37538 },
37539 {
37540 name: "CGEBRA",
37541 argLen: 1,
37542 clobberFlags: true,
37543 asm: s390x.ACGEBRA,
37544 reg: regInfo{
37545 inputs: []inputInfo{
37546 {0, 4294901760},
37547 },
37548 outputs: []outputInfo{
37549 {0, 23551},
37550 },
37551 },
37552 },
37553 {
37554 name: "CEFBRA",
37555 argLen: 1,
37556 clobberFlags: true,
37557 asm: s390x.ACEFBRA,
37558 reg: regInfo{
37559 inputs: []inputInfo{
37560 {0, 23551},
37561 },
37562 outputs: []outputInfo{
37563 {0, 4294901760},
37564 },
37565 },
37566 },
37567 {
37568 name: "CDFBRA",
37569 argLen: 1,
37570 clobberFlags: true,
37571 asm: s390x.ACDFBRA,
37572 reg: regInfo{
37573 inputs: []inputInfo{
37574 {0, 23551},
37575 },
37576 outputs: []outputInfo{
37577 {0, 4294901760},
37578 },
37579 },
37580 },
37581 {
37582 name: "CEGBRA",
37583 argLen: 1,
37584 clobberFlags: true,
37585 asm: s390x.ACEGBRA,
37586 reg: regInfo{
37587 inputs: []inputInfo{
37588 {0, 23551},
37589 },
37590 outputs: []outputInfo{
37591 {0, 4294901760},
37592 },
37593 },
37594 },
37595 {
37596 name: "CDGBRA",
37597 argLen: 1,
37598 clobberFlags: true,
37599 asm: s390x.ACDGBRA,
37600 reg: regInfo{
37601 inputs: []inputInfo{
37602 {0, 23551},
37603 },
37604 outputs: []outputInfo{
37605 {0, 4294901760},
37606 },
37607 },
37608 },
37609 {
37610 name: "CLFEBR",
37611 argLen: 1,
37612 clobberFlags: true,
37613 asm: s390x.ACLFEBR,
37614 reg: regInfo{
37615 inputs: []inputInfo{
37616 {0, 4294901760},
37617 },
37618 outputs: []outputInfo{
37619 {0, 23551},
37620 },
37621 },
37622 },
37623 {
37624 name: "CLFDBR",
37625 argLen: 1,
37626 clobberFlags: true,
37627 asm: s390x.ACLFDBR,
37628 reg: regInfo{
37629 inputs: []inputInfo{
37630 {0, 4294901760},
37631 },
37632 outputs: []outputInfo{
37633 {0, 23551},
37634 },
37635 },
37636 },
37637 {
37638 name: "CLGEBR",
37639 argLen: 1,
37640 clobberFlags: true,
37641 asm: s390x.ACLGEBR,
37642 reg: regInfo{
37643 inputs: []inputInfo{
37644 {0, 4294901760},
37645 },
37646 outputs: []outputInfo{
37647 {0, 23551},
37648 },
37649 },
37650 },
37651 {
37652 name: "CLGDBR",
37653 argLen: 1,
37654 clobberFlags: true,
37655 asm: s390x.ACLGDBR,
37656 reg: regInfo{
37657 inputs: []inputInfo{
37658 {0, 4294901760},
37659 },
37660 outputs: []outputInfo{
37661 {0, 23551},
37662 },
37663 },
37664 },
37665 {
37666 name: "CELFBR",
37667 argLen: 1,
37668 clobberFlags: true,
37669 asm: s390x.ACELFBR,
37670 reg: regInfo{
37671 inputs: []inputInfo{
37672 {0, 23551},
37673 },
37674 outputs: []outputInfo{
37675 {0, 4294901760},
37676 },
37677 },
37678 },
37679 {
37680 name: "CDLFBR",
37681 argLen: 1,
37682 clobberFlags: true,
37683 asm: s390x.ACDLFBR,
37684 reg: regInfo{
37685 inputs: []inputInfo{
37686 {0, 23551},
37687 },
37688 outputs: []outputInfo{
37689 {0, 4294901760},
37690 },
37691 },
37692 },
37693 {
37694 name: "CELGBR",
37695 argLen: 1,
37696 clobberFlags: true,
37697 asm: s390x.ACELGBR,
37698 reg: regInfo{
37699 inputs: []inputInfo{
37700 {0, 23551},
37701 },
37702 outputs: []outputInfo{
37703 {0, 4294901760},
37704 },
37705 },
37706 },
37707 {
37708 name: "CDLGBR",
37709 argLen: 1,
37710 clobberFlags: true,
37711 asm: s390x.ACDLGBR,
37712 reg: regInfo{
37713 inputs: []inputInfo{
37714 {0, 23551},
37715 },
37716 outputs: []outputInfo{
37717 {0, 4294901760},
37718 },
37719 },
37720 },
37721 {
37722 name: "LEDBR",
37723 argLen: 1,
37724 asm: s390x.ALEDBR,
37725 reg: regInfo{
37726 inputs: []inputInfo{
37727 {0, 4294901760},
37728 },
37729 outputs: []outputInfo{
37730 {0, 4294901760},
37731 },
37732 },
37733 },
37734 {
37735 name: "LDEBR",
37736 argLen: 1,
37737 asm: s390x.ALDEBR,
37738 reg: regInfo{
37739 inputs: []inputInfo{
37740 {0, 4294901760},
37741 },
37742 outputs: []outputInfo{
37743 {0, 4294901760},
37744 },
37745 },
37746 },
37747 {
37748 name: "MOVDaddr",
37749 auxType: auxSymOff,
37750 argLen: 1,
37751 rematerializeable: true,
37752 symEffect: SymAddr,
37753 reg: regInfo{
37754 inputs: []inputInfo{
37755 {0, 4295000064},
37756 },
37757 outputs: []outputInfo{
37758 {0, 23551},
37759 },
37760 },
37761 },
37762 {
37763 name: "MOVDaddridx",
37764 auxType: auxSymOff,
37765 argLen: 2,
37766 symEffect: SymAddr,
37767 reg: regInfo{
37768 inputs: []inputInfo{
37769 {0, 4295000064},
37770 {1, 56318},
37771 },
37772 outputs: []outputInfo{
37773 {0, 23551},
37774 },
37775 },
37776 },
37777 {
37778 name: "MOVBZload",
37779 auxType: auxSymOff,
37780 argLen: 2,
37781 faultOnNilArg0: true,
37782 symEffect: SymRead,
37783 asm: s390x.AMOVBZ,
37784 reg: regInfo{
37785 inputs: []inputInfo{
37786 {0, 4295023614},
37787 },
37788 outputs: []outputInfo{
37789 {0, 23551},
37790 },
37791 },
37792 },
37793 {
37794 name: "MOVBload",
37795 auxType: auxSymOff,
37796 argLen: 2,
37797 faultOnNilArg0: true,
37798 symEffect: SymRead,
37799 asm: s390x.AMOVB,
37800 reg: regInfo{
37801 inputs: []inputInfo{
37802 {0, 4295023614},
37803 },
37804 outputs: []outputInfo{
37805 {0, 23551},
37806 },
37807 },
37808 },
37809 {
37810 name: "MOVHZload",
37811 auxType: auxSymOff,
37812 argLen: 2,
37813 faultOnNilArg0: true,
37814 symEffect: SymRead,
37815 asm: s390x.AMOVHZ,
37816 reg: regInfo{
37817 inputs: []inputInfo{
37818 {0, 4295023614},
37819 },
37820 outputs: []outputInfo{
37821 {0, 23551},
37822 },
37823 },
37824 },
37825 {
37826 name: "MOVHload",
37827 auxType: auxSymOff,
37828 argLen: 2,
37829 faultOnNilArg0: true,
37830 symEffect: SymRead,
37831 asm: s390x.AMOVH,
37832 reg: regInfo{
37833 inputs: []inputInfo{
37834 {0, 4295023614},
37835 },
37836 outputs: []outputInfo{
37837 {0, 23551},
37838 },
37839 },
37840 },
37841 {
37842 name: "MOVWZload",
37843 auxType: auxSymOff,
37844 argLen: 2,
37845 faultOnNilArg0: true,
37846 symEffect: SymRead,
37847 asm: s390x.AMOVWZ,
37848 reg: regInfo{
37849 inputs: []inputInfo{
37850 {0, 4295023614},
37851 },
37852 outputs: []outputInfo{
37853 {0, 23551},
37854 },
37855 },
37856 },
37857 {
37858 name: "MOVWload",
37859 auxType: auxSymOff,
37860 argLen: 2,
37861 faultOnNilArg0: true,
37862 symEffect: SymRead,
37863 asm: s390x.AMOVW,
37864 reg: regInfo{
37865 inputs: []inputInfo{
37866 {0, 4295023614},
37867 },
37868 outputs: []outputInfo{
37869 {0, 23551},
37870 },
37871 },
37872 },
37873 {
37874 name: "MOVDload",
37875 auxType: auxSymOff,
37876 argLen: 2,
37877 faultOnNilArg0: true,
37878 symEffect: SymRead,
37879 asm: s390x.AMOVD,
37880 reg: regInfo{
37881 inputs: []inputInfo{
37882 {0, 4295023614},
37883 },
37884 outputs: []outputInfo{
37885 {0, 23551},
37886 },
37887 },
37888 },
37889 {
37890 name: "MOVWBR",
37891 argLen: 1,
37892 asm: s390x.AMOVWBR,
37893 reg: regInfo{
37894 inputs: []inputInfo{
37895 {0, 23551},
37896 },
37897 outputs: []outputInfo{
37898 {0, 23551},
37899 },
37900 },
37901 },
37902 {
37903 name: "MOVDBR",
37904 argLen: 1,
37905 asm: s390x.AMOVDBR,
37906 reg: regInfo{
37907 inputs: []inputInfo{
37908 {0, 23551},
37909 },
37910 outputs: []outputInfo{
37911 {0, 23551},
37912 },
37913 },
37914 },
37915 {
37916 name: "MOVHBRload",
37917 auxType: auxSymOff,
37918 argLen: 2,
37919 faultOnNilArg0: true,
37920 symEffect: SymRead,
37921 asm: s390x.AMOVHBR,
37922 reg: regInfo{
37923 inputs: []inputInfo{
37924 {0, 4295023614},
37925 },
37926 outputs: []outputInfo{
37927 {0, 23551},
37928 },
37929 },
37930 },
37931 {
37932 name: "MOVWBRload",
37933 auxType: auxSymOff,
37934 argLen: 2,
37935 faultOnNilArg0: true,
37936 symEffect: SymRead,
37937 asm: s390x.AMOVWBR,
37938 reg: regInfo{
37939 inputs: []inputInfo{
37940 {0, 4295023614},
37941 },
37942 outputs: []outputInfo{
37943 {0, 23551},
37944 },
37945 },
37946 },
37947 {
37948 name: "MOVDBRload",
37949 auxType: auxSymOff,
37950 argLen: 2,
37951 faultOnNilArg0: true,
37952 symEffect: SymRead,
37953 asm: s390x.AMOVDBR,
37954 reg: regInfo{
37955 inputs: []inputInfo{
37956 {0, 4295023614},
37957 },
37958 outputs: []outputInfo{
37959 {0, 23551},
37960 },
37961 },
37962 },
37963 {
37964 name: "MOVBstore",
37965 auxType: auxSymOff,
37966 argLen: 3,
37967 faultOnNilArg0: true,
37968 symEffect: SymWrite,
37969 asm: s390x.AMOVB,
37970 reg: regInfo{
37971 inputs: []inputInfo{
37972 {0, 4295023614},
37973 {1, 56319},
37974 },
37975 },
37976 },
37977 {
37978 name: "MOVHstore",
37979 auxType: auxSymOff,
37980 argLen: 3,
37981 faultOnNilArg0: true,
37982 symEffect: SymWrite,
37983 asm: s390x.AMOVH,
37984 reg: regInfo{
37985 inputs: []inputInfo{
37986 {0, 4295023614},
37987 {1, 56319},
37988 },
37989 },
37990 },
37991 {
37992 name: "MOVWstore",
37993 auxType: auxSymOff,
37994 argLen: 3,
37995 faultOnNilArg0: true,
37996 symEffect: SymWrite,
37997 asm: s390x.AMOVW,
37998 reg: regInfo{
37999 inputs: []inputInfo{
38000 {0, 4295023614},
38001 {1, 56319},
38002 },
38003 },
38004 },
38005 {
38006 name: "MOVDstore",
38007 auxType: auxSymOff,
38008 argLen: 3,
38009 faultOnNilArg0: true,
38010 symEffect: SymWrite,
38011 asm: s390x.AMOVD,
38012 reg: regInfo{
38013 inputs: []inputInfo{
38014 {0, 4295023614},
38015 {1, 56319},
38016 },
38017 },
38018 },
38019 {
38020 name: "MOVHBRstore",
38021 auxType: auxSymOff,
38022 argLen: 3,
38023 faultOnNilArg0: true,
38024 symEffect: SymWrite,
38025 asm: s390x.AMOVHBR,
38026 reg: regInfo{
38027 inputs: []inputInfo{
38028 {0, 56318},
38029 {1, 56319},
38030 },
38031 },
38032 },
38033 {
38034 name: "MOVWBRstore",
38035 auxType: auxSymOff,
38036 argLen: 3,
38037 faultOnNilArg0: true,
38038 symEffect: SymWrite,
38039 asm: s390x.AMOVWBR,
38040 reg: regInfo{
38041 inputs: []inputInfo{
38042 {0, 56318},
38043 {1, 56319},
38044 },
38045 },
38046 },
38047 {
38048 name: "MOVDBRstore",
38049 auxType: auxSymOff,
38050 argLen: 3,
38051 faultOnNilArg0: true,
38052 symEffect: SymWrite,
38053 asm: s390x.AMOVDBR,
38054 reg: regInfo{
38055 inputs: []inputInfo{
38056 {0, 56318},
38057 {1, 56319},
38058 },
38059 },
38060 },
38061 {
38062 name: "MVC",
38063 auxType: auxSymValAndOff,
38064 argLen: 3,
38065 clobberFlags: true,
38066 faultOnNilArg0: true,
38067 faultOnNilArg1: true,
38068 symEffect: SymNone,
38069 asm: s390x.AMVC,
38070 reg: regInfo{
38071 inputs: []inputInfo{
38072 {0, 56318},
38073 {1, 56318},
38074 },
38075 },
38076 },
38077 {
38078 name: "MOVBZloadidx",
38079 auxType: auxSymOff,
38080 argLen: 3,
38081 commutative: true,
38082 symEffect: SymRead,
38083 asm: s390x.AMOVBZ,
38084 reg: regInfo{
38085 inputs: []inputInfo{
38086 {1, 56318},
38087 {0, 4295023614},
38088 },
38089 outputs: []outputInfo{
38090 {0, 23551},
38091 },
38092 },
38093 },
38094 {
38095 name: "MOVBloadidx",
38096 auxType: auxSymOff,
38097 argLen: 3,
38098 commutative: true,
38099 symEffect: SymRead,
38100 asm: s390x.AMOVB,
38101 reg: regInfo{
38102 inputs: []inputInfo{
38103 {1, 56318},
38104 {0, 4295023614},
38105 },
38106 outputs: []outputInfo{
38107 {0, 23551},
38108 },
38109 },
38110 },
38111 {
38112 name: "MOVHZloadidx",
38113 auxType: auxSymOff,
38114 argLen: 3,
38115 commutative: true,
38116 symEffect: SymRead,
38117 asm: s390x.AMOVHZ,
38118 reg: regInfo{
38119 inputs: []inputInfo{
38120 {1, 56318},
38121 {0, 4295023614},
38122 },
38123 outputs: []outputInfo{
38124 {0, 23551},
38125 },
38126 },
38127 },
38128 {
38129 name: "MOVHloadidx",
38130 auxType: auxSymOff,
38131 argLen: 3,
38132 commutative: true,
38133 symEffect: SymRead,
38134 asm: s390x.AMOVH,
38135 reg: regInfo{
38136 inputs: []inputInfo{
38137 {1, 56318},
38138 {0, 4295023614},
38139 },
38140 outputs: []outputInfo{
38141 {0, 23551},
38142 },
38143 },
38144 },
38145 {
38146 name: "MOVWZloadidx",
38147 auxType: auxSymOff,
38148 argLen: 3,
38149 commutative: true,
38150 symEffect: SymRead,
38151 asm: s390x.AMOVWZ,
38152 reg: regInfo{
38153 inputs: []inputInfo{
38154 {1, 56318},
38155 {0, 4295023614},
38156 },
38157 outputs: []outputInfo{
38158 {0, 23551},
38159 },
38160 },
38161 },
38162 {
38163 name: "MOVWloadidx",
38164 auxType: auxSymOff,
38165 argLen: 3,
38166 commutative: true,
38167 symEffect: SymRead,
38168 asm: s390x.AMOVW,
38169 reg: regInfo{
38170 inputs: []inputInfo{
38171 {1, 56318},
38172 {0, 4295023614},
38173 },
38174 outputs: []outputInfo{
38175 {0, 23551},
38176 },
38177 },
38178 },
38179 {
38180 name: "MOVDloadidx",
38181 auxType: auxSymOff,
38182 argLen: 3,
38183 commutative: true,
38184 symEffect: SymRead,
38185 asm: s390x.AMOVD,
38186 reg: regInfo{
38187 inputs: []inputInfo{
38188 {1, 56318},
38189 {0, 4295023614},
38190 },
38191 outputs: []outputInfo{
38192 {0, 23551},
38193 },
38194 },
38195 },
38196 {
38197 name: "MOVHBRloadidx",
38198 auxType: auxSymOff,
38199 argLen: 3,
38200 commutative: true,
38201 symEffect: SymRead,
38202 asm: s390x.AMOVHBR,
38203 reg: regInfo{
38204 inputs: []inputInfo{
38205 {1, 56318},
38206 {0, 4295023614},
38207 },
38208 outputs: []outputInfo{
38209 {0, 23551},
38210 },
38211 },
38212 },
38213 {
38214 name: "MOVWBRloadidx",
38215 auxType: auxSymOff,
38216 argLen: 3,
38217 commutative: true,
38218 symEffect: SymRead,
38219 asm: s390x.AMOVWBR,
38220 reg: regInfo{
38221 inputs: []inputInfo{
38222 {1, 56318},
38223 {0, 4295023614},
38224 },
38225 outputs: []outputInfo{
38226 {0, 23551},
38227 },
38228 },
38229 },
38230 {
38231 name: "MOVDBRloadidx",
38232 auxType: auxSymOff,
38233 argLen: 3,
38234 commutative: true,
38235 symEffect: SymRead,
38236 asm: s390x.AMOVDBR,
38237 reg: regInfo{
38238 inputs: []inputInfo{
38239 {1, 56318},
38240 {0, 4295023614},
38241 },
38242 outputs: []outputInfo{
38243 {0, 23551},
38244 },
38245 },
38246 },
38247 {
38248 name: "MOVBstoreidx",
38249 auxType: auxSymOff,
38250 argLen: 4,
38251 commutative: true,
38252 symEffect: SymWrite,
38253 asm: s390x.AMOVB,
38254 reg: regInfo{
38255 inputs: []inputInfo{
38256 {0, 56318},
38257 {1, 56318},
38258 {2, 56319},
38259 },
38260 },
38261 },
38262 {
38263 name: "MOVHstoreidx",
38264 auxType: auxSymOff,
38265 argLen: 4,
38266 commutative: true,
38267 symEffect: SymWrite,
38268 asm: s390x.AMOVH,
38269 reg: regInfo{
38270 inputs: []inputInfo{
38271 {0, 56318},
38272 {1, 56318},
38273 {2, 56319},
38274 },
38275 },
38276 },
38277 {
38278 name: "MOVWstoreidx",
38279 auxType: auxSymOff,
38280 argLen: 4,
38281 commutative: true,
38282 symEffect: SymWrite,
38283 asm: s390x.AMOVW,
38284 reg: regInfo{
38285 inputs: []inputInfo{
38286 {0, 56318},
38287 {1, 56318},
38288 {2, 56319},
38289 },
38290 },
38291 },
38292 {
38293 name: "MOVDstoreidx",
38294 auxType: auxSymOff,
38295 argLen: 4,
38296 commutative: true,
38297 symEffect: SymWrite,
38298 asm: s390x.AMOVD,
38299 reg: regInfo{
38300 inputs: []inputInfo{
38301 {0, 56318},
38302 {1, 56318},
38303 {2, 56319},
38304 },
38305 },
38306 },
38307 {
38308 name: "MOVHBRstoreidx",
38309 auxType: auxSymOff,
38310 argLen: 4,
38311 commutative: true,
38312 symEffect: SymWrite,
38313 asm: s390x.AMOVHBR,
38314 reg: regInfo{
38315 inputs: []inputInfo{
38316 {0, 56318},
38317 {1, 56318},
38318 {2, 56319},
38319 },
38320 },
38321 },
38322 {
38323 name: "MOVWBRstoreidx",
38324 auxType: auxSymOff,
38325 argLen: 4,
38326 commutative: true,
38327 symEffect: SymWrite,
38328 asm: s390x.AMOVWBR,
38329 reg: regInfo{
38330 inputs: []inputInfo{
38331 {0, 56318},
38332 {1, 56318},
38333 {2, 56319},
38334 },
38335 },
38336 },
38337 {
38338 name: "MOVDBRstoreidx",
38339 auxType: auxSymOff,
38340 argLen: 4,
38341 commutative: true,
38342 symEffect: SymWrite,
38343 asm: s390x.AMOVDBR,
38344 reg: regInfo{
38345 inputs: []inputInfo{
38346 {0, 56318},
38347 {1, 56318},
38348 {2, 56319},
38349 },
38350 },
38351 },
38352 {
38353 name: "MOVBstoreconst",
38354 auxType: auxSymValAndOff,
38355 argLen: 2,
38356 faultOnNilArg0: true,
38357 symEffect: SymWrite,
38358 asm: s390x.AMOVB,
38359 reg: regInfo{
38360 inputs: []inputInfo{
38361 {0, 4295023614},
38362 },
38363 },
38364 },
38365 {
38366 name: "MOVHstoreconst",
38367 auxType: auxSymValAndOff,
38368 argLen: 2,
38369 faultOnNilArg0: true,
38370 symEffect: SymWrite,
38371 asm: s390x.AMOVH,
38372 reg: regInfo{
38373 inputs: []inputInfo{
38374 {0, 4295023614},
38375 },
38376 },
38377 },
38378 {
38379 name: "MOVWstoreconst",
38380 auxType: auxSymValAndOff,
38381 argLen: 2,
38382 faultOnNilArg0: true,
38383 symEffect: SymWrite,
38384 asm: s390x.AMOVW,
38385 reg: regInfo{
38386 inputs: []inputInfo{
38387 {0, 4295023614},
38388 },
38389 },
38390 },
38391 {
38392 name: "MOVDstoreconst",
38393 auxType: auxSymValAndOff,
38394 argLen: 2,
38395 faultOnNilArg0: true,
38396 symEffect: SymWrite,
38397 asm: s390x.AMOVD,
38398 reg: regInfo{
38399 inputs: []inputInfo{
38400 {0, 4295023614},
38401 },
38402 },
38403 },
38404 {
38405 name: "CLEAR",
38406 auxType: auxSymValAndOff,
38407 argLen: 2,
38408 clobberFlags: true,
38409 faultOnNilArg0: true,
38410 symEffect: SymWrite,
38411 asm: s390x.ACLEAR,
38412 reg: regInfo{
38413 inputs: []inputInfo{
38414 {0, 23550},
38415 },
38416 },
38417 },
38418 {
38419 name: "CALLstatic",
38420 auxType: auxCallOff,
38421 argLen: 1,
38422 clobberFlags: true,
38423 call: true,
38424 reg: regInfo{
38425 clobbers: 4294933503,
38426 },
38427 },
38428 {
38429 name: "CALLtail",
38430 auxType: auxCallOff,
38431 argLen: 1,
38432 clobberFlags: true,
38433 call: true,
38434 tailCall: true,
38435 reg: regInfo{
38436 clobbers: 4294933503,
38437 },
38438 },
38439 {
38440 name: "CALLclosure",
38441 auxType: auxCallOff,
38442 argLen: 3,
38443 clobberFlags: true,
38444 call: true,
38445 reg: regInfo{
38446 inputs: []inputInfo{
38447 {1, 4096},
38448 {0, 56318},
38449 },
38450 clobbers: 4294933503,
38451 },
38452 },
38453 {
38454 name: "CALLinter",
38455 auxType: auxCallOff,
38456 argLen: 2,
38457 clobberFlags: true,
38458 call: true,
38459 reg: regInfo{
38460 inputs: []inputInfo{
38461 {0, 23550},
38462 },
38463 clobbers: 4294933503,
38464 },
38465 },
38466 {
38467 name: "InvertFlags",
38468 argLen: 1,
38469 reg: regInfo{},
38470 },
38471 {
38472 name: "LoweredGetG",
38473 argLen: 1,
38474 reg: regInfo{
38475 outputs: []outputInfo{
38476 {0, 23551},
38477 },
38478 },
38479 },
38480 {
38481 name: "LoweredGetClosurePtr",
38482 argLen: 0,
38483 zeroWidth: true,
38484 reg: regInfo{
38485 outputs: []outputInfo{
38486 {0, 4096},
38487 },
38488 },
38489 },
38490 {
38491 name: "LoweredGetCallerSP",
38492 argLen: 1,
38493 rematerializeable: true,
38494 reg: regInfo{
38495 outputs: []outputInfo{
38496 {0, 23551},
38497 },
38498 },
38499 },
38500 {
38501 name: "LoweredGetCallerPC",
38502 argLen: 0,
38503 rematerializeable: true,
38504 reg: regInfo{
38505 outputs: []outputInfo{
38506 {0, 23551},
38507 },
38508 },
38509 },
38510 {
38511 name: "LoweredNilCheck",
38512 argLen: 2,
38513 clobberFlags: true,
38514 nilCheck: true,
38515 faultOnNilArg0: true,
38516 reg: regInfo{
38517 inputs: []inputInfo{
38518 {0, 56318},
38519 },
38520 },
38521 },
38522 {
38523 name: "LoweredRound32F",
38524 argLen: 1,
38525 resultInArg0: true,
38526 zeroWidth: true,
38527 reg: regInfo{
38528 inputs: []inputInfo{
38529 {0, 4294901760},
38530 },
38531 outputs: []outputInfo{
38532 {0, 4294901760},
38533 },
38534 },
38535 },
38536 {
38537 name: "LoweredRound64F",
38538 argLen: 1,
38539 resultInArg0: true,
38540 zeroWidth: true,
38541 reg: regInfo{
38542 inputs: []inputInfo{
38543 {0, 4294901760},
38544 },
38545 outputs: []outputInfo{
38546 {0, 4294901760},
38547 },
38548 },
38549 },
38550 {
38551 name: "LoweredWB",
38552 auxType: auxInt64,
38553 argLen: 1,
38554 clobberFlags: true,
38555 reg: regInfo{
38556 clobbers: 4294918146,
38557 outputs: []outputInfo{
38558 {0, 512},
38559 },
38560 },
38561 },
38562 {
38563 name: "LoweredPanicBoundsRR",
38564 auxType: auxInt64,
38565 argLen: 3,
38566 call: true,
38567 reg: regInfo{
38568 inputs: []inputInfo{
38569 {0, 7167},
38570 {1, 7167},
38571 },
38572 },
38573 },
38574 {
38575 name: "LoweredPanicBoundsRC",
38576 auxType: auxPanicBoundsC,
38577 argLen: 2,
38578 call: true,
38579 reg: regInfo{
38580 inputs: []inputInfo{
38581 {0, 7167},
38582 },
38583 },
38584 },
38585 {
38586 name: "LoweredPanicBoundsCR",
38587 auxType: auxPanicBoundsC,
38588 argLen: 2,
38589 call: true,
38590 reg: regInfo{
38591 inputs: []inputInfo{
38592 {0, 7167},
38593 },
38594 },
38595 },
38596 {
38597 name: "LoweredPanicBoundsCC",
38598 auxType: auxPanicBoundsCC,
38599 argLen: 1,
38600 call: true,
38601 reg: regInfo{},
38602 },
38603 {
38604 name: "FlagEQ",
38605 argLen: 0,
38606 reg: regInfo{},
38607 },
38608 {
38609 name: "FlagLT",
38610 argLen: 0,
38611 reg: regInfo{},
38612 },
38613 {
38614 name: "FlagGT",
38615 argLen: 0,
38616 reg: regInfo{},
38617 },
38618 {
38619 name: "FlagOV",
38620 argLen: 0,
38621 reg: regInfo{},
38622 },
38623 {
38624 name: "SYNC",
38625 argLen: 1,
38626 asm: s390x.ASYNC,
38627 reg: regInfo{},
38628 },
38629 {
38630 name: "MOVBZatomicload",
38631 auxType: auxSymOff,
38632 argLen: 2,
38633 faultOnNilArg0: true,
38634 symEffect: SymRead,
38635 asm: s390x.AMOVBZ,
38636 reg: regInfo{
38637 inputs: []inputInfo{
38638 {0, 4295023614},
38639 },
38640 outputs: []outputInfo{
38641 {0, 23551},
38642 },
38643 },
38644 },
38645 {
38646 name: "MOVWZatomicload",
38647 auxType: auxSymOff,
38648 argLen: 2,
38649 faultOnNilArg0: true,
38650 symEffect: SymRead,
38651 asm: s390x.AMOVWZ,
38652 reg: regInfo{
38653 inputs: []inputInfo{
38654 {0, 4295023614},
38655 },
38656 outputs: []outputInfo{
38657 {0, 23551},
38658 },
38659 },
38660 },
38661 {
38662 name: "MOVDatomicload",
38663 auxType: auxSymOff,
38664 argLen: 2,
38665 faultOnNilArg0: true,
38666 symEffect: SymRead,
38667 asm: s390x.AMOVD,
38668 reg: regInfo{
38669 inputs: []inputInfo{
38670 {0, 4295023614},
38671 },
38672 outputs: []outputInfo{
38673 {0, 23551},
38674 },
38675 },
38676 },
38677 {
38678 name: "MOVBatomicstore",
38679 auxType: auxSymOff,
38680 argLen: 3,
38681 clobberFlags: true,
38682 faultOnNilArg0: true,
38683 hasSideEffects: true,
38684 symEffect: SymWrite,
38685 asm: s390x.AMOVB,
38686 reg: regInfo{
38687 inputs: []inputInfo{
38688 {0, 4295023614},
38689 {1, 56319},
38690 },
38691 },
38692 },
38693 {
38694 name: "MOVWatomicstore",
38695 auxType: auxSymOff,
38696 argLen: 3,
38697 clobberFlags: true,
38698 faultOnNilArg0: true,
38699 hasSideEffects: true,
38700 symEffect: SymWrite,
38701 asm: s390x.AMOVW,
38702 reg: regInfo{
38703 inputs: []inputInfo{
38704 {0, 4295023614},
38705 {1, 56319},
38706 },
38707 },
38708 },
38709 {
38710 name: "MOVDatomicstore",
38711 auxType: auxSymOff,
38712 argLen: 3,
38713 clobberFlags: true,
38714 faultOnNilArg0: true,
38715 hasSideEffects: true,
38716 symEffect: SymWrite,
38717 asm: s390x.AMOVD,
38718 reg: regInfo{
38719 inputs: []inputInfo{
38720 {0, 4295023614},
38721 {1, 56319},
38722 },
38723 },
38724 },
38725 {
38726 name: "LAA",
38727 auxType: auxSymOff,
38728 argLen: 3,
38729 clobberFlags: true,
38730 faultOnNilArg0: true,
38731 hasSideEffects: true,
38732 symEffect: SymRdWr,
38733 asm: s390x.ALAA,
38734 reg: regInfo{
38735 inputs: []inputInfo{
38736 {0, 4295023614},
38737 {1, 56319},
38738 },
38739 outputs: []outputInfo{
38740 {0, 23551},
38741 },
38742 },
38743 },
38744 {
38745 name: "LAAG",
38746 auxType: auxSymOff,
38747 argLen: 3,
38748 clobberFlags: true,
38749 faultOnNilArg0: true,
38750 hasSideEffects: true,
38751 symEffect: SymRdWr,
38752 asm: s390x.ALAAG,
38753 reg: regInfo{
38754 inputs: []inputInfo{
38755 {0, 4295023614},
38756 {1, 56319},
38757 },
38758 outputs: []outputInfo{
38759 {0, 23551},
38760 },
38761 },
38762 },
38763 {
38764 name: "AddTupleFirst32",
38765 argLen: 2,
38766 reg: regInfo{},
38767 },
38768 {
38769 name: "AddTupleFirst64",
38770 argLen: 2,
38771 reg: regInfo{},
38772 },
38773 {
38774 name: "LAN",
38775 argLen: 3,
38776 clobberFlags: true,
38777 hasSideEffects: true,
38778 asm: s390x.ALAN,
38779 reg: regInfo{
38780 inputs: []inputInfo{
38781 {0, 4295023614},
38782 {1, 56319},
38783 },
38784 },
38785 },
38786 {
38787 name: "LANfloor",
38788 argLen: 3,
38789 clobberFlags: true,
38790 hasSideEffects: true,
38791 asm: s390x.ALAN,
38792 reg: regInfo{
38793 inputs: []inputInfo{
38794 {0, 2},
38795 {1, 56319},
38796 },
38797 clobbers: 2,
38798 },
38799 },
38800 {
38801 name: "LAO",
38802 argLen: 3,
38803 clobberFlags: true,
38804 hasSideEffects: true,
38805 asm: s390x.ALAO,
38806 reg: regInfo{
38807 inputs: []inputInfo{
38808 {0, 4295023614},
38809 {1, 56319},
38810 },
38811 },
38812 },
38813 {
38814 name: "LAOfloor",
38815 argLen: 3,
38816 clobberFlags: true,
38817 hasSideEffects: true,
38818 asm: s390x.ALAO,
38819 reg: regInfo{
38820 inputs: []inputInfo{
38821 {0, 2},
38822 {1, 56319},
38823 },
38824 clobbers: 2,
38825 },
38826 },
38827 {
38828 name: "LoweredAtomicCas32",
38829 auxType: auxSymOff,
38830 argLen: 4,
38831 clobberFlags: true,
38832 faultOnNilArg0: true,
38833 hasSideEffects: true,
38834 symEffect: SymRdWr,
38835 asm: s390x.ACS,
38836 reg: regInfo{
38837 inputs: []inputInfo{
38838 {1, 1},
38839 {0, 56318},
38840 {2, 56319},
38841 },
38842 clobbers: 1,
38843 outputs: []outputInfo{
38844 {1, 0},
38845 {0, 23551},
38846 },
38847 },
38848 },
38849 {
38850 name: "LoweredAtomicCas64",
38851 auxType: auxSymOff,
38852 argLen: 4,
38853 clobberFlags: true,
38854 faultOnNilArg0: true,
38855 hasSideEffects: true,
38856 symEffect: SymRdWr,
38857 asm: s390x.ACSG,
38858 reg: regInfo{
38859 inputs: []inputInfo{
38860 {1, 1},
38861 {0, 56318},
38862 {2, 56319},
38863 },
38864 clobbers: 1,
38865 outputs: []outputInfo{
38866 {1, 0},
38867 {0, 23551},
38868 },
38869 },
38870 },
38871 {
38872 name: "LoweredAtomicExchange32",
38873 auxType: auxSymOff,
38874 argLen: 3,
38875 clobberFlags: true,
38876 faultOnNilArg0: true,
38877 hasSideEffects: true,
38878 symEffect: SymRdWr,
38879 asm: s390x.ACS,
38880 reg: regInfo{
38881 inputs: []inputInfo{
38882 {0, 56318},
38883 {1, 56318},
38884 },
38885 outputs: []outputInfo{
38886 {1, 0},
38887 {0, 1},
38888 },
38889 },
38890 },
38891 {
38892 name: "LoweredAtomicExchange64",
38893 auxType: auxSymOff,
38894 argLen: 3,
38895 clobberFlags: true,
38896 faultOnNilArg0: true,
38897 hasSideEffects: true,
38898 symEffect: SymRdWr,
38899 asm: s390x.ACSG,
38900 reg: regInfo{
38901 inputs: []inputInfo{
38902 {0, 56318},
38903 {1, 56318},
38904 },
38905 outputs: []outputInfo{
38906 {1, 0},
38907 {0, 1},
38908 },
38909 },
38910 },
38911 {
38912 name: "FLOGR",
38913 argLen: 1,
38914 clobberFlags: true,
38915 asm: s390x.AFLOGR,
38916 reg: regInfo{
38917 inputs: []inputInfo{
38918 {0, 23551},
38919 },
38920 clobbers: 2,
38921 outputs: []outputInfo{
38922 {0, 1},
38923 },
38924 },
38925 },
38926 {
38927 name: "POPCNT",
38928 argLen: 1,
38929 clobberFlags: true,
38930 asm: s390x.APOPCNT,
38931 reg: regInfo{
38932 inputs: []inputInfo{
38933 {0, 23551},
38934 },
38935 outputs: []outputInfo{
38936 {0, 23551},
38937 },
38938 },
38939 },
38940 {
38941 name: "MLGR",
38942 argLen: 2,
38943 asm: s390x.AMLGR,
38944 reg: regInfo{
38945 inputs: []inputInfo{
38946 {1, 8},
38947 {0, 23551},
38948 },
38949 outputs: []outputInfo{
38950 {0, 4},
38951 {1, 8},
38952 },
38953 },
38954 },
38955 {
38956 name: "SumBytes2",
38957 argLen: 1,
38958 reg: regInfo{},
38959 },
38960 {
38961 name: "SumBytes4",
38962 argLen: 1,
38963 reg: regInfo{},
38964 },
38965 {
38966 name: "SumBytes8",
38967 argLen: 1,
38968 reg: regInfo{},
38969 },
38970 {
38971 name: "STMG2",
38972 auxType: auxSymOff,
38973 argLen: 4,
38974 clobberFlags: true,
38975 faultOnNilArg0: true,
38976 symEffect: SymWrite,
38977 asm: s390x.ASTMG,
38978 reg: regInfo{
38979 inputs: []inputInfo{
38980 {1, 2},
38981 {2, 4},
38982 {0, 56318},
38983 },
38984 },
38985 },
38986 {
38987 name: "STMG3",
38988 auxType: auxSymOff,
38989 argLen: 5,
38990 clobberFlags: true,
38991 faultOnNilArg0: true,
38992 symEffect: SymWrite,
38993 asm: s390x.ASTMG,
38994 reg: regInfo{
38995 inputs: []inputInfo{
38996 {1, 2},
38997 {2, 4},
38998 {3, 8},
38999 {0, 56318},
39000 },
39001 },
39002 },
39003 {
39004 name: "STMG4",
39005 auxType: auxSymOff,
39006 argLen: 6,
39007 clobberFlags: true,
39008 faultOnNilArg0: true,
39009 symEffect: SymWrite,
39010 asm: s390x.ASTMG,
39011 reg: regInfo{
39012 inputs: []inputInfo{
39013 {1, 2},
39014 {2, 4},
39015 {3, 8},
39016 {4, 16},
39017 {0, 56318},
39018 },
39019 },
39020 },
39021 {
39022 name: "STM2",
39023 auxType: auxSymOff,
39024 argLen: 4,
39025 clobberFlags: true,
39026 faultOnNilArg0: true,
39027 symEffect: SymWrite,
39028 asm: s390x.ASTMY,
39029 reg: regInfo{
39030 inputs: []inputInfo{
39031 {1, 2},
39032 {2, 4},
39033 {0, 56318},
39034 },
39035 },
39036 },
39037 {
39038 name: "STM3",
39039 auxType: auxSymOff,
39040 argLen: 5,
39041 clobberFlags: true,
39042 faultOnNilArg0: true,
39043 symEffect: SymWrite,
39044 asm: s390x.ASTMY,
39045 reg: regInfo{
39046 inputs: []inputInfo{
39047 {1, 2},
39048 {2, 4},
39049 {3, 8},
39050 {0, 56318},
39051 },
39052 },
39053 },
39054 {
39055 name: "STM4",
39056 auxType: auxSymOff,
39057 argLen: 6,
39058 clobberFlags: true,
39059 faultOnNilArg0: true,
39060 symEffect: SymWrite,
39061 asm: s390x.ASTMY,
39062 reg: regInfo{
39063 inputs: []inputInfo{
39064 {1, 2},
39065 {2, 4},
39066 {3, 8},
39067 {4, 16},
39068 {0, 56318},
39069 },
39070 },
39071 },
39072 {
39073 name: "LoweredMove",
39074 auxType: auxInt64,
39075 argLen: 4,
39076 clobberFlags: true,
39077 faultOnNilArg0: true,
39078 faultOnNilArg1: true,
39079 reg: regInfo{
39080 inputs: []inputInfo{
39081 {0, 2},
39082 {1, 4},
39083 {2, 56319},
39084 },
39085 clobbers: 6,
39086 },
39087 },
39088 {
39089 name: "LoweredZero",
39090 auxType: auxInt64,
39091 argLen: 3,
39092 clobberFlags: true,
39093 faultOnNilArg0: true,
39094 reg: regInfo{
39095 inputs: []inputInfo{
39096 {0, 2},
39097 {1, 56319},
39098 },
39099 clobbers: 2,
39100 },
39101 },
39102
39103 {
39104 name: "LoweredStaticCall",
39105 auxType: auxCallOff,
39106 argLen: 1,
39107 call: true,
39108 reg: regInfo{
39109 clobbers: 844424930131967,
39110 },
39111 },
39112 {
39113 name: "LoweredTailCall",
39114 auxType: auxCallOff,
39115 argLen: 1,
39116 call: true,
39117 tailCall: true,
39118 reg: regInfo{
39119 clobbers: 844424930131967,
39120 },
39121 },
39122 {
39123 name: "LoweredClosureCall",
39124 auxType: auxCallOff,
39125 argLen: 3,
39126 call: true,
39127 reg: regInfo{
39128 inputs: []inputInfo{
39129 {0, 65535},
39130 {1, 65535},
39131 },
39132 clobbers: 844424930131967,
39133 },
39134 },
39135 {
39136 name: "LoweredInterCall",
39137 auxType: auxCallOff,
39138 argLen: 2,
39139 call: true,
39140 reg: regInfo{
39141 inputs: []inputInfo{
39142 {0, 65535},
39143 },
39144 clobbers: 844424930131967,
39145 },
39146 },
39147 {
39148 name: "LoweredAddr",
39149 auxType: auxSymOff,
39150 argLen: 1,
39151 rematerializeable: true,
39152 symEffect: SymAddr,
39153 reg: regInfo{
39154 inputs: []inputInfo{
39155 {0, 281474976776191},
39156 },
39157 outputs: []outputInfo{
39158 {0, 65535},
39159 },
39160 },
39161 },
39162 {
39163 name: "LoweredMove",
39164 auxType: auxInt64,
39165 argLen: 3,
39166 reg: regInfo{
39167 inputs: []inputInfo{
39168 {0, 65535},
39169 {1, 65535},
39170 },
39171 },
39172 },
39173 {
39174 name: "LoweredZero",
39175 auxType: auxInt64,
39176 argLen: 2,
39177 reg: regInfo{
39178 inputs: []inputInfo{
39179 {0, 65535},
39180 },
39181 },
39182 },
39183 {
39184 name: "LoweredGetClosurePtr",
39185 argLen: 0,
39186 reg: regInfo{
39187 outputs: []outputInfo{
39188 {0, 65535},
39189 },
39190 },
39191 },
39192 {
39193 name: "LoweredGetCallerPC",
39194 argLen: 0,
39195 rematerializeable: true,
39196 reg: regInfo{
39197 outputs: []outputInfo{
39198 {0, 65535},
39199 },
39200 },
39201 },
39202 {
39203 name: "LoweredGetCallerSP",
39204 argLen: 1,
39205 rematerializeable: true,
39206 reg: regInfo{
39207 outputs: []outputInfo{
39208 {0, 65535},
39209 },
39210 },
39211 },
39212 {
39213 name: "LoweredNilCheck",
39214 argLen: 2,
39215 nilCheck: true,
39216 faultOnNilArg0: true,
39217 reg: regInfo{
39218 inputs: []inputInfo{
39219 {0, 65535},
39220 },
39221 },
39222 },
39223 {
39224 name: "LoweredWB",
39225 auxType: auxInt64,
39226 argLen: 1,
39227 reg: regInfo{
39228 clobbers: 844424930131967,
39229 outputs: []outputInfo{
39230 {0, 65535},
39231 },
39232 },
39233 },
39234 {
39235 name: "LoweredConvert",
39236 argLen: 2,
39237 reg: regInfo{
39238 inputs: []inputInfo{
39239 {0, 65535},
39240 },
39241 outputs: []outputInfo{
39242 {0, 65535},
39243 },
39244 },
39245 },
39246 {
39247 name: "Select",
39248 argLen: 3,
39249 asm: wasm.ASelect,
39250 reg: regInfo{
39251 inputs: []inputInfo{
39252 {0, 281474976776191},
39253 {1, 281474976776191},
39254 {2, 281474976776191},
39255 },
39256 outputs: []outputInfo{
39257 {0, 65535},
39258 },
39259 },
39260 },
39261 {
39262 name: "I64Load8U",
39263 auxType: auxInt64,
39264 argLen: 2,
39265 asm: wasm.AI64Load8U,
39266 reg: regInfo{
39267 inputs: []inputInfo{
39268 {0, 1407374883618815},
39269 },
39270 outputs: []outputInfo{
39271 {0, 65535},
39272 },
39273 },
39274 },
39275 {
39276 name: "I64Load8S",
39277 auxType: auxInt64,
39278 argLen: 2,
39279 asm: wasm.AI64Load8S,
39280 reg: regInfo{
39281 inputs: []inputInfo{
39282 {0, 1407374883618815},
39283 },
39284 outputs: []outputInfo{
39285 {0, 65535},
39286 },
39287 },
39288 },
39289 {
39290 name: "I64Load16U",
39291 auxType: auxInt64,
39292 argLen: 2,
39293 asm: wasm.AI64Load16U,
39294 reg: regInfo{
39295 inputs: []inputInfo{
39296 {0, 1407374883618815},
39297 },
39298 outputs: []outputInfo{
39299 {0, 65535},
39300 },
39301 },
39302 },
39303 {
39304 name: "I64Load16S",
39305 auxType: auxInt64,
39306 argLen: 2,
39307 asm: wasm.AI64Load16S,
39308 reg: regInfo{
39309 inputs: []inputInfo{
39310 {0, 1407374883618815},
39311 },
39312 outputs: []outputInfo{
39313 {0, 65535},
39314 },
39315 },
39316 },
39317 {
39318 name: "I64Load32U",
39319 auxType: auxInt64,
39320 argLen: 2,
39321 asm: wasm.AI64Load32U,
39322 reg: regInfo{
39323 inputs: []inputInfo{
39324 {0, 1407374883618815},
39325 },
39326 outputs: []outputInfo{
39327 {0, 65535},
39328 },
39329 },
39330 },
39331 {
39332 name: "I64Load32S",
39333 auxType: auxInt64,
39334 argLen: 2,
39335 asm: wasm.AI64Load32S,
39336 reg: regInfo{
39337 inputs: []inputInfo{
39338 {0, 1407374883618815},
39339 },
39340 outputs: []outputInfo{
39341 {0, 65535},
39342 },
39343 },
39344 },
39345 {
39346 name: "I64Load",
39347 auxType: auxInt64,
39348 argLen: 2,
39349 asm: wasm.AI64Load,
39350 reg: regInfo{
39351 inputs: []inputInfo{
39352 {0, 1407374883618815},
39353 },
39354 outputs: []outputInfo{
39355 {0, 65535},
39356 },
39357 },
39358 },
39359 {
39360 name: "I64Store8",
39361 auxType: auxInt64,
39362 argLen: 3,
39363 asm: wasm.AI64Store8,
39364 reg: regInfo{
39365 inputs: []inputInfo{
39366 {1, 281474976776191},
39367 {0, 1407374883618815},
39368 },
39369 },
39370 },
39371 {
39372 name: "I64Store16",
39373 auxType: auxInt64,
39374 argLen: 3,
39375 asm: wasm.AI64Store16,
39376 reg: regInfo{
39377 inputs: []inputInfo{
39378 {1, 281474976776191},
39379 {0, 1407374883618815},
39380 },
39381 },
39382 },
39383 {
39384 name: "I64Store32",
39385 auxType: auxInt64,
39386 argLen: 3,
39387 asm: wasm.AI64Store32,
39388 reg: regInfo{
39389 inputs: []inputInfo{
39390 {1, 281474976776191},
39391 {0, 1407374883618815},
39392 },
39393 },
39394 },
39395 {
39396 name: "I64Store",
39397 auxType: auxInt64,
39398 argLen: 3,
39399 asm: wasm.AI64Store,
39400 reg: regInfo{
39401 inputs: []inputInfo{
39402 {1, 281474976776191},
39403 {0, 1407374883618815},
39404 },
39405 },
39406 },
39407 {
39408 name: "F32Load",
39409 auxType: auxInt64,
39410 argLen: 2,
39411 asm: wasm.AF32Load,
39412 reg: regInfo{
39413 inputs: []inputInfo{
39414 {0, 1407374883618815},
39415 },
39416 outputs: []outputInfo{
39417 {0, 4294901760},
39418 },
39419 },
39420 },
39421 {
39422 name: "F64Load",
39423 auxType: auxInt64,
39424 argLen: 2,
39425 asm: wasm.AF64Load,
39426 reg: regInfo{
39427 inputs: []inputInfo{
39428 {0, 1407374883618815},
39429 },
39430 outputs: []outputInfo{
39431 {0, 281470681743360},
39432 },
39433 },
39434 },
39435 {
39436 name: "F32Store",
39437 auxType: auxInt64,
39438 argLen: 3,
39439 asm: wasm.AF32Store,
39440 reg: regInfo{
39441 inputs: []inputInfo{
39442 {1, 4294901760},
39443 {0, 1407374883618815},
39444 },
39445 },
39446 },
39447 {
39448 name: "F64Store",
39449 auxType: auxInt64,
39450 argLen: 3,
39451 asm: wasm.AF64Store,
39452 reg: regInfo{
39453 inputs: []inputInfo{
39454 {1, 281470681743360},
39455 {0, 1407374883618815},
39456 },
39457 },
39458 },
39459 {
39460 name: "I64Const",
39461 auxType: auxInt64,
39462 argLen: 0,
39463 rematerializeable: true,
39464 reg: regInfo{
39465 outputs: []outputInfo{
39466 {0, 65535},
39467 },
39468 },
39469 },
39470 {
39471 name: "F32Const",
39472 auxType: auxFloat32,
39473 argLen: 0,
39474 rematerializeable: true,
39475 reg: regInfo{
39476 outputs: []outputInfo{
39477 {0, 4294901760},
39478 },
39479 },
39480 },
39481 {
39482 name: "F64Const",
39483 auxType: auxFloat64,
39484 argLen: 0,
39485 rematerializeable: true,
39486 reg: regInfo{
39487 outputs: []outputInfo{
39488 {0, 281470681743360},
39489 },
39490 },
39491 },
39492 {
39493 name: "I64Eqz",
39494 argLen: 1,
39495 asm: wasm.AI64Eqz,
39496 reg: regInfo{
39497 inputs: []inputInfo{
39498 {0, 281474976776191},
39499 },
39500 outputs: []outputInfo{
39501 {0, 65535},
39502 },
39503 },
39504 },
39505 {
39506 name: "I64Eq",
39507 argLen: 2,
39508 asm: wasm.AI64Eq,
39509 reg: regInfo{
39510 inputs: []inputInfo{
39511 {0, 281474976776191},
39512 {1, 281474976776191},
39513 },
39514 outputs: []outputInfo{
39515 {0, 65535},
39516 },
39517 },
39518 },
39519 {
39520 name: "I64Ne",
39521 argLen: 2,
39522 asm: wasm.AI64Ne,
39523 reg: regInfo{
39524 inputs: []inputInfo{
39525 {0, 281474976776191},
39526 {1, 281474976776191},
39527 },
39528 outputs: []outputInfo{
39529 {0, 65535},
39530 },
39531 },
39532 },
39533 {
39534 name: "I64LtS",
39535 argLen: 2,
39536 asm: wasm.AI64LtS,
39537 reg: regInfo{
39538 inputs: []inputInfo{
39539 {0, 281474976776191},
39540 {1, 281474976776191},
39541 },
39542 outputs: []outputInfo{
39543 {0, 65535},
39544 },
39545 },
39546 },
39547 {
39548 name: "I64LtU",
39549 argLen: 2,
39550 asm: wasm.AI64LtU,
39551 reg: regInfo{
39552 inputs: []inputInfo{
39553 {0, 281474976776191},
39554 {1, 281474976776191},
39555 },
39556 outputs: []outputInfo{
39557 {0, 65535},
39558 },
39559 },
39560 },
39561 {
39562 name: "I64GtS",
39563 argLen: 2,
39564 asm: wasm.AI64GtS,
39565 reg: regInfo{
39566 inputs: []inputInfo{
39567 {0, 281474976776191},
39568 {1, 281474976776191},
39569 },
39570 outputs: []outputInfo{
39571 {0, 65535},
39572 },
39573 },
39574 },
39575 {
39576 name: "I64GtU",
39577 argLen: 2,
39578 asm: wasm.AI64GtU,
39579 reg: regInfo{
39580 inputs: []inputInfo{
39581 {0, 281474976776191},
39582 {1, 281474976776191},
39583 },
39584 outputs: []outputInfo{
39585 {0, 65535},
39586 },
39587 },
39588 },
39589 {
39590 name: "I64LeS",
39591 argLen: 2,
39592 asm: wasm.AI64LeS,
39593 reg: regInfo{
39594 inputs: []inputInfo{
39595 {0, 281474976776191},
39596 {1, 281474976776191},
39597 },
39598 outputs: []outputInfo{
39599 {0, 65535},
39600 },
39601 },
39602 },
39603 {
39604 name: "I64LeU",
39605 argLen: 2,
39606 asm: wasm.AI64LeU,
39607 reg: regInfo{
39608 inputs: []inputInfo{
39609 {0, 281474976776191},
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40506 {0, 281474976776191},
40507 },
40508 outputs: []outputInfo{
40509 {0, 65535},
40510 },
40511 },
40512 },
40513 {
40514 name: "I64Clz",
40515 argLen: 1,
40516 asm: wasm.AI64Clz,
40517 reg: regInfo{
40518 inputs: []inputInfo{
40519 {0, 281474976776191},
40520 },
40521 outputs: []outputInfo{
40522 {0, 65535},
40523 },
40524 },
40525 },
40526 {
40527 name: "I32Rotl",
40528 argLen: 2,
40529 asm: wasm.AI32Rotl,
40530 reg: regInfo{
40531 inputs: []inputInfo{
40532 {0, 281474976776191},
40533 {1, 281474976776191},
40534 },
40535 outputs: []outputInfo{
40536 {0, 65535},
40537 },
40538 },
40539 },
40540 {
40541 name: "I64Rotl",
40542 argLen: 2,
40543 asm: wasm.AI64Rotl,
40544 reg: regInfo{
40545 inputs: []inputInfo{
40546 {0, 281474976776191},
40547 {1, 281474976776191},
40548 },
40549 outputs: []outputInfo{
40550 {0, 65535},
40551 },
40552 },
40553 },
40554 {
40555 name: "I64Popcnt",
40556 argLen: 1,
40557 asm: wasm.AI64Popcnt,
40558 reg: regInfo{
40559 inputs: []inputInfo{
40560 {0, 281474976776191},
40561 },
40562 outputs: []outputInfo{
40563 {0, 65535},
40564 },
40565 },
40566 },
40567
40568 {
40569 name: "Add8",
40570 argLen: 2,
40571 commutative: true,
40572 generic: true,
40573 },
40574 {
40575 name: "Add16",
40576 argLen: 2,
40577 commutative: true,
40578 generic: true,
40579 },
40580 {
40581 name: "Add32",
40582 argLen: 2,
40583 commutative: true,
40584 generic: true,
40585 },
40586 {
40587 name: "Add64",
40588 argLen: 2,
40589 commutative: true,
40590 generic: true,
40591 },
40592 {
40593 name: "AddPtr",
40594 argLen: 2,
40595 generic: true,
40596 },
40597 {
40598 name: "Add32F",
40599 argLen: 2,
40600 commutative: true,
40601 generic: true,
40602 },
40603 {
40604 name: "Add64F",
40605 argLen: 2,
40606 commutative: true,
40607 generic: true,
40608 },
40609 {
40610 name: "Sub8",
40611 argLen: 2,
40612 generic: true,
40613 },
40614 {
40615 name: "Sub16",
40616 argLen: 2,
40617 generic: true,
40618 },
40619 {
40620 name: "Sub32",
40621 argLen: 2,
40622 generic: true,
40623 },
40624 {
40625 name: "Sub64",
40626 argLen: 2,
40627 generic: true,
40628 },
40629 {
40630 name: "SubPtr",
40631 argLen: 2,
40632 generic: true,
40633 },
40634 {
40635 name: "Sub32F",
40636 argLen: 2,
40637 generic: true,
40638 },
40639 {
40640 name: "Sub64F",
40641 argLen: 2,
40642 generic: true,
40643 },
40644 {
40645 name: "Mul8",
40646 argLen: 2,
40647 commutative: true,
40648 generic: true,
40649 },
40650 {
40651 name: "Mul16",
40652 argLen: 2,
40653 commutative: true,
40654 generic: true,
40655 },
40656 {
40657 name: "Mul32",
40658 argLen: 2,
40659 commutative: true,
40660 generic: true,
40661 },
40662 {
40663 name: "Mul64",
40664 argLen: 2,
40665 commutative: true,
40666 generic: true,
40667 },
40668 {
40669 name: "Mul32F",
40670 argLen: 2,
40671 commutative: true,
40672 generic: true,
40673 },
40674 {
40675 name: "Mul64F",
40676 argLen: 2,
40677 commutative: true,
40678 generic: true,
40679 },
40680 {
40681 name: "Div32F",
40682 argLen: 2,
40683 generic: true,
40684 },
40685 {
40686 name: "Div64F",
40687 argLen: 2,
40688 generic: true,
40689 },
40690 {
40691 name: "Hmul32",
40692 argLen: 2,
40693 commutative: true,
40694 generic: true,
40695 },
40696 {
40697 name: "Hmul32u",
40698 argLen: 2,
40699 commutative: true,
40700 generic: true,
40701 },
40702 {
40703 name: "Hmul64",
40704 argLen: 2,
40705 commutative: true,
40706 generic: true,
40707 },
40708 {
40709 name: "Hmul64u",
40710 argLen: 2,
40711 commutative: true,
40712 generic: true,
40713 },
40714 {
40715 name: "Mul32uhilo",
40716 argLen: 2,
40717 commutative: true,
40718 generic: true,
40719 },
40720 {
40721 name: "Mul64uhilo",
40722 argLen: 2,
40723 commutative: true,
40724 generic: true,
40725 },
40726 {
40727 name: "Mul32uover",
40728 argLen: 2,
40729 commutative: true,
40730 generic: true,
40731 },
40732 {
40733 name: "Mul64uover",
40734 argLen: 2,
40735 commutative: true,
40736 generic: true,
40737 },
40738 {
40739 name: "Avg32u",
40740 argLen: 2,
40741 generic: true,
40742 },
40743 {
40744 name: "Avg64u",
40745 argLen: 2,
40746 generic: true,
40747 },
40748 {
40749 name: "Div8",
40750 argLen: 2,
40751 generic: true,
40752 },
40753 {
40754 name: "Div8u",
40755 argLen: 2,
40756 generic: true,
40757 },
40758 {
40759 name: "Div16",
40760 auxType: auxBool,
40761 argLen: 2,
40762 generic: true,
40763 },
40764 {
40765 name: "Div16u",
40766 argLen: 2,
40767 generic: true,
40768 },
40769 {
40770 name: "Div32",
40771 auxType: auxBool,
40772 argLen: 2,
40773 generic: true,
40774 },
40775 {
40776 name: "Div32u",
40777 argLen: 2,
40778 generic: true,
40779 },
40780 {
40781 name: "Div64",
40782 auxType: auxBool,
40783 argLen: 2,
40784 generic: true,
40785 },
40786 {
40787 name: "Div64u",
40788 argLen: 2,
40789 generic: true,
40790 },
40791 {
40792 name: "Div128u",
40793 argLen: 3,
40794 generic: true,
40795 },
40796 {
40797 name: "Mod8",
40798 argLen: 2,
40799 generic: true,
40800 },
40801 {
40802 name: "Mod8u",
40803 argLen: 2,
40804 generic: true,
40805 },
40806 {
40807 name: "Mod16",
40808 auxType: auxBool,
40809 argLen: 2,
40810 generic: true,
40811 },
40812 {
40813 name: "Mod16u",
40814 argLen: 2,
40815 generic: true,
40816 },
40817 {
40818 name: "Mod32",
40819 auxType: auxBool,
40820 argLen: 2,
40821 generic: true,
40822 },
40823 {
40824 name: "Mod32u",
40825 argLen: 2,
40826 generic: true,
40827 },
40828 {
40829 name: "Mod64",
40830 auxType: auxBool,
40831 argLen: 2,
40832 generic: true,
40833 },
40834 {
40835 name: "Mod64u",
40836 argLen: 2,
40837 generic: true,
40838 },
40839 {
40840 name: "And8",
40841 argLen: 2,
40842 commutative: true,
40843 generic: true,
40844 },
40845 {
40846 name: "And16",
40847 argLen: 2,
40848 commutative: true,
40849 generic: true,
40850 },
40851 {
40852 name: "And32",
40853 argLen: 2,
40854 commutative: true,
40855 generic: true,
40856 },
40857 {
40858 name: "And64",
40859 argLen: 2,
40860 commutative: true,
40861 generic: true,
40862 },
40863 {
40864 name: "Or8",
40865 argLen: 2,
40866 commutative: true,
40867 generic: true,
40868 },
40869 {
40870 name: "Or16",
40871 argLen: 2,
40872 commutative: true,
40873 generic: true,
40874 },
40875 {
40876 name: "Or32",
40877 argLen: 2,
40878 commutative: true,
40879 generic: true,
40880 },
40881 {
40882 name: "Or64",
40883 argLen: 2,
40884 commutative: true,
40885 generic: true,
40886 },
40887 {
40888 name: "Xor8",
40889 argLen: 2,
40890 commutative: true,
40891 generic: true,
40892 },
40893 {
40894 name: "Xor16",
40895 argLen: 2,
40896 commutative: true,
40897 generic: true,
40898 },
40899 {
40900 name: "Xor32",
40901 argLen: 2,
40902 commutative: true,
40903 generic: true,
40904 },
40905 {
40906 name: "Xor64",
40907 argLen: 2,
40908 commutative: true,
40909 generic: true,
40910 },
40911 {
40912 name: "Lsh8x8",
40913 auxType: auxBool,
40914 argLen: 2,
40915 generic: true,
40916 },
40917 {
40918 name: "Lsh8x16",
40919 auxType: auxBool,
40920 argLen: 2,
40921 generic: true,
40922 },
40923 {
40924 name: "Lsh8x32",
40925 auxType: auxBool,
40926 argLen: 2,
40927 generic: true,
40928 },
40929 {
40930 name: "Lsh8x64",
40931 auxType: auxBool,
40932 argLen: 2,
40933 generic: true,
40934 },
40935 {
40936 name: "Lsh16x8",
40937 auxType: auxBool,
40938 argLen: 2,
40939 generic: true,
40940 },
40941 {
40942 name: "Lsh16x16",
40943 auxType: auxBool,
40944 argLen: 2,
40945 generic: true,
40946 },
40947 {
40948 name: "Lsh16x32",
40949 auxType: auxBool,
40950 argLen: 2,
40951 generic: true,
40952 },
40953 {
40954 name: "Lsh16x64",
40955 auxType: auxBool,
40956 argLen: 2,
40957 generic: true,
40958 },
40959 {
40960 name: "Lsh32x8",
40961 auxType: auxBool,
40962 argLen: 2,
40963 generic: true,
40964 },
40965 {
40966 name: "Lsh32x16",
40967 auxType: auxBool,
40968 argLen: 2,
40969 generic: true,
40970 },
40971 {
40972 name: "Lsh32x32",
40973 auxType: auxBool,
40974 argLen: 2,
40975 generic: true,
40976 },
40977 {
40978 name: "Lsh32x64",
40979 auxType: auxBool,
40980 argLen: 2,
40981 generic: true,
40982 },
40983 {
40984 name: "Lsh64x8",
40985 auxType: auxBool,
40986 argLen: 2,
40987 generic: true,
40988 },
40989 {
40990 name: "Lsh64x16",
40991 auxType: auxBool,
40992 argLen: 2,
40993 generic: true,
40994 },
40995 {
40996 name: "Lsh64x32",
40997 auxType: auxBool,
40998 argLen: 2,
40999 generic: true,
41000 },
41001 {
41002 name: "Lsh64x64",
41003 auxType: auxBool,
41004 argLen: 2,
41005 generic: true,
41006 },
41007 {
41008 name: "Rsh8x8",
41009 auxType: auxBool,
41010 argLen: 2,
41011 generic: true,
41012 },
41013 {
41014 name: "Rsh8x16",
41015 auxType: auxBool,
41016 argLen: 2,
41017 generic: true,
41018 },
41019 {
41020 name: "Rsh8x32",
41021 auxType: auxBool,
41022 argLen: 2,
41023 generic: true,
41024 },
41025 {
41026 name: "Rsh8x64",
41027 auxType: auxBool,
41028 argLen: 2,
41029 generic: true,
41030 },
41031 {
41032 name: "Rsh16x8",
41033 auxType: auxBool,
41034 argLen: 2,
41035 generic: true,
41036 },
41037 {
41038 name: "Rsh16x16",
41039 auxType: auxBool,
41040 argLen: 2,
41041 generic: true,
41042 },
41043 {
41044 name: "Rsh16x32",
41045 auxType: auxBool,
41046 argLen: 2,
41047 generic: true,
41048 },
41049 {
41050 name: "Rsh16x64",
41051 auxType: auxBool,
41052 argLen: 2,
41053 generic: true,
41054 },
41055 {
41056 name: "Rsh32x8",
41057 auxType: auxBool,
41058 argLen: 2,
41059 generic: true,
41060 },
41061 {
41062 name: "Rsh32x16",
41063 auxType: auxBool,
41064 argLen: 2,
41065 generic: true,
41066 },
41067 {
41068 name: "Rsh32x32",
41069 auxType: auxBool,
41070 argLen: 2,
41071 generic: true,
41072 },
41073 {
41074 name: "Rsh32x64",
41075 auxType: auxBool,
41076 argLen: 2,
41077 generic: true,
41078 },
41079 {
41080 name: "Rsh64x8",
41081 auxType: auxBool,
41082 argLen: 2,
41083 generic: true,
41084 },
41085 {
41086 name: "Rsh64x16",
41087 auxType: auxBool,
41088 argLen: 2,
41089 generic: true,
41090 },
41091 {
41092 name: "Rsh64x32",
41093 auxType: auxBool,
41094 argLen: 2,
41095 generic: true,
41096 },
41097 {
41098 name: "Rsh64x64",
41099 auxType: auxBool,
41100 argLen: 2,
41101 generic: true,
41102 },
41103 {
41104 name: "Rsh8Ux8",
41105 auxType: auxBool,
41106 argLen: 2,
41107 generic: true,
41108 },
41109 {
41110 name: "Rsh8Ux16",
41111 auxType: auxBool,
41112 argLen: 2,
41113 generic: true,
41114 },
41115 {
41116 name: "Rsh8Ux32",
41117 auxType: auxBool,
41118 argLen: 2,
41119 generic: true,
41120 },
41121 {
41122 name: "Rsh8Ux64",
41123 auxType: auxBool,
41124 argLen: 2,
41125 generic: true,
41126 },
41127 {
41128 name: "Rsh16Ux8",
41129 auxType: auxBool,
41130 argLen: 2,
41131 generic: true,
41132 },
41133 {
41134 name: "Rsh16Ux16",
41135 auxType: auxBool,
41136 argLen: 2,
41137 generic: true,
41138 },
41139 {
41140 name: "Rsh16Ux32",
41141 auxType: auxBool,
41142 argLen: 2,
41143 generic: true,
41144 },
41145 {
41146 name: "Rsh16Ux64",
41147 auxType: auxBool,
41148 argLen: 2,
41149 generic: true,
41150 },
41151 {
41152 name: "Rsh32Ux8",
41153 auxType: auxBool,
41154 argLen: 2,
41155 generic: true,
41156 },
41157 {
41158 name: "Rsh32Ux16",
41159 auxType: auxBool,
41160 argLen: 2,
41161 generic: true,
41162 },
41163 {
41164 name: "Rsh32Ux32",
41165 auxType: auxBool,
41166 argLen: 2,
41167 generic: true,
41168 },
41169 {
41170 name: "Rsh32Ux64",
41171 auxType: auxBool,
41172 argLen: 2,
41173 generic: true,
41174 },
41175 {
41176 name: "Rsh64Ux8",
41177 auxType: auxBool,
41178 argLen: 2,
41179 generic: true,
41180 },
41181 {
41182 name: "Rsh64Ux16",
41183 auxType: auxBool,
41184 argLen: 2,
41185 generic: true,
41186 },
41187 {
41188 name: "Rsh64Ux32",
41189 auxType: auxBool,
41190 argLen: 2,
41191 generic: true,
41192 },
41193 {
41194 name: "Rsh64Ux64",
41195 auxType: auxBool,
41196 argLen: 2,
41197 generic: true,
41198 },
41199 {
41200 name: "Eq8",
41201 argLen: 2,
41202 commutative: true,
41203 generic: true,
41204 },
41205 {
41206 name: "Eq16",
41207 argLen: 2,
41208 commutative: true,
41209 generic: true,
41210 },
41211 {
41212 name: "Eq32",
41213 argLen: 2,
41214 commutative: true,
41215 generic: true,
41216 },
41217 {
41218 name: "Eq64",
41219 argLen: 2,
41220 commutative: true,
41221 generic: true,
41222 },
41223 {
41224 name: "EqPtr",
41225 argLen: 2,
41226 commutative: true,
41227 generic: true,
41228 },
41229 {
41230 name: "EqInter",
41231 argLen: 2,
41232 generic: true,
41233 },
41234 {
41235 name: "EqSlice",
41236 argLen: 2,
41237 generic: true,
41238 },
41239 {
41240 name: "Eq32F",
41241 argLen: 2,
41242 commutative: true,
41243 generic: true,
41244 },
41245 {
41246 name: "Eq64F",
41247 argLen: 2,
41248 commutative: true,
41249 generic: true,
41250 },
41251 {
41252 name: "Neq8",
41253 argLen: 2,
41254 commutative: true,
41255 generic: true,
41256 },
41257 {
41258 name: "Neq16",
41259 argLen: 2,
41260 commutative: true,
41261 generic: true,
41262 },
41263 {
41264 name: "Neq32",
41265 argLen: 2,
41266 commutative: true,
41267 generic: true,
41268 },
41269 {
41270 name: "Neq64",
41271 argLen: 2,
41272 commutative: true,
41273 generic: true,
41274 },
41275 {
41276 name: "NeqPtr",
41277 argLen: 2,
41278 commutative: true,
41279 generic: true,
41280 },
41281 {
41282 name: "NeqInter",
41283 argLen: 2,
41284 generic: true,
41285 },
41286 {
41287 name: "NeqSlice",
41288 argLen: 2,
41289 generic: true,
41290 },
41291 {
41292 name: "Neq32F",
41293 argLen: 2,
41294 commutative: true,
41295 generic: true,
41296 },
41297 {
41298 name: "Neq64F",
41299 argLen: 2,
41300 commutative: true,
41301 generic: true,
41302 },
41303 {
41304 name: "Less8",
41305 argLen: 2,
41306 generic: true,
41307 },
41308 {
41309 name: "Less8U",
41310 argLen: 2,
41311 generic: true,
41312 },
41313 {
41314 name: "Less16",
41315 argLen: 2,
41316 generic: true,
41317 },
41318 {
41319 name: "Less16U",
41320 argLen: 2,
41321 generic: true,
41322 },
41323 {
41324 name: "Less32",
41325 argLen: 2,
41326 generic: true,
41327 },
41328 {
41329 name: "Less32U",
41330 argLen: 2,
41331 generic: true,
41332 },
41333 {
41334 name: "Less64",
41335 argLen: 2,
41336 generic: true,
41337 },
41338 {
41339 name: "Less64U",
41340 argLen: 2,
41341 generic: true,
41342 },
41343 {
41344 name: "Less32F",
41345 argLen: 2,
41346 generic: true,
41347 },
41348 {
41349 name: "Less64F",
41350 argLen: 2,
41351 generic: true,
41352 },
41353 {
41354 name: "Leq8",
41355 argLen: 2,
41356 generic: true,
41357 },
41358 {
41359 name: "Leq8U",
41360 argLen: 2,
41361 generic: true,
41362 },
41363 {
41364 name: "Leq16",
41365 argLen: 2,
41366 generic: true,
41367 },
41368 {
41369 name: "Leq16U",
41370 argLen: 2,
41371 generic: true,
41372 },
41373 {
41374 name: "Leq32",
41375 argLen: 2,
41376 generic: true,
41377 },
41378 {
41379 name: "Leq32U",
41380 argLen: 2,
41381 generic: true,
41382 },
41383 {
41384 name: "Leq64",
41385 argLen: 2,
41386 generic: true,
41387 },
41388 {
41389 name: "Leq64U",
41390 argLen: 2,
41391 generic: true,
41392 },
41393 {
41394 name: "Leq32F",
41395 argLen: 2,
41396 generic: true,
41397 },
41398 {
41399 name: "Leq64F",
41400 argLen: 2,
41401 generic: true,
41402 },
41403 {
41404 name: "CondSelect",
41405 argLen: 3,
41406 generic: true,
41407 },
41408 {
41409 name: "AndB",
41410 argLen: 2,
41411 commutative: true,
41412 generic: true,
41413 },
41414 {
41415 name: "OrB",
41416 argLen: 2,
41417 commutative: true,
41418 generic: true,
41419 },
41420 {
41421 name: "EqB",
41422 argLen: 2,
41423 commutative: true,
41424 generic: true,
41425 },
41426 {
41427 name: "NeqB",
41428 argLen: 2,
41429 commutative: true,
41430 generic: true,
41431 },
41432 {
41433 name: "Not",
41434 argLen: 1,
41435 generic: true,
41436 },
41437 {
41438 name: "Neg8",
41439 argLen: 1,
41440 generic: true,
41441 },
41442 {
41443 name: "Neg16",
41444 argLen: 1,
41445 generic: true,
41446 },
41447 {
41448 name: "Neg32",
41449 argLen: 1,
41450 generic: true,
41451 },
41452 {
41453 name: "Neg64",
41454 argLen: 1,
41455 generic: true,
41456 },
41457 {
41458 name: "Neg32F",
41459 argLen: 1,
41460 generic: true,
41461 },
41462 {
41463 name: "Neg64F",
41464 argLen: 1,
41465 generic: true,
41466 },
41467 {
41468 name: "Com8",
41469 argLen: 1,
41470 generic: true,
41471 },
41472 {
41473 name: "Com16",
41474 argLen: 1,
41475 generic: true,
41476 },
41477 {
41478 name: "Com32",
41479 argLen: 1,
41480 generic: true,
41481 },
41482 {
41483 name: "Com64",
41484 argLen: 1,
41485 generic: true,
41486 },
41487 {
41488 name: "Ctz8",
41489 argLen: 1,
41490 generic: true,
41491 },
41492 {
41493 name: "Ctz16",
41494 argLen: 1,
41495 generic: true,
41496 },
41497 {
41498 name: "Ctz32",
41499 argLen: 1,
41500 generic: true,
41501 },
41502 {
41503 name: "Ctz64",
41504 argLen: 1,
41505 generic: true,
41506 },
41507 {
41508 name: "Ctz64On32",
41509 argLen: 2,
41510 generic: true,
41511 },
41512 {
41513 name: "Ctz8NonZero",
41514 argLen: 1,
41515 generic: true,
41516 },
41517 {
41518 name: "Ctz16NonZero",
41519 argLen: 1,
41520 generic: true,
41521 },
41522 {
41523 name: "Ctz32NonZero",
41524 argLen: 1,
41525 generic: true,
41526 },
41527 {
41528 name: "Ctz64NonZero",
41529 argLen: 1,
41530 generic: true,
41531 },
41532 {
41533 name: "BitLen8",
41534 argLen: 1,
41535 generic: true,
41536 },
41537 {
41538 name: "BitLen16",
41539 argLen: 1,
41540 generic: true,
41541 },
41542 {
41543 name: "BitLen32",
41544 argLen: 1,
41545 generic: true,
41546 },
41547 {
41548 name: "BitLen64",
41549 argLen: 1,
41550 generic: true,
41551 },
41552 {
41553 name: "Bswap16",
41554 argLen: 1,
41555 generic: true,
41556 },
41557 {
41558 name: "Bswap32",
41559 argLen: 1,
41560 generic: true,
41561 },
41562 {
41563 name: "Bswap64",
41564 argLen: 1,
41565 generic: true,
41566 },
41567 {
41568 name: "BitRev8",
41569 argLen: 1,
41570 generic: true,
41571 },
41572 {
41573 name: "BitRev16",
41574 argLen: 1,
41575 generic: true,
41576 },
41577 {
41578 name: "BitRev32",
41579 argLen: 1,
41580 generic: true,
41581 },
41582 {
41583 name: "BitRev64",
41584 argLen: 1,
41585 generic: true,
41586 },
41587 {
41588 name: "PopCount8",
41589 argLen: 1,
41590 generic: true,
41591 },
41592 {
41593 name: "PopCount16",
41594 argLen: 1,
41595 generic: true,
41596 },
41597 {
41598 name: "PopCount32",
41599 argLen: 1,
41600 generic: true,
41601 },
41602 {
41603 name: "PopCount64",
41604 argLen: 1,
41605 generic: true,
41606 },
41607 {
41608 name: "RotateLeft64",
41609 argLen: 2,
41610 generic: true,
41611 },
41612 {
41613 name: "RotateLeft32",
41614 argLen: 2,
41615 generic: true,
41616 },
41617 {
41618 name: "RotateLeft16",
41619 argLen: 2,
41620 generic: true,
41621 },
41622 {
41623 name: "RotateLeft8",
41624 argLen: 2,
41625 generic: true,
41626 },
41627 {
41628 name: "Sqrt",
41629 argLen: 1,
41630 generic: true,
41631 },
41632 {
41633 name: "Sqrt32",
41634 argLen: 1,
41635 generic: true,
41636 },
41637 {
41638 name: "Floor",
41639 argLen: 1,
41640 generic: true,
41641 },
41642 {
41643 name: "Ceil",
41644 argLen: 1,
41645 generic: true,
41646 },
41647 {
41648 name: "Trunc",
41649 argLen: 1,
41650 generic: true,
41651 },
41652 {
41653 name: "Round",
41654 argLen: 1,
41655 generic: true,
41656 },
41657 {
41658 name: "RoundToEven",
41659 argLen: 1,
41660 generic: true,
41661 },
41662 {
41663 name: "Abs",
41664 argLen: 1,
41665 generic: true,
41666 },
41667 {
41668 name: "Copysign",
41669 argLen: 2,
41670 generic: true,
41671 },
41672 {
41673 name: "Min64",
41674 argLen: 2,
41675 generic: true,
41676 },
41677 {
41678 name: "Max64",
41679 argLen: 2,
41680 generic: true,
41681 },
41682 {
41683 name: "Min64u",
41684 argLen: 2,
41685 generic: true,
41686 },
41687 {
41688 name: "Max64u",
41689 argLen: 2,
41690 generic: true,
41691 },
41692 {
41693 name: "Min64F",
41694 argLen: 2,
41695 generic: true,
41696 },
41697 {
41698 name: "Min32F",
41699 argLen: 2,
41700 generic: true,
41701 },
41702 {
41703 name: "Max64F",
41704 argLen: 2,
41705 generic: true,
41706 },
41707 {
41708 name: "Max32F",
41709 argLen: 2,
41710 generic: true,
41711 },
41712 {
41713 name: "FMA",
41714 argLen: 3,
41715 generic: true,
41716 },
41717 {
41718 name: "Phi",
41719 argLen: -1,
41720 zeroWidth: true,
41721 generic: true,
41722 },
41723 {
41724 name: "Copy",
41725 argLen: 1,
41726 generic: true,
41727 },
41728 {
41729 name: "Convert",
41730 argLen: 2,
41731 resultInArg0: true,
41732 zeroWidth: true,
41733 generic: true,
41734 },
41735 {
41736 name: "ConstBool",
41737 auxType: auxBool,
41738 argLen: 0,
41739 generic: true,
41740 },
41741 {
41742 name: "ConstString",
41743 auxType: auxString,
41744 argLen: 0,
41745 generic: true,
41746 },
41747 {
41748 name: "ConstNil",
41749 argLen: 0,
41750 generic: true,
41751 },
41752 {
41753 name: "Const8",
41754 auxType: auxInt8,
41755 argLen: 0,
41756 generic: true,
41757 },
41758 {
41759 name: "Const16",
41760 auxType: auxInt16,
41761 argLen: 0,
41762 generic: true,
41763 },
41764 {
41765 name: "Const32",
41766 auxType: auxInt32,
41767 argLen: 0,
41768 generic: true,
41769 },
41770 {
41771 name: "Const64",
41772 auxType: auxInt64,
41773 argLen: 0,
41774 generic: true,
41775 },
41776 {
41777 name: "Const32F",
41778 auxType: auxFloat32,
41779 argLen: 0,
41780 generic: true,
41781 },
41782 {
41783 name: "Const64F",
41784 auxType: auxFloat64,
41785 argLen: 0,
41786 generic: true,
41787 },
41788 {
41789 name: "ConstInterface",
41790 argLen: 0,
41791 generic: true,
41792 },
41793 {
41794 name: "ConstSlice",
41795 argLen: 0,
41796 generic: true,
41797 },
41798 {
41799 name: "InitMem",
41800 argLen: 0,
41801 zeroWidth: true,
41802 generic: true,
41803 },
41804 {
41805 name: "Arg",
41806 auxType: auxSymOff,
41807 argLen: 0,
41808 zeroWidth: true,
41809 symEffect: SymRead,
41810 generic: true,
41811 },
41812 {
41813 name: "ArgIntReg",
41814 auxType: auxNameOffsetInt8,
41815 argLen: 0,
41816 zeroWidth: true,
41817 generic: true,
41818 },
41819 {
41820 name: "ArgFloatReg",
41821 auxType: auxNameOffsetInt8,
41822 argLen: 0,
41823 zeroWidth: true,
41824 generic: true,
41825 },
41826 {
41827 name: "Addr",
41828 auxType: auxSym,
41829 argLen: 1,
41830 symEffect: SymAddr,
41831 generic: true,
41832 },
41833 {
41834 name: "LocalAddr",
41835 auxType: auxSym,
41836 argLen: 2,
41837 symEffect: SymAddr,
41838 generic: true,
41839 },
41840 {
41841 name: "SP",
41842 argLen: 0,
41843 zeroWidth: true,
41844 fixedReg: true,
41845 generic: true,
41846 },
41847 {
41848 name: "SB",
41849 argLen: 0,
41850 zeroWidth: true,
41851 fixedReg: true,
41852 generic: true,
41853 },
41854 {
41855 name: "SPanchored",
41856 argLen: 2,
41857 zeroWidth: true,
41858 generic: true,
41859 },
41860 {
41861 name: "Load",
41862 argLen: 2,
41863 generic: true,
41864 },
41865 {
41866 name: "Dereference",
41867 argLen: 2,
41868 generic: true,
41869 },
41870 {
41871 name: "Store",
41872 auxType: auxTyp,
41873 argLen: 3,
41874 generic: true,
41875 },
41876 {
41877 name: "Move",
41878 auxType: auxTypSize,
41879 argLen: 3,
41880 generic: true,
41881 },
41882 {
41883 name: "Zero",
41884 auxType: auxTypSize,
41885 argLen: 2,
41886 generic: true,
41887 },
41888 {
41889 name: "StoreWB",
41890 auxType: auxTyp,
41891 argLen: 3,
41892 generic: true,
41893 },
41894 {
41895 name: "MoveWB",
41896 auxType: auxTypSize,
41897 argLen: 3,
41898 generic: true,
41899 },
41900 {
41901 name: "ZeroWB",
41902 auxType: auxTypSize,
41903 argLen: 2,
41904 generic: true,
41905 },
41906 {
41907 name: "WBend",
41908 argLen: 1,
41909 generic: true,
41910 },
41911 {
41912 name: "WB",
41913 auxType: auxInt64,
41914 argLen: 1,
41915 generic: true,
41916 },
41917 {
41918 name: "HasCPUFeature",
41919 auxType: auxSym,
41920 argLen: 0,
41921 symEffect: SymNone,
41922 generic: true,
41923 },
41924 {
41925 name: "PanicBounds",
41926 auxType: auxInt64,
41927 argLen: 3,
41928 call: true,
41929 generic: true,
41930 },
41931 {
41932 name: "PanicExtend",
41933 auxType: auxInt64,
41934 argLen: 4,
41935 call: true,
41936 generic: true,
41937 },
41938 {
41939 name: "ClosureCall",
41940 auxType: auxCallOff,
41941 argLen: -1,
41942 call: true,
41943 generic: true,
41944 },
41945 {
41946 name: "StaticCall",
41947 auxType: auxCallOff,
41948 argLen: -1,
41949 call: true,
41950 generic: true,
41951 },
41952 {
41953 name: "InterCall",
41954 auxType: auxCallOff,
41955 argLen: -1,
41956 call: true,
41957 generic: true,
41958 },
41959 {
41960 name: "TailCall",
41961 auxType: auxCallOff,
41962 argLen: -1,
41963 call: true,
41964 generic: true,
41965 },
41966 {
41967 name: "ClosureLECall",
41968 auxType: auxCallOff,
41969 argLen: -1,
41970 call: true,
41971 generic: true,
41972 },
41973 {
41974 name: "StaticLECall",
41975 auxType: auxCallOff,
41976 argLen: -1,
41977 call: true,
41978 generic: true,
41979 },
41980 {
41981 name: "InterLECall",
41982 auxType: auxCallOff,
41983 argLen: -1,
41984 call: true,
41985 generic: true,
41986 },
41987 {
41988 name: "TailLECall",
41989 auxType: auxCallOff,
41990 argLen: -1,
41991 call: true,
41992 generic: true,
41993 },
41994 {
41995 name: "SignExt8to16",
41996 argLen: 1,
41997 generic: true,
41998 },
41999 {
42000 name: "SignExt8to32",
42001 argLen: 1,
42002 generic: true,
42003 },
42004 {
42005 name: "SignExt8to64",
42006 argLen: 1,
42007 generic: true,
42008 },
42009 {
42010 name: "SignExt16to32",
42011 argLen: 1,
42012 generic: true,
42013 },
42014 {
42015 name: "SignExt16to64",
42016 argLen: 1,
42017 generic: true,
42018 },
42019 {
42020 name: "SignExt32to64",
42021 argLen: 1,
42022 generic: true,
42023 },
42024 {
42025 name: "ZeroExt8to16",
42026 argLen: 1,
42027 generic: true,
42028 },
42029 {
42030 name: "ZeroExt8to32",
42031 argLen: 1,
42032 generic: true,
42033 },
42034 {
42035 name: "ZeroExt8to64",
42036 argLen: 1,
42037 generic: true,
42038 },
42039 {
42040 name: "ZeroExt16to32",
42041 argLen: 1,
42042 generic: true,
42043 },
42044 {
42045 name: "ZeroExt16to64",
42046 argLen: 1,
42047 generic: true,
42048 },
42049 {
42050 name: "ZeroExt32to64",
42051 argLen: 1,
42052 generic: true,
42053 },
42054 {
42055 name: "Trunc16to8",
42056 argLen: 1,
42057 generic: true,
42058 },
42059 {
42060 name: "Trunc32to8",
42061 argLen: 1,
42062 generic: true,
42063 },
42064 {
42065 name: "Trunc32to16",
42066 argLen: 1,
42067 generic: true,
42068 },
42069 {
42070 name: "Trunc64to8",
42071 argLen: 1,
42072 generic: true,
42073 },
42074 {
42075 name: "Trunc64to16",
42076 argLen: 1,
42077 generic: true,
42078 },
42079 {
42080 name: "Trunc64to32",
42081 argLen: 1,
42082 generic: true,
42083 },
42084 {
42085 name: "Cvt32to32F",
42086 argLen: 1,
42087 generic: true,
42088 },
42089 {
42090 name: "Cvt32to64F",
42091 argLen: 1,
42092 generic: true,
42093 },
42094 {
42095 name: "Cvt64to32F",
42096 argLen: 1,
42097 generic: true,
42098 },
42099 {
42100 name: "Cvt64to64F",
42101 argLen: 1,
42102 generic: true,
42103 },
42104 {
42105 name: "Cvt32Fto32",
42106 argLen: 1,
42107 generic: true,
42108 },
42109 {
42110 name: "Cvt32Fto64",
42111 argLen: 1,
42112 generic: true,
42113 },
42114 {
42115 name: "Cvt64Fto32",
42116 argLen: 1,
42117 generic: true,
42118 },
42119 {
42120 name: "Cvt64Fto64",
42121 argLen: 1,
42122 generic: true,
42123 },
42124 {
42125 name: "Cvt32Fto64F",
42126 argLen: 1,
42127 generic: true,
42128 },
42129 {
42130 name: "Cvt64Fto32F",
42131 argLen: 1,
42132 generic: true,
42133 },
42134 {
42135 name: "CvtBoolToUint8",
42136 argLen: 1,
42137 generic: true,
42138 },
42139 {
42140 name: "Round32F",
42141 argLen: 1,
42142 generic: true,
42143 },
42144 {
42145 name: "Round64F",
42146 argLen: 1,
42147 generic: true,
42148 },
42149 {
42150 name: "IsNonNil",
42151 argLen: 1,
42152 generic: true,
42153 },
42154 {
42155 name: "IsInBounds",
42156 argLen: 2,
42157 generic: true,
42158 },
42159 {
42160 name: "IsSliceInBounds",
42161 argLen: 2,
42162 generic: true,
42163 },
42164 {
42165 name: "NilCheck",
42166 argLen: 2,
42167 nilCheck: true,
42168 generic: true,
42169 },
42170 {
42171 name: "GetG",
42172 argLen: 1,
42173 zeroWidth: true,
42174 generic: true,
42175 },
42176 {
42177 name: "GetClosurePtr",
42178 argLen: 0,
42179 generic: true,
42180 },
42181 {
42182 name: "GetCallerPC",
42183 argLen: 0,
42184 generic: true,
42185 },
42186 {
42187 name: "GetCallerSP",
42188 argLen: 1,
42189 generic: true,
42190 },
42191 {
42192 name: "PtrIndex",
42193 argLen: 2,
42194 generic: true,
42195 },
42196 {
42197 name: "OffPtr",
42198 auxType: auxInt64,
42199 argLen: 1,
42200 generic: true,
42201 },
42202 {
42203 name: "SliceMake",
42204 argLen: 3,
42205 generic: true,
42206 },
42207 {
42208 name: "SlicePtr",
42209 argLen: 1,
42210 generic: true,
42211 },
42212 {
42213 name: "SliceLen",
42214 argLen: 1,
42215 generic: true,
42216 },
42217 {
42218 name: "SliceCap",
42219 argLen: 1,
42220 generic: true,
42221 },
42222 {
42223 name: "SlicePtrUnchecked",
42224 argLen: 1,
42225 generic: true,
42226 },
42227 {
42228 name: "ComplexMake",
42229 argLen: 2,
42230 generic: true,
42231 },
42232 {
42233 name: "ComplexReal",
42234 argLen: 1,
42235 generic: true,
42236 },
42237 {
42238 name: "ComplexImag",
42239 argLen: 1,
42240 generic: true,
42241 },
42242 {
42243 name: "StringMake",
42244 argLen: 2,
42245 generic: true,
42246 },
42247 {
42248 name: "StringPtr",
42249 argLen: 1,
42250 generic: true,
42251 },
42252 {
42253 name: "StringLen",
42254 argLen: 1,
42255 generic: true,
42256 },
42257 {
42258 name: "IMake",
42259 argLen: 2,
42260 generic: true,
42261 },
42262 {
42263 name: "ITab",
42264 argLen: 1,
42265 generic: true,
42266 },
42267 {
42268 name: "IData",
42269 argLen: 1,
42270 generic: true,
42271 },
42272 {
42273 name: "StructMake",
42274 argLen: -1,
42275 generic: true,
42276 },
42277 {
42278 name: "StructSelect",
42279 auxType: auxInt64,
42280 argLen: 1,
42281 generic: true,
42282 },
42283 {
42284 name: "ArrayMake0",
42285 argLen: 0,
42286 generic: true,
42287 },
42288 {
42289 name: "ArrayMake1",
42290 argLen: 1,
42291 generic: true,
42292 },
42293 {
42294 name: "ArraySelect",
42295 auxType: auxInt64,
42296 argLen: 1,
42297 generic: true,
42298 },
42299 {
42300 name: "StoreReg",
42301 argLen: 1,
42302 generic: true,
42303 },
42304 {
42305 name: "LoadReg",
42306 argLen: 1,
42307 generic: true,
42308 },
42309 {
42310 name: "FwdRef",
42311 auxType: auxSym,
42312 argLen: 0,
42313 symEffect: SymNone,
42314 generic: true,
42315 },
42316 {
42317 name: "Unknown",
42318 argLen: 0,
42319 generic: true,
42320 },
42321 {
42322 name: "VarDef",
42323 auxType: auxSym,
42324 argLen: 1,
42325 zeroWidth: true,
42326 symEffect: SymNone,
42327 generic: true,
42328 },
42329 {
42330 name: "VarLive",
42331 auxType: auxSym,
42332 argLen: 1,
42333 zeroWidth: true,
42334 symEffect: SymRead,
42335 generic: true,
42336 },
42337 {
42338 name: "KeepAlive",
42339 argLen: 2,
42340 zeroWidth: true,
42341 generic: true,
42342 },
42343 {
42344 name: "InlMark",
42345 auxType: auxInt32,
42346 argLen: 1,
42347 generic: true,
42348 },
42349 {
42350 name: "Int64Make",
42351 argLen: 2,
42352 generic: true,
42353 },
42354 {
42355 name: "Int64Hi",
42356 argLen: 1,
42357 generic: true,
42358 },
42359 {
42360 name: "Int64Lo",
42361 argLen: 1,
42362 generic: true,
42363 },
42364 {
42365 name: "Add32carry",
42366 argLen: 2,
42367 commutative: true,
42368 generic: true,
42369 },
42370 {
42371 name: "Add32withcarry",
42372 argLen: 3,
42373 commutative: true,
42374 generic: true,
42375 },
42376 {
42377 name: "Sub32carry",
42378 argLen: 2,
42379 generic: true,
42380 },
42381 {
42382 name: "Sub32withcarry",
42383 argLen: 3,
42384 generic: true,
42385 },
42386 {
42387 name: "Add64carry",
42388 argLen: 3,
42389 commutative: true,
42390 generic: true,
42391 },
42392 {
42393 name: "Sub64borrow",
42394 argLen: 3,
42395 generic: true,
42396 },
42397 {
42398 name: "Signmask",
42399 argLen: 1,
42400 generic: true,
42401 },
42402 {
42403 name: "Zeromask",
42404 argLen: 1,
42405 generic: true,
42406 },
42407 {
42408 name: "Slicemask",
42409 argLen: 1,
42410 generic: true,
42411 },
42412 {
42413 name: "SpectreIndex",
42414 argLen: 2,
42415 generic: true,
42416 },
42417 {
42418 name: "SpectreSliceIndex",
42419 argLen: 2,
42420 generic: true,
42421 },
42422 {
42423 name: "Cvt32Uto32F",
42424 argLen: 1,
42425 generic: true,
42426 },
42427 {
42428 name: "Cvt32Uto64F",
42429 argLen: 1,
42430 generic: true,
42431 },
42432 {
42433 name: "Cvt32Fto32U",
42434 argLen: 1,
42435 generic: true,
42436 },
42437 {
42438 name: "Cvt64Fto32U",
42439 argLen: 1,
42440 generic: true,
42441 },
42442 {
42443 name: "Cvt64Uto32F",
42444 argLen: 1,
42445 generic: true,
42446 },
42447 {
42448 name: "Cvt64Uto64F",
42449 argLen: 1,
42450 generic: true,
42451 },
42452 {
42453 name: "Cvt32Fto64U",
42454 argLen: 1,
42455 generic: true,
42456 },
42457 {
42458 name: "Cvt64Fto64U",
42459 argLen: 1,
42460 generic: true,
42461 },
42462 {
42463 name: "Select0",
42464 argLen: 1,
42465 zeroWidth: true,
42466 generic: true,
42467 },
42468 {
42469 name: "Select1",
42470 argLen: 1,
42471 zeroWidth: true,
42472 generic: true,
42473 },
42474 {
42475 name: "MakeTuple",
42476 argLen: 2,
42477 generic: true,
42478 },
42479 {
42480 name: "SelectN",
42481 auxType: auxInt64,
42482 argLen: 1,
42483 generic: true,
42484 },
42485 {
42486 name: "SelectNAddr",
42487 auxType: auxInt64,
42488 argLen: 1,
42489 generic: true,
42490 },
42491 {
42492 name: "MakeResult",
42493 argLen: -1,
42494 generic: true,
42495 },
42496 {
42497 name: "AtomicLoad8",
42498 argLen: 2,
42499 generic: true,
42500 },
42501 {
42502 name: "AtomicLoad32",
42503 argLen: 2,
42504 generic: true,
42505 },
42506 {
42507 name: "AtomicLoad64",
42508 argLen: 2,
42509 generic: true,
42510 },
42511 {
42512 name: "AtomicLoadPtr",
42513 argLen: 2,
42514 generic: true,
42515 },
42516 {
42517 name: "AtomicLoadAcq32",
42518 argLen: 2,
42519 generic: true,
42520 },
42521 {
42522 name: "AtomicLoadAcq64",
42523 argLen: 2,
42524 generic: true,
42525 },
42526 {
42527 name: "AtomicStore8",
42528 argLen: 3,
42529 hasSideEffects: true,
42530 generic: true,
42531 },
42532 {
42533 name: "AtomicStore32",
42534 argLen: 3,
42535 hasSideEffects: true,
42536 generic: true,
42537 },
42538 {
42539 name: "AtomicStore64",
42540 argLen: 3,
42541 hasSideEffects: true,
42542 generic: true,
42543 },
42544 {
42545 name: "AtomicStorePtrNoWB",
42546 argLen: 3,
42547 hasSideEffects: true,
42548 generic: true,
42549 },
42550 {
42551 name: "AtomicStoreRel32",
42552 argLen: 3,
42553 hasSideEffects: true,
42554 generic: true,
42555 },
42556 {
42557 name: "AtomicStoreRel64",
42558 argLen: 3,
42559 hasSideEffects: true,
42560 generic: true,
42561 },
42562 {
42563 name: "AtomicExchange8",
42564 argLen: 3,
42565 hasSideEffects: true,
42566 generic: true,
42567 },
42568 {
42569 name: "AtomicExchange32",
42570 argLen: 3,
42571 hasSideEffects: true,
42572 generic: true,
42573 },
42574 {
42575 name: "AtomicExchange64",
42576 argLen: 3,
42577 hasSideEffects: true,
42578 generic: true,
42579 },
42580 {
42581 name: "AtomicAdd32",
42582 argLen: 3,
42583 hasSideEffects: true,
42584 generic: true,
42585 },
42586 {
42587 name: "AtomicAdd64",
42588 argLen: 3,
42589 hasSideEffects: true,
42590 generic: true,
42591 },
42592 {
42593 name: "AtomicCompareAndSwap32",
42594 argLen: 4,
42595 hasSideEffects: true,
42596 generic: true,
42597 },
42598 {
42599 name: "AtomicCompareAndSwap64",
42600 argLen: 4,
42601 hasSideEffects: true,
42602 generic: true,
42603 },
42604 {
42605 name: "AtomicCompareAndSwapRel32",
42606 argLen: 4,
42607 hasSideEffects: true,
42608 generic: true,
42609 },
42610 {
42611 name: "AtomicAnd8",
42612 argLen: 3,
42613 hasSideEffects: true,
42614 generic: true,
42615 },
42616 {
42617 name: "AtomicOr8",
42618 argLen: 3,
42619 hasSideEffects: true,
42620 generic: true,
42621 },
42622 {
42623 name: "AtomicAnd32",
42624 argLen: 3,
42625 hasSideEffects: true,
42626 generic: true,
42627 },
42628 {
42629 name: "AtomicOr32",
42630 argLen: 3,
42631 hasSideEffects: true,
42632 generic: true,
42633 },
42634 {
42635 name: "AtomicAnd64value",
42636 argLen: 3,
42637 hasSideEffects: true,
42638 generic: true,
42639 },
42640 {
42641 name: "AtomicAnd32value",
42642 argLen: 3,
42643 hasSideEffects: true,
42644 generic: true,
42645 },
42646 {
42647 name: "AtomicAnd8value",
42648 argLen: 3,
42649 hasSideEffects: true,
42650 generic: true,
42651 },
42652 {
42653 name: "AtomicOr64value",
42654 argLen: 3,
42655 hasSideEffects: true,
42656 generic: true,
42657 },
42658 {
42659 name: "AtomicOr32value",
42660 argLen: 3,
42661 hasSideEffects: true,
42662 generic: true,
42663 },
42664 {
42665 name: "AtomicOr8value",
42666 argLen: 3,
42667 hasSideEffects: true,
42668 generic: true,
42669 },
42670 {
42671 name: "AtomicStore8Variant",
42672 argLen: 3,
42673 hasSideEffects: true,
42674 generic: true,
42675 },
42676 {
42677 name: "AtomicStore32Variant",
42678 argLen: 3,
42679 hasSideEffects: true,
42680 generic: true,
42681 },
42682 {
42683 name: "AtomicStore64Variant",
42684 argLen: 3,
42685 hasSideEffects: true,
42686 generic: true,
42687 },
42688 {
42689 name: "AtomicAdd32Variant",
42690 argLen: 3,
42691 hasSideEffects: true,
42692 generic: true,
42693 },
42694 {
42695 name: "AtomicAdd64Variant",
42696 argLen: 3,
42697 hasSideEffects: true,
42698 generic: true,
42699 },
42700 {
42701 name: "AtomicExchange8Variant",
42702 argLen: 3,
42703 hasSideEffects: true,
42704 generic: true,
42705 },
42706 {
42707 name: "AtomicExchange32Variant",
42708 argLen: 3,
42709 hasSideEffects: true,
42710 generic: true,
42711 },
42712 {
42713 name: "AtomicExchange64Variant",
42714 argLen: 3,
42715 hasSideEffects: true,
42716 generic: true,
42717 },
42718 {
42719 name: "AtomicCompareAndSwap32Variant",
42720 argLen: 4,
42721 hasSideEffects: true,
42722 generic: true,
42723 },
42724 {
42725 name: "AtomicCompareAndSwap64Variant",
42726 argLen: 4,
42727 hasSideEffects: true,
42728 generic: true,
42729 },
42730 {
42731 name: "AtomicAnd64valueVariant",
42732 argLen: 3,
42733 hasSideEffects: true,
42734 generic: true,
42735 },
42736 {
42737 name: "AtomicOr64valueVariant",
42738 argLen: 3,
42739 hasSideEffects: true,
42740 generic: true,
42741 },
42742 {
42743 name: "AtomicAnd32valueVariant",
42744 argLen: 3,
42745 hasSideEffects: true,
42746 generic: true,
42747 },
42748 {
42749 name: "AtomicOr32valueVariant",
42750 argLen: 3,
42751 hasSideEffects: true,
42752 generic: true,
42753 },
42754 {
42755 name: "AtomicAnd8valueVariant",
42756 argLen: 3,
42757 hasSideEffects: true,
42758 generic: true,
42759 },
42760 {
42761 name: "AtomicOr8valueVariant",
42762 argLen: 3,
42763 hasSideEffects: true,
42764 generic: true,
42765 },
42766 {
42767 name: "PubBarrier",
42768 argLen: 1,
42769 hasSideEffects: true,
42770 generic: true,
42771 },
42772 {
42773 name: "Clobber",
42774 auxType: auxSymOff,
42775 argLen: 0,
42776 symEffect: SymNone,
42777 generic: true,
42778 },
42779 {
42780 name: "ClobberReg",
42781 argLen: 0,
42782 generic: true,
42783 },
42784 {
42785 name: "PrefetchCache",
42786 argLen: 2,
42787 hasSideEffects: true,
42788 generic: true,
42789 },
42790 {
42791 name: "PrefetchCacheStreamed",
42792 argLen: 2,
42793 hasSideEffects: true,
42794 generic: true,
42795 },
42796 }
42797
42798 func (o Op) Asm() obj.As { return opcodeTable[o].asm }
42799 func (o Op) Scale() int16 { return int16(opcodeTable[o].scale) }
42800 func (o Op) String() string { return opcodeTable[o].name }
42801 func (o Op) SymEffect() SymEffect { return opcodeTable[o].symEffect }
42802 func (o Op) IsCall() bool { return opcodeTable[o].call }
42803 func (o Op) IsTailCall() bool { return opcodeTable[o].tailCall }
42804 func (o Op) HasSideEffects() bool { return opcodeTable[o].hasSideEffects }
42805 func (o Op) UnsafePoint() bool { return opcodeTable[o].unsafePoint }
42806 func (o Op) ResultInArg0() bool { return opcodeTable[o].resultInArg0 }
42807
42808 var registers386 = [...]Register{
42809 {0, x86.REG_AX, "AX"},
42810 {1, x86.REG_CX, "CX"},
42811 {2, x86.REG_DX, "DX"},
42812 {3, x86.REG_BX, "BX"},
42813 {4, x86.REGSP, "SP"},
42814 {5, x86.REG_BP, "BP"},
42815 {6, x86.REG_SI, "SI"},
42816 {7, x86.REG_DI, "DI"},
42817 {8, x86.REG_X0, "X0"},
42818 {9, x86.REG_X1, "X1"},
42819 {10, x86.REG_X2, "X2"},
42820 {11, x86.REG_X3, "X3"},
42821 {12, x86.REG_X4, "X4"},
42822 {13, x86.REG_X5, "X5"},
42823 {14, x86.REG_X6, "X6"},
42824 {15, x86.REG_X7, "X7"},
42825 {16, 0, "SB"},
42826 }
42827 var paramIntReg386 = []int8(nil)
42828 var paramFloatReg386 = []int8(nil)
42829 var gpRegMask386 = regMask(239)
42830 var fpRegMask386 = regMask(65280)
42831 var specialRegMask386 = regMask(0)
42832 var framepointerReg386 = int8(5)
42833 var linkReg386 = int8(-1)
42834 var registersAMD64 = [...]Register{
42835 {0, x86.REG_AX, "AX"},
42836 {1, x86.REG_CX, "CX"},
42837 {2, x86.REG_DX, "DX"},
42838 {3, x86.REG_BX, "BX"},
42839 {4, x86.REGSP, "SP"},
42840 {5, x86.REG_BP, "BP"},
42841 {6, x86.REG_SI, "SI"},
42842 {7, x86.REG_DI, "DI"},
42843 {8, x86.REG_R8, "R8"},
42844 {9, x86.REG_R9, "R9"},
42845 {10, x86.REG_R10, "R10"},
42846 {11, x86.REG_R11, "R11"},
42847 {12, x86.REG_R12, "R12"},
42848 {13, x86.REG_R13, "R13"},
42849 {14, x86.REGG, "g"},
42850 {15, x86.REG_R15, "R15"},
42851 {16, x86.REG_X0, "X0"},
42852 {17, x86.REG_X1, "X1"},
42853 {18, x86.REG_X2, "X2"},
42854 {19, x86.REG_X3, "X3"},
42855 {20, x86.REG_X4, "X4"},
42856 {21, x86.REG_X5, "X5"},
42857 {22, x86.REG_X6, "X6"},
42858 {23, x86.REG_X7, "X7"},
42859 {24, x86.REG_X8, "X8"},
42860 {25, x86.REG_X9, "X9"},
42861 {26, x86.REG_X10, "X10"},
42862 {27, x86.REG_X11, "X11"},
42863 {28, x86.REG_X12, "X12"},
42864 {29, x86.REG_X13, "X13"},
42865 {30, x86.REG_X14, "X14"},
42866 {31, x86.REG_X15, "X15"},
42867 {32, 0, "SB"},
42868 }
42869 var paramIntRegAMD64 = []int8{0, 3, 1, 7, 6, 8, 9, 10, 11}
42870 var paramFloatRegAMD64 = []int8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}
42871 var gpRegMaskAMD64 = regMask(49135)
42872 var fpRegMaskAMD64 = regMask(2147418112)
42873 var specialRegMaskAMD64 = regMask(2147483648)
42874 var framepointerRegAMD64 = int8(5)
42875 var linkRegAMD64 = int8(-1)
42876 var registersARM = [...]Register{
42877 {0, arm.REG_R0, "R0"},
42878 {1, arm.REG_R1, "R1"},
42879 {2, arm.REG_R2, "R2"},
42880 {3, arm.REG_R3, "R3"},
42881 {4, arm.REG_R4, "R4"},
42882 {5, arm.REG_R5, "R5"},
42883 {6, arm.REG_R6, "R6"},
42884 {7, arm.REG_R7, "R7"},
42885 {8, arm.REG_R8, "R8"},
42886 {9, arm.REG_R9, "R9"},
42887 {10, arm.REGG, "g"},
42888 {11, arm.REG_R11, "R11"},
42889 {12, arm.REG_R12, "R12"},
42890 {13, arm.REGSP, "SP"},
42891 {14, arm.REG_R14, "R14"},
42892 {15, arm.REG_R15, "R15"},
42893 {16, arm.REG_F0, "F0"},
42894 {17, arm.REG_F1, "F1"},
42895 {18, arm.REG_F2, "F2"},
42896 {19, arm.REG_F3, "F3"},
42897 {20, arm.REG_F4, "F4"},
42898 {21, arm.REG_F5, "F5"},
42899 {22, arm.REG_F6, "F6"},
42900 {23, arm.REG_F7, "F7"},
42901 {24, arm.REG_F8, "F8"},
42902 {25, arm.REG_F9, "F9"},
42903 {26, arm.REG_F10, "F10"},
42904 {27, arm.REG_F11, "F11"},
42905 {28, arm.REG_F12, "F12"},
42906 {29, arm.REG_F13, "F13"},
42907 {30, arm.REG_F14, "F14"},
42908 {31, arm.REG_F15, "F15"},
42909 {32, 0, "SB"},
42910 }
42911 var paramIntRegARM = []int8(nil)
42912 var paramFloatRegARM = []int8(nil)
42913 var gpRegMaskARM = regMask(21503)
42914 var fpRegMaskARM = regMask(4294901760)
42915 var specialRegMaskARM = regMask(0)
42916 var framepointerRegARM = int8(-1)
42917 var linkRegARM = int8(14)
42918 var registersARM64 = [...]Register{
42919 {0, arm64.REG_R0, "R0"},
42920 {1, arm64.REG_R1, "R1"},
42921 {2, arm64.REG_R2, "R2"},
42922 {3, arm64.REG_R3, "R3"},
42923 {4, arm64.REG_R4, "R4"},
42924 {5, arm64.REG_R5, "R5"},
42925 {6, arm64.REG_R6, "R6"},
42926 {7, arm64.REG_R7, "R7"},
42927 {8, arm64.REG_R8, "R8"},
42928 {9, arm64.REG_R9, "R9"},
42929 {10, arm64.REG_R10, "R10"},
42930 {11, arm64.REG_R11, "R11"},
42931 {12, arm64.REG_R12, "R12"},
42932 {13, arm64.REG_R13, "R13"},
42933 {14, arm64.REG_R14, "R14"},
42934 {15, arm64.REG_R15, "R15"},
42935 {16, arm64.REG_R16, "R16"},
42936 {17, arm64.REG_R17, "R17"},
42937 {18, arm64.REG_R19, "R19"},
42938 {19, arm64.REG_R20, "R20"},
42939 {20, arm64.REG_R21, "R21"},
42940 {21, arm64.REG_R22, "R22"},
42941 {22, arm64.REG_R23, "R23"},
42942 {23, arm64.REG_R24, "R24"},
42943 {24, arm64.REG_R25, "R25"},
42944 {25, arm64.REG_R26, "R26"},
42945 {26, arm64.REGG, "g"},
42946 {27, arm64.REG_R29, "R29"},
42947 {28, arm64.REG_R30, "R30"},
42948 {29, arm64.REGZERO, "ZERO"},
42949 {30, arm64.REGSP, "SP"},
42950 {31, arm64.REG_F0, "F0"},
42951 {32, arm64.REG_F1, "F1"},
42952 {33, arm64.REG_F2, "F2"},
42953 {34, arm64.REG_F3, "F3"},
42954 {35, arm64.REG_F4, "F4"},
42955 {36, arm64.REG_F5, "F5"},
42956 {37, arm64.REG_F6, "F6"},
42957 {38, arm64.REG_F7, "F7"},
42958 {39, arm64.REG_F8, "F8"},
42959 {40, arm64.REG_F9, "F9"},
42960 {41, arm64.REG_F10, "F10"},
42961 {42, arm64.REG_F11, "F11"},
42962 {43, arm64.REG_F12, "F12"},
42963 {44, arm64.REG_F13, "F13"},
42964 {45, arm64.REG_F14, "F14"},
42965 {46, arm64.REG_F15, "F15"},
42966 {47, arm64.REG_F16, "F16"},
42967 {48, arm64.REG_F17, "F17"},
42968 {49, arm64.REG_F18, "F18"},
42969 {50, arm64.REG_F19, "F19"},
42970 {51, arm64.REG_F20, "F20"},
42971 {52, arm64.REG_F21, "F21"},
42972 {53, arm64.REG_F22, "F22"},
42973 {54, arm64.REG_F23, "F23"},
42974 {55, arm64.REG_F24, "F24"},
42975 {56, arm64.REG_F25, "F25"},
42976 {57, arm64.REG_F26, "F26"},
42977 {58, arm64.REG_F27, "F27"},
42978 {59, arm64.REG_F28, "F28"},
42979 {60, arm64.REG_F29, "F29"},
42980 {61, arm64.REG_F30, "F30"},
42981 {62, arm64.REG_F31, "F31"},
42982 {63, 0, "SB"},
42983 }
42984 var paramIntRegARM64 = []int8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
42985 var paramFloatRegARM64 = []int8{31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46}
42986 var gpRegMaskARM64 = regMask(335544319)
42987 var fpRegMaskARM64 = regMask(9223372034707292160)
42988 var specialRegMaskARM64 = regMask(0)
42989 var framepointerRegARM64 = int8(-1)
42990 var linkRegARM64 = int8(28)
42991 var registersLOONG64 = [...]Register{
42992 {0, loong64.REG_R0, "R0"},
42993 {1, loong64.REG_R1, "R1"},
42994 {2, loong64.REGSP, "SP"},
42995 {3, loong64.REG_R4, "R4"},
42996 {4, loong64.REG_R5, "R5"},
42997 {5, loong64.REG_R6, "R6"},
42998 {6, loong64.REG_R7, "R7"},
42999 {7, loong64.REG_R8, "R8"},
43000 {8, loong64.REG_R9, "R9"},
43001 {9, loong64.REG_R10, "R10"},
43002 {10, loong64.REG_R11, "R11"},
43003 {11, loong64.REG_R12, "R12"},
43004 {12, loong64.REG_R13, "R13"},
43005 {13, loong64.REG_R14, "R14"},
43006 {14, loong64.REG_R15, "R15"},
43007 {15, loong64.REG_R16, "R16"},
43008 {16, loong64.REG_R17, "R17"},
43009 {17, loong64.REG_R18, "R18"},
43010 {18, loong64.REG_R19, "R19"},
43011 {19, loong64.REG_R20, "R20"},
43012 {20, loong64.REG_R21, "R21"},
43013 {21, loong64.REGG, "g"},
43014 {22, loong64.REG_R23, "R23"},
43015 {23, loong64.REG_R24, "R24"},
43016 {24, loong64.REG_R25, "R25"},
43017 {25, loong64.REG_R26, "R26"},
43018 {26, loong64.REG_R27, "R27"},
43019 {27, loong64.REG_R28, "R28"},
43020 {28, loong64.REG_R29, "R29"},
43021 {29, loong64.REG_R31, "R31"},
43022 {30, loong64.REG_F0, "F0"},
43023 {31, loong64.REG_F1, "F1"},
43024 {32, loong64.REG_F2, "F2"},
43025 {33, loong64.REG_F3, "F3"},
43026 {34, loong64.REG_F4, "F4"},
43027 {35, loong64.REG_F5, "F5"},
43028 {36, loong64.REG_F6, "F6"},
43029 {37, loong64.REG_F7, "F7"},
43030 {38, loong64.REG_F8, "F8"},
43031 {39, loong64.REG_F9, "F9"},
43032 {40, loong64.REG_F10, "F10"},
43033 {41, loong64.REG_F11, "F11"},
43034 {42, loong64.REG_F12, "F12"},
43035 {43, loong64.REG_F13, "F13"},
43036 {44, loong64.REG_F14, "F14"},
43037 {45, loong64.REG_F15, "F15"},
43038 {46, loong64.REG_F16, "F16"},
43039 {47, loong64.REG_F17, "F17"},
43040 {48, loong64.REG_F18, "F18"},
43041 {49, loong64.REG_F19, "F19"},
43042 {50, loong64.REG_F20, "F20"},
43043 {51, loong64.REG_F21, "F21"},
43044 {52, loong64.REG_F22, "F22"},
43045 {53, loong64.REG_F23, "F23"},
43046 {54, loong64.REG_F24, "F24"},
43047 {55, loong64.REG_F25, "F25"},
43048 {56, loong64.REG_F26, "F26"},
43049 {57, loong64.REG_F27, "F27"},
43050 {58, loong64.REG_F28, "F28"},
43051 {59, loong64.REG_F29, "F29"},
43052 {60, loong64.REG_F30, "F30"},
43053 {61, loong64.REG_F31, "F31"},
43054 {62, 0, "SB"},
43055 }
43056 var paramIntRegLOONG64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}
43057 var paramFloatRegLOONG64 = []int8{30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45}
43058 var gpRegMaskLOONG64 = regMask(1071644664)
43059 var fpRegMaskLOONG64 = regMask(4611686017353646080)
43060 var specialRegMaskLOONG64 = regMask(0)
43061 var framepointerRegLOONG64 = int8(-1)
43062 var linkRegLOONG64 = int8(1)
43063 var registersMIPS = [...]Register{
43064 {0, mips.REG_R0, "R0"},
43065 {1, mips.REG_R1, "R1"},
43066 {2, mips.REG_R2, "R2"},
43067 {3, mips.REG_R3, "R3"},
43068 {4, mips.REG_R4, "R4"},
43069 {5, mips.REG_R5, "R5"},
43070 {6, mips.REG_R6, "R6"},
43071 {7, mips.REG_R7, "R7"},
43072 {8, mips.REG_R8, "R8"},
43073 {9, mips.REG_R9, "R9"},
43074 {10, mips.REG_R10, "R10"},
43075 {11, mips.REG_R11, "R11"},
43076 {12, mips.REG_R12, "R12"},
43077 {13, mips.REG_R13, "R13"},
43078 {14, mips.REG_R14, "R14"},
43079 {15, mips.REG_R15, "R15"},
43080 {16, mips.REG_R16, "R16"},
43081 {17, mips.REG_R17, "R17"},
43082 {18, mips.REG_R18, "R18"},
43083 {19, mips.REG_R19, "R19"},
43084 {20, mips.REG_R20, "R20"},
43085 {21, mips.REG_R21, "R21"},
43086 {22, mips.REG_R22, "R22"},
43087 {23, mips.REG_R24, "R24"},
43088 {24, mips.REG_R25, "R25"},
43089 {25, mips.REG_R28, "R28"},
43090 {26, mips.REGSP, "SP"},
43091 {27, mips.REGG, "g"},
43092 {28, mips.REG_R31, "R31"},
43093 {29, mips.REG_F0, "F0"},
43094 {30, mips.REG_F2, "F2"},
43095 {31, mips.REG_F4, "F4"},
43096 {32, mips.REG_F6, "F6"},
43097 {33, mips.REG_F8, "F8"},
43098 {34, mips.REG_F10, "F10"},
43099 {35, mips.REG_F12, "F12"},
43100 {36, mips.REG_F14, "F14"},
43101 {37, mips.REG_F16, "F16"},
43102 {38, mips.REG_F18, "F18"},
43103 {39, mips.REG_F20, "F20"},
43104 {40, mips.REG_F22, "F22"},
43105 {41, mips.REG_F24, "F24"},
43106 {42, mips.REG_F26, "F26"},
43107 {43, mips.REG_F28, "F28"},
43108 {44, mips.REG_F30, "F30"},
43109 {45, mips.REG_HI, "HI"},
43110 {46, mips.REG_LO, "LO"},
43111 {47, 0, "SB"},
43112 }
43113 var paramIntRegMIPS = []int8(nil)
43114 var paramFloatRegMIPS = []int8(nil)
43115 var gpRegMaskMIPS = regMask(335544318)
43116 var fpRegMaskMIPS = regMask(35183835217920)
43117 var specialRegMaskMIPS = regMask(105553116266496)
43118 var framepointerRegMIPS = int8(-1)
43119 var linkRegMIPS = int8(28)
43120 var registersMIPS64 = [...]Register{
43121 {0, mips.REG_R0, "R0"},
43122 {1, mips.REG_R1, "R1"},
43123 {2, mips.REG_R2, "R2"},
43124 {3, mips.REG_R3, "R3"},
43125 {4, mips.REG_R4, "R4"},
43126 {5, mips.REG_R5, "R5"},
43127 {6, mips.REG_R6, "R6"},
43128 {7, mips.REG_R7, "R7"},
43129 {8, mips.REG_R8, "R8"},
43130 {9, mips.REG_R9, "R9"},
43131 {10, mips.REG_R10, "R10"},
43132 {11, mips.REG_R11, "R11"},
43133 {12, mips.REG_R12, "R12"},
43134 {13, mips.REG_R13, "R13"},
43135 {14, mips.REG_R14, "R14"},
43136 {15, mips.REG_R15, "R15"},
43137 {16, mips.REG_R16, "R16"},
43138 {17, mips.REG_R17, "R17"},
43139 {18, mips.REG_R18, "R18"},
43140 {19, mips.REG_R19, "R19"},
43141 {20, mips.REG_R20, "R20"},
43142 {21, mips.REG_R21, "R21"},
43143 {22, mips.REG_R22, "R22"},
43144 {23, mips.REG_R24, "R24"},
43145 {24, mips.REG_R25, "R25"},
43146 {25, mips.REGSP, "SP"},
43147 {26, mips.REGG, "g"},
43148 {27, mips.REG_R31, "R31"},
43149 {28, mips.REG_F0, "F0"},
43150 {29, mips.REG_F1, "F1"},
43151 {30, mips.REG_F2, "F2"},
43152 {31, mips.REG_F3, "F3"},
43153 {32, mips.REG_F4, "F4"},
43154 {33, mips.REG_F5, "F5"},
43155 {34, mips.REG_F6, "F6"},
43156 {35, mips.REG_F7, "F7"},
43157 {36, mips.REG_F8, "F8"},
43158 {37, mips.REG_F9, "F9"},
43159 {38, mips.REG_F10, "F10"},
43160 {39, mips.REG_F11, "F11"},
43161 {40, mips.REG_F12, "F12"},
43162 {41, mips.REG_F13, "F13"},
43163 {42, mips.REG_F14, "F14"},
43164 {43, mips.REG_F15, "F15"},
43165 {44, mips.REG_F16, "F16"},
43166 {45, mips.REG_F17, "F17"},
43167 {46, mips.REG_F18, "F18"},
43168 {47, mips.REG_F19, "F19"},
43169 {48, mips.REG_F20, "F20"},
43170 {49, mips.REG_F21, "F21"},
43171 {50, mips.REG_F22, "F22"},
43172 {51, mips.REG_F23, "F23"},
43173 {52, mips.REG_F24, "F24"},
43174 {53, mips.REG_F25, "F25"},
43175 {54, mips.REG_F26, "F26"},
43176 {55, mips.REG_F27, "F27"},
43177 {56, mips.REG_F28, "F28"},
43178 {57, mips.REG_F29, "F29"},
43179 {58, mips.REG_F30, "F30"},
43180 {59, mips.REG_F31, "F31"},
43181 {60, mips.REG_HI, "HI"},
43182 {61, mips.REG_LO, "LO"},
43183 {62, 0, "SB"},
43184 }
43185 var paramIntRegMIPS64 = []int8(nil)
43186 var paramFloatRegMIPS64 = []int8(nil)
43187 var gpRegMaskMIPS64 = regMask(167772158)
43188 var fpRegMaskMIPS64 = regMask(1152921504338411520)
43189 var specialRegMaskMIPS64 = regMask(3458764513820540928)
43190 var framepointerRegMIPS64 = int8(-1)
43191 var linkRegMIPS64 = int8(27)
43192 var registersPPC64 = [...]Register{
43193 {0, ppc64.REG_R0, "R0"},
43194 {1, ppc64.REGSP, "SP"},
43195 {2, 0, "SB"},
43196 {3, ppc64.REG_R3, "R3"},
43197 {4, ppc64.REG_R4, "R4"},
43198 {5, ppc64.REG_R5, "R5"},
43199 {6, ppc64.REG_R6, "R6"},
43200 {7, ppc64.REG_R7, "R7"},
43201 {8, ppc64.REG_R8, "R8"},
43202 {9, ppc64.REG_R9, "R9"},
43203 {10, ppc64.REG_R10, "R10"},
43204 {11, ppc64.REG_R11, "R11"},
43205 {12, ppc64.REG_R12, "R12"},
43206 {13, ppc64.REG_R13, "R13"},
43207 {14, ppc64.REG_R14, "R14"},
43208 {15, ppc64.REG_R15, "R15"},
43209 {16, ppc64.REG_R16, "R16"},
43210 {17, ppc64.REG_R17, "R17"},
43211 {18, ppc64.REG_R18, "R18"},
43212 {19, ppc64.REG_R19, "R19"},
43213 {20, ppc64.REG_R20, "R20"},
43214 {21, ppc64.REG_R21, "R21"},
43215 {22, ppc64.REG_R22, "R22"},
43216 {23, ppc64.REG_R23, "R23"},
43217 {24, ppc64.REG_R24, "R24"},
43218 {25, ppc64.REG_R25, "R25"},
43219 {26, ppc64.REG_R26, "R26"},
43220 {27, ppc64.REG_R27, "R27"},
43221 {28, ppc64.REG_R28, "R28"},
43222 {29, ppc64.REG_R29, "R29"},
43223 {30, ppc64.REGG, "g"},
43224 {31, ppc64.REG_R31, "R31"},
43225 {32, ppc64.REG_F0, "F0"},
43226 {33, ppc64.REG_F1, "F1"},
43227 {34, ppc64.REG_F2, "F2"},
43228 {35, ppc64.REG_F3, "F3"},
43229 {36, ppc64.REG_F4, "F4"},
43230 {37, ppc64.REG_F5, "F5"},
43231 {38, ppc64.REG_F6, "F6"},
43232 {39, ppc64.REG_F7, "F7"},
43233 {40, ppc64.REG_F8, "F8"},
43234 {41, ppc64.REG_F9, "F9"},
43235 {42, ppc64.REG_F10, "F10"},
43236 {43, ppc64.REG_F11, "F11"},
43237 {44, ppc64.REG_F12, "F12"},
43238 {45, ppc64.REG_F13, "F13"},
43239 {46, ppc64.REG_F14, "F14"},
43240 {47, ppc64.REG_F15, "F15"},
43241 {48, ppc64.REG_F16, "F16"},
43242 {49, ppc64.REG_F17, "F17"},
43243 {50, ppc64.REG_F18, "F18"},
43244 {51, ppc64.REG_F19, "F19"},
43245 {52, ppc64.REG_F20, "F20"},
43246 {53, ppc64.REG_F21, "F21"},
43247 {54, ppc64.REG_F22, "F22"},
43248 {55, ppc64.REG_F23, "F23"},
43249 {56, ppc64.REG_F24, "F24"},
43250 {57, ppc64.REG_F25, "F25"},
43251 {58, ppc64.REG_F26, "F26"},
43252 {59, ppc64.REG_F27, "F27"},
43253 {60, ppc64.REG_F28, "F28"},
43254 {61, ppc64.REG_F29, "F29"},
43255 {62, ppc64.REG_F30, "F30"},
43256 {63, ppc64.REG_XER, "XER"},
43257 }
43258 var paramIntRegPPC64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 17}
43259 var paramFloatRegPPC64 = []int8{33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44}
43260 var gpRegMaskPPC64 = regMask(1073733624)
43261 var fpRegMaskPPC64 = regMask(9223372032559808512)
43262 var specialRegMaskPPC64 = regMask(9223372036854775808)
43263 var framepointerRegPPC64 = int8(-1)
43264 var linkRegPPC64 = int8(-1)
43265 var registersRISCV64 = [...]Register{
43266 {0, riscv.REG_X0, "X0"},
43267 {1, riscv.REGSP, "SP"},
43268 {2, riscv.REG_X3, "X3"},
43269 {3, riscv.REG_X4, "X4"},
43270 {4, riscv.REG_X5, "X5"},
43271 {5, riscv.REG_X6, "X6"},
43272 {6, riscv.REG_X7, "X7"},
43273 {7, riscv.REG_X8, "X8"},
43274 {8, riscv.REG_X9, "X9"},
43275 {9, riscv.REG_X10, "X10"},
43276 {10, riscv.REG_X11, "X11"},
43277 {11, riscv.REG_X12, "X12"},
43278 {12, riscv.REG_X13, "X13"},
43279 {13, riscv.REG_X14, "X14"},
43280 {14, riscv.REG_X15, "X15"},
43281 {15, riscv.REG_X16, "X16"},
43282 {16, riscv.REG_X17, "X17"},
43283 {17, riscv.REG_X18, "X18"},
43284 {18, riscv.REG_X19, "X19"},
43285 {19, riscv.REG_X20, "X20"},
43286 {20, riscv.REG_X21, "X21"},
43287 {21, riscv.REG_X22, "X22"},
43288 {22, riscv.REG_X23, "X23"},
43289 {23, riscv.REG_X24, "X24"},
43290 {24, riscv.REG_X25, "X25"},
43291 {25, riscv.REG_X26, "X26"},
43292 {26, riscv.REGG, "g"},
43293 {27, riscv.REG_X28, "X28"},
43294 {28, riscv.REG_X29, "X29"},
43295 {29, riscv.REG_X30, "X30"},
43296 {30, riscv.REG_X31, "X31"},
43297 {31, riscv.REG_F0, "F0"},
43298 {32, riscv.REG_F1, "F1"},
43299 {33, riscv.REG_F2, "F2"},
43300 {34, riscv.REG_F3, "F3"},
43301 {35, riscv.REG_F4, "F4"},
43302 {36, riscv.REG_F5, "F5"},
43303 {37, riscv.REG_F6, "F6"},
43304 {38, riscv.REG_F7, "F7"},
43305 {39, riscv.REG_F8, "F8"},
43306 {40, riscv.REG_F9, "F9"},
43307 {41, riscv.REG_F10, "F10"},
43308 {42, riscv.REG_F11, "F11"},
43309 {43, riscv.REG_F12, "F12"},
43310 {44, riscv.REG_F13, "F13"},
43311 {45, riscv.REG_F14, "F14"},
43312 {46, riscv.REG_F15, "F15"},
43313 {47, riscv.REG_F16, "F16"},
43314 {48, riscv.REG_F17, "F17"},
43315 {49, riscv.REG_F18, "F18"},
43316 {50, riscv.REG_F19, "F19"},
43317 {51, riscv.REG_F20, "F20"},
43318 {52, riscv.REG_F21, "F21"},
43319 {53, riscv.REG_F22, "F22"},
43320 {54, riscv.REG_F23, "F23"},
43321 {55, riscv.REG_F24, "F24"},
43322 {56, riscv.REG_F25, "F25"},
43323 {57, riscv.REG_F26, "F26"},
43324 {58, riscv.REG_F27, "F27"},
43325 {59, riscv.REG_F28, "F28"},
43326 {60, riscv.REG_F29, "F29"},
43327 {61, riscv.REG_F30, "F30"},
43328 {62, riscv.REG_F31, "F31"},
43329 {63, 0, "SB"},
43330 }
43331 var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 7, 8, 17, 18, 19, 20, 21, 22}
43332 var paramFloatRegRISCV64 = []int8{41, 42, 43, 44, 45, 46, 47, 48, 39, 40, 49, 50, 51, 52, 53, 54}
43333 var gpRegMaskRISCV64 = regMask(1006632944)
43334 var fpRegMaskRISCV64 = regMask(9223372034707292160)
43335 var specialRegMaskRISCV64 = regMask(0)
43336 var framepointerRegRISCV64 = int8(-1)
43337 var linkRegRISCV64 = int8(0)
43338 var registersS390X = [...]Register{
43339 {0, s390x.REG_R0, "R0"},
43340 {1, s390x.REG_R1, "R1"},
43341 {2, s390x.REG_R2, "R2"},
43342 {3, s390x.REG_R3, "R3"},
43343 {4, s390x.REG_R4, "R4"},
43344 {5, s390x.REG_R5, "R5"},
43345 {6, s390x.REG_R6, "R6"},
43346 {7, s390x.REG_R7, "R7"},
43347 {8, s390x.REG_R8, "R8"},
43348 {9, s390x.REG_R9, "R9"},
43349 {10, s390x.REG_R10, "R10"},
43350 {11, s390x.REG_R11, "R11"},
43351 {12, s390x.REG_R12, "R12"},
43352 {13, s390x.REGG, "g"},
43353 {14, s390x.REG_R14, "R14"},
43354 {15, s390x.REGSP, "SP"},
43355 {16, s390x.REG_F0, "F0"},
43356 {17, s390x.REG_F1, "F1"},
43357 {18, s390x.REG_F2, "F2"},
43358 {19, s390x.REG_F3, "F3"},
43359 {20, s390x.REG_F4, "F4"},
43360 {21, s390x.REG_F5, "F5"},
43361 {22, s390x.REG_F6, "F6"},
43362 {23, s390x.REG_F7, "F7"},
43363 {24, s390x.REG_F8, "F8"},
43364 {25, s390x.REG_F9, "F9"},
43365 {26, s390x.REG_F10, "F10"},
43366 {27, s390x.REG_F11, "F11"},
43367 {28, s390x.REG_F12, "F12"},
43368 {29, s390x.REG_F13, "F13"},
43369 {30, s390x.REG_F14, "F14"},
43370 {31, s390x.REG_F15, "F15"},
43371 {32, 0, "SB"},
43372 }
43373 var paramIntRegS390X = []int8(nil)
43374 var paramFloatRegS390X = []int8(nil)
43375 var gpRegMaskS390X = regMask(23551)
43376 var fpRegMaskS390X = regMask(4294901760)
43377 var specialRegMaskS390X = regMask(0)
43378 var framepointerRegS390X = int8(-1)
43379 var linkRegS390X = int8(14)
43380 var registersWasm = [...]Register{
43381 {0, wasm.REG_R0, "R0"},
43382 {1, wasm.REG_R1, "R1"},
43383 {2, wasm.REG_R2, "R2"},
43384 {3, wasm.REG_R3, "R3"},
43385 {4, wasm.REG_R4, "R4"},
43386 {5, wasm.REG_R5, "R5"},
43387 {6, wasm.REG_R6, "R6"},
43388 {7, wasm.REG_R7, "R7"},
43389 {8, wasm.REG_R8, "R8"},
43390 {9, wasm.REG_R9, "R9"},
43391 {10, wasm.REG_R10, "R10"},
43392 {11, wasm.REG_R11, "R11"},
43393 {12, wasm.REG_R12, "R12"},
43394 {13, wasm.REG_R13, "R13"},
43395 {14, wasm.REG_R14, "R14"},
43396 {15, wasm.REG_R15, "R15"},
43397 {16, wasm.REG_F0, "F0"},
43398 {17, wasm.REG_F1, "F1"},
43399 {18, wasm.REG_F2, "F2"},
43400 {19, wasm.REG_F3, "F3"},
43401 {20, wasm.REG_F4, "F4"},
43402 {21, wasm.REG_F5, "F5"},
43403 {22, wasm.REG_F6, "F6"},
43404 {23, wasm.REG_F7, "F7"},
43405 {24, wasm.REG_F8, "F8"},
43406 {25, wasm.REG_F9, "F9"},
43407 {26, wasm.REG_F10, "F10"},
43408 {27, wasm.REG_F11, "F11"},
43409 {28, wasm.REG_F12, "F12"},
43410 {29, wasm.REG_F13, "F13"},
43411 {30, wasm.REG_F14, "F14"},
43412 {31, wasm.REG_F15, "F15"},
43413 {32, wasm.REG_F16, "F16"},
43414 {33, wasm.REG_F17, "F17"},
43415 {34, wasm.REG_F18, "F18"},
43416 {35, wasm.REG_F19, "F19"},
43417 {36, wasm.REG_F20, "F20"},
43418 {37, wasm.REG_F21, "F21"},
43419 {38, wasm.REG_F22, "F22"},
43420 {39, wasm.REG_F23, "F23"},
43421 {40, wasm.REG_F24, "F24"},
43422 {41, wasm.REG_F25, "F25"},
43423 {42, wasm.REG_F26, "F26"},
43424 {43, wasm.REG_F27, "F27"},
43425 {44, wasm.REG_F28, "F28"},
43426 {45, wasm.REG_F29, "F29"},
43427 {46, wasm.REG_F30, "F30"},
43428 {47, wasm.REG_F31, "F31"},
43429 {48, wasm.REGSP, "SP"},
43430 {49, wasm.REGG, "g"},
43431 {50, 0, "SB"},
43432 }
43433 var paramIntRegWasm = []int8(nil)
43434 var paramFloatRegWasm = []int8(nil)
43435 var gpRegMaskWasm = regMask(65535)
43436 var fpRegMaskWasm = regMask(281474976645120)
43437 var fp32RegMaskWasm = regMask(4294901760)
43438 var fp64RegMaskWasm = regMask(281470681743360)
43439 var specialRegMaskWasm = regMask(0)
43440 var framepointerRegWasm = int8(-1)
43441 var linkRegWasm = int8(-1)
43442
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